CN1752942A - Monitoring diagnosis device of computer main board failure - Google Patents
Monitoring diagnosis device of computer main board failure Download PDFInfo
- Publication number
- CN1752942A CN1752942A CN 200410080121 CN200410080121A CN1752942A CN 1752942 A CN1752942 A CN 1752942A CN 200410080121 CN200410080121 CN 200410080121 CN 200410080121 A CN200410080121 A CN 200410080121A CN 1752942 A CN1752942 A CN 1752942A
- Authority
- CN
- China
- Prior art keywords
- circuit
- signal
- main board
- computer main
- display unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The present invention discloses a monitoring diagnostic device of computer main-broad fault. It includes the following components: display unit for displaying running state of the described computer main board in the process of starting computer; first interface for obtaining electrically computer-starting time-sequence signal of computer main board from the computer main board; and signal processing unit for receiving the above-mentioned time-sequence signal and converting it into display unit drive signal to drive display unit.
Description
Technical field
The present invention relates to computer glitch detecting and area of maintenance, especially relate to a kind of monitoring diagnosis device of computer main board failure.
Background technology
Along with the development of infotech, the application of computer is increasingly extensive, for people's work, studying and living bring great convenience.But computer breaks down and can hardly be avoided, and in order in time to safeguard, need correctly locate the reason that causes fault to occur.
As everyone knows, in the start process of computer, some that self had on the mainboard detect supervisory circuit and can detect the voltage on the mainboard, temperature, and BIOS (Basic Input or Output System (BIOS)) discerns and detect its duty to the model of CPU (central processing unit), internal memory, hard disk and outer plug-in card simultaneously.And all information that detection can be obtained are noted, and the display that passes through then to be connected shows.Therefore, if display can normally show behind the booting computer, the user can know like a cork whether the work of mainboard each several part is normal.When having fault, can also know the information relevant, thereby safeguard with fault; Perhaps failure condition is informed the maintenance personal truly,, carry less equipment and guarantee and deal with problems as early as possible so that the maintenance personal can prepare maintenance of equipment targetedly before on-site maintenance.
But display can show because the fault of mainboard causes not having under many circumstances.The performance of not having computer when showing roughly can be divided into two classes: under a kind of situation, the fan of CPU and power supply is also rotating; Under the another kind of situation, (before display begins to show) computer shut down automatically (fan of CPU and power supply stops operating) after start a period of time.When display occurs not having when showing, because the user can't be known failure message by display screen, and, most of computer user is known little about it to the hardware configuration of computer, also can't judge it is what fault partly occurred, therefore, the maintenance personal can't obtain required information immediately actually.
Usually, do not have when apparent, can solve problem by two kinds of approach at display.
Approach one: the user delivers to the maintenance station with the computer that breaks down, and is keeped in repair by the specialized maintenance personnel of maintenance station.Fault elimination back goes to the maintenance station that computer is reclaimed by the user or the maintenance station personnel are sent over to the user.
Approach two: the maintenance personal considers the various reasons that may break down, and carries a large amount of maintenances of equipment and instrument and carries out on-site maintenance.
With regard to first kind of approach, a user may can also tolerate once in a while, if but number of times is more, and allow the user produce complaint easily, the after sale service to company simultaneously forms bad impression.
Though second kind of approach can reduce user's trouble,, but be a kind of waste of very big resource for computer company.Can imagine that the maintenance computer personnel can't the failure judgement reason, the measuring equipment and the maintenance of equipment that have to carry a large amount of heavinesses keep in repair.And owing to can't carry out sufficient preparation in advance, even maintenance personal's on-site maintenance, also can not guarantee once just can deal with problems, may must run for the second time, for the third time ... .., like this, resource to computer company has caused great waste, simultaneously, the user can doubt also that to maintenance personal's maintenance level repeatedly maintenance comes and goes the normal use that still can influence the user.
When apparent, can not understand failure condition intuitively in order having yet, to have occurred having the fault detect card of PCI or ISA interface in the prior art at display.
A kind of fault detect card of prior art can be consulted No. the 01224987th, the Chinese utility model patent of on September 11st, 2002 bulletin.This fault detect card can directly be inserted on the PCI or ISA slot of mainboard.Its principle of work is: behind the booting computer, BIOS is the strict test of row during to each assemblies such as the circuit of system, storer, keyboard, video section, hard disk, floppy drives, and analyzes the hard-disk system configuration, the basic I/O that has disposed is provided with carries out initialization, after all are normal, reboot operating system; Simultaneously, by PCI or ISA slot the detection signal that the BIOS internal processes produces is sent on the fault detect card, the charactron by test card shows current ruuning situation, thereby shows testing result intuitively.
But this fault detect jig has the some shortcomings part: at first, because this fault detect card detection signal of producing of treatments B IOS internal processes only, therefore can't detect behind the booting computer failure condition up to BIOS is normal before starting; Secondly, because this fault detect cartoon is crossed PCI or the ISA slot obtains detection signal, so it generally need be arranged at cabinet inside, that is to say, must open cabinet could show testing result with this card insertion slot, and this obviously is unpractical to the user; Once more, because this fault detect calorie requirement obtains detection signal by PCI or ISA slot, therefore, I/O address code translator, code lock storage, code decoder driver etc. must be set, its cost is higher and the course of work is comparatively complicated.
In addition, also have some watch-dogs with little LCDs in the prior art, though do not need the user to open cabinet, because the cost height, general just can be equipped with on server, and the user of normal domestic use computer is difficult to accept its fancy price.And this watch-dog also can't detect from server start back up to the normal failure condition before that starts of BIOS.
Summary of the invention
The technical matters that the present invention solves is to provide a kind of monitoring diagnosis device of computer main board failure, can show the running status of booting computer process simple and direct, intuitively, and cost is lower.
For this reason, the technical scheme of technical solution problem of the present invention is: a kind of monitoring diagnosis device of computer main board failure is provided, comprises:
Display unit is used to show the running status of computer main board described in the booting computer process;
First interface is used for from the start clock signal that powers on of described computer main board acquisition computer main board;
Signal processing unit is used to receive the start clock signal that powers on that described first interface is imported, and is converted into display unit drive signal rear drive display unit.
Preferably, the described start clock signal that powers on comprises reservation power supply signal, power switch signal, working power signal, working power over-current signal and South Bridge chip reset signal; Described signal processing unit comprises reserves power supply signal treatment circuit, power switch signal treatment circuit, working power signal processing circuit, working power over-current signal treatment circuit and South Bridge chip reset signal treatment circuit.
Preferably, described reservation power supply signal treatment circuit comprises first comparator circuit, is connected to the reference voltage circuit of described first comparator circuit, one input end; Reserve another input end that power supply signal is input to first comparator circuit; The output terminal of described first comparator circuit is connected to display unit;
Described power switch signal treatment circuit comprises power switch signal shaping circuit, driving circuit; Described power switch signal is input to driving circuit after the signal transformation circuit shaping, the output terminal of described driving circuit is connected to display unit;
Described working power signal processing circuit comprises second comparator circuit, is connected to the reference voltage circuit of described second comparator circuit, one input end; The working power signal is input to another input end of second comparator circuit; The output terminal of described second comparator circuit is connected to display unit;
Described working power over-current signal treatment circuit comprises the 3rd comparator circuit and d type flip flop; The output of the 3rd comparator circuit connects the clock pin of d type flip flop, and power switch signal is input to the zero clearing pin of d type flip flop, and the Q pin of d type flip flop connects display unit;
Described South Bridge chip reset signal treatment circuit comprises reset signal shaping circuit, low level delay circuit; Described reset signal is input to the low level delay circuit after the shaping circuit shaping; The output terminal of described low level delay circuit is connected to display unit.
Preferably, comprise power switch signal overcurrent delay circuit in the driving circuit of described power switch signal treatment circuit.
Preferably, described working power signal processing circuit also comprises and door, between the output terminal and first display circuit of second comparator circuit.
Preferably, the monitoring diagnosis device of computer main board failure also comprises:
Output control unit is used to obtain the detected running status of Basic Input or Output System (BIOS) of described computer main board, and according to the general input and output pin output detection signal of described running status controlling computer inside chip;
Second interface is used for receiving described detection signal from described general input and output pin;
Driver element is used for basis from the described display unit of the detection signal drives of described second interface.
Preferably, described general input and output pin is the general input and output pin of South Bridge chip, central processing unit, north bridge chips, input and output control chip or firmware controller.
Preferably, described display unit is a light emitting diode matrix, connects described signal processing unit and driver element, under the driving of signal processing unit and driver element, forms with the computer main board corresponding light of start clock signal or detection signal that powers on and makes up.
Preferably, described light emitting diode matrix comprises first light emitting diode matrix and second light emitting diode matrix, connects described signal processing unit and driver element respectively.
Preferably, described display unit also comprises indicating device, is used to indicate the duty of driver element.
Preferably, described display unit is digital display tube or microphone device, is connected to described signal processing unit and driver element; Described digital display tube adopts different numbers to indicate the running status of described computer main board; Described microphone device adopts different sound frequency, sound duration or different voice suggestions to indicate the running status of described computer main board.
Preferably, the trouble location of described detection signal correspondence comprises central processing unit part, storage area, keyboard portion, PCI part, VGA part and main board.
Preferably, described output control unit is integrated in the Basic Input or Output System (BIOS).
With respect to prior art, the invention has the beneficial effects as follows: at first, since monitoring diagnosis device of the present invention have BIOS is normal some key signals on the mainboard (reserving the reset signal of power supply signal, mainboard working power signal, South Bridge chip PCI partial circuit etc. as 5V) are incorporated into before starting as described in device first interface and to as described in the key signal signal processing circuit and first display unit handled, thereby can show simple and direct, intuitively behind the booting computer up to the normal failure condition before that starts of BIOS; Secondly, because the present invention does not need to take PCI slot and ISA slot, only need to get final product by first interface of a self-defining connection mainboard and monitoring diagnosis device, make monitoring diagnosis device be easy to be installed on the cabinet, need not to open cabinet just can observation state, makes that demonstration simpler, testing result is installed is more directly perceived and cost is cheaper; Once more, the present invention can see intuitively whether the state of each major part circuit of computer main board is normal under the condition by display not, alleviated maintenance computer personnel's unnecessary work, has reduced some unnecessary troubles of computer user
In addition, because the running status that the present invention detects according to BIOS by the South Bridge chip output control unit is controlled GPIO (the general input and output pin) output state of South Bridge chip, and then drive second display unit and show testing result, and GPIO is some general controls interfaces of reserving in the South Bridge chip, therefore make entire work process need not to adopt PCI and ISA slot to realize, and the circuit of monitoring diagnosis device constitute comparatively simply, cost is lower.
Description of drawings
Fig. 1 is the theory diagram of the monitoring diagnosis device of computer main board failure of the present invention;
Fig. 2 is the synoptic diagram of an embodiment of interface among the present invention;
Fig. 3 is the circuit diagram of the embodiment of described reservation power supply signal treatment circuit;
Fig. 4 is the circuit diagram of the embodiment of described power switch signal treatment circuit;
Fig. 5 is the circuit diagram of the embodiment of described working power signal processing circuit;
Fig. 6 is the circuit diagram of the embodiment of described working power over-current signal treatment circuit;
Fig. 7 is the circuit diagram of the embodiment of described South Bridge chip reset signal treatment circuit;
Fig. 8 is the synoptic diagram that the GPIO of South Bridge chip is connected with driver element;
Fig. 9 is the synoptic diagram of the embodiment of GPIO driving circuit among the present invention;
Figure 10 is the structural representation of the monitoring diagnosis device embodiment of computer main board failure of the present invention.
Embodiment
When booting computer, the monitoring diagnosis device of computer main board failure of the present invention can be known the running status and the failure message of computer main board intuitively, even thereby do not have under the apparent situation at display, also can monitor hardware fault and write down its failure message, can in time grasp the reason that fault takes place to make things convenient for user and maintenance personal.
Seeing also Fig. 1, is the theory diagram of the monitoring diagnosis device of computer main board failure of the present invention.
Described monitoring diagnosis device comprises interface 110, driver element 120, signal processing unit 130 and display unit 140.Described interface 110 is used to receive from the signal of mainboard 900 and sends to driver element 120 or signal processing unit 130, and display unit 140 shows the running status and the failure message of described mainboard 900 under the control of driver element 120 or signal processing unit 130.
After booting computer and the normal startup of BIOS, described driver element 120 is used for handling the signal by the general input and output pin of South Bridge chip (GPIO) output, and this signal produces according to the detected mainboard information of BIOS.
Because fault may occur in booting computer to the normal preceding time period of startup of BIOS, needs this moment to use signal processing unit 130 to monitor the state of main board circuit.That is to say that in the process of booting computer, described signal processing unit 130 is used to handle some key signals from mainboard 900, mainly is the start clock signal that powers on.
In an embodiment of the invention, the described start clock signal that powers on include but not limited to reserve power supply signal (5VSB), power switch signal (PS-ON#), working power signal (+5V ,+12V ,+3.3V), working power over-current signal (OverC) and South Bridge chip reset signal (PCT-RST#) etc.Correspondingly, described signal processing unit 130 comprises reservation power supply signal treatment circuit 131, power switch signal treatment circuit 132, working power signal processing circuit 133, working power over-current signal treatment circuit 134 and South Bridge chip reset signal treatment circuit 135.
Wherein, described 5VSB refers to the 5V Stand By power supply signal on the mainboard; The PS-ON# signal refers on the mainboard power interface place control power supply to begin and out-of-work signal, and low level is effective; + 5V ,+12V and+3.3V refers on the mainboard+the 5V power supply signal ,+12V power supply signal and+the 3.3V power supply signal; The PCIRST# signal refers on the mainboard reset signal of PCI (Peripheral ComponentInterface, peripheral devices linkage interface) partial circuit on the South Bridge chip, and low level is effective.
For the ease of the understanding of the present invention, simply introduce the process of booting computer below.
At first, plug in the 5VSB power initiation of mainboard 900; Press power switch, produce the PS-ON# signal on the mainboard 900 and start working with the control power supply; Power supply begins to mainboard 900 and miscellaneous equipment power supply, and this moment, voltage was also unstable; After the power supply supply is normal, produce the PCIRST# signal; BIOS starts subsequently.
POST (Power On Self Test, Power-On Self-Test) is at first carried out in the startup of BIOS, and the main task of POST is that can whether some key equipments in the detection system exist and operate as normal, as internal memory and video card etc.Because the testing process of POST is before the display card initialization, if therefore in the process of POST self check, found some fatal errors, as do not find internal memory or in when having problem (the POST process is only checked the 640K conventional memory), be on the screen of display, to show.
Next BISO finishes the initialization of display card and other equipment; The type of detection CPU and frequency of operation, all memory sizes of Test Host; Some standard hardware equipment of installing in the detection system, these equipment comprise: the equipment that hard disk, CD-ROM, floppy drive, serial line interface and parallel interface etc. are connected; The PnP device of installing in detection and the configuration-system; At last, BIOS analyzes the hard-disk system configuration, the basic I/O that has disposed is provided with carries out initialization, after all are normal, reboots operating system.
Correspondingly, monitoring diagnosis device of the present invention can be divided into two parts: wherein, signal processing unit 130 is monitored the BIOS that starts shooting and is started the state of main board circuit before; POST process after driver element 120 monitoring BIOS start.And display unit 140 also can be divided into first display unit and second display unit, corresponds respectively to signal processing unit 130 and driver element 120.
Be understandable that, also can be used in the operate as normal of signal processing unit 130 behind booting computer the partial circuit of mainboard is monitored.
The present invention is described in detail below in conjunction with embodiment.
Seeing also Fig. 2, is the synoptic diagram of an embodiment of interface among the present invention.The interface 110 of described embodiment adopts 2 * 6Pin counnter attack socket, and its signal definition is as shown in table 1.
Table 1
| Sequence number | Pin definitions | Signal location and |
| 1 | 5VSB | Power supply 5VSB output is carried out first step diagnosis to the ATX power supply, if there is not 5VSB, illustrates that power supply is bad. |
| 2 | PS-ON# | Take from the ATX power interface, be used to judge whether mainboard start logic is normal. |
| 3 | + 12V | Take from the ATX power interface, be used to judge whether overcurrent protection and whether under-voltage. |
| 4 | + 5V | Take from the ATX power interface, be used to judge whether overcurrent protection and whether under-voltage. |
| 5 | + 3.3V | Take from the ATX power interface, be used to judge whether overcurrent protection and whether under-voltage. |
| 6 | PCIRST# | Take from the PCI slot, be used to examine and survey the mainboard logic that powers on and whether realize whether normally send the comprehensive RESET signal of system. |
| 7 | GND | Power supply ground |
| 8 | GPIO1# | With other GPIO# combination, display system POST information.Take from south bridge GPIO |
| 9 | GPIO2# | With other GPIO# combination, display system POST information.Take from south bridge GPIO |
| 10 | GPIO3# | With other GPIO# combination, display system POST information.Take from south bridge GPIO |
| 11 | GPIO4# | With other GPIO# combination, display system POST information.Take from south bridge GPIO |
| 12 | ClearCMOS | Remove CMOS pin is set, be connected to mainboard Clear cmos circuit. |
Wherein, pin one to 6 is ingredients of first interface 111, is connected to signal processing unit 130, is used for gathering between normal the startup to BIOS at booting computer the state and the failure message of mainboard top circuit; Pin 8 to 11 is ingredients of second interface 112, is connected to driver element 120, is used for normally starting the output state that the GPIO of the South Bridge chip of being controlled by BIOS is gathered in the back at BIOS.
Seeing also Fig. 3, is the circuit diagram of the embodiment of described reservation power supply signal treatment circuit 131.
Described reservation power supply signal treatment circuit 131 comprises the first comparator circuit U2A, be connected to the described first comparator circuit U2A 3 pin by R3, Q1, C1, C3 and R4 reference voltage circuit; Described reference voltage circuit is a mu balanced circuit, provides+2.5V voltage; Reserve 2 pin that power supply signal 5VSB is input to the first comparator circuit U2A, the input of 2 pin is by regulating resistance, makes that input voltage value is 2.5V when 5VSB reaches 4.75V; 1 pin of the described first comparator circuit U2A is connected to the LED 1 of display unit.
So when 5VSB imports when too high, the 2 pin input voltages of U2A are higher than 2.5V, 1 pin of U2A is output as low, and LED1 is bright; Otherwise LED1 goes out.
Seeing also Fig. 4, is the circuit diagram of the embodiment of described power switch signal treatment circuit 132.
Described power switch signal treatment circuit 132 comprises power switch signal shaping circuit U1B, by Q12, the driving circuit that Q11 and Q3 formed; Described power switch signal PS-ON# is input to driving circuit after signal transformation circuit U1B shaping, the output terminal of described driving circuit is connected to the LED 2 of display unit.
The PS-ON# signal is shaped as PS-Buf by U1B, and then controls the state of the on and off of LED 2 by driving circuit.When the PS-ON# signal was effective (low level), LED2 was bright; Otherwise for going out.
Wherein, triode Q11 plays the effect of a rapid discharge in this circuit.When overcurrent protection appears in booting computer, can stop at once that is to say to main board power supply; the PS-ON# signal is just effective, becomes invalidly again very soon, keeps effective time very short; if will embody on LED 2 during this period of time, people's naked eyes are difficult to see clearly.In order to prolong during this period of time, added Q11.When the PS-ON# signal by hypermutation when low, the Q11 conducting, big capacitor C 6 is by the Q11 rapid discharge, LED 2 brightens very soon.Otherwise when the PS-ON# signal is become when high by low, Q11 turn-offs, and 5VSB slowly charges to C6 by big resistance R 69.Q3 is conducting at once not, just can go out so LED 2 will wait for a period of time.Like this, the user just can see this variation by naked eyes.
Seeing also Fig. 5, is the circuit diagram of the embodiment of described working power signal processing circuit 133.
The principle of work of described working power signal processing circuit 133 is roughly the same with the principle of reserving power supply signal treatment circuit 131.Fig. 5 is the example explanation with+12V, and 2 pin that it comprises the second comparator circuit U3B, be connected to the described second comparator circuit U3B provide the reference voltage circuit of 2.5V; Working power signal+12V is input to 3 pin of the second comparator circuit U3B; The 1 pin output comparative result of the described second comparator circuit U3B.Come monitor voltage whether too high by the second comparator circuit U3B.
As long as for+12V ,+5V ,+have an instability can drive display unit among the 3.3V, output that can three second comparator circuits by with door (figure does not show) do one and relation, remove to drive the light emitting diode of display unit again.
Seeing also Fig. 6, is the circuit diagram of the embodiment of described working power over-current signal treatment circuit 134.
Described working power over-current signal treatment circuit 134 comprises the 3rd comparator circuit U3A and d type flip flop U6A; Output 1 pin of the 3rd comparator circuit U3A connects the clock pin CLK of d type flip flop by triode Q15, power switch signal PS-ON# is shaped as the zero clearing pin CL that is input to d type flip flop U6A behind the PS-Buf by triode Q17, and the Q pin of d type flip flop U6A connects the LED 3 of display unit.Described LED 3 adopts dichromatic LED.
If+12V ,+5V or+3.3V voltage has overcurrent to produce, 1 pin of U3A can be exported a high impulse in short-term; Simultaneously, because power switch signal PS-ON# still exists, this high level is done a level conversion by triode Q17, enters d type flip flop U6A.At the level negative edge, over-current signal is latched.The Q end output driven for emitting lights diode (LED) 3 of U6A embodies the overcurrent pulse of latching by LED 3.
Seeing also Fig. 7, is the circuit diagram of the embodiment of described South Bridge chip reset signal treatment circuit 135.
The low level delay circuit that described South Bridge chip reset signal treatment circuit 135 comprises the reset signal shaping circuit be made up of R68, R7, Q4 and U1A, is made up of R1, Q16, C5, R60 and Q2; Described reset signal PCIRST# is input to the low level delay circuit after the shaping circuit shaping; The output terminal of described low level delay circuit is connected to the LED 5 of display unit.
Its principle of work is: as PCIRST# effectively when (low level), Q4 turn-offs, the Q16 conducting, and the Q2 conducting, LED5 goes out.Otherwise, when PCIRST# is high level, the Q4 conducting, Q16 turn-offs, and Q2 turn-offs, and LED5 is bright.
Seeing also Fig. 8, is the synoptic diagram that the GPIO of South Bridge chip is connected with driver element 120.
As everyone knows, BIOS can obtain the state of system temperature, CPU, internal memory, hard disk etc. from South Bridge chip and Super I/O chip (input and output control chip) in start process.The present invention utilizes South Bridge chip output control unit 200 to obtain the detected running status of BIOS of described computer main board, and controls the GPIO output detection signal of South Bridge chip according to described running status; Subsequently, second interface 112 receives described detection signal and is transferred to driver element 120 from the GPIO of South Bridge chip; Driver element 120 bases are from the described display unit 140 of the detection signal drives of described second interface 112; The running status of computer main board described in the display unit 140 corresponding demonstration booting computer processes.
Wherein, described South Bridge chip output control unit 200 can be arranged on the solidification software on the mainboard, can be integrated in the BIOS, and this does not give unnecessary details.
Monitor different states according to BIOS, the GPIO output state of control South Bridge chip drives display unit 140 by the driver element on the monitoring diagnosis device 120.
With reference to figure 9, be the synoptic diagram of the embodiment of single GPIO driving circuit.Drive the LED 6 of display unit from the signal of GPIO1.
Not having the possible cause that shows in view of main frame start has multiplely, can classify according to the position that produces fault, as CPU part, MEMORY (storage) partly, keyboard portion, PCI part, VGA partly and main board.And adopt a plurality of light emitting diodes, and the corresponding light emitting diode coding in each trouble spot, detailed row are as table 2.
Table 2
| The trouble spot | Led state (LED6,7,8,9) |
| CPUPart | Bright, go out, go out, go out |
| Memory Part | Go out, go out, bright, go out |
| Keyboard Part | Go out, go out, go out, bright |
| PCIPart | Bright, go out, go out, bright |
| VGAPart | Go out, bright, go out, bright |
| Mainboard Part | Go out, bright, go out, go out |
In sum, essence of the present invention is to drive display unit afterwards by some key signals on the mainboard being guided on the monitoring diagnosis device, being handled, and informs the duty of the current main board circuit of user in mode intuitively.Even thereby not having under the apparent situation at booting computer, the user also can obtain the state and the failure message of mainboard top circuit by monitoring diagnosis device.
In the foregoing description, display unit adopts a plurality of independent LED to realize.Be appreciated that the output that to adopt other forms to realize failure message.As, can adopt digital display tube, need this moment configuration to produce the processor chips that corresponding encoded drives digital display tube according to the signal of described each several part circuit output; Can also adopt microphone device to realize the prompting of fault, described microphone device can adopt different sound frequencies, sound duration or different voice suggestions to indicate the running status of described computer main board.
In addition, in the foregoing description, described signal processing unit 130 connects the first light emitting diode matrix LED1-LED5; Described driver element 120 connects the second light emitting diode matrix LED6-LED9.The combination that is appreciated that light emitting diode is not limited to this embodiment.Also can adopt other modes: as, adopt the light emitting diode matrix of six light emitting diodes of tool, be connected to signal processing unit 130 and driver element 120, under the driving of signal processing unit 130 and driver element 120, form with the computer main board corresponding light of start clock signal or detection signal that powers on and make up.As shown in table 3.
Table 3
| The trouble spot | Led state (LED1,2,3,4,5,6) |
| CPUPart | *, bright, go out, go out, go out, bright |
| Memory Part | *, go out, go out, bright, go out, bright |
| Keyboard Part | *, go out, go out, go out, bright, bright |
| PCIPart | *, bright, go out, go out, bright, bright |
| VGAPart | *, go out, bright, go out, bright, bright |
| Mainboard Part | *, go out, bright, go out, go out, bright |
| The 5VSB signal | Go out, *, *, *, *, go out |
| PS-ON# speech number | *, go out, *, *, *, go out |
| +12V、+5V、+3.3V | *, *, go out, *, *, go out |
| OverC | *, *, *, go out, *, go out |
| PCIRST# | *, *, *, *, go out, go out |
Wherein, according to the state of LED6, can judge exactly that current display unit is to be driven by signal processing unit 130 or driver element 120.Can certainly adopt other indicating devices, whether prompting BIOS normally starts.
In addition, driven for emitting lights diode array again after also can being encoded by coding unit by the signal after a plurality of processing circuit processes of signal processing unit 130 is not limited to described each treatment circuit of embodiment corresponding independent LED respectively.The process chip that can adopt this coding unit realizes, also can adopt discrete device to realize that this does not give unnecessary details.At this moment, if can make signal processing unit 130 and driver element 120 driven for emitting lights diode arrays the time, the combination of coding is not disturbed mutually, can save to be used to the indicating device of pointing out BIOS whether normally to start yet.
See also Figure 10, monitoring diagnosis device of the present invention comprises interface section 300, cable 400 and diagnostic card 500.Wherein, interface section 300 comprises first interface 111 and second interface 112 (referring to Fig. 2), is connected to the appropriate section of mainboard 900; Diagnostic card 500 is connected with mainboard by cable 400.
On the one hand, the function that diagnostic card 500 will provide is by some key signals on the mainboard are guided on the diagnostic card 500, and carry out shaping, latch, processing back such as driving inserts the display circuit of being made up of light emitting diode and driving circuit 510, the on and off by light emitting diode of the state of these signals are showed, give one of user impression intuitively.
On the other hand, combine with BIOS, BIOS can detect hardware status information in the start process when related chip and circuit are carried out initialization, according to predefined relation, the output state of the GPIO of control South Bridge chip, and then the combination of the on and off by several light emitting diodes, these information representations are come out.
Certainly, except the GPIO that utilizes South Bridge chip represents the failure message, can also adopt the input and output pin of other chips of computer inside to realize this function, as central processing unit, north bridge chips, SuperI/O chip (input and output control chip), FIRMWARE HUB (firmware controller) etc.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (13)
1. the monitoring diagnosis device of a computer main board failure is characterized in that, comprising:
Display unit is used to show the running status of computer main board described in the booting computer process;
First interface is used for from the start clock signal that powers on of described computer main board acquisition computer main board;
Signal processing unit is used to receive the start clock signal that powers on that described first interface is imported, and is converted into display unit drive signal rear drive display unit.
2. the monitoring diagnosis device of computer main board failure according to claim 1 is characterized in that: the described start clock signal that powers on comprises reserves power supply signal, power switch signal, working power signal, working power over-current signal and South Bridge chip reset signal; Described signal processing unit comprises reserves power supply signal treatment circuit, power switch signal treatment circuit, working power signal processing circuit, working power over-current signal treatment circuit and South Bridge chip reset signal treatment circuit.
3. the monitoring diagnosis device of computer main board failure according to claim 2, it is characterized in that: described reservation power supply signal treatment circuit comprises first comparator circuit, is connected to the reference voltage circuit of described first comparator circuit, one input end; Reserve another input end that power supply signal is input to first comparator circuit; The output terminal of described first comparator circuit is connected to display unit;
Described power switch signal treatment circuit comprises power switch signal shaping circuit, driving circuit; Described power switch signal is input to driving circuit after the signal transformation circuit shaping, the output terminal of described driving circuit is connected to display unit;
Described working power signal processing circuit comprises second comparator circuit, is connected to the reference voltage circuit of described second comparator circuit, one input end; The working power signal is input to another input end of second comparator circuit; The output terminal of described second comparator circuit is connected to display unit;
Described working power over-current signal treatment circuit comprises the 3rd comparator circuit and d type flip flop; The output of the 3rd comparator circuit connects the clock pin of d type flip flop, and power switch signal is input to the zero clearing pin of d type flip flop, and the Q pin of d type flip flop connects display unit;
Described South Bridge chip reset signal treatment circuit comprises reset signal shaping circuit, low level delay circuit; Described reset signal is input to the low level delay circuit after the shaping circuit shaping; The output terminal of described low level delay circuit is connected to display unit.
4. the monitoring diagnosis device of computer main board failure according to claim 3 is characterized in that: comprise power switch signal overcurrent delay circuit in the driving circuit of described power switch signal treatment circuit.
5. the monitoring diagnosis device of computer main board failure according to claim 4 is characterized in that: described working power signal processing circuit also comprises and door, between the output terminal and first display circuit of second comparator circuit.
6. according to the monitoring diagnosis device of each described computer main board failure of claim 1 to 5, it is characterized in that, also comprise:
Output control unit is used to obtain the detected running status of Basic Input or Output System (BIOS) of described computer main board, and according to the general input and output pin output detection signal of described running status controlling computer inside chip;
Second interface is used for receiving described detection signal from described general input and output pin;
Driver element is used for basis from the described display unit of the detection signal drives of described second interface.
7. the monitoring diagnosis device of computer main board failure according to claim 6, it is characterized in that: described general input and output pin is the general input and output pin of South Bridge chip, central processing unit, north bridge chips, input and output control chip or firmware controller.
8. the monitoring diagnosis device of computer main board failure according to claim 7, it is characterized in that: described display unit is a light emitting diode matrix, connect described signal processing unit and driver element, under the driving of signal processing unit and driver element, form with the computer main board corresponding light of start clock signal or detection signal that powers on and make up.
9. the monitoring diagnosis device of computer main board failure according to claim 8, it is characterized in that: described light emitting diode matrix comprises first light emitting diode matrix and second light emitting diode matrix, connects described signal processing unit and driver element respectively.
10. the monitoring diagnosis device of computer main board failure according to claim 8, it is characterized in that: described display unit also comprises indicating device, is used to indicate the duty of driver element.
11. the monitoring diagnosis device of computer main board failure according to claim 7 is characterized in that: described display unit is digital display tube or microphone device, is connected to described signal processing unit and driver element; Described digital display tube adopts different numbers to indicate the running status of described computer main board; Described microphone device adopts different sound frequency, sound duration or different voice suggestions to indicate the running status of described computer main board.
12. the monitoring diagnosis device of computer main board failure according to claim 6 is characterized in that: the trouble location of described detection signal correspondence comprises central processing unit part, storage area, keyboard portion, PCI part, VGA part and main board.
13. the monitoring diagnosis device of computer main board failure according to claim 6 is characterized in that: described output control unit is integrated in the Basic Input or Output System (BIOS).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100801218A CN100375054C (en) | 2004-09-23 | 2004-09-23 | Monitoring diagnosis device of computer main board failure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100801218A CN100375054C (en) | 2004-09-23 | 2004-09-23 | Monitoring diagnosis device of computer main board failure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1752942A true CN1752942A (en) | 2006-03-29 |
| CN100375054C CN100375054C (en) | 2008-03-12 |
Family
ID=36679801
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100801218A Expired - Fee Related CN100375054C (en) | 2004-09-23 | 2004-09-23 | Monitoring diagnosis device of computer main board failure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100375054C (en) |
Cited By (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102236596A (en) * | 2010-05-05 | 2011-11-09 | 英业达股份有限公司 | Display card state indication system |
| CN102419723A (en) * | 2011-12-31 | 2012-04-18 | 曙光信息产业股份有限公司 | Device and method for monitoring mainboard booting |
| CN102768633A (en) * | 2012-06-29 | 2012-11-07 | 浪潮电子信息产业股份有限公司 | Method for testing start and stop of server mainboard based on time series monitoring |
| CN102819477A (en) * | 2012-08-28 | 2012-12-12 | 曙光信息产业(北京)有限公司 | Board fault test method and fault test card |
| CN102999140A (en) * | 2012-05-30 | 2013-03-27 | 国家计算机网络与信息安全管理中心 | Power-on timing sequence control system and method of PCIE (Peripheral Component Interface Express) board card |
| CN103197996A (en) * | 2012-01-05 | 2013-07-10 | 纬创资通股份有限公司 | Startup detection circuit, computer system and startup detection method thereof |
| CN103294713A (en) * | 2012-02-29 | 2013-09-11 | 鸿富锦精密工业（深圳）有限公司 | Monitoring data memory system and method |
| CN103365335A (en) * | 2012-03-27 | 2013-10-23 | 鸿富锦精密工业(武汉)有限公司 | Signal processing circuit |
| CN103389405A (en) * | 2012-05-11 | 2013-11-13 | 鸿富锦精密工业(武汉)有限公司 | Discharging detection circuit |
| US8760312B2 (en) | 2008-10-29 | 2014-06-24 | Hewlett-Packard Development Company, L.P. | Component installation guidance |
| CN103970635A (en) * | 2014-04-28 | 2014-08-06 | 浪潮电子信息产业股份有限公司 | Server hardware fault self-diagnosis method |
| CN104155615A (en) * | 2014-07-11 | 2014-11-19 | 苏州市职业大学 | Computer power failure detecting instrument |
| CN104156290A (en) * | 2014-07-11 | 2014-11-19 | 苏州市职业大学 | Computer hard disk fault detector |
| CN104155597A (en) * | 2014-07-11 | 2014-11-19 | 苏州市职业大学 | Fault detector for computer main board |
| CN104424086A (en) * | 2013-09-06 | 2015-03-18 | 新唐科技股份有限公司 | Computer error detection module and method |
| CN104572378A (en) * | 2015-01-28 | 2015-04-29 | 合肥联宝信息技术有限公司 | Code debugging and diagnosis method and device of embedded controller |
| CN104794042A (en) * | 2014-01-22 | 2015-07-22 | 鸿富锦精密工业(武汉)有限公司 | Computer detecting system and method |
| CN106547503A (en) * | 2015-09-21 | 2017-03-29 | 龙芯中科技术有限公司 | Computer system malfunction is launched and method of reseptance, apparatus and system |
| CN106547653A (en) * | 2015-09-21 | 2017-03-29 | 龙芯中科技术有限公司 | Computer system fault condition detection method, apparatus and system |
| CN106547668A (en) * | 2015-09-21 | 2017-03-29 | 龙芯中科技术有限公司 | Computer system fault alarming method, apparatus and system |
| CN109032888A (en) * | 2018-06-28 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of server start-up course fault detection method, device and controlled terminal |
| CN111913095A (en) * | 2020-08-06 | 2020-11-10 | 易佰特新能源科技有限公司 | Method for detecting and maintaining faults of main board of automatic lithium battery formation equipment |
| CN113176900A (en) * | 2021-04-16 | 2021-07-27 | 深圳市智微智能科技股份有限公司 | Android-based play box configuration detection method, device, equipment and storage medium |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5884073A (en) * | 1996-10-28 | 1999-03-16 | Intel Corporation | System and method for providing technical support of an electronic system through a web bios |
| US6892323B2 (en) * | 1999-05-05 | 2005-05-10 | Giga-Byte Technology Co., Ltd. | Dual basic input/output system for a computer |
| CN1145104C (en) * | 2000-12-08 | 2004-04-07 | 英业达股份有限公司 | Test and processing method and device for accident stop of computer system |
| CN2510902Y (en) * | 2001-06-04 | 2002-09-11 | 刘宗明 | Computer main board failure diagnosis card |
| CN1215411C (en) * | 2002-01-09 | 2005-08-17 | 英业达股份有限公司 | Debugging equipment of computer system |
| CN1220942C (en) * | 2002-09-20 | 2005-09-28 | 联想(北京)有限公司 | Test card for computer |
-
2004
- 2004-09-23 CN CNB2004100801218A patent/CN100375054C/en not_active Expired - Fee Related
Cited By (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102203742B (en) * | 2008-10-29 | 2014-09-17 | 惠普开发有限公司 | Component installation guidance |
| US8760312B2 (en) | 2008-10-29 | 2014-06-24 | Hewlett-Packard Development Company, L.P. | Component installation guidance |
| CN102236596A (en) * | 2010-05-05 | 2011-11-09 | 英业达股份有限公司 | Display card state indication system |
| CN102236596B (en) * | 2010-05-05 | 2014-07-02 | 英业达股份有限公司 | Display card state indication system |
| CN102419723A (en) * | 2011-12-31 | 2012-04-18 | 曙光信息产业股份有限公司 | Device and method for monitoring mainboard booting |
| CN103197996B (en) * | 2012-01-05 | 2016-12-07 | 纬创资通股份有限公司 | Startup detection circuit, computer system and startup detection method thereof |
| CN103197996A (en) * | 2012-01-05 | 2013-07-10 | 纬创资通股份有限公司 | Startup detection circuit, computer system and startup detection method thereof |
| CN103294713B (en) * | 2012-02-29 | 2016-08-03 | 鸿富锦精密工业（深圳）有限公司 | Monitoring data storage system and method |
| US9436657B2 (en) | 2012-02-29 | 2016-09-06 | Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. | Computing device and method for analyzing acquisition values |
| CN103294713A (en) * | 2012-02-29 | 2013-09-11 | 鸿富锦精密工业（深圳）有限公司 | Monitoring data memory system and method |
| CN103365335A (en) * | 2012-03-27 | 2013-10-23 | 鸿富锦精密工业(武汉)有限公司 | Signal processing circuit |
| CN103389405A (en) * | 2012-05-11 | 2013-11-13 | 鸿富锦精密工业(武汉)有限公司 | Discharging detection circuit |
| CN102999140A (en) * | 2012-05-30 | 2013-03-27 | 国家计算机网络与信息安全管理中心 | Power-on timing sequence control system and method of PCIE (Peripheral Component Interface Express) board card |
| CN102999140B (en) * | 2012-05-30 | 2015-12-09 | 国家计算机网络与信息安全管理中心 | A kind of electrifying timing sequence control system of PCIE board and method |
| CN102768633A (en) * | 2012-06-29 | 2012-11-07 | 浪潮电子信息产业股份有限公司 | Method for testing start and stop of server mainboard based on time series monitoring |
| CN102819477B (en) * | 2012-08-28 | 2015-07-29 | 曙光信息产业(北京)有限公司 | A kind of fault testing method of board and fault test card |
| CN102819477A (en) * | 2012-08-28 | 2012-12-12 | 曙光信息产业(北京)有限公司 | Board fault test method and fault test card |
| CN104424086A (en) * | 2013-09-06 | 2015-03-18 | 新唐科技股份有限公司 | Computer error detection module and method |
| CN104424086B (en) * | 2013-09-06 | 2018-10-09 | 新唐科技股份有限公司 | Computer error detection module and method |
| CN104794042A (en) * | 2014-01-22 | 2015-07-22 | 鸿富锦精密工业(武汉)有限公司 | Computer detecting system and method |
| CN103970635A (en) * | 2014-04-28 | 2014-08-06 | 浪潮电子信息产业股份有限公司 | Server hardware fault self-diagnosis method |
| CN104155597A (en) * | 2014-07-11 | 2014-11-19 | 苏州市职业大学 | Fault detector for computer main board |
| CN104156290A (en) * | 2014-07-11 | 2014-11-19 | 苏州市职业大学 | Computer hard disk fault detector |
| CN104155615A (en) * | 2014-07-11 | 2014-11-19 | 苏州市职业大学 | Computer power failure detecting instrument |
| CN104572378A (en) * | 2015-01-28 | 2015-04-29 | 合肥联宝信息技术有限公司 | Code debugging and diagnosis method and device of embedded controller |
| CN106547668A (en) * | 2015-09-21 | 2017-03-29 | 龙芯中科技术有限公司 | Computer system fault alarming method, apparatus and system |
| CN106547653A (en) * | 2015-09-21 | 2017-03-29 | 龙芯中科技术有限公司 | Computer system fault condition detection method, apparatus and system |
| CN106547503A (en) * | 2015-09-21 | 2017-03-29 | 龙芯中科技术有限公司 | Computer system malfunction is launched and method of reseptance, apparatus and system |
| CN106547668B (en) * | 2015-09-21 | 2019-09-24 | 龙芯中科技术有限公司 | Computer system fault alarming method, apparatus and system |
| CN106547653B (en) * | 2015-09-21 | 2020-03-13 | 龙芯中科技术有限公司 | Computer system fault state detection method, device and system |
| CN109032888A (en) * | 2018-06-28 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of server start-up course fault detection method, device and controlled terminal |
| CN111913095A (en) * | 2020-08-06 | 2020-11-10 | 易佰特新能源科技有限公司 | Method for detecting and maintaining faults of main board of automatic lithium battery formation equipment |
| CN111913095B (en) * | 2020-08-06 | 2022-12-23 | 易佰特新能源科技有限公司 | Method for detecting and maintaining faults of main board of automatic lithium battery formation equipment |
| CN113176900A (en) * | 2021-04-16 | 2021-07-27 | 深圳市智微智能科技股份有限公司 | Android-based play box configuration detection method, device, equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100375054C (en) | 2008-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1752942A (en) | Monitoring diagnosis device of computer main board failure | |
| CN1230724C (en) | Power saving method and device for display | |
| CN1506821A (en) | Detection and display method and device for computer self-test information | |
| CN1252589C (en) | Method and device for monitoring creation and destruction of child processes within application executing in computer system | |
| CN1402850A (en) | Method and apparatus for detecting type of interface to which peripheral device is connected | |
| CN1756400A (en) | Cell phone and operational mode switching method thereof | |
| CN1731362A (en) | Harddisk hot-swap protection system and method | |
| CN101046764A (en) | Server and correlative method for providing hardware diagnostic information | |
| TWI453583B (en) | Computer system and diagnostic method thereof | |
| US20130238937A1 (en) | Display device and computer using the same | |
| CN101957802A (en) | USB device with driving program | |
| US20050206345A1 (en) | Power management method for an electronic apparatus | |
| CN1889051A (en) | Method for realizing parts detection utilizing intelligent equipment firmware | |
| CN2651843Y (en) | Master realtime monitor | |
| US7213159B2 (en) | Method for testing and verifying power management features of computer system | |
| CN1873586A (en) | Computer system and method of controlling power consumption in the computer system | |
| CN1275126C (en) | Information processing system and controlling method thereof | |
| CN1577213A (en) | Method for pci express power management using a pci pm mechanism in a computer system | |
| US6772357B2 (en) | Computer system testing by simulating a power supply enable if power supply good indicator is negative | |
| CN101377753A (en) | Accessory test device and method | |
| CN2842558Y (en) | The circuit arrangement of getting rid of the sound card of computer glitch | |
| CN1595370A (en) | Host computer real-time monitoring apparatus and method | |
| CN1043930C (en) | Power-saving computer system with control power supply supplied to peripherals | |
| CN1896958A (en) | Method and device for detecting fault of blade-point servo system | |
| CN1770106A (en) | Reset information saving method for communication equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080312 Termination date: 20200923 |