CN103197996A - Startup detection circuit, computer system and startup detection method thereof - Google Patents
Startup detection circuit, computer system and startup detection method thereof Download PDFInfo
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- 230000036541 health Effects 0.000 claims abstract description 27
- 238000012360 testing method Methods 0.000 claims description 39
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Abstract
The invention discloses a startup detection circuit, a computer system and a startup detection method thereof, which are suitable for the computer system. The power-on detection circuit comprises a display device and a controller coupled to the display device. Before the computer system executes a power-on self-test program according to a basic input/output system code, the controller provides a system health code to the display device. The system health code is used for indicating whether the operation voltage of the element in the computer system is normal or not. The technical scheme of the invention can enable a user to obtain the results of the startup detection program and the startup self-test program in the startup process.
Description
Technical field
The present invention is relevant for a kind of start testing circuit, and is particularly to a kind of start testing circuit of computer system.
Background technology
At present, most of computer system is used for carrying out the Basic Input or Output System (BIOS) of boot program (basic input/output system, BIOS) procedure code is stored in the storer of computer system.When computer system is activated, central processing unit can be carried out start selftest (Power on self test according to the Basic Input or Output System (BIOS) procedure code earlier, POST), whether normal to check each infrastructure device (motherboard, display card), and then carry out down-stream.The Basic Input or Output System (BIOS) procedure code be used for management system date, display mode, floppy disk drive unit, hard disk type, peripheral equipment (for example PORT COM, print.er port etc.) and random access memory (Random Access Memory, RAM) and the configuration of memory cache (Cache Memory) etc.Important start-up routine when therefore, the Basic Input or Output System (BIOS) procedure code is computer system boot-strap.
Yet, when computer system is activated, if there is the operating voltage of subelement undesired, for example being used for storing the storer of Basic Input or Output System (BIOS) procedure code or the operating voltage of central processing unit, computer system can't be carried out the start selftest.At this moment, need respectively the element in the computer system to be detected, just can find out exception.
Therefore, need a kind of start testing circuit, it can be before computer system be carried out the start selftest, to the original state of computer system detect and show corresponding system health sign indicating number (system healthy code, SHC).
Summary of the invention
For realizing above-mentioned purpose, the invention provides a kind of start testing circuit, computer system with and start-up detection method.
The invention provides a kind of start testing circuit, be applicable to a computer system.The controller that above-mentioned start testing circuit comprises a display device and is coupled to above-mentioned display device.Above-mentioned computer system is carried out a start self test program according to a Basic Input or Output System (BIOS) sign indicating number before, above-mentioned controller provides a system health sign indicating number to above-mentioned display device, and wherein whether the healthy sign indicating number of said system is normal in order to the operating voltage of representing element in the above-mentioned computer system.
Moreover, the invention provides a kind of computer system.Above-mentioned computer system comprises: a central processing unit; One storer; One peripheral device control center; And a start testing circuit, be coupled to above-mentioned central processing unit, above-mentioned storer and above-mentioned peripheral device control center.Above-mentioned start testing circuit is carried out a start trace routine, and after finishing above-mentioned start trace routine, provide a reset signal to above-mentioned central processing unit, so that above-mentioned central processing unit is carried out a start self test program according to a Basic Input or Output System (BIOS) sign indicating number.
Moreover, the invention provides a kind of start-up detection method, be applicable to a computer system, wherein above-mentioned computer system comprises a start testing circuit.Above-mentioned start-up detection method comprises: carry out a start trace routine by a controller of above-mentioned start testing circuit, and show a system health sign indicating number corresponding to the result of above-mentioned start trace routine via a display device of above-mentioned start testing circuit; And after finishing above-mentioned start trace routine, provide the central processing unit of a reset signal to above-mentioned computer system by above-mentioned controller, so that above-mentioned central processing unit is carried out a start self test program according to a Basic Input or Output System (BIOS) sign indicating number.Whether the healthy sign indicating number of said system is normal in order to the operating voltage of representing element in the above-mentioned computer system.
Technical scheme of the present invention can make user can obtain the starting shooting result of trace routine and start self test program in start process.
Description of drawings
Fig. 1 shows according to the described computer system of one embodiment of the invention;
Fig. 2 shows according to the described start-up detection method of one embodiment of the invention, is applicable to the computer system that comprises the testing circuit of starting shooting;
Fig. 3 A and 3B show the process flow diagram according to the described execution start of one embodiment of the invention trace routine;
Fig. 4 shows according to the described start testing circuit of one embodiment of the invention.
Wherein, description of reference numerals is as follows:
100: computer system;
110: power management module;
120: the start testing circuit;
130: central processing unit;
140: storer;
150: peripheral device control center;
160: controller;
170: display device;
180: power supply unit;
190: flash memory;
AC: AC power;
BIOS: Basic Input or Output System (BIOS) sign indicating number;
200: the start testing circuit;
210: controller;
220: display device;
230:80 port decode device;
240: detector;
250: multiplexer;
260: storer;
CLK: instant clock pulse;
CPU_PWR, MEM_PWR, PCH_PWR: operating voltage;
CPU_PWRGD, MEM_PWRGD, SYS_PWRGD: control signal;
CPU_RESET_N: reset signal;
DC: direct supply;
POST: start selftest sign indicating number;
POST_D: decoded data;
Pin: input power supply;
PSB: standby power;
SHC: system health sign indicating number;
SLP_S3: dormant control signal.
Embodiment
For above-mentioned and other purposes of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and cooperate appended graphicly, be described in detail below:
Embodiment:
Fig. 1 shows according to the described computer system 100 of one embodiment of the invention.Computer system 100 comprises power management module 110, start testing circuit 120, central processing unit 130, storer 140 (dynamic RAM (Dynamic random access memory for example, DRAM)), peripheral device control center (Platform Controller Hub, PCH) 150, power supply unit 180 and flash memory 190.Power supply unit 180 can according to direct supply DC or AC power AC produces standby power PSB and input power supply Pin.The operating voltage that power management module 110 can produce different voltage levels according to input power supply Pin each element to the computer system 100.For instance, power management module 110 can produce operating voltage CPU_PWR, MEM_PWR and the PCH_PWR of central processing unit 130, storer 140 and peripheral device control center 150 according to input power supply Pin respectively, and it can be same voltage level or different voltage level.Start testing circuit 120 comprises controller 160 and display device 170.Controller 160 can be before central processing unit 130 execution one start self test program, and the system health sign indicating number SHC that carries out a start trace routine earlier and correspondence is provided is to display device 170, to show the start detected status of computer system 100.After controller 160 was successfully finished the start trace routine, controller 160 can provide reset signal CPU_RESET_N to central processing unit 130, the self test program so that notice central processing unit 130 can be started shooting.Then, the Basic Input or Output System (BIOS) sign indicating number BIOS that can will be stored in flash memory 190 of peripheral device control center 150 is sent to central processing unit 130.During central processing unit 130 execution start self test program, controller 160 can will be sent to display device 170 from the start selftest sign indicating number POST of central processing unit 130, to show corresponding result.
Fig. 2 shows according to the described start-up detection method of one embodiment of the invention, is applicable to the computer system that comprises start testing circuit (for example start testing circuit of Fig. 1).At first, the controller of start in the testing circuit can be carried out the start trace routine, and shows system health sign indicating number (step S210) corresponding to the result of start trace routine by a display device.Then, after finishing the start trace routine, controller in the start testing circuit can provide reset signal CPU_RESET_N central processing unit to computer system, so that central processing unit can be carried out start self test program (step S220) according to the Basic Input or Output System (BIOS) sign indicating number, in order to finish boot program.Side by side, the controller in the start testing circuit can be sent to display device with the start selftest sign indicating number from central processing unit, to show.
Fig. 3 A and 3B show the process flow diagram according to the described execution start of one embodiment of the invention trace routine.With reference to figure 1 and Fig. 3 A and 3B, at first, whether normally controller 160 can judge standby power PSB (step S302) simultaneously.If not, then controller 160 can provide system health sign indicating number SHC1 to display 170 and finish start trace routine (step S304).If standby power PSB is normal, then whether normally controller 160 can judge instant clock pulse CLK (step S306), and wherein instant clock pulse CLK is 32.768 hertz clock signal.If not, then controller 160 can provide system health sign indicating number SHC2 to display 170 and finish start trace routine (step S308).If instant clock pulse CLK is normal, then controller 160 can be judged the Basic Input or Output System (BIOS) sign indicating number BIOS whether normal (step S307) that is stored in flash memory 190.If not, then controller 160 can provide system health sign indicating number SHC10 to display 170, and finishes start trace routine (step S309).If Basic Input or Output System (BIOS) sign indicating number BIOS is normal, then controller 160 can provide system health sign indicating number SHC3 to display 170 (step S310).Then, controller 160 power switch that can detect computer system is pressed (step S312) by the user.Then, whether normally controller 160 can judge dormant control signal SLP_S3 (step S314), wherein dormant control signal SLP_S3 is provided to power management module 110 by controller 160, produces the required different operating voltage of computer system 100 in order to activation power management module 110.If not, then controller 160 can provide system health sign indicating number SHC4 to display 170, and finishes start trace routine (step S316).If dormant control signal SLP_3 be normal, controller 160 operating voltage whether normally (step S318) that can further judge the different voltage levels that power management module 110 produces then.If not, then controller 160 can provide corresponding system health sign indicating number SHC5 to display 170, and finishes start trace routine (step S320).For instance, when 12,5,3.3,1.5 and 1.2 volts operating voltage was undesired, controller 160 can provide system health sign indicating number SHC5_1, SHC5_2, SHC5_3, SHC5_4, SHC5_5 to display 170 respectively.If the operating voltage of the different voltage levels that power management module 110 produces is all normal, then whether normally controller 160 can further judge control signal CPU_PWRGD (step S322).If not, then controller 160 can provide system health sign indicating number SHC6 to display 170, and finishes start trace routine (step S324).If control signal CPU_PWRGD is normal, then controller 160 can provide control signal CPU_PWRGD to central processing unit 130, so that the power supply of notice central processing unit 130 all set.Then, whether normally controller 160 can further judge control signal MEM_PWRGD (step S326).If not, then controller 160 can provide system health sign indicating number SHC7 to display 170, and finishes start trace routine (step S328).If control signal MEM_PWRGD is normal, then controller 160 can provide control signal MEM_PWRGD to central processing unit 130, so that the power supply of notice storer 140 all set.Then, whether normally controller 160 can further judge control signal SYS_PWRGD (step S330).If not, then controller 160 can provide system health sign indicating number SHC8 to display 170, and finishes start trace routine (step S332).If control signal SYS_PWRGD is normal, then controller 160 can provide control signal SYS_PWRGD to peripheral device control center 150, in order to notify whole power supplys all set.Then, whether normally controller 160 can further judge reset signal CPU_RESET_N (step S334).If not, then controller 160 can provide system health sign indicating number SHC9 to display 170, and finishes start trace routine (step S336).If reset signal CPU_RESET_N is normal, then controller 160 can provide reset signal CPU_RESET_N to central processing unit 130, so that initialization central processing unit 130, make central processing unit 130 to carry out the start self test program according to the Basic Input or Output System (BIOS) procedure code, and produce corresponding start selftest sign indicating number POST.Then, controller 160 can will be sent to display device 170 from the start selftest sign indicating number POST of central processing unit 130, to show corresponding result (step S338).If the start self test program is normal, then computer system 100 can be finished boot program.
Fig. 4 shows according to the described start testing circuit 200 of one embodiment of the invention.Start testing circuit 200 comprises controller 210 and display device 220.Controller 210 comprises 80 port decode devices 230, detector 240 and multiplexer 250.80 port decode devices 230 are in order to decoding to the start selftest sign indicating number POST from central processing unit, and produce decoded data POST_D to multiplexer 250.Detector 240 is in order to carry out the start trace routine, in order to signals such as instant clock pulse CLK, operating voltage CPU_PWR, MEM_PWR and PCH_PWR and standby power PSB are detected and judged, and produce dormant control signal SLP_S3, control signal CPU_PWRGD, MEM_PWRGD and SYS_PWRGD and reset signal CPU_RESET_N.Side by side, detector 240 can produce corresponding system health sign indicating number SHC to multiplexer 250.When carrying out the start trace routine, detector 240 can provide the reset signal CPU_RESET_N with first logic level to multiplexer 250.So the system health sign indicating number SHC that multiplexer 250 can provide detector 240 is sent to display device 220.After successfully finishing the start trace routine, detector 240 can provide the reset signal CPU_RESET_N with second logic level to central processing unit, the self test program so that the control central processing unit is started shooting.Side by side, detector 240 can provide the reset signal CPU_RESET_N with second logic level to multiplexer 250.So the decoded data POST_D that multiplexer 250 can provide 80 port decode devices 230 is sent to display device 220.In one embodiment, detector 240 also comprises storer 260, in order to store previous Basic Input or Output System (BIOS) sign indicating number BIOS.In addition, detector 240 also can provide a system health sign indicating number, whether is same as the stored Basic Input or Output System (BIOS) sign indicating number of flash memory in order to represent storer 260 stored Basic Input or Output System (BIOS) sign indicating number BIOS.For instance, after the Basic Input or Output System (BIOS) sign indicating number BIOS of computer system was updated, computer system can be started shooting according to the Basic Input or Output System (BIOS) sign indicating number BIOS after upgrading.When computer system for the first time successfully after the start, start testing circuit 200 can copy complete Basic Input or Output System (BIOS) sign indicating number BIOS or the information (for example checking summation (checksum)) of part to storer 260 from flash memory.So, just detector 240 can confirm whether the Basic Input or Output System (BIOS) sign indicating number BIOS of flash memory is normal, describe as the step S307 of Fig. 3 A.In this embodiment, display device 220 comprises a plurality of light emitting diodes.In addition, system health sign indicating number SHC and decoded data POST_D have sign indicating number separately, respectively in order to control corresponding light emitting diode.In one embodiment, but controller 210 be arranged on the complexity program logic device (Complex Programmable Logic Device, CPLD).
According to the embodiment of the invention, system health sign indicating number SHC and start selftest sign indicating number POST can show by display device 170, makes user can obtain starting shooting in the start process result of trace routine and start self test program.
Though the present invention discloses as above with preferred embodiment; so it is not in order to limit the present invention; comprise in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.
Claims (20)
1. a start testing circuit is applicable to a computer system, comprising:
One display device; And
One controller, be coupled to above-mentioned display device, in order to carry out according to a Basic Input or Output System (BIOS) sign indicating number in above-mentioned computer system one the start self test program before, provide a system health sign indicating number to above-mentioned display device, wherein whether the healthy sign indicating number of said system is normal in order to the operating voltage of representing element in the above-mentioned computer system.
2. start testing circuit as claimed in claim 1, wherein when above-mentioned computer system is carried out above-mentioned start self test program, above-mentioned controller provides a start selftest sign indicating number corresponding to above-mentioned start self test program to above-mentioned display device.
3. start testing circuit as claimed in claim 2, wherein whether the healthy sign indicating number of said system is also normal in order to standby power or the instant clock pulse of representing above-mentioned computer system.
4. start testing circuit as claimed in claim 3, the wherein operating voltage of central processing unit, storer and the peripheral device control center that the operating voltage of element is produced by a power management module of above-mentioned computer system in the above-mentioned computer system.
5. start testing circuit as claimed in claim 4, wherein whether the healthy sign indicating number of said system is also normal in order to the control signal of representing above-mentioned central processing unit, storer and peripheral device control center.
6. start testing circuit as claimed in claim 2, wherein above-mentioned controller also stores a previous Basic Input or Output System (BIOS) sign indicating number, and the healthy sign indicating number of said system is also in order to represent whether stored above-mentioned previous Basic Input or Output System (BIOS) sign indicating number is same as above-mentioned Basic Input or Output System (BIOS) sign indicating number.
7. start testing circuit as claimed in claim 2, wherein above-mentioned display device comprises a plurality of light emitting diodes.
8. computer system comprises:
One central processing unit;
One storer;
One peripheral device control center; And
One start testing circuit, be coupled to above-mentioned central processing unit, above-mentioned storer and above-mentioned peripheral device control center, in order to carry out a start trace routine, and after finishing above-mentioned start trace routine, provide a reset signal to above-mentioned central processing unit, so that above-mentioned central processing unit is carried out a start self test program according to a Basic Input or Output System (BIOS) sign indicating number.
9. computer system as claimed in claim 8, wherein above-mentioned start testing circuit comprises:
One display device; And
One controller is coupled to above-mentioned display device, in order to provide a system health sign indicating number corresponding to the result of above-mentioned start trace routine to above-mentioned display device.
10. computer system as claimed in claim 9, wherein whether the healthy sign indicating number of said system is normal in order to standby power or the instant clock pulse of representing above-mentioned computer system.
11. computer system as claimed in claim 10, wherein whether the healthy sign indicating number of said system is also normal in order to the operating voltage of representing above-mentioned central processing unit, above-mentioned storer and above-mentioned peripheral device control center.
12. computer system as claimed in claim 11, wherein whether the healthy sign indicating number of said system is also normal in order to the control signal of representing above-mentioned central processing unit, above-mentioned storer and above-mentioned peripheral device control center.
13. computer system as claimed in claim 11, wherein when above-mentioned central processing unit is carried out above-mentioned start self test program according to above-mentioned Basic Input or Output System (BIOS) sign indicating number, above-mentioned controller also provides a start selftest sign indicating number corresponding to above-mentioned start self test program to above-mentioned display device.
14. computer system as claimed in claim 13, wherein above-mentioned controller also stores a previous Basic Input or Output System (BIOS) sign indicating number, and the healthy sign indicating number of said system is also in order to represent whether stored above-mentioned previous Basic Input or Output System (BIOS) sign indicating number is same as above-mentioned Basic Input or Output System (BIOS) sign indicating number.
15. computer system as claimed in claim 13, wherein above-mentioned display device comprises a plurality of light emitting diodes.
16. a start-up detection method is applicable to a computer system, wherein above-mentioned computer system comprises a start testing circuit, and above-mentioned start-up detection method comprises:
Carry out a start trace routine by a controller of above-mentioned start testing circuit, and show a system health sign indicating number corresponding to the result of above-mentioned start trace routine via a display device of above-mentioned start testing circuit; And
After finishing above-mentioned start trace routine, provide the central processing unit of a reset signal to above-mentioned computer system by above-mentioned controller, so that above-mentioned central processing unit is carried out a start self test program according to a Basic Input or Output System (BIOS) sign indicating number;
Wherein whether the healthy sign indicating number of said system is normal in order to the operating voltage of representing element in the above-mentioned computer system.
17. start-up detection method as claimed in claim 16 also comprises:
When carrying out above-mentioned start self test program, provide a start selftest sign indicating number corresponding to above-mentioned start self test program to above-mentioned display device by above-mentioned controller.
18. start-up detection method as claimed in claim 17, wherein whether the healthy sign indicating number of said system is also normal in order to standby power or the instant clock pulse of representing above-mentioned computer system.
19. start-up detection method as claimed in claim 17, wherein above-mentioned controller also stores a previous Basic Input or Output System (BIOS) sign indicating number, and the healthy sign indicating number of said system is also in order to represent whether stored above-mentioned previous Basic Input or Output System (BIOS) sign indicating number is same as above-mentioned Basic Input or Output System (BIOS) sign indicating number.
20. start-up detection method as claimed in claim 17, wherein above-mentioned display device comprises a plurality of light emitting diodes.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101100411 | 2012-01-05 | ||
| TW101100411A TWI533122B (en) | 2012-01-05 | 2012-01-05 | Boot detecting circuit, computer system and boot detecting method thereof |
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| CN103197996A true CN103197996A (en) | 2013-07-10 |
| CN103197996B CN103197996B (en) | 2016-12-07 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104407689A (en) * | 2014-11-14 | 2015-03-11 | 英业达科技有限公司 | Calculator system and power-on method and updating method thereof |
| CN104932968A (en) * | 2014-03-18 | 2015-09-23 | 微星科技股份有限公司 | System and method for informing abnormal information in real time and eliminating abnormal state |
| CN105260275A (en) * | 2015-10-27 | 2016-01-20 | 浪潮电子信息产业股份有限公司 | Power on/off testing method applicable to automatic configuration partition of high-end host computer |
| CN105786658A (en) * | 2014-12-17 | 2016-07-20 | 环旭电子股份有限公司 | Computer system and method capable of detecting internal computer state |
| CN106528320A (en) * | 2016-12-02 | 2017-03-22 | 英业达科技有限公司 | Computer system |
| CN111949320A (en) * | 2019-05-14 | 2020-11-17 | 广达电脑股份有限公司 | Method, system and server for providing system data |
Families Citing this family (3)
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1501241A (en) * | 2002-11-18 | 2004-06-02 | 英业达股份有限公司 | Loading method of computer starting preset value |
| CN1752942A (en) * | 2004-09-23 | 2006-03-29 | 联想(北京)有限公司 | Monitoring diagnosis device of computer main board failure |
| CN201285545Y (en) * | 2008-09-23 | 2009-08-05 | 芯发威达电子(上海)有限公司 | Starting-up monitoring apparatus for host board |
| CN201540533U (en) * | 2009-11-16 | 2010-08-04 | 英业达股份有限公司 | Computer system |
| CN101894057A (en) * | 2009-05-18 | 2010-11-24 | 鸿富锦精密工业（深圳）有限公司 | Main board diagnostic card |
-
2012
- 2012-01-05 TW TW101100411A patent/TWI533122B/en active
- 2012-01-17 CN CN201210013841.7A patent/CN103197996B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1501241A (en) * | 2002-11-18 | 2004-06-02 | 英业达股份有限公司 | Loading method of computer starting preset value |
| CN1752942A (en) * | 2004-09-23 | 2006-03-29 | 联想(北京)有限公司 | Monitoring diagnosis device of computer main board failure |
| CN201285545Y (en) * | 2008-09-23 | 2009-08-05 | 芯发威达电子(上海)有限公司 | Starting-up monitoring apparatus for host board |
| CN101894057A (en) * | 2009-05-18 | 2010-11-24 | 鸿富锦精密工业（深圳）有限公司 | Main board diagnostic card |
| CN201540533U (en) * | 2009-11-16 | 2010-08-04 | 英业达股份有限公司 | Computer system |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104932968A (en) * | 2014-03-18 | 2015-09-23 | 微星科技股份有限公司 | System and method for informing abnormal information in real time and eliminating abnormal state |
| CN104932968B (en) * | 2014-03-18 | 2018-07-10 | 微星科技股份有限公司 | System and method for informing abnormal information in real time and eliminating abnormal state |
| CN104407689A (en) * | 2014-11-14 | 2015-03-11 | 英业达科技有限公司 | Calculator system and power-on method and updating method thereof |
| CN105786658A (en) * | 2014-12-17 | 2016-07-20 | 环旭电子股份有限公司 | Computer system and method capable of detecting internal computer state |
| CN105260275A (en) * | 2015-10-27 | 2016-01-20 | 浪潮电子信息产业股份有限公司 | Power on/off testing method applicable to automatic configuration partition of high-end host computer |
| CN106528320A (en) * | 2016-12-02 | 2017-03-22 | 英业达科技有限公司 | Computer system |
| CN106528320B (en) * | 2016-12-02 | 2019-07-09 | 英业达科技有限公司 | Computer system |
| CN111949320A (en) * | 2019-05-14 | 2020-11-17 | 广达电脑股份有限公司 | Method, system and server for providing system data |
| CN111949320B (en) * | 2019-05-14 | 2023-11-21 | 广达电脑股份有限公司 | Method, system and server for providing system data |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI533122B (en) | 2016-05-11 |
| CN103197996B (en) | 2016-12-07 |
| TW201329702A (en) | 2013-07-16 |
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