CN1703730A - Integrated displays using nanowire transistors - Google Patents
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- CN1703730A CN1703730A CN 03825281 CN03825281A CN1703730A CN 1703730 A CN1703730 A CN 1703730A CN 03825281 CN03825281 CN 03825281 CN 03825281 A CN03825281 A CN 03825281A CN 1703730 A CN1703730 A CN 1703730A
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Abstract
The present invention is directed to a display using nanowire transistors. In particular, a liquid crystal display using nanowire pixel transistors, nanowire row transistors, nanowire column transistors and nanowire edge electronics is described. A nanowire pixel transistor is used to control the voltage applied across a pixel containing liquid crystals. A pair of nanowire row transistors is used to turn nanowire pixel transistors that are located along a row trace connected to the pair of nanowire row transistors on and off. Nanowire column transistors are used to apply a voltage across nanowire pixel transistors that are located along a column trace connected to a nanowire column transistor. Displays including organic light emitting diodes (OLED) displays, nanotube field effect displays, plasma displays, micromirror displays, micoelectromechanical (MEMs) displays, electrochromic displays and electrophoretic displays using nanowire transistors are also provided.
Description
Technical field
The present invention relates to display, and more specifically, relate to and use the transistorized integrated display of nano wire (nanowire).
Background technology
There is multiple display technology.These display technologies comprise LCD, organic light emitting diode display (OLED), nanotube field effect display, plasma scope, micro-reflector display, micro electronmechanical (MEMs) display, electrochromism (electrochromic) display and electrophoretic display device (EPD).In these type of displays each all has unique characteristic, and it makes type of display be applicable to concrete Presentation Function (for example graphoscope, supervision (watch) display) more or less.However, each display type has the denominator relevant with the base plate that can comprise pixel, electronics, and infrabasal plate (base substrate) time that occurs pixel and for example glass with box lunch changes.Be described in detail for one of this comparatively common type of display of LCD at this, thereby emphasize the characteristic of display.
LCD (LCD) is the display that material constituted that is changed by its reflection of light coefficient or transmission coefficient when applying electric field.LCD is used for from the watch displays device to laptop computer to the extensive application of TV screen.Shown in its title, the basic element of character of LCD is a liquid crystal.Liquid crystal has some makes it become the peculiar property of LCD.A characteristic of liquid crystal is that it is subjected to electric field effects.The prevailing form that is used for the liquid crystal of LCD is called twisted nematic liquid crystal.Just as known for the skilled artisan, these crystal predictably respond applying of electric field, thereby control is by the light quantity of crystal.Liquid crystal is set to form the pixel in the display.Pixel is the smallest discrete element of the image on the LCD.Typically, the number of picture elements of each unit area (for example, square inch) is many more, and resolution is high more.
Similar other display technique, another key element of LCD are to be used for electronic equipment (electronics) that employed liquid crystal in display technology (for example, microscope, plasma, nanotube etc.) or concrete parts are controlled and driven.Greatly changed the complexity of electronic equipment by application and LCD type.For example, two of LCD kinds of general types are passive and thin film transistor.In Twisted Nematic, simple conductive grid (grid) is used for synform and becomes the liquid crystal of pixel that electric current is provided.Grid is formed by the row and the row of the transparent, conductive material that is generally tin indium oxide.In order to light pixel, apply voltage to row, and apply negative voltage to the row that intersects at the designated pixel place, being transmitted in the field of pixel place detorsion (untwist) liquid crystal, thereby allow transmission or reflection ray.The electronic equipment that drives Twisted Nematic is simple relatively.At relative simple electronic equipment compromise is that each pixel of Twisted Nematic has the dutycycle that becomes more and more littler when number of picture elements increases.This causes slower response time and relatively poor contrast.The result is that the ability and the image that can reduce the LCD refreshed image are not distinct.
Thin film transistor has more complicated electronic equipment, thereby causes that each pixel has the electric field that is applied in the centesimal time.This makes only needs extremely short response time, higher contrast and directly pixel addressing for the use liquid crystal, thereby makes thin film transistor be highly suitable for video and quick graphical application.Thin film transistor depends on thin film transistor (TFT) (TFT).Particularly, independently TFT is associated with each pixel.Similarly, for other technology, its complicated more TFT that then depends on more.
Fig. 1 shows the typical thin film transistor that uses TFT, thin film transistor 100.Thin film transistor 100 comprises polarizer film 110, top glass substrate 120, color filter 130, transparency electrode 140, liquid crystal 150, pixel transistor and line (trace) 160, edge electronics (edge electronics) 170, lower glass substrate 180 and polarizer film 190.On the whole, pixel transistor (and line) 170 and lower glass substrate 180 can be called base plate, perhaps are called active matrix base plate (that is, transparent (preceding) electrode and liquid crystal are not the parts of base plate) in this case.Term active matrix base plate also can be used in reference to do not comprise edge electronics 170 with upper-part.In these layers each is laminated to each other, and can be used for for example LCD of laptop computer display so that produce.In this case, thus can add framework and support LCD and display is fixed on the above-knee base.Thereby with using the communication of circuit permission from the laptop computer to LCD, so that show desirable figure or video.
In the time will carrying out the image demonstration, use TFT and edge electronics to send electric signal, thereby make do not have light or a part of light from the pixel transmission so that configuration is positioned at the liquid crystal at suitable pixel place by Active Matrix Display 100.Edge electronics can comprise: shift register, level shifter (level shifter) and output buffer that the signal on outgoing side signal and the display is mated.Fig. 2 shows the layout of TFT and edge electronics.Fig. 2 comprises: a set of thin film column transistors 210A to 210n, one set of thin film row transistors 220A to 220n, one group of conductive column traces 240A to 240n, one group of conductive row traces 250A to 250n, one group of thin film pixel transistor of thin film pixel transistor 230 for example, and one group of pixel of pixel 260 for example.For example the thin film pixel transistor of thin film pixel transistor 230 is associated with the point of crossing of each row and column line.Pixel is associated with the point of crossing of row and column line.Pixel 260 provides an example of pixel.Therefore, for example, when being addressed to pixel 230, appropriate signals sends to film rowed transistor 210A, film row transistor 220A and thin film pixel transistor 260.
At present, can use amorphous silicon film transistor (a-Si TFTs) or multi-crystal TFT (p-Si or poly-Si TFTs) or piece silicon (bulk-silicon) transistor as row, column and pixel transistor in most of displays of LCD display and other type.The transistorized use of these types has applied some design limit to display.At first, the performance that is associated with the transistor of being made by a-Si or poly-Si is greatly less than the performance of using piece silicon.The use of piece silicon is not suitable for pixel transistor usually, because the size of many commercial variable L CD or other type of display is greater than the size of the silicon chip that is used to make traditional piece silicon transistor, and for for the pixel base plate, the selling at exorbitant prices of piece silicon.In addition, because the LCD substrate must clean (clean), only can be so be used to make the silicon chip of piece silicon transistor as the substrate of reflective display.Second, a-Si and poly-Si transistor do not have the transistorized enough performances of the row and column of being used for, therefore existing LCD or other type of display have a large amount of interconnection near the edge of plate, use the transistorized external circuit of crystalline silicon (for example, piece silicon) so that in integrated circuit, the row and column line is connected to.These interconnection have increased circuit and assembling complicacy and interconnect fault, and have reduced manufacturing output.The 3rd, the relatively large size of a-Si and poly-Si circuit and interconnection have increased the weight of display.The 4th, because need higher relatively temperature to be used to make a-Si and poly-Si equipment, the selection of transparency carrier mainly is confined to use glass, high temp glass or quartz.
Compare with the circuit that uses piece silicon equipment, need improve the circuit of Performance Characteristics, and can low-cost be applied to regional and with a large amount of transparency carriers mutually compatible temperature bigger than typical silicon chip.
In addition, also need to be integrated into LCD plate and other display so that reduce system complexity and the circuit of weight.
In addition, also need to be applied to for example circuit of the flexible base, board of plastics.
Summary of the invention
The present invention relates to use the display of nano-wire transistor.Particularly, the LCD of using nanowire pixel transistor, nanowire row transistor, nanowire column transistor and nanowire edge electronics has been described.Nanowire pixel transistor is used to control the voltage that puts on the pixel that comprises liquid crystal.Nanowire row transistor to be used for conducting with by be positioned at along with the pixel transistor of nanowire rows to the capable line place that links to each other.Nanowire column transistor is used for providing voltage to the nanowire pixel transistor that is positioned at along being connected to the line place of nanowire column transistor.Nanowire edge electronics is used to control the row and column transistor.In optional embodiment, a kind of LCD of using nano-wire transistor to combine with other form transistor that is used for pixel, row and column transistor and edge electronics has been proposed.For example, use the LCD of amorphous silicon pixel transistor to be equipped with nano-wire transistor, be used for the row and column transistor.In optional embodiment of the present invention, also provide to comprise following display technology: organic light emitting diode display (OLED), nanotube field effect display, plasma scope, micro-reflector display, micro electronmechanical (MEMs) display, electrochromic display device (ECD) and the electrophoretic display device (EPD) that uses nano-wire transistor.
In display, use nano-wire transistor to have lot of advantages.At first, nano-wire transistor can be positioned to comprise on the multiple substrate of glass and plastics.The result is, can develop display on flexible base, board, and it uses soft and/or flexible display is carried out extensive application.Secondly, when comparing with a-Si and poly-Si TFT, nano-wire transistor has preferable performance, and the edge electronics that therefore allows to be associated with the row and column transistor is integrated between the row and column line.This makes and to be used to the complexity that keeps screen and reduce external control circuit by display, the especially LCD can make planar dimension with growth and frame size ratio.In addition, because nano-wire transistor is less, it can reduce fuzzy that and usually relatively poor traditional a-Si or polySi TFT is associated, because bigger a-Si or poly Si TFT trend towards the pith of the light of display reflects by for example LCD or transmission is stopped.For the emission display of similar OLED, less transistor makes that the major part of baseplate zone can be occupied by the OLED that directly makes up on base plate, rather than sets up the more difficult technology of OLED at the top of pixel transistor.
Other embodiment, characteristics and advantage of the present invention, result and operation with various embodiments of the present invention all are being described in detail below with reference to accompanying drawing.
Description of drawings
Present invention is described with reference to the accompanying drawings.In the accompanying drawings, identical reference number is represented identical or functionally similar parts.The parts that occur first are by the leftmost digit representation of corresponding reference number in the accompanying drawings.
Fig. 1 is the diagram of thin film transistor.
Fig. 2 is TFT and the diagram that is used for the edge electronics of the pixel in the addressing LCD.
Fig. 3 A is to use the diagram according to the LCD of the nano-wire transistor of the embodiment of the invention.
Fig. 3 B is the diagram according to the detailed part of the use nano-wire transistor LCD of the embodiment of the invention.
Fig. 4 is the diagram according to 4 nanowire pixel transistor in LCD of the embodiment of the invention.
Fig. 5 is the diagram according to a pair of nanowire row transistor in LCD of the embodiment of the invention.
Fig. 6 is the diagram according to two nanowire column transistor within LCD of the embodiment of the invention.
Embodiment
Should be appreciated that specific implementation as described herein is an example of the present invention, and do not represent to be confined to any other limitation scope of the present invention.In fact, for briefly, traditional electronic equipment, manufacturing, semiconductor equipment, nanotube, nanometer rods, nano wire and nano belt technology, and other function aspects of system's (and parts of the parts that work alone of system) can be in this detailed description.In addition,, do not represent to realize to be confined to this, can also use large-scale number of nanowires and spacing although be that the specific implementation of being discussed is provided with the quantity of nano wire and the spacing of these nano wires.In addition, can change the size and the formation of nano wire.Described realization does not indicate to limit to, and can use large-scale size and parts.
As used herein, term " nano wire " is often referred to any conductor of prolongation or partly leads material, and it comprises at least one cross sectional dimensions less than 500nm, and preferably less than 100nm, and has length breadth ratio greater than 10 (length: width), be preferably greater than 50, and more preferably greater than 100.The example of this nano wire comprises similar following described semiconductor nanowires: the conductor or the semiconductor structure of other prolongation of disclosed international patent application No.WO 02/17362, WO 02/48701 and WO01/03208, carbon nano-tube and similar size.
Although LCD model as described herein mainly based on the character that is associated with silicon, can use other type of nano wire, comprise semiconductor nanowires, it comprises and is selected from following semiconductor material, for example, Si, Ge, Sn, Se, Te, B, C (comprising adamas), P, B-C, B-P (BP6), B-Si, Si-C, Si-Ge, Si-Sn and Ge-Sn, SiC, BN/BP/BAs, AlN/AlP/AlAs/AlSb, GaN/GaP/GaAs/GaSb, InN/InP/InAs/InSb, BN/BP/BAs, AlN/AlP/AlAs/AlSb, GaN/GaP/GaAs/GaSb, InN/InP/InAs/InSb, ZnO/ZnS/ZnSe/ZnTe, CdS/CdSe/CdTe, HgS/HgSe/HgTe, BeS/BeSe/BeTe/MgS/MgSe, GeS, GeSe, GeTe, SnS, SnSe, SnTe, PbO, PbS, PbSe, PbTe, CuF, CuCl, CuBr, CuI, AgF, AgCl, AgBr, AgI, BeSiN
2, CaCN
2, ZnGeP
2, CdSnAs
2, ZnSnSb
2, CuGeP
3, CuSi
2P
3, (Cu, and Ag) (Al, Ga, In, Tl, Fe) (S, Se, Te)
2, Si
3N
4, Ge
3N
4, Al
2O
3, (Al, Ga, In)
2(S, Se, Te)
3, Al
2CO, and two or more this semi-conductive appropriate combination.
In particular aspects, semiconductor can comprise adulterant, and it is from the group who comprises following content: from the p type adulterant of the group III of the periodic table of elements; N type adulterant from the group V of the periodic table of elements; Be selected from the p type adulterant of the group that comprises P, Al and In; Be selected from the n type adulterant of the group that comprises P, As and Sb; P type adulterant from the group II of the periodic table of elements; Be selected from the p type adulterant of the group that comprises Mg, Zn, Cd and Hg; P type adulterant from the group IV of the periodic table of elements; Be selected from the p type adulterant of the group that comprises C and Si; Perhaps be selected from the n type adulterant of the group that comprises Si, Ge, Sn, S, Se and Te.Those of ordinary skill in the art is readily appreciated that and can uses other known semiconductor dopant.
In addition, nano wire can comprise carbon nano-tube, perhaps conductor or Semiconductor Organic polymeric material (for example, pentacene and transition metal oxide).
Therefore, although for demonstration purpose, the explanation that runs through here is called term " nano wire ", and its expression description herein also comprises the use of nanotube.Nanotube can be formed at the combination/film that is used for nanotube separately or combines with nanotube as described herein, thereby characteristics as described herein and advantage are provided.In addition, nanotube does not need to comprise pure carbon, but can comprise for example other material such as boron, as what recognize by one of technology of the present invention.
In addition, the film of noticing that the film of nano wire of the present invention can be " foreign peoples (heterogeneous) ", it comprises: semiconductor nanowires and/or nanotube, and/or the combination of different nano wires, and/or any combination and/or the architectural characteristic of different parts.For example, " heterogeneous film " can comprise the nanowires/nanotubes with different-diameter and length, and nanotube and/or " heterogeneous structure " nanotube have different characteristics.
The longitudinal axis that means the most of nano wires in a group or a group nano wire by " aligning " in fact or " directed " is oriented within 30 degree of single direction.Although can think to surpass the i.e. great majority of a large amount of nano wires of 50%, in different embodiment, can think 60%, 75%, 80%, 90% or other number percent of nano wire be so directed great majority.Specific preferred aspect, the great majority of nano wire are oriented in 10 degree of desired direction.In additional embodiment, the great majority of nano wire can be oriented in other scope number of desired direction, comprise at random or isotropically directed.
The space that should be appreciated that here to be carried out (is for example described, " more than ", " following ", " top ", " below ", " top ", " bottom " etc.) only be used for purpose of description, and equipment of the present invention can carry out spatial disposition with any direction or mode.
At last, in the example display type of concentrated discussion LCD, the present invention is applied to have any kind that uses electronic equipment to drive the display technology of the base plate that pixel changes, and includes but not limited to OLED, nanotube field effect display, plasma scope, micro-reflector display, micro electronmechanical (MEMs) display, electrochromic display device (ECD) of Organic Light Emitting Diode (OLED) display, dopen Nano crystal or the like.
Fig. 3 A provides the LCD300 that uses nano-wire transistor according to an embodiment of the invention.LCD 300 comprise one group of nanowire column transistor 310A to 310n, one group of nanowire row transistor to 320A to 320n, one group of nanowire pixel transistor 330A to 330z, one group of conductive column traces 340A to 340z, one group of row line 350A to 350n and one group of pixel 360A to 360z.Each nanowire column transistor is connected with one group of nanowire pixel transistor of edge from the row line of nanowire column transistor extension.For example, nanowire column transistor 310A is connected with 330S with nanowire pixel transistor 330A, 330M along row line 340A.Each nanowire row transistor pair is connected with one group of nanowire pixel transistor along the capable line that extends from nanowire row transistor.For example, nanowire row transistor 320A is connected with the one group of nanowire pixel transistor that follows line 350A.Nanowire pixel transistor is associated with corresponding pixel.For example, nanowire pixel transistor 330A is associated with pixel 360A.
In addition, nanowire edge electronics (not shown in Fig. 3 A) can be used to control nanometer alignment, row and pixel transistor.Nanowire edge electronics can also be used to drive row, row and the pixel transistor that present use nano wire is made.Nanowire edge electronics can comprise nanowire shift register, nanowire level shifter and nanowire buffer.Nanowire shift register refers to use the shift register of nano-wire transistor realization.Nanowire level shifter refers to use the level shifter of nano-wire transistor realization.Nanowire buffer refers to use the impact damper of nanowire shifters realization.Can use nano-transistor to realize other type of edge electronics.
In operation, in the time will changing the brightness of pixel, apply voltage to the nanowire column transistor that is used for the pixel column.Conducting is used for the nanowire row transistor that pixel is expert at, thereby allows the current direction nanowire pixel transistor.When the nanowire pixel conducting, electric current flows through nanowire pixel transistor, thereby makes and have voltage at these pixel two ends, and it approximates greatly and puts on the voltage that lists with the hope light intensity that produces the transmission pixel.
Although Fig. 3 A shows wherein and is listed as, go and pixel transistor all is the embodiment of nano-wire transistor.In optional embodiment, the transistorized combination in any of nano-wire transistor and a-Si or poly-Si can be used for row, row and pixel transistor.For example, in one embodiment, pixel transistor can be a-Si TFT or poly-Si TFT, and the row and column transistor can be a nano-wire transistor.This is useful replacement, because relatively low for the performance requirement of pixel transistor, and can easily realize by a-Si TFT.In another example, rowed transistor can be a-Si TFT or poly-Si TFT, and the row and pixel transistor can be nano-wire transistor.In another example, row transistor can be a-Si TFT or poly-Si TFT, and row and pixel transistor can be nano-wire transistors.In another example, pixel transistor and row transistor can be a-Si TFT or poly-Si TFT, and rowed transistor can be a nano-wire transistor.In another example, pixel transistor and rowed transistor can be a-Si TFT or poly-Si TFT, and row transistor can be a nano-wire transistor.
Fig. 3 B provides the more detailed view according to the part 390 of the LCD300 of the embodiment of the invention.Fig. 3 B has emphasized to use many aspects of the LCD of nano-wire transistor, that is, a pair of nanowire row transistor is connected to each row line, and each pixel has resistance and the electric capacity that is associated with it, and its influence is considered for transistorized design.Should be noted that the row and column line also has resistance and the electric capacity that is associated with it, influence design criteria.Nanowire row transistor 322 and 324 forms nanowire row transistor to 320A, and is connected with 330B with nanowire pixel transistor 330A by row line 350A.As the more detailed description according to following Fig. 5, nanowire row transistor 322 and 324 is used for conducting and ends nanowire pixel transistor, for example nanowire pixel transistor 330A and 330B.
In addition, Fig. 3 B has described each pixel and has had electric capacity and the resistance that is associated with this pixel.For example, pixel 360A comprises capacitor C
LcdCapacitor C
sAnd resistance R
LcdCapacitor C
LcdExpression and the interior related electric capacity of liquid crystal phase of pixel 360A.Resistance R
LcdExpression and the interior related resistance of liquid crystal phase of pixel 360A.Capacitor C
sBe memory capacitance, add it so that improve performance.
According to the teaching here, those skilled in the relevant art can add nano-wire transistor among the LCD, and do not need a large amount of experiments.In addition, although design tool shows the use for the particular type of nano-wire transistor, example also is not intended to limit.Suitable those skilled in the relevant art can use here teaching and design tool discussed below in employed notion, thereby utilize the nanowire semiconductor have variation characteristic on a large scale to develop integrated LCD or other type of display, these variation characteristics are type, adulterant, the quantity and the orientation of line of nano crystal material for example.
The inventor has developed nano wire LCD design tool, so that the feasibility of nano-wire transistor is used in explanation at the electronic equipment of the liquid crystal in the pixel that drives LCD.Instrument comprises user interface, LCD design input block, nanowire characteristics input block, transistor requirements engine and nano wire design engine.User interface makes the user can import design criteria and display result.The collection of LCD design input block is about the information (for example LCD size, PEL (picture element) density etc.) of LCD type.The nanowire characteristics input block is gathered the information about nanowire characteristics, comprises size, nano wire crystalline material, adulterant and relevant Performance Characteristics.Transistor requirements engine produces row, column and the required performance requirement of pixel transistor.The output of nano wire design engine receiving crystal pipe requirements engine is as input, and definite concrete type of using required nano-wire transistor.
Nano wire LCD design tool is used to illustrate that nano-wire transistor can be used to drive the pixel within the LCD.The use of instrument also helps discerning and the unique benefit of using nano-wire transistor to be associated in LCD.
In analysis, used conservative estimation for nanowire properties.Particularly, utilized surface mobility (surface the mobility) (μ of the only about half of representative value of piece silicon
s), wherein with respect to the dopant dose of the minimizing that is used for the migration relevant, used suitable standard (μ with adulterant
s).In the raceway groove of the conductance of grid oxide-semiconductor control transistors, suppose that adulterant is Na=10 therein
17/ cm
3, and in not having grid-controlled source electrode and drain electrode, Nd=10
19/ cm
3Each all is assumed to be 10 μ m the length of raceway groove, source electrode and drain electrode.These hypothesis are guarded, so that guarantee to use the lithography of least cost.
In addition, suppose to use the grid of annular, it means that gate contacts centers on nano wire.In addition, suppose that nano wire has nucleocapsid (core shell) design, silicon dioxide is centered around around the nanowire core and grid is coated in around the oxide.Make in this way, suppose that diameter is that the silicon nuclear nano wire of 60nm has the thick SiO of 40nm
2Shell makes nano wire have the overall diameter of 140nm.At last, suppose conservative threshold value and driving voltage, make threshold voltage (V
t) be assumed to be 2 volts and driving voltage (V
d) be assumed to be 5 volts.It is higher usually to be used for the transistorized driving voltage of a-Si and poly-Si.Employed voltage hypothesis is more consistent with employed voltage in the typical integrated circuit.The U.S. Provisional Application No.60/414 that on September 30th, 2002 submitted to, the No.60/468 that on May 7th, 323 and 2003 submitted to, 276 have described nanowire semiconductor and the performance data of supporting these hypothesis are provided, by in this reference its integral body being comprised.Attention can be made similar backplane electronics, and does not need conformal (conformal) grid and/or conformal gate oxide.
The hypothesis of LCD plate is based on the characteristic feature of existing LCD plate.Particularly, suppose that the LCD plate has 21 inches diagonal display, its resolution is 1024 * 768 RGB pixels, refreshing frequency 60Hz.For each RGB pixel, there are three kinds of pixels (red, green and blue).Therefore, column pitch can be about 110 μ m and line space can be about 330 μ m.The electric capacity of supposing a pF is associated with each pixel.Suppose that the row line is the aluminium (Al) that 10 μ m are wide and 1 μ m is thick.Suppose to use above the thick SiO of 0.5 μ m
2Make the row insulation course.Suppose that the row line also is the aluminium (Al) that 10 μ m are wide and 2 μ m are thick.Suppose to use above the thick SiO of 2 μ m
2Make the row insulation course.The resistance and the electric capacity of line have been determined for the selection of the parameter of row and column line.Otherwise, determined along the resistance of the line of pixel and electric capacity and transistor capacitance and resistance how soon the line that can switch has, and in row, column and pixel transistor, needed what performance rate.
According to these LCD criterions, the output of the instrument of manufacturing is used to row, row and pixel transistor definition demand.Those skilled in the relevant art it will be appreciated that the method for regulation TFT transistor size.See that for example people such as Satoru Tomita was published in the article Transistor Sizingfor AMLCD Integrated TFT Drive Circuits of Journal ofthe Society of Information Display 339-404 page or leaf on April 5th, 1997.Particularly, for pixel transistor,, and need be used for pixel transistor greater than the off-resistances of 835G ohm with the model of the determined conducting resistance of needs less than 1.6M ohm.Conducting and dielectric resistance are based on multiple factor.Particularly, thus need highly to avoid undesirable flicker effect in pixel by impedance.For fear of flickering, the capacitance voltage at pixel two ends must descend (coast) and not obviously leakage at the 16.6ms that refreshes between (refreshing frequency of supposing 60Hz).Slip is the function of the off-resistances of nanowire pixel transistor.Leakage in LCD resistance or the transistor will cause that the voltage on the pixel changes between refreshing, it can comprise undesirable flickering in the pixel.For the purpose of analyzing, suppose that the voltage on the pixel can not surpass 10% change between refreshing.On the other hand, require conducting resistance enough low, so that allow pixel in the available time, to charge.Consider that these criterions have obtained above-mentioned conducting and off-resistances.
In case these resistance are known, can determine the quantity of required transistorized nano wire.At hypothesis its instrument of determining has been used and to have had few nanowire pixel transistor that can satisfy design limit to 1 nano wire.Surpassing a nano wire also can accept.
Fig. 4 provides the diagram of 4 nanowire pixel transistor among the LCD according to an embodiment of the invention.Advise that as analysis result diagram has been described the use of wire nanowire pixel transistors.The part of shown LCD comprises 4 wire nanowire pixel transistors 410A, 410B, 410C and 410D; The part of a plurality of pixels comprises green pixel 420; Row line 430 and row line 440.Nanowire pixel transistor 410C has an end that is connected to transparent conductor, for example the tin indium oxide that is associated with green pixel 420.Indium tin oxide conductor is used for applying voltage to a side of liquid crystal cells.The other end of nanowire pixel transistor is connected on the row line 440.Between these tie points a bit on, nanowire pixel transistor 410C is connected to capable line 430.This tie point is as the grid of nanowire pixel transistor 410C.The substrate notion is to be applied to the voltage of capable line 430 with conducting with by nanowire pixel transistor 410C.In optional embodiment, can in nanowire pixel transistor, use nano wire more than one.
In addition, analyze the design result that has also produced at nanowire row transistor, it has illustrated and has used the feasibility of nano-wire transistor as row transistor.The use of instrument has been determined can satisfy with the nano-wire transistor that comprises at least 150 nano wires for the current design requirement of row transistor.Another problem of being considered is to check whether a pair of nanowire row transistor is suitable between two capable lines.The right size of Model Calculation explanation nanowire row transistor is significantly less than the distance (approximately less than 4-10%) between the capable line, so nano-wire transistor can easily be positioned between the capable line.
In optional embodiment, can use the nano wire of high mobility, so each transistor needs nano wire still less.In addition, these numerals will increase and decrease according to desirable pixel size.
Fig. 5 provides the diagram of a pair of nanowire row transistor in LCD.Diagram comprises nanowire row transistor 510, nanowire row transistor 520, pixel 530, nanowire pixel transistor 540, row line 550, row line 560, goes up line 570, gate trace 572, following line 574 and gate trace 576.Nanowire row transistor 510 comprises set of nanowires 515.Similarly, nanowire row transistor 520 comprises set of nanowires 525.Nanowire row transistor 510 and 520 is used for conducting and ends nanowire pixel transistor 540.
Nanowire row transistor 510 has a side of the set of nanowires 515 that links to each other with row line 560, and the opposite side that links to each other with last line 570.Last line 570 is connected on the forward voltage.Point on each nano wire between these connections of concentrating on the set of nanowires 515 of serving as transistor gate is connected with gate trace 572.
Nanowire row transistor 520 has a side of the set of nanowires 525 that links to each other with row line 560, and the opposite side that links to each other with following line 574.Following line 574 ground connection.Point on each nano wire between these connections of concentrating on the set of nanowires 525 of serving as transistor gate is connected to gate trace 576.
When wanting conducting nanowire pixel 560, thereby apply grid voltage conducting nanowire row transistor 510 to gate trace 572.Simultaneously thereby gate trace 576 ground connection are ended nanowire row transistor 520.The result is, grid voltage is connected to nanowire pixel grid 545, thus conducting nanowire pixel 540.In the time that nanowire pixel 510 will be ended, carry out opposite process.Remove grid voltage from gate trace 572, thereby by nanowire row transistor 510.And, apply grid voltage to gate trace 576 simultaneously, thus conducting nanowire row transistor 520.The result is, thereby the grid voltage of nanowire pixel transistor grid 545 becomes ground voltage by nanowire pixel transistor 540.
In addition, analyze the design result that has also produced at nanowire column transistor, it has illustrated and has used the feasibility of nano-wire transistor as rowed transistor.The use of instrument has determined that current design requirement can satisfy with the nano-wire transistor that comprises 3000 nano wires at least.Rowed transistor needs more nano wire than transistorized other type, thereby because require rowed transistor to have lower conducting resistance because it has the short duration of charging, and alignment has a large amount of electric capacity.As under the situation of nanowire row transistor, instrument has illustrated that nano-wire transistor will be suitable between the row line.Under each situation, the concrete quantity that requires to satisfy the nano wire of performance criteria will be subjected to the influence of nano crystal material type as discussed above, adulterant magnitude and other factors.
Fig. 6 provides the diagram of two nanowire column transistor in the LCD according to an embodiment of the invention.Diagram comprises nanowire column transistor 610, nanowire column transistor 620, row line 630, video trace 640 and gate trace 650.Nanowire column transistor 610 comprises set of nanowires 615.Nanowire column transistor 610 can be used for applying voltage to the nanowire pixel transistor that is connected to row line 630.
Nanowire column transistor 610 has a side of the set of nanowires 615 that is connected with row line 630, and the opposite side that is connected with video trace 640.Video trace 640 is connected to the high pressure that is used to drive the nanowire pixel transistor that is connected with row line 630.This video voltage is provided with pixel voltage and therefore the brightness of pixel is set.Be connected to gate trace 650 as the point on each nano wire between these connections on the set of nanowires 615 of transistor gate jointly.Gate trace 650 is connected to the control circuit that is used for conducting and ends pixel column.
As can be viewed from Fig. 3 A, 3B, 4,5 and 6, can place nano wire by a direction.That is, in this case, all nano wires all are levels, and it is easier to make when the placement ratio nano line of the nano wire on substrate is multiple direction.The U.S. Provisional Application No.60/414 that submits on September 30th, 2002 has described the method that realizes the type location in 323.In addition, nano wire can be positioned over other direction according to the specific design criterion.In addition, be used to form pixel, the transistorized number of nanowires of row and column is the function of design criteria, can be including, but not limited to surpassing 2 nano wires, surpass 10 nano wires, surpass 100 nano wires and surpassing 1000 nano wires.
In addition, use the display of nano-wire transistor can be formed on the infrabasal plate with wide range of characteristics, for example lower glass substrate 180.Particularly, being used for the material of infrabasal plate can be including, but not limited to glass, plastics, polymkeric substance, crystal, metal or paper.In addition, be used for infrabasal plate material behavior can including, but not limited to be transparent material, trnaslucent materials, opaque material, color material, to the material of incident ray polarization and not to the material of incident ray polarization.At last, the material that is used for infrabasal plate can be " low temperature " material, and it has can be including, but not limited to the temperature of fusion that is lower than 500 degrees Fahrenheits, is lower than 300 degrees Fahrenheits, is lower than 200 degrees Fahrenheits and is lower than 100 degrees Fahrenheits.
Conclusion
Provided exemplary embodiments of the present invention.The present invention is not limited to these examples.Being used to describe rather than limit of these examples proposed here.According to the teaching that is comprised here, possibility (comprise the content of describing here equivalent, expansion, variant, depart from etc.) be readily appreciated that for those those skilled in the relevant art.This possibility is within scope of the present invention and essence.
Claims (53)
1. employed active matrix base plate in display comprises:
A plurality of pixels; And
A plurality of pixel transistors wherein are controlled at corresponding pixel within described a plurality of pixel transistor at the pixel transistor within described a plurality of pixel transistors, and each pixel transistor within wherein said a plurality of pixel transistors is a nano-wire transistor.
2. active matrix base plate according to claim 1 is characterized in that each nano-wire transistor comprises at least two nano wires that extend at least between source and drain electrode.
3. active matrix base plate according to claim 1, it is enough at least to wish that speed is charged to each pixel and the nano wire of the average number of discharging to it is characterized in that each nano-wire transistor comprises.
4. active matrix base plate according to claim 1, also comprise a plurality of rowed transistors, rowed transistor within wherein said a plurality of rowed transistor applies voltage to the subclass two ends of described a plurality of pixel transistors, and each rowed transistor within wherein said a plurality of pixel transistors is a nano-wire transistor.
5. active matrix base plate according to claim 4 is characterized in that each row nano-wire transistor comprises at least two nano wires that extend at least between source and drain electrode.
6. active matrix base plate according to claim 4, it is enough at least to wish that speed is charged to each pixel and the nano wire of the average number of discharging to it is characterized in that each row nano-wire transistor comprises.
7. active matrix base plate according to claim 1, also comprise a plurality of row transistors, row transistor within wherein said a plurality of row transistor applies voltage to the subclass two ends of described a plurality of pixel transistors, and each row transistor within wherein said a plurality of pixel transistors is a nano-wire transistor.
8. active matrix base plate according to claim 7 is characterized in that each row nano-wire transistor comprises at least two nano wires that extend at least between source and drain electrode.
9. active matrix base plate according to claim 7, it is enough at least to wish that speed is charged to each pixel and the nano wire of the average number of discharging to it is characterized in that each row nano-wire transistor comprises.
10. active matrix base plate according to claim 1 also comprises nanowire edge electronics.
11. active matrix base plate according to claim 10 is characterized in that nanowire edge electronics comprises nanowire buffer.
12. active matrix base plate according to claim 10 is characterized in that nanowire edge electronics comprises nanowire shift register.
13. active matrix base plate according to claim 10 is characterized in that nanowire edge electronics comprises nanowire level shifter.
14. active matrix base plate according to claim 1 is characterized in that display is a LCD.
15. active matrix base plate according to claim 1 is characterized in that display is organic light emitting diode display (OLED).
16. active matrix base plate according to claim 15 is characterized in that described OLED comprises nanocrystal.
17. active matrix base plate according to claim 1 is characterized in that display is an electrophoretic display device (EPD).
18. active matrix base plate according to claim 1 is characterized in that display is a plasma scope.
19. active matrix base plate according to claim 1 is characterized in that display is an electrochromic display device (ECD).
20. active matrix base plate according to claim 1 is characterized in that display is micro electronmechanical (MEMs) display.
21. active matrix base plate according to claim 1 is characterized in that display is the micro-reflector display.
22. active matrix base plate according to claim 1 is characterized in that display is a Field Emission Display.
23. active matrix base plate according to claim 22 is characterized in that display is the nanotube field effect display.
24. active matrix base plate according to claim 1 is characterized in that display is a rigidity.
25. active matrix base plate according to claim 1 is characterized in that display is flexible.
26. active matrix base plate according to claim 1 is characterized in that display is an on-plane surface.
27. the LCD with infrabasal plate comprises:
(a) a plurality of pixels;
(b) a plurality of pixel transistors, the pixel transistor within wherein said a plurality of pixel transistors is controlled the corresponding pixel within described a plurality of pixel;
(c) a plurality of rowed transistors, the rowed transistor within wherein said a plurality of rowed transistors applies voltage to the subclass two ends of described a plurality of pixel transistors; And
(d) a plurality of row transistors, at least two transistor turns within wherein said a plurality of row transistor and by corresponding pixel transistor, in wherein said a plurality of pixel transistors, described a plurality of rowed transistors and the described a plurality of row transistor is nano-wire transistor one of at least.
28. LCD according to claim 27 also comprises nanowire edge electronics.
29. LCD according to claim 28 is characterized in that nanowire edge electronics comprises nanowire buffer.
30. LCD according to claim 28 is characterized in that nanowire edge electronics comprises nanowire shift register.
31. LCD according to claim 28 is characterized in that nanowire edge electronics comprises nanowire level shifter.
32. LCD according to claim 27 is characterized in that pixel transistor, the rowed transistor within described a plurality of rowed transistors and the row transistor within described a plurality of row transistor within described a plurality of pixel transistor is nano-wire transistor.
33. LCD according to claim 27, what it is characterized in that described a plurality of pixel transistor, described a plurality of rowed transistors and described a plurality of row transistors is the a-Si thin film transistor (TFT) one of at least.
34. LCD according to claim 27, what it is characterized in that described a plurality of pixel transistor, described a plurality of rowed transistors and described a plurality of row transistors is piece Si thin film transistor (TFT) one of at least.
35. LCD according to claim 27, what it is characterized in that described a plurality of pixel transistor, described a plurality of rowed transistors and described a plurality of row transistors is organic semiconductor one of at least.
36. LCD according to claim 27, what it is characterized in that described a plurality of pixel transistor, described a plurality of rowed transistors and described a plurality of row transistors is the poly-Si thin film transistor (TFT) one of at least.
37. according to the LCD of claim 27, it is characterized in that being used to form transistorized nano wire is the parallel lines of aiming in fact.
38., it is characterized in that line is to align in fact at random and isotropically according to the LCD of claim 27.
39. LCD according to claim 27 is characterized in that nanowire column transistor is between the row line.
40. LCD according to claim 27 is characterized in that nanowire column transistor is positioned at and row line conllinear place.
41. LCD according to claim 27 is characterized in that nanowire row transistor is between the row line.
42. LCD according to claim 27 is characterized in that nanowire row transistor is positioned at and row line conllinear place.
43. LCD according to claim 27 is characterized in that each nano-wire transistor comprises at least two nano wires.
44. LCD according to claim 27 is characterized in that nano-wire transistor comprises the source that connects nano-wire transistor and at least 10 nano wires of drain electrode.
45. LCD according to claim 27 is characterized in that nano-wire transistor comprises the source that connects nano-wire transistor and at least 100 nano wires of drain electrode.
46. LCD according to claim 27 is characterized in that infrabasal plate is a flexible material.
47. LCD according to claim 27 is characterized in that infrabasal plate is to have the cryogenic material that temperature of fusion is lower than 500 degrees Fahrenheits.
48. LCD according to claim 27 is characterized in that infrabasal plate is plastics.
49. LCD according to claim 27 is characterized in that infrabasal plate is translucent material.
50. a nanowire pixel transistor comprises:
(a) at least one nano wire,
(b) described at least one nano wire is connected to the column electrode of capable line;
(c) described at least one nano wire is connected to the grid of row line; And
(d) described at least one nano wire is connected to the pixel capacitors that is used for applying to pixel the conductive material of voltage.
51., it is characterized in that pixel capacitors is connected to conductive material with at least two nano wires according to the described nanowire pixel transistor of claim 50.
52. an employed active matrix base plate in display comprises
A plurality of pixels;
A plurality of amorphous silicon pixel transistors, the pixel transistor within wherein said a plurality of pixel transistors is controlled at the corresponding pixel within described a plurality of pixel; And
A plurality of rowed transistors, the rowed transistor within wherein said a plurality of rowed transistors applies voltage to the subclass two ends of described a plurality of pixel transistors, and each rowed transistor within wherein said a plurality of pixel transistor is a nano-wire transistor.
53., it is characterized in that each nano-wire transistor comprises at least two nano wires that extend at least between source and drain electrode according to the described active matrix base plate of claim 52.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
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| US41432302P | 2002-09-30 | 2002-09-30 | |
| US60/414,323 | 2002-09-30 | ||
| US60/414,359 | 2002-09-30 | ||
| US60/468,276 | 2003-05-07 | ||
| US60/488,801 | 2003-07-22 |
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| CN201210040611XA Division CN102569349A (en) | 2002-09-30 | 2003-09-30 | Integrated displays using nanowire transistors |
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| CN1703730A true CN1703730A (en) | 2005-11-30 |
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| CN 03825281 Pending CN1703730A (en) | 2002-09-30 | 2003-09-30 | Integrated displays using nanowire transistors |
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| CN102841956A (en) * | 2011-06-22 | 2012-12-26 | 台湾积体电路制造股份有限公司 | Cell architecture and method |
| CN102841956B (en) * | 2011-06-22 | 2015-09-02 | 台湾积体电路制造股份有限公司 | Cellular construction and method |
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