CN1649110A - Forming method for thin film transistor element with static discharge protection - Google Patents
Forming method for thin film transistor element with static discharge protection Download PDFInfo
- Publication number
- CN1649110A CN1649110A CN 200410002797 CN200410002797A CN1649110A CN 1649110 A CN1649110 A CN 1649110A CN 200410002797 CN200410002797 CN 200410002797 CN 200410002797 A CN200410002797 A CN 200410002797A CN 1649110 A CN1649110 A CN 1649110A
- Authority
- CN
- China
- Prior art keywords
- film transistor
- thin
- source
- transistor element
- formation method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 64
- 239000010409 thin film Substances 0.000 title claims description 97
- 230000003068 static effect Effects 0.000 title abstract description 40
- 229910052751 metal Inorganic materials 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 41
- 238000005530 etching Methods 0.000 claims abstract description 22
- 239000010410 layer Substances 0.000 claims description 86
- 239000013078 crystal Substances 0.000 claims description 59
- 238000004891 communication Methods 0.000 claims description 45
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 33
- 229920005591 polysilicon Polymers 0.000 claims description 33
- 230000015572 biosynthetic process Effects 0.000 claims description 28
- 239000011229 interlayer Substances 0.000 claims description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 15
- 229910052710 silicon Inorganic materials 0.000 claims description 15
- 239000010703 silicon Substances 0.000 claims description 15
- 230000001681 protective effect Effects 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 11
- 238000000059 patterning Methods 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims description 2
- 238000005468 ion implantation Methods 0.000 claims description 2
- 230000000670 limiting effect Effects 0.000 abstract description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 2
- 239000010408 film Substances 0.000 description 46
- 238000004519 manufacturing process Methods 0.000 description 29
- 238000013461 design Methods 0.000 description 22
- 230000000694 effects Effects 0.000 description 14
- 230000008569 process Effects 0.000 description 13
- 230000005611 electricity Effects 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 239000004411 aluminium Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 4
- 230000036961 partial effect Effects 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 3
- 238000012797 qualification Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000005496 tempering Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Images
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
A form method for a film transistor element with static discharge protection is to form crystalline silicon layer on the base plate first then to limit its pattern and form a source, a drain with the same conduction property and connected with a connection path to form a short circuit. Then the film transistor is manufactured orderly, finally, the connection property is cut off by etching the source/drain metal and the path of the crystalline silicon layer when limiting the pattern data line on the source/drain metal.
Description
Technical field
The formation method of the relevant a kind of thin-film transistor element of the present invention, and particularly relevant a kind of formation method with Thin Film Transistor-LCD element of electro-static discharge protection function.
Background technology
Thin-film transistor (Thin Film Transistor; TFT) be widely used in the driving of active LCD, yet because the requirement of display floater, make that the substrate of selecting for use of thin-film transistor element manufacturing is the glass substrate of insulating property (properties), cause in thin-film transistor manufacturing process, often having the problem of buildup of static electricity to solve, easily thereby cause that element is impaired, significantly reduced the yield of LCD element.
Because in the thin-film transistor manufacturing process, some operation environment can produce the accumulation of static, as: chemical vapour deposition (CVD) (Chemical Vapor phase Deposition; CVD), plasma concerned process steps such as sputter (sputtering) or dry-etching.In addition, also have some in the process of operation conversion or board transport, also have the extraneous static source that produces.Because the glass substrate of insulation can't be about to buildup of static electricity certainly and be eliminated, therefore, the conductor part on element and panel will form tangible potential difference, in case generation static discharge (Electro-Static Discharge; ESD), the reliability (reliability) that high voltage that moment produces or high electric current then can cause element and circuit reduces, or even the permanent damage of element and circuit.
For overcoming the problem of static discharge, reduced or isolated at static source, to reach the probability that reduces generation of static electricity, but this kind method, only can be by the situation and the degree of static source control static generation, still can't avoid generation of static electricity fully, and in case when buildup of static electricity is arranged, also can't the actual problem that solves static discharge.Therefore, a kind of method is arranged in addition, be on element driving circuit, to change, but utilize the circuit design of preventing electro-static discharge, buildup of static electricity amount on the element is disperseed, and reduce the potential difference that causes because of buildup of static electricity, and can significantly eliminate the generation of static discharge like this, reach the purpose of element protection.
And generally be applicable to the circuit design method of the preventing electro-static discharge of flat-panel screens, resistance-type, ring-type short-circuit type (shorting-ring), strip short-circuit type (shorting-bar) are arranged respectively or increase the circuit design type of metallic circuit.No matter but be above-mentioned which kind of design, all can influential definition (resolution), reduce aperture opening ratio shortcomings such as (aperture ratio) and exist, therefore, in order not influence display panel areas, the periphery circuit region that is aimed at panel as many is provided with ring-type short circuit or strip short circuit, disperses the static content of accumulating on the panel with conducting.Yet, the setting of peripheral annular short circuit current, still limited for the release of accumulation static content on the panel, the static discharge that especially occurs among thin-film transistor itself or the pixel (pixel) more is difficult to effectively avoid.
Therefore, if can design the protection setting of static discharge at thin-film transistor element, and under manufacturing process that does not influence thin-film transistor and element quality, keeping the characteristic demand of display floater simultaneously, will be quite helpful for the manufacturing and the electrostatic defending of thin-film transistor element.
Summary of the invention
One of purpose of the present invention provides a kind of formation method with thin-film transistor element of electro-static discharge protection function, and can be applicable in the manufacturing of LCD element.In addition, the present invention also provides a kind of can disperse buildup of static electricity simultaneously, and keeps the flatness layer planarization characteristics that display element is made, and then possesses the manufacture method of display element product quality.
Utilization links the source area and the drain region of crystal silicon layer, forms a short-circuit condition, with when thin-film transistor element is made, the static content conducting of accumulating in the manufacturing process can be disperseed, and the harm that reduces static discharge takes place.At last, the back segment in thin-film transistor element is made cuts off the source area of crystal silicon layer and the binding attitude of drain region again, recovers the characteristic of thin-film transistor element.
According to above-mentioned purpose, but the present invention proposes a kind of formation method of thin-film transistor element of preventing electro-static discharge.According to a preferred embodiment of the present invention is to form a crystal silicon layer on substrate earlier, and crystal silicon layer limited with implanting ions with figure form source area, drain region, channel region and communication path, wherein source area, drain region and communication path have the identical conduction characteristic and electrically connect forms a short-circuit condition.Then form gate oxide, gate electrode and interlayer dielectric layer in regular turn, wherein the figure of interlayer dielectric layer comprises contact window and the opening that exposes the communication path of crystal silicon layer.
Then, formation source/drain metal, and to source/drain metal patterning qualification data circuit, when utilizing data circuit to form, by the etching condition of Controlling Source/drain metal, make source/when the drain metal etching is carried out, also the crystal silicon layer in the opening is removed.Therefore, the communication path that connects the crystal silicon layer of source area and drain region is cut off, and then short-circuit condition is originally removed, so when thin-film transistor completes, promptly recover the characteristic of thin-film transistor element.
After thin-film transistor is finished, form a flatness layer reaching the purpose of planarization, and then carry out the flow process that follow-up display element is made again, to form a display device.Because, use the crystal silicon layer short circuit design with thin-film transistor of electrostatic discharge protective of the present invention, be in the etching source/when drain metal limits data circuit, realize simultaneously that promptly cutting-off of short-circuit attitude is communicated with the purpose of design, so can not influence the planarization effect of follow-up flatness layer, possessing the area that pixel electrode can occupy, and then keep the product aperture opening ratio of display element.
According to method of the present invention, not only can form thin-film transistor element with electrostatic discharge protective characteristic, and significantly promote product yield and component reliability, when crystal silicon layer forms, promptly forming the short circuit that can disperse the buildup of static electricity amount is communicated with, and in thin-film transistor manufacturing process, the static discharge harm of effectively avoiding being formed in the thin-film transistor takes place.
In addition, also can be by generation type of the present invention, in the source of thin-film transistor element/the drain metal patterning time, promptly finish the cut-out that short circuit is communicated with design, and do not influence the planarization effect that follow-up flatness layer is made, and the flow process of follow-up display element making.Therefore, also can keep the product performance requirement of display element.
Above-mentioned purpose, design feature and effect for further specifying the present invention are described in detail the present invention below with reference to accompanying drawing.
Description of drawings
Fig. 1 is the plan structure schematic diagram according to the thin-film transistor of the present invention's first preferred embodiment;
Fig. 2 A ~ 2C is the manufacturing process generalized section according to the thin-film transistor element of the present invention's first preferred embodiment;
Fig. 3 is the display device partial array structural representation according to the present invention's second preferred embodiment;
Fig. 4 is the plan structure schematic diagram according to the thin-film transistor element of the present invention's second preferred embodiment;
Fig. 5 A ~ 5C is the manufacturing process generalized section according to the thin-film transistor element of the present invention's second preferred embodiment;
Fig. 6 is the display device partial array structural representation according to the present invention's the 3rd preferred embodiment; And
Fig. 7 is the plan structure schematic diagram according to the thin-film transistor element of the present invention's the 3rd preferred embodiment.
Embodiment
The present invention is a kind of formation method of thin-film transistor element, utilization designs at the short circuit current between single thin-film transistor itself and a plurality of thin-film transistors, graphic change by polysilicon layer, source/drain region in the thin-film transistor (source/drain region) is communicated with, form the effect of short circuit, and the buildup of static electricity that results from the thin-film transistor in the thin-film transistor manufacturing process is released, again the connection design that constitutes short circuit on the polysilicon layer is cut off at last, finished a thin-film transistor element with preventing electro-static discharge effect.
Below will be described in detail method of the present invention with embodiment.
Embodiment 1
The present invention discloses a kind of formation method and structure of polycrystalline SiTFT element.With reference to Fig. 1 and Fig. 2 A ~ 2C, Fig. 1 is the plan structure schematic diagram according to the thin-film transistor of the present invention's first preferred embodiment respectively, and Fig. 2 A ~ 2C is the manufacturing process generalized section according to the thin-film transistor element of the present invention's first preferred embodiment.Wherein the position shown in Fig. 2 A ~ 2C is the cross-sectional structure that Fig. 1 cuts along the I-I dotted line.
One thin-film transistor itself mainly is made of gate regions (gate region), source area and drain region, and structure is independent separately.The present invention promptly utilizes the graphic designs of polysilicon layer, and the source area of separating is originally linked to each other with the drain region, forms a short circuit kenel.As shown in Figure 1, polysilicon layer 102 is except having source area 102a, drain region 102b and channel region (channel region) 102c, also be provided with the communication path 102e that source area 102a and drain region 102b are linked, by communication path 102e, make thin-film transistor form short-circuit condition, can utilize communication path 102e conducting for the static content of accumulating in the thin-film transistor operation, thereby be disperseed.In addition, also have gate electrode 106 to be positioned at the channel region 102c top of polysilicon layer 102 in the thin-film transistor, switch motion in order to control TFT, source/drain metal 112 is then above the source area 102a of polysilicon layer 102 and drain region 102b, in order to connect source area 102a and drain region 102b.Make the flow process back segment in thin-film transistor at last, 110 places cut off in the position with communication path 102e again, remove short circuit and recover the electrical characteristic of thin-film transistor.
Manufacturing process is then with reference to Fig. 2 A ~ 2C, shown in Fig. 2 A, form a polysilicon layer 202 earlier on substrate 200, and polysilicon layer 202 is graphically limited the active area of other thin-film transistor unit, and communication path 202e, again regional 202a, regional 202b and communication path 202e are carried out implanting ions (ion-implantation) simultaneously in addition, source region 202a and drain region 202b are formed, and have identical conductive characteristic with communication path 202e.In addition, the regional 202c between source region 202a and drain region 202b then is a channel region.Wherein substrate 200 for example can be glass substrate, and the preferable chemical vapour deposition technique that can be of the formation method of polysilicon layer 202 cooperates upward excimer laser tempering process (Excimer Laser Annealing; ELA), and the preferred thickness of polysilicon layer 202 be about 50nm.
Then, form a gate oxide (gate oxide) 204 and gate electrode 206 respectively in regular turn, and gate electrode 206 is the tops that are positioned at passage area 202c.Wherein, gate oxide 204 materials for example can be silica (SiOx), and gate electrode 206 then is the good metal material of conductivity, for example can be molybdenum tungsten compound (MoW) or aluminium (Al).After forming gate electrode 206, form an interlayer dielectric layer (dielectric interlayer) 208 again, and graphically to limit contact window (contact hole) 209 and one opening 210, and expose polysilicon layer 202, wherein contact window 209 is in order to connect the source region 202a and the drain region 202b of polysilicon layer 202,210 of openings expose the part of the communication path 202e of polysilicon layer 202, also are the position 110 shown in Fig. 1.In addition, interlayer dielectric layer 208 materials for example can be silica or silicon nitride (SiNx).
Then,, form one source/drain metal (Source/Drain metal) 212 on the interlayer dielectric layer 208, among contact window 209 and the opening 210 with reference to Fig. 2 B, and graphically to limit data circuit (not demonstrating).Wherein the material of source/drain metal 212 is the good metal material of conductivity, for example can be molybdenum tungsten compound or aluminium, and the preferred thickness that forms for example is about 300nm.In addition, the present invention also in the operation process of graphical source/drain metal 212, in the source/drain metal 212 in removing opening 210, also removes the polysilicon layer in the opening 210 202, and reaches the purpose of cutting off communication path 202e.
Utilize the etching step of graphical source/drain metal 212, the control etching condition, utilization is to the etching parameter of the relatively poor source/drain metal 212 of polysilicon layer 202 etching selectivities, and cooperated the principle of etching (overetching), and the thickness at polysilicon layer 202 is significantly less than under the situation of source/drain metal 212, and when 212 etchings of source/drain metal are finished, simultaneously the polysilicon layer in the opening 210 202 is removed, to cut off the communication path 202e of polysilicon layer 202, promptly finish a thin-film transistor driving element.Wherein, the operation of etching source/drain metal 212 is preferably the method for plasma dry-etching, uses to contain the gas of chloride ion (as Cl
2Or BCl
3).
In addition, the step of above-mentioned cut-out communication path 202e, also can after source/drain metal 212 etching steps are finished, select another etching parameter again for use, carry out the removing of polysilicon layer 202 in the opening 210 the preferable polysilicon layer 202 of interlayer dielectric layer 208 etching selectivities.For example can use the etching condition that contains fluorine ion gas.
At last, carry out the follow-up making that thin-film transistor is connected pixel electrode, with reference to Fig. 2 C, form a flatness layer (passivation layer) 214 and pixel electrode (pixel electrode) 216 respectively in regular turn, wherein flatness layer 214 has one the interlayer window (via hole) 215 that exposes source/drain metal 212, and the i.e. connection source/drain metal 212 by interlayer window 215 of pixel electrode 216.So, finish the display device that a thin-film transistor drives.
By above-mentioned structural design and form method, in thin-film transistor manufacturing process, earlier source/drain region is communicated with, be designed to a short-circuit condition, so that the buildup of static electricity amount that thin-film transistor itself produces in manufacturing process, but the conducting dispersion, and avoid the situation of static discharge to take place.At last, treat that thin-film transistor is finished after, will cause the source of short circuit/drain electrode communication path to cut off again, recover tft characteristics.Like this, can be on the display floater, the electrostatic discharge problem that produces in the single thin-film transistor is solved, and and then significantly promotes the effect of electrostatic defending.
In addition, cutting off the method for communication path according to the present invention, is to carry out when graphical in general interlayer dielectric layer, limit the relative position that desire is cut off simultaneously, and cut-out step afterwards cooperates again then the patterned etching work procedure of source/drain metal to carry out simultaneously.Therefore, utilize method of the present invention, can under the process conditions that does not influence general thin-film transistor, only do the design and the variation of partly pattern qualification, and do not increase extra light shield number and manufacturing process, can form a thin-film transistor with static discahrge protection effect.
Except above-mentioned advantage, because among the present invention, the cut-out step of communication path, be again after source/drain metal forms, flatness layer is promptly finished before forming, and therefore, can not influence the planarization effect of flatness layer, and still keep characteristic and quality demand that subsequent film forms and then the quality of possessing element.For example: the thin layer surface flatness is made the influence of area and quality to pixel electrode, and then influences the aperture opening ratio of display element.
Embodiment 2
The present invention has disclosed the formation method and the structure of another kind of polycrystalline SiTFT element, is applied on the flat display driving.Respectively with reference to Fig. 3, Fig. 4 and Fig. 5 A ~ 5C, wherein Fig. 3 is the display device partial array structural representation according to the present invention's second preferred embodiment, Fig. 4 is the plan structure schematic diagram according to the thin-film transistor of the present invention's second preferred embodiment, and Fig. 5 A ~ 5C is the manufacturing process generalized section according to the thin-film transistor element of the present invention's second preferred embodiment.Wherein the position shown in Fig. 5 A ~ 5C is the cross-sectional structure that Fig. 4 cuts along the II-II dotted line.
The second embodiment of the present invention is utilized the graphic designs of polysilicon layer equally, the film crystal pipe unit that originally independently is arranged in each pixel is respectively linked to each other, the source area of one thin-film transistor and the drain region of another thin-film transistor are linked, and form a short circuit kenel.As shown in Figure 3, be each pixel region with data circuit 318 and the sweep circuit 319 staggered zones of controlling, and the film crystal pipe unit 322 in the pixel 320 be designed to pixel 340 in film crystal pipe unit 342 be connected, make to form a short-circuit condition between film crystal pipe unit 322 and the film crystal pipe unit 342, become the circuit structure design of function with preventing electro-static discharge.At last, after thin-film transistor element completes, cut off the connected structure of film crystal pipe unit 322 and film crystal pipe unit 342 again by position 310 (shown in dotted line).Actual membrane structure schematic top plan view is to paint with reference to Fig. 4.
As shown in Figure 4, polysilicon layer 402 has film crystal pipe unit 322 and 342 two active area of film crystal pipe unit, and gate electrode 406 is in order to the switch motion of control TFT unit 322 with film crystal pipe unit 342.Wherein the drain region 422b of film crystal pipe unit 322 is that source area 442a with film crystal pipe unit 342 interlinks by the setting of a communication path 402e, so that form short-circuit condition between film crystal pipe unit 322 and the film crystal pipe unit 342.Therefore, the static content of accumulating in thin-film transistor manufacturing process just can utilize communication path 402e conducting to disperse.Make the flow process back segment in thin-film transistor element at last, 410 places cut off in the position with communication path 402e again, remove short circuit and recover the electrical characteristic of thin-film transistor.
Manufacturing process is as the method for first embodiment, with reference to Fig. 5 A ~ 5C, shown in Fig. 5 A, form a polysilicon layer 502 earlier on substrate 500, and polysilicon layer 502 graphically limited TFT regions, but between film crystal pipe unit 322 and the film crystal pipe unit 342 is to be connected with communication path 502e, and does not limit other active area as yet.Then, simultaneously to source region 522a, source region 542a, drain region 522b and the drain region 542b of film crystal pipe unit 322, also have communication path 502e to carry out implanting ions with film crystal pipe unit 342.Wherein, communication path 502e has identical conductive characteristic with drain region 522b and source region 542a and links to each other.Wherein substrate 500 for example can be glass substrate, and the preferred thickness of polysilicon layer 502 is about 50nm.
Then, form gate oxide 504, gate electrode 506 respectively in regular turn.Wherein, gate oxide 504 materials for example can be silica, and gate electrode 506 then is the good metal material of conductivity, for example can be molybdenum tungsten compound or aluminium.After forming gate electrode 506, form an interlayer dielectric layer 508 again, and graphically limiting a contact window 509 and an opening 510, and expose polysilicon layer 502.Its split shed 510 is parts of exposing the communication path 502e of polysilicon layer 502, also is the position 410 shown in Fig. 4.In addition, interlayer dielectric layer 508 materials for example can be silica or silicon nitride.
Then, with reference to Fig. 5 B, formation source/drain metal 512 is on the interlayer dielectric layer 508, among contact window 509 and the opening 510, and graphically to limit data circuit (not demonstrating).Wherein the material of source/drain metal 512 is the good metal material of conductivity, for example can be molybdenum tungsten compound or aluminium, and the preferred thickness that forms for example is about 300nm.In addition, adopt method, limit in the operation process of data circuits, simultaneously the polysilicon layer in the opening 510 502 is removed, and reach the purpose of cutting off communication path 502e in graphical source/drain metal 512 as first embodiment.
Use the etching step of graphical source/drain metal 512, the control etching condition, make in the time of etching source/drain metal 512, polysilicon layer 502 in source/drain metal in the opening 510 512 and the opening 510 is removed, and remove short-circuit condition between film crystal pipe unit 322 and the film crystal pipe unit 342, and distinguish the respective active region territory of film crystal pipe unit 322 and film crystal pipe unit 342.
At last, carry out the follow-up making that thin-film transistor is connected pixel electrode, with reference to Fig. 5 C, form flatness layer 514 and pixel electrode 516 respectively in regular turn, wherein flatness layer 514 has one the interlayer window 515 that exposes source/drain metal 512, and the i.e. connection source/drain metal 512 by interlayer window 515 of pixel electrode 516.So, finish the display device that a thin-film transistor drives.
By above-mentioned structural design and form method, in thin-film transistor element manufacturing process, earlier adjacent film crystal pipe unit is linked to each other, be designed to a short-circuit condition, and do not limit individual other active layers zone earlier.With so that result from buildup of static electricity amount on each film crystal pipe unit in the manufacturing process, but conducting disperse, and avoid the situation of static discharge to take place.At last, treat that thin-film transistor is finished after, will cause the communication path of short circuit to cut off again, recover tft characteristics.Like this can be on the display floater, the electrostatic discharge problem that produces on each thin-film transistor is solved, and and then significantly promotes the effect of electrostatic defending.In addition, the short circuit between film crystal pipe unit of the present invention is communicated with design, is also promptly cut off before flatness layer forms, therefore, planarization effect in the time of can not influencing follow-up flatness layer and make, and keep the characteristic demand that pixel electrode is made, to possess the quality of display element.
Embodiment 3
As mentioned above, use thin-film transistor element formation method of the present invention and structure,, can both reach the purpose of preventing electro-static discharge, possess the condition and the element quality of former manufacturing process simultaneously no matter be to use first embodiment or the mode of second embodiment.Therefore, the present invention also provides another kind of thin-film transistor element formation method and structure in conjunction with first embodiment and second embodiment, is applied on the flat display driving, makes to have better static discahrge protection effect.
With reference to Fig. 6 and Fig. 7, wherein Fig. 6 is the display device partial array structural representation according to the present invention's the 3rd preferred embodiment respectively, and Fig. 7 is the plan structure schematic diagram according to the thin-film transistor of the present invention's the 3rd preferred embodiment.
The third embodiment of the present invention is utilized the graphic designs of polysilicon layer, source/drain region with each film crystal pipe unit itself links to each other simultaneously, form short circuit, and the film crystal pipe unit that will independently be arranged in each pixel is originally respectively also linked to each other the short-circuit condition between the formation film crystal pipe unit.
As shown in Figure 6, with the zone of data circuit 618 with sweep circuit 619 staggered controls, be each pixel region, wherein the film crystal pipe unit 622 in the pixel 620 be designed to pixel 640 in film crystal pipe unit 642 be connected, make and form a short-circuit condition between film crystal pipe unit 622 and the film crystal pipe unit 642, in addition, film crystal pipe unit 622 source/drain regions own also are connected to a short-circuit condition, thin-film transistor 642 also has the design of same internal short-circuit, and making becomes a circuit structure design with better preventing electro-static discharge function.At last, after thin-film transistor element completes, the phase access path that again each is formed short circuit in the position 610, position 611,613 places, position (shown in dotted line) cut off, and recovers the thin transistorized element characteristic of film.Actual membrane structure schematic top plan view is to paint with reference to Fig. 7.
As shown in Figure 7, polysilicon layer 702 has film crystal pipe unit 622 and 642 two active area of film crystal pipe unit, and gate electrode 706 is in order to the switch motion of control TFT unit 622 with film crystal pipe unit 642.Wherein the drain region 722b of film crystal pipe unit 622 is that source area 742a with film crystal pipe unit 642 interlinks by the setting of a communication path 702e, so that form short-circuit condition between film crystal pipe unit 622 and the film crystal pipe unit 642.In addition, film crystal pipe unit 622 source area 722a and drain region 722b own also are connected with a communication path 722e, the source area 742a of another film crystal pipe unit 642 and drain region 742b then are connected with another communication path 742e, and make the inside of film crystal pipe unit 622 and the inside of film crystal pipe unit 642 form a short-circuit condition equally respectively.
Therefore, the static content of accumulating in thin-film transistor manufacturing process just can utilize communication path 702e, communication path 722e and communication path 742e conducting to disperse simultaneously.Like this, make the static content of accumulation disperse the path to increase,, and promote the effect of preventing electro-static discharge more the occurrence degree of more effective reduction static discharge.At last, make the flow process back segment in thin-film transistor element again, with communication path 702e, communication path 722e and communication path 742e in the position 710, position 711 and 713 places, position are cut off, remove short-circuit condition, and recover the electrical characteristic of thin-film transistor element.
Use the thin-film transistor element of third embodiment of the invention, its manufacturing process is then as first embodiment and second embodiment, form a polysilicon layer earlier, and, limit the position of thin-film transistor, source/drain region and each communication path simultaneously with graphical operation and implanting ions.Then, carry out the transistorized manufacturing process of general subsequent thin film in regular turn, then, when source/drain metal graphically limits data circuit, cooperate the process of etching source/drain metal, finish the step of cutting off communication path simultaneously.At last, carry out the making flow process that thin-film transistor connects pixel electrode, promptly finish the display device that a thin-film transistor drives.
By the embodiment of the invention described above as can be known, use method of the present invention and can get one and have the polycrystalline SiTFT element of good electro-static discharge protection function, and promote the product yield and the reliability of display device.And use the formation method of thin-film transistor element of the present invention, can be under the process conditions that does not influence general thin-film transistor, only do the design and the variation of partly pattern qualification, do not increase extra light shield number and manufacturing process, can form a thin-film transistor element with static discahrge protection effect.
In addition, because among the present invention, cut off communication path to remove the step of short-circuit condition, be after source/drain metal forms, flatness layer is promptly finished before forming, and therefore, can not influence the planarization effect of flatness layer, and the condition of later pixel electrode making, and the characteristic demand and the product quality of still possessing display device.
Formation method with thin-film transistor element of electro-static discharge protection function of the present invention, not only limit in the manufacturing of the polycrystalline SiTFT that is used in liquid crystal flat panel display, the manufacturing of any thin-film transistor driving element all can utilize method of the present invention and promote product quality and yield.
Though the present invention describes with reference to current specific embodiment, but those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, under the situation that does not break away from spirit of the present invention, also can make the variation and the modification of various equivalences, therefore, as long as variation, the modification to the foregoing description all will drop in the scope of claims of the present invention in connotation scope of the present invention.
Claims (10)
1. formation method with thin-film transistor element of electrostatic discharge protective, this formation method comprises at least:
Form a crystal silicon layer on a substrate;
Form several source areas, several drain regions and several communication paths among this crystal silicon layer, wherein said source area, drain region and communication path have the identical conduction characteristic, and electrically connect forms a short-circuit condition;
Form a gate oxide on this polysilicon layer;
Form several gate electrodes on this gate oxide;
Form an interlayer dielectric layer;
This interlayer dielectric layer of patterning, to form several contact windows and several openings, wherein said contact window exposes each described source area and each described drain region of this crystal silicon layer, and described opening then exposes each described communication path of this crystal silicon layer;
Form one source/drain metal layer on this interlayer dielectric layer, among the described contact window with described opening in; And
This source/drain metal layer of patterning forming several data circuits simultaneously, and removes this crystal silicon layer in the described opening, to cut off those communication paths.
2. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 1 is characterized in that the formation method of described source area, described drain region and described communication path comprises ion implantation.
3. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 1 is characterized in that each described source area and each described drain region are to utilize each described communication path to be linked to each other.
4. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 1 is characterized in that the step of this source/drain metal layer of patterning is to use plasma dry-etching method.
5. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 4 is characterized in that this plasma dry-etching method also comprises a single stage procedure or a two-stage procedure.
6. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 5 is characterized in that this single stage procedure is to use the gas of chloride ion-containing.
7. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 5, it is characterized in that this two-stage procedure is to be divided into a phase I to carry out the etching of this source/drain metal layer, and a second stage is carried out the etching of this crystal silicon layer in the described opening.
8. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 7 is characterized in that this phase I is to use the gas of chloride ion-containing.
9. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 7 is characterized in that this second stage is to use the gas of fluoride ion.
10. the formation method with thin-film transistor element of electrostatic discharge protective as claimed in claim 1 is characterized in that also comprising:
Form a flatness layer;
This flatness layer of patterning exposes this source/drain metal layer to form several interlayer windows; And
Form several pixel electrodes and several pixel circuits simultaneously, wherein said pixel electrode is arranged in described interlayer window to electrically connect with this source that exposes/drain metal layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410002797 CN1649110A (en) | 2004-01-19 | 2004-01-19 | Forming method for thin film transistor element with static discharge protection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410002797 CN1649110A (en) | 2004-01-19 | 2004-01-19 | Forming method for thin film transistor element with static discharge protection |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1649110A true CN1649110A (en) | 2005-08-03 |
Family
ID=34867461
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410002797 Pending CN1649110A (en) | 2004-01-19 | 2004-01-19 | Forming method for thin film transistor element with static discharge protection |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1649110A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100426490C (en) * | 2006-07-25 | 2008-10-15 | 友达光电股份有限公司 | Active element substrate and forming method thereof |
| CN100461379C (en) * | 2007-03-29 | 2009-02-11 | 友达光电股份有限公司 | Picture element structure of liquid crystal display and producing method thereof |
| CN101290408B (en) * | 2007-04-17 | 2010-04-14 | 北京京东方光电科技有限公司 | Thin film transistor display |
| CN101192379B (en) * | 2006-11-23 | 2011-01-19 | 中华映管股份有限公司 | Active member array substrate with electro-static discharge protective ability |
| US8053674B2 (en) | 2006-08-04 | 2011-11-08 | Nitto Denko Corporation | Wired circuit board |
| CN102298239A (en) * | 2011-08-25 | 2011-12-28 | 南京中电熊猫液晶显示科技有限公司 | Metal-layer electrode on thin film transistor-liquid crystal display array substrate |
| US9663984B2 (en) | 2005-10-11 | 2017-05-30 | Cardinal Cg Company | High infrared reflection coatings, thin film coating deposition methods and associated technologies |
| CN109346463A (en) * | 2018-10-10 | 2019-02-15 | 深圳市华星光电半导体显示技术有限公司 | Display panel and its manufacturing method with electrostatic protection |
| CN110349917A (en) * | 2019-06-28 | 2019-10-18 | 上海天马微电子有限公司 | Production method, array substrate and the display panel of array substrate |
-
2004
- 2004-01-19 CN CN 200410002797 patent/CN1649110A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9663984B2 (en) | 2005-10-11 | 2017-05-30 | Cardinal Cg Company | High infrared reflection coatings, thin film coating deposition methods and associated technologies |
| US10442728B2 (en) | 2005-10-11 | 2019-10-15 | Cardinal Cg Company | High infrared reflection coatings, thin film coating deposition methods and associated technologies |
| US11028011B2 (en) | 2005-10-11 | 2021-06-08 | Cardinal Cg Company | High infrared reflection coatings, thin film coating deposition methods and associated technologies |
| CN100426490C (en) * | 2006-07-25 | 2008-10-15 | 友达光电股份有限公司 | Active element substrate and forming method thereof |
| US8053674B2 (en) | 2006-08-04 | 2011-11-08 | Nitto Denko Corporation | Wired circuit board |
| CN101119610B (en) * | 2006-08-04 | 2012-11-21 | 日东电工株式会社 | Circuit wired board |
| CN101192379B (en) * | 2006-11-23 | 2011-01-19 | 中华映管股份有限公司 | Active member array substrate with electro-static discharge protective ability |
| CN100461379C (en) * | 2007-03-29 | 2009-02-11 | 友达光电股份有限公司 | Picture element structure of liquid crystal display and producing method thereof |
| CN101290408B (en) * | 2007-04-17 | 2010-04-14 | 北京京东方光电科技有限公司 | Thin film transistor display |
| CN102298239A (en) * | 2011-08-25 | 2011-12-28 | 南京中电熊猫液晶显示科技有限公司 | Metal-layer electrode on thin film transistor-liquid crystal display array substrate |
| CN109346463A (en) * | 2018-10-10 | 2019-02-15 | 深圳市华星光电半导体显示技术有限公司 | Display panel and its manufacturing method with electrostatic protection |
| CN110349917A (en) * | 2019-06-28 | 2019-10-18 | 上海天马微电子有限公司 | Production method, array substrate and the display panel of array substrate |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7180090B2 (en) | Method of forming thin-film transistor devices with electro-static discharge protection | |
| CN108873508B (en) | Manufacturing method of array substrate | |
| KR101353269B1 (en) | Thin film transistor substrate and method for manufacturing the same | |
| CN1913163A (en) | Thin film transistor substrate and method of manufacturing the same | |
| KR101246789B1 (en) | Array substrate and method of fabricating the same | |
| CN1680861A (en) | Tft LCD, laminated capacitor and forming method thereof | |
| CN1381898A (en) | Panel display and its manufacturing method | |
| CN1897285A (en) | Thin film transistor array panel and fabrication | |
| CN1873989A (en) | Thin film transistor and method of fabricating thin film transistor substrate | |
| CN101064345A (en) | Thin film transistor and method of fabricating the same | |
| US10120256B2 (en) | Preparation method for thin film transistor, preparation method for array substrate, array substrate, and display apparatus | |
| US6580127B1 (en) | High performance thin film transistor and active matrix process for flat panel displays | |
| CN100339964C (en) | Method for making MOS having light doped drain electrode | |
| CN1782832A (en) | Array substrate with electrostatic discharge protection and display device and its producing method | |
| US8310611B2 (en) | Display device and manufacturing method thereof | |
| CN100570896C (en) | Thin-film transistor, active array substrate and manufacture method thereof | |
| CN1479559A (en) | Organic electroluminescence display device and its manufacturing method | |
| CN1812109A (en) | Tft array panel and fabricating method thereof | |
| US8258024B2 (en) | Display device and method of manufacturing the same | |
| CN1629907A (en) | Flat panel display and method of fabricating the same | |
| CN1649110A (en) | Forming method for thin film transistor element with static discharge protection | |
| CN103633098A (en) | Display device and method for manufacturing the same | |
| CN1215567C (en) | Panel display and manufacturing method thereof | |
| CN1950949A (en) | Co-planar thin film transistor having additional source/drain insulation layer | |
| CN1815321A (en) | Method for manufacturing down base plate for liquid crystal display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: YULIN TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE Effective date: 20090911 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20090911 Address after: Room 14, building 205, 1402 North Dunhua Road, Songshan District, Taipei, Taiwan, China Applicant after: Institute for Information Industry Address before: No. four, Zhongxing Road, bamboo East Town, Taiwan County, Hsinchu Province, China, 195 Applicant before: Industrial Technology Research Institute |
|
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20050803 |