CN1599219A - Conversion soft switch circuit - Google Patents
Conversion soft switch circuit Download PDFInfo
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- CN1599219A CN1599219A CNA2004100405409A CN200410040540A CN1599219A CN 1599219 A CN1599219 A CN 1599219A CN A2004100405409 A CNA2004100405409 A CN A2004100405409A CN 200410040540 A CN200410040540 A CN 200410040540A CN 1599219 A CN1599219 A CN 1599219A
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- 238000006243 chemical reaction Methods 0.000 title description 5
- 239000003990 capacitor Substances 0.000 claims abstract description 69
- 230000003139 buffering effect Effects 0.000 claims description 26
- 238000004146 energy storage Methods 0.000 claims description 20
- 230000006837 decompression Effects 0.000 claims description 13
- 230000003071 parasitic effect Effects 0.000 claims description 12
- 230000009466 transformation Effects 0.000 claims description 11
- 230000005669 field effect Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 14
- 230000008569 process Effects 0.000 abstract description 14
- 238000001914 filtration Methods 0.000 abstract 1
- 230000002459 sustained effect Effects 0.000 description 6
- 230000008901 benefit Effects 0.000 description 4
- 238000012937 correction Methods 0.000 description 4
- 238000011084 recovery Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 2
- 230000009194 climbing Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000013519 translation Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
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Abstract
A transform flexible switch circuit includes the booster transfer circuit and its modified circuit as well as the reducing transfer circuit and its modified transfer circuit. The booster and reducing transfer circuits include two power switchs, buffer capacitor, freewheeling diode, accumulated energy inductance, buffer inductance, rectifier diode, clamping diode and output filtering capacitor. Their modified circuits also include the secondary buffer capacitors and buffer diodes. The control logic is as follows: the preliminary power switch is on before the secondary power switch; after both the preliminary power switch and the secondary power switch are on for a while, we shut off the preliminary power switch while the secondary power switch is on for a while and then is shut off. The preliminary power switch is the zero current turn-on and its creepage voltage is clamped at the output voltage value (after the preliminary power switch is shut off), while the secondary power switch is the zero voltage turn-on and the zero voltage turn-off. The turn-off process of the rectifier diode is the flexible recover and increases the work efficiency and reliability.
Description
[technical field]
The present invention relates to soft switch dc-dc (DC-DC) converter of power inverter, relate in particular to a kind of boost type, buck soft switch transducer.
[background technology]
Fig. 1 is the schematic circuit of proposition among the U.S. Pat 6525513B1 (Soft Switching Topological Circuit in Boost or BuckConverter boosts or step-down soft switch transducer topological circuit) and the control logic of power switch thereof.The main deficiency of this patent is: electric current was non-vanishing when auxiliary switch M1 turn-offed, and M1 is hard the shutoff; Opening at synchronization of the shutoff of auxiliary power switch M1 and master power switch M2 carried out, and do not have overlappingly between two signals, and this influences the converter job stability with regard to causing vibration easily.
[summary of the invention]
At the shortcoming of prior art, the present invention proposes a kind of conversion soft switch circuit.
The present invention can be achieved through the following technical solutions:
The present invention proposes a kind of boosting inverter soft switch circuit, comprises first power switch, second power switch, buffer capacitor, fly-wheel diode, energy storage inductor, buffer inductance, rectifier diode, clamp diode, output filter capacitor; The drain electrode of described first power switch links to each other with an end of energy storage inductor, and the other end of energy storage inductor links to each other with the positive pole of power supply, and the drain electrode of described second power switch links to each other with an end of buffer inductance, the anode of rectifier diode; Described buffer capacitor is connected in parallel on the two ends of second power switch, the fly-wheel diode inverse parallel is at the two ends of second power switch, the anode of clamp diode and the other end of buffer inductance are connected in the drain electrode of first power switch jointly, the negative electrode of clamp diode and the negative electrode of rectifier diode are connected in an end of output filter capacitor jointly, the source electrode of described first power switch, the source electrode of second power switch and the other end of output filter capacitor are connected in the negative pole of input power supply jointly, the control logic of this circuit is: open first power switch earlier, through opening second power switch again after a bit of time δ 1, at first power switch and second power switch conducting simultaneously T1 after the time, turn-off first power switch, then turn-off second power switch again after 2 times through δ, after this T2 in the time period first power switch and second power switch all turn-off, to T2 time period end, make first power switch open-minded again, so go round and begin again.
Described buffer capacitor is the parasitic capacitance of the second power switch loong shunt electric capacity or second power switch self, and perhaps the parasitic capacitance by described loong shunt electric capacity and second power switch self composes in parallel; Described fly-wheel diode is the inverse parallel diode of second power switch or the body diode of second power switch.Described first power switch, second power switch are power field effect pipe (MOSFET) or isolated gate FET (IGBT) power device.
The present invention proposes a kind of improved boosting inverter soft switch circuit, it is except comprising boosting inverter soft switch circuit structure, also comprise second buffer capacitor and buffering diode, the anode of described buffering diode links to each other with the negative electrode of clamp diode, and the negative electrode of this buffering diode links to each other with the negative electrode of converter rectifier diode, an end of output filter capacitor; Described second buffer capacitor is connected across between the anode of the negative electrode of clamp diode and converter rectifier diode, and the control logic of this circuit is identical with the control logic of boosting inverter soft switch circuit.
The present invention proposes a kind of decompression transformation soft switch circuit, comprises first power switch, second power switch, converter rectifier diode, buffer inductance, clamp diode, energy storage inductor, output filter capacitor, buffer capacitor, fly-wheel diode; Described first power switch, the drain electrode of second power switch links to each other with positive source, one end of the source electrode of first power switch and energy storage inductor, one end of buffer inductance and clamp diode negative electrode connect, the source electrode of second power switch and the other end of buffer inductance, converter rectifier diode negative electrode connects, the other end of described energy storage inductor is connected with an end of output filter capacitor, the other end of described output filter capacitor, the anode of clamp diode, and the anode of converter rectifier diode is connected in the input power cathode jointly, described buffer capacitor is connected in parallel on the two ends of second power switch, described fly-wheel diode inverse parallel is at the two ends of second power switch, the control logic of this circuit is: open first power switch earlier, through opening second power switch again after a bit of time δ 1, at first power switch and second power switch conducting simultaneously T1 after the time, turn-off first power switch, then turn-off second power switch again after 2 times through δ, after this T2 in the time period first power switch and second power switch all turn-off, to T2 time period end, make first power switch open-minded again, so go round and begin again.
Described buffer capacitor is the parasitic capacitance of the second power switch loong shunt electric capacity or second power switch self, and perhaps the parasitic capacitance by described loong shunt electric capacity and second power switch self composes in parallel; Described fly-wheel diode is the inverse parallel diode of second power switch or the body diode of second power switch.Described first power switch, second power switch are power field effect pipe (MOSFET) or isolated gate FET (IGBT) power device.
The present invention proposes a kind of improved decompression transformation soft switch circuit, it is except comprising decompression transformation soft switch circuit structure, also comprise second buffer capacitor and buffering diode, this buffering diode anode links to each other with the negative electrode of clamp diode, and its negative electrode links to each other with the source electrode of first power switch; Described second buffer capacitor is connected across between the negative electrode of the anode of buffering diode and rectifier diode, and the control logic of this circuit is identical with the control logic of decompression transformation soft switch circuit.
Clamp diode is to be used for the drain-source voltage of clamper first power switch in output voltage values (first power switch close have no progeny) among the present invention; Buffer inductance become with the buffering capacitance group resonant network be second power switch open the creation zero voltage condition; The shutoff of second power switch is turn-offed because of the no-voltage that exists for of buffer capacitor; Buffer inductance has limited the electric current climbing speed (di/dt) of first power switch and has softened the turn-off criterion of rectifier diode when the first power switch conducting simultaneously, therefore rectifier diode is soft recovery process, and the present invention also has, and circuit is simple, control is convenient, the characteristics of reliable operation, can obviously improve the overall efficiency of converter.
[description of drawings]
The present invention is further described below in conjunction with drawings and Examples.
Fig. 1 is the schematic diagram and the control logic of a kind of boost inverter soft switch circuit of proposing among the patent US 6525513B1.
Fig. 2 is schematic circuit and the control logic that soft switch topology circuit that the present invention proposes is used in booster converter.
Fig. 3 is schematic circuit reduced graph and the control logic of Fig. 2.
Fig. 4 is eight kinds of mode of operations in soft switch transducer one switch periods shown in Figure 3.
Fig. 5 is the groundwork waveform of soft switch transducer shown in Figure 3.
Fig. 6 is soft follow-on schematic circuit of boost switching formula converter and the control logic that the present invention proposes.
Fig. 7 is schematic circuit reduced graph and the control logic of Fig. 6.
Fig. 8 is nine kinds of mode of operations in soft switch transducer one switch periods shown in Figure 7.
Fig. 9 is the groundwork waveform of soft switch transducer shown in Figure 7.
Figure 10 is soft switch decompression transducer topology theory circuit and the control logic that the present invention proposes.
Figure 11 is modified model decompression transducer schematic circuit and the control logic that the present invention proposes.
Figure 12 is soft boost switching formula converter topology power factor correction application circuit and the control logic that the present invention proposes.
Figure 13 is Fig. 6 modified model converter power factor correcting application principle circuit and control logic.
Figure 14 is application circuit and the control logic of the present invention in the full-bridge type translation circuit.
Figure 15 is application circuit and the control logic of modified model topology of the present invention in the full-bridge type translation circuit.
[embodiment]
In Fig. 2, the present invention proposes a kind of boosting inverter soft switch circuit, comprises the first power switch M1, the second power switch M2, buffer capacitor Cs, sustained diode, energy storage inductor L, buffer inductance Lr, rectifier diode D1, clamp diode D2, output filter capacitor Co; The drain electrode of the described first power switch M1 links to each other with the end of energy storage inductor L, and the other end of energy storage inductor L links to each other with the positive pole of power supply, and the drain electrode of the described second power switch M2 links to each other with the end of buffer inductance Lr, the anode of rectifier diode D1; Described buffer capacitor Cs is connected in parallel on the two ends of the second power switch M2, the sustained diode inverse parallel is at the two ends of the second power switch M2, the other end of the anode of clamp diode D2 and buffer inductance Lr is connected in the drain electrode of the first power switch M1 jointly, the negative electrode of the negative electrode of clamp diode D2 and rectifier diode D1 is connected in the end of output filter capacitor Co jointly, the source electrode of the described first power switch M1, the other end of the source electrode of the second power switch M2 and output filter capacitor Co is connected in the negative pole of input power supply jointly, the control logic of this circuit is: open the first power switch M1 earlier, through opening the second power switch M2 again after a bit of time δ 1, at the first power switch M1 and second power switch M2 conducting simultaneously T1 after the time, turn-off the first power switch M1, then turn-off the second power switch M2 after 2 times again through δ, after this T2 in the time period the first power switch M1 and the second power switch M2 all turn-off, to T2 time period end, make the first power switch M1 open-minded again, so go round and begin again.
Described buffer capacitor Cs is the parasitic capacitance of the second power switch M2 loong shunt electric capacity or the second power switch M2 self, and perhaps the parasitic capacitance by described loong shunt electric capacity and the second power switch M2 self composes in parallel; Described sustained diode is the inverse parallel diode of the second power switch M2 or the body diode of the second power switch M2; The first power switch M1 and the second power switch M2 are power field effect pipe (MOSFET) or isolated gate FET (IGBT) power device.
Be easy analysis, do following hypothesis:
Energy storage inductor L is enough big, and the converter input can replace with a current source I; Ignore output voltage ripple simultaneously, converter output terminal can replace with a voltage source; Diode and power switch pipe conducting resistance are enough little, are approximately zero.Thereby the converter principle circuit block diagram that obtains simplifying, as shown in Figure 3.
Fig. 5 has provided the groundwork waveform of converter, and is specific as follows:
Fig. 5 (a) is the gate source voltage drive waveforms of the first power switch M1; Fig. 5 (b) is the gate source voltage drive waveforms of the second power switch M2; Fig. 5 (c) is the drain-source voltage waveform of the first power switch M1; Fig. 5 (d) is the drain-source voltage waveform of the second power switch M2; Fig. 5 (e) is the current waveform of the first power switch M1; Fig. 5 (f) is the current waveform of buffer inductance Lr; Fig. 5 (g) is the current waveform of the second power switch M2; Fig. 5 (h) is the current waveform of clamp diode D2; Fig. 5 (i) is the current waveform of rectifier diode D1; Fig. 5 (j) is the voltage waveform of rectifier diode D1.
The course of work is as follows:
In Fig. 4 (a), when t＜t0, the first power switch M1 and the second power switch M2 are in off state, and all input currents flow through the rectifier diode D1 of buffer inductance Lr and booster converter.Simultaneously, the second power switch M2 blocks output voltage, and no current flows through among the clamp diode D2.
In Fig. 4 (b), open the first power switch M1 during t0, then the drain-source voltage V of the first power switch M1
M1Vanishing, output voltage V
oPut on buffer inductance L
rTwo ends, thus make by buffer inductance L
rWith rectifier diode D
1Linear decline of electric current, the electric current by the first power switch M1 rises so that same speed is linear simultaneously, the rate of change of electric current is V
o/ L
rBecause buffer inductance L
rExistence, the electric current that flows through the rectifier diode D1 and the first power switch M1 can not suddenly change, thereby the electric current among the first power switch M1 is slowly to rise, the electric current among the rectifier diode D1 is slowly to descend.Generally speaking buffer inductance Lr numerical value is big more, and this restriction to electric current is strong more.By choosing suitable buffer inductance Lr numerical value, can reduce the loss that the reversely restoring process of the turn-on consumption of the first power switch M1 and rectifier diode D1 produces effectively.This shows the first power switch M1 zero current turning-on (ZCS).
In Fig. 4 (c), when t=t1, the electric current I lr among the buffer inductance Lr, that is the electric current I among the rectifier diode D1
D1Numerical value is reduced to zero, and power supply input current I all transfers among the first power switch M1.Begin the reversely restoring process of rectifier diode D1 then, reverse recovery current reaches reverse maximum Ir during to t2.
In Fig. 4 (d), t2 is after the moment, and the reversely restoring process of rectifier diode D1 is finished, buffer capacitor C
sLr begins resonant discharge by buffer inductance, and the electric current among the buffer inductance Lr increases in the other direction, to t3 constantly, and buffer capacitor C
sDischarge off, the electric current among the buffer inductance Lr is
Electric current among the first power switch M1 is
In Fig. 4 (e), buffer capacitor C
sBehind the discharge off, buffer capacitor C
sTwo ends (that is inverse parallel diode D two ends of the second power switch M2) voltage is zero, inverse parallel diode D conducting, and electric current maintains
In Fig. 4 (f), open the second power switch M2 constantly at t4, the electric current that then flows through inverse parallel diode D turns to the circulation by the second power switch M2, and numerical value remains unchanged.Because open second power switch M2 inverse parallel diode D conducting always before, therefore, opening of the second power switch M2 is no-voltage (ZVS), this has promptly realized the soft switch of zero voltage transition (ZVT).
In Fig. 4 (g), turn-off the first power switch M1 constantly at t5.Because the output junction capacitance of the first power switch M1 is very little, at short notice the voltage V at the first power switch M1 drain-source two ends
M1Rise to V rapidly
o, meanwhile by buffer inductance L
rElectric current because V
M1Increase and be decreased in the other direction zero, and then positive direction increases.Work as V
M1Reach V
oThe time, clamp diode D2 conducting on the one hand; L on the other hand
rTwo ends have applied constant voltage V
o, by buffer inductance L
rElectric current I
LrContinue linear increasing.Because power supply input current I is constant, and for flowing through clamp diode D2 and buffering inductance L
rThe electric current sum, so the electric current among the clamp diode D2 can linear descend, the electric current in clamp diode D2 drops to zero.At this moment the power supply input current all flows through the second power switch M2.Here what deserves to be mentioned is that the electric current among the clamp diode D2 drops to after zero, exists reversely restoring process equally.Because L
rExistence, the reversely restoring process of clamp diode D2 is softened equally, the loss of reversely restoring process is minimized.
In Fig. 4 (h), turn-off the second power switch M2 constantly at t6.Because buffer capacitor C
sExistence, circuit is earlier to buffer capacitor C
sCharging, the voltage V at the second power switch M2 drain-source two ends
M2Slowly rise, therefore the second power switch M2 no-voltage is turn-offed (ZVS).To t7 constantly, V
M2Reach V
oThe time, rectifier diode D1 conducting, the second power switch M2 turn off process finishes simultaneously.So far, converter has been finished the work of one-period.
The advantage of the boosting inverter soft switch circuit that the present invention proposes is: the first power switch M1 be the drain-source voltage of the zero current turning-on and the first power switch M1 by clamper in output voltage values (the first power switch M1 closes and has no progeny); The second power switch M2 is that no-voltage is opened with no-voltage and turn-offed; The turn off process of rectifier diode D1 is soft recovery; The drive signal of the cause first power switch M1 and the drive signal of the second power switch M2 have necessarily overlapping, and therefore work is more reliable.
In Fig. 6, the improved boosting inverter soft switch circuit that the present invention proposes, it is except comprising circuit structure identical with Fig. 2 and identical control logic, also comprise the second buffer capacitor Cr and buffering diode D3, the anode of described buffering diode D3 links to each other with the negative electrode of clamp diode D2, and the negative electrode of this buffering diode D3 links to each other with the end of the negative electrode of converter rectifier diode D1, output filter capacitor Co; The described second buffer capacitor Cr is connected across between the anode of the negative electrode of clamp diode D2 and converter rectifier diode D1.
Be easy analysis, do following hypothesis:
Energy storage inductor L is enough big, and the converter input can replace with a current source I; Ignore output voltage ripple simultaneously, converter output terminal can replace with a voltage source; Diode and power switch pipe conducting resistance are enough little, are approximately zero.Thereby the modified model converter principle circuit that obtains simplifying, as shown in Figure 7.
Fig. 9 has provided the groundwork waveform of converter, and is specific as follows:
Fig. 9 (a) is the gate source voltage drive waveforms of the first power switch M1; Fig. 9 (b) is the gate source voltage drive waveforms of the second power switch M2; Fig. 9 (c) is the drain-source voltage waveform of the first power switch M1; Fig. 9 (d) is the drain-source voltage waveform of the second power switch M2; Fig. 9 (e) is the current waveform of the first power switch M1; Fig. 9 (f) is the current waveform of buffer inductance Lr; Fig. 9 (g) is the current waveform of the second power switch M2; Fig. 9 (h) is the current waveform of clamp diode D2; Fig. 9 (i) is the current waveform of buffering diode 1D3; Fig. 9 (j) is the voltage waveform at the second buffer capacitor Cr two ends; Fig. 9 (k) is the voltage waveform at buffer capacitor Cs two ends; Fig. 9 (l) is the current waveform of rectifier diode D1; Fig. 9 (m) is the voltage waveform of rectifier diode D1.
Identical with the course of work of above-mentioned Fig. 2 topology in t＜t0 Fig. 6 course of work in the time period of t=t5, the course of work after the t=t5 is as follows:
In Fig. 8 (g), t5 turn-offs the first power switch M1 constantly.Owing to the existence of the second buffer capacitor Cr, limited the climbing speed of the first power switch M1 drain-source both end voltage, the first power switch M1 drain-source both end voltage slowly rises, and turn-offs (ZVS) thereby the first power switch M1 approaches no-voltage; Meanwhile by buffer inductance L
rElectric current because V
M1Increase and be decreased in the other direction zero, and then positive direction increases.Work as V
M1Reach V
oThe time, the first power switch M1 turn off process finishes on the one hand; Buffer inductance L on the other hand
rTwo ends have applied constant voltage V
o, by buffer inductance L
rElectric current I
LrContinue linear increasing.Because power supply input current I is constant, and for flowing through clamp diode D2 and buffering inductance L
rThe electric current sum, therefore, electric current among the clamp diode D2 can linearly descend, the electric current in clamp diode D2 drops to zero.At this moment the power supply input current all flows through the second power switch M2.Because buffer inductance L
rExistence, the reversely restoring process of clamp diode D2 is softened equally, the loss of reversely restoring process is minimized.
In Fig. 8 (h), t6～t7 is in the time period, and the converter input current all flows through the second power switch M2, with conventional boost inverter power tube conduction mode.
In Fig. 8 (i), turn-off the second power switch M2 constantly at t7.On the one hand because buffer capacitor C
sExistence, circuit is to buffer capacitor C
sCharging; Buffer capacitor Cr discharges by buffering diode D3 on the other hand, thereby the voltage V at the second power switch M2 drain-source two ends
M2Slowly rise, therefore the second power switch M2 is similar to no-voltage and turn-offs (ZVS).To t8 constantly, V
M2Reach V
OThe time, rectifier diode D1 conducting, the second power switch M2 turn off process finishes simultaneously.So far, converter has been finished the work of one-period.
The advantage of the improved boosting inverter soft switch circuit that the present invention proposes is: the first power switch M1 is that zero current turning-on and no-voltage are turn-offed, and the drain-source voltage of the first power switch M1 by clamper in output voltage values (the first power switch M1 closes and has no progeny); The second power switch M2 is that no-voltage is opened with no-voltage and turn-offed; The turn off process of rectifier diode D1 is soft recovery; The drive signal of the cause first power switch M1 and the drive signal of the second power switch M2 have necessarily overlapping, and therefore work is more reliable.
In Figure 10, the decompression transformation soft switch circuit that the present invention proposes comprises the first power switch M1, the second power switch M2, converter rectifier diode D1, buffer inductance Lr, clamp diode D2, energy storage inductor L, output filter capacitor Co, buffer capacitor Cs, sustained diode; The described first power switch M1, the drain electrode of the second power switch M2 links to each other with positive source, the end of the source electrode of the first power switch M1 and energy storage inductor L, the end of buffer inductance Lr and clamp diode D2 negative electrode connect, the other end of the source electrode of the second power switch M2 and buffer inductance Lr, converter rectifier diode D1 negative electrode connects, the other end of described energy storage inductor L is connected with the end of output filter capacitor Co, the other end of described output filter capacitor Co, the anode of clamp diode D2, and the anode of converter rectifier diode D1 is connected in the input power cathode jointly, described buffer capacitor Cs is connected in parallel on the two ends of the second power switch M2, described sustained diode inverse parallel is at the two ends of the second power switch M2, the control logic of this circuit is: open the first power switch M1 earlier, through opening the second power switch M2 again after a bit of time δ 1, at the first power switch M1 and second power switch M2 conducting simultaneously T1 after the time, turn-off the first power switch M1, then turn-off the second power switch M2 after 2 times again through δ, after this T2 in the time period the first power switch M1 and the second power switch M2 all turn-off, to T2 time period end, make the first power switch M1 open-minded again, so go round and begin again.
Described buffer capacitor Cs is the parasitic capacitance of the second power switch M2 loong shunt electric capacity or the second power switch M2 self, and perhaps the parasitic capacitance by described loong shunt electric capacity and the second power switch M2 self composes in parallel; Described sustained diode is the inverse parallel diode of the second power switch M2 or the body diode of the second power switch M2; The first power switch M1 and the second power switch M2 are power field effect pipe (MOSFET) or isolated gate FET (IGBT) power device.
In Figure 11, the improved decompression transformation soft switch circuit that the present invention proposes, it is except comprising components and parts identical with Figure 10 and identical control logic, also comprise the second buffer capacitor Cr and buffering diode D3, this buffering diode D3 anode links to each other with the negative electrode of clamp diode D2, and its negative electrode links to each other with the source electrode of the first power switch M1; The described second buffer capacitor Cr is connected across between the negative electrode of the anode of buffering diode D3 and rectifier diode D1.This circuit realizes that the thought of soft switch is identical with circuit shown in Figure 10.
Figure 12 is the schematic circuit that step-up switch topology of the present invention is applied to power factor correction (PFC), on the basis of Fig. 2, replace input voltage source Vin with alternating current input power supplying Vac and rectifier bridge, the gate-drive that also comprises power factor correction (PFC) control and the first power switch M1 and the second power switch M2, it is simple, reliable that it has control, the efficient advantages of higher.
Figure 13 is the schematic circuit that modified model step-up switch topology of the present invention is applied to power factor correction (PFC), and it also comprises the second buffer capacitor Cr and buffering diode D3 except comprising the described topological circuit of Figure 12.The series arm that the series arm of this buffering diode D3 and the equidirectional composition of clamp diode D2 and buffer inductance Lr and rectifier diode D1 form is in parallel, and the described second buffer capacitor Cr is connected across between the anode of the anode of buffering diode D3 and rectifier diode D1.It is simple, reliable that it has control, the efficient advantages of higher.
Figure 14 is the application circuit in the bridge conversion circuit of the present invention.
Figure 15 is the application circuit of modified model topology of the present invention in bridge conversion circuit.
Claims (10)
1. a boosting inverter soft switch circuit comprises: first power switch (M1), second power switch (M2), buffer capacitor (Cs), fly-wheel diode (D), energy storage inductor (L), buffer inductance (Lr), rectifier diode (D1), clamp diode (D2), output filter capacitor (Co); The drain electrode of described first power switch (M1) links to each other with an end of energy storage inductor (L), the other end of energy storage inductor (L) links to each other with the positive pole of power supply, and the drain electrode of described second power switch (M2) links to each other with an end of buffer inductance (Lr), the anode of rectifier diode (D1); Described buffer capacitor (Cs) is connected in parallel on the two ends of second power switch (M2), fly-wheel diode (D) inverse parallel is at the two ends of second power switch (M2), the other end of the anode of clamp diode (D2) and buffer inductance (Lr) is connected in the drain electrode of first power switch (M1) jointly, the negative electrode of the negative electrode of clamp diode (D2) and rectifier diode (D1) is connected in an end of output filter capacitor (Co) jointly, the source electrode of described first power switch (M1), the other end of the source electrode of second power switch (M2) and output filter capacitor (Co) is connected in the negative pole of input power supply jointly, it is characterized in that:
The control logic of described circuit is: open first power switch (M1) earlier, through opening second power switch (M2) again after a bit of time δ 1, at first power switch (M1) and second power switch (M2) conducting simultaneously T1 after the time, turn-off first power switch (M1), then turn-off second power switch (M2) after 2 times again through δ, after this T2 in the time period first power switch (M1) and second power switch (M2) all turn-off, to T2 time period end, make first power switch (M1) open-minded again, so go round and begin again.
2. a kind of boosting inverter soft switch circuit according to claim 1 is characterized in that:
Also comprise second buffer capacitor (Cr) and buffering diode (D3), the anode of described buffering diode (D3) links to each other with the negative electrode of clamp diode (D2), and the negative electrode of this buffering diode (D3) links to each other with an end of the negative electrode of converter rectifier diode (D1), output filter capacitor (Co); Described second buffer capacitor (Cr) is connected across between the anode of the negative electrode of clamp diode (D2) and converter rectifier diode (D1).
3. a kind of boosting inverter soft switch circuit according to claim 1 is characterized in that:
Described first power switch (M1), second power switch (M2) are power field effect pipe (MOSFET) or isolated gate FET (IGBT) power device.
4. a kind of boosting inverter soft switch circuit according to claim 1.It is characterized in that:
Described buffer capacitor (Cs) is the parasitic capacitance of second power switch (M2) loong shunt electric capacity or second power switch (M2) self, and perhaps the parasitic capacitance by described loong shunt electric capacity and second power switch (M2) self composes in parallel.
5. a kind of boosting inverter soft switch circuit according to claim 1 is characterized in that:
Described fly-wheel diode (D) is the inverse parallel diode of second power switch (M2) or the body diode of second power switch (M2).
6. a decompression transformation soft switch circuit comprises first power switch (M1), second power switch (M2), converter rectifier diode (D1), buffer inductance (Lr), clamp diode (D2), energy storage inductor (L), output filter capacitor (Co), buffer capacitor (Cs), fly-wheel diode (D); Described first power switch (M1), the drain electrode of second power switch (M2) links to each other with positive source, one end of the source electrode of first power switch (M1) and energy storage inductor (L), one end of buffer inductance (Lr) and clamp diode (D2) negative electrode connect, the other end of the source electrode of second power switch (M2) and buffer inductance (Lr), converter rectifier diode (D1) negative electrode connects, the other end of described energy storage inductor (L) is connected with an end of output filter capacitor (Co), the other end of described output filter capacitor (Co), the anode of clamp diode (D2), and the anode of converter rectifier diode (D1) is connected in the input power cathode jointly, described buffer capacitor (Cs) is connected in parallel on the two ends of second power switch (M2), described fly-wheel diode (D) inverse parallel is characterized in that at the two ends of second power switch (M2) control logic of described circuit is:
Open first power switch (M1) earlier, through opening second power switch (M2) again after a bit of time δ 1, at first power switch (M1) and second power switch (M2) conducting simultaneously T1 after the time, turn-off first power switch (M1), then turn-off second power switch (M2) after 2 times again through δ, after this T2 in the time period first power switch (M1) and second power switch (M2) all turn-off, to T2 time period end, make first power switch (M1) open-minded again, so go round and begin again.
7. a kind of decompression transformation soft switch circuit according to claim 6 is characterized in that:
Also comprise second buffer capacitor (Cr) and buffering diode (D3), this buffering diode (D3) anode links to each other with the negative electrode of clamp diode (D2), and its negative electrode links to each other with the source electrode of first power switch (M1); Described second buffer capacitor (Cr) is connected across between the negative electrode of the anode of buffering diode (D3) and rectifier diode (D1).
8. a kind of decompression transformation soft switch circuit according to claim 6 is characterized in that:
Described first power switch (M1), second power switch (M2) are power field effect pipe (MOSFET) or isolated gate FET (IGBT) power device.
9. a kind of decompression transformation soft switch circuit according to claim 6 is characterized in that:
Described buffer capacitor (Cs) is the parasitic capacitance of second power switch (M2) loong shunt electric capacity or second power switch (M2) self, and perhaps the parasitic capacitance by described loong shunt electric capacity and second power switch (M2) self composes in parallel.
10. a kind of decompression transformation soft switch circuit according to claim 6 is characterized in that:
Described fly-wheel diode (D) is the inverse parallel diode of second power switch (M2) or the body diode of second power switch (M2).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100405409A CN100399688C (en) | 2004-08-20 | 2004-08-20 | Conversion soft switch circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100405409A CN100399688C (en) | 2004-08-20 | 2004-08-20 | Conversion soft switch circuit |
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| CN1599219A true CN1599219A (en) | 2005-03-23 |
| CN100399688C CN100399688C (en) | 2008-07-02 |
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| CNB2004100405409A Expired - Lifetime CN100399688C (en) | 2004-08-20 | 2004-08-20 | Conversion soft switch circuit |
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| CN101232239B (en) * | 2008-02-28 | 2010-06-09 | 北京创毅视讯科技有限公司 | Boosted circuit |
| CN101154888B (en) * | 2006-09-28 | 2010-12-22 | 立锜科技股份有限公司 | Switching type power supplier and its control circuit and method |
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| CN1055804C (en) * | 1998-04-27 | 2000-08-23 | 深圳市华为电气股份有限公司 | Topological circuit for soft switch |
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| CN102035375B (en) * | 2010-12-07 | 2012-12-19 | 江苏斯达工业科技有限公司 | Switching boost type direct current converter |
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| CN112368925A (en) * | 2018-07-03 | 2021-02-12 | 国立大学法人千叶大学 | Power conversion device and control method for power conversion device |
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| CN112701897A (en) * | 2020-12-21 | 2021-04-23 | 常州天曼智能科技有限公司 | High-power-factor soft-switching Vienna rectifying circuit and control method |
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Address after: No. 1, Nanshan District science and Technology Industrial Park, Shenzhen, Guangdong, Guangdong Patentee after: VERTIV TECH Co.,Ltd. Address before: No. 1, Nanshan District science and Technology Industrial Park, Shenzhen, Guangdong, Guangdong Patentee before: EMERSON NETWORK POWER Co.,Ltd. |
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Granted publication date: 20080702 |