CN101154888B - Switching type power supplier and its control circuit and method - Google Patents
Switching type power supplier and its control circuit and method Download PDFInfo
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- CN101154888B CN101154888B CN2006101415110A CN200610141511A CN101154888B CN 101154888 B CN101154888 B CN 101154888B CN 2006101415110 A CN2006101415110 A CN 2006101415110A CN 200610141511 A CN200610141511 A CN 200610141511A CN 101154888 B CN101154888 B CN 101154888B
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Abstract
The present invention presents a switching type power supplier and the control circuit and method thereof, the power supplier comprises the following components: a first transistor and a second transistor which are electrically connected with each other; an impulse width modulating integrated control circuit which is used to control the opening and closing of the first transistor and the opening of the second transistor; and a current source control circuit which is used to control to cause the second transistor become a current source. The two transistors of the invention will not go into inactive state at the same time. The impulse width modulating integrated control circuit and the current source control circuit of the invention can be directly electrically connected with the grid nodeof the second transistor, or be electrically connected with the grid node of the second transistor through a multiplex circuit. Comparing with the synchronous switched power supplier, the invention has the advantage of saving energy consumption and can greatly reduce the EMI noise.
Description
Technical field
The present invention relates to a kind of switched power supply (switching regulator) and control circuit and method, be meant especially and a kind ofly have high efficiency and can reduce Electromagnetic Interference (EMI again, Electro-Magnetic Interference) switched power supply, with and control circuit and method.
Background technology
Switched power supply commonly used comprises voltage-dropping type (Buck), booster type (Booster) and three kinds on back-pressure type (Inverter).At first be illustrated with regard to the voltage-dropping type switched power supply, its circuit structure roughly as shown in Figure 1, voltage-dropping type switched power supply 1 includes two transistor switch Q1, Q2, control the Push And Release of this two transistor Q1, Q2 by pulse width modulating control circuit 10, use the magnitude of current and direction on the control inductance L, electric energy is sent to output OUT.Pulse width modulating control circuit 10 receives the feedback voltage that extracts from output, compares with a reference voltage Vref, how to control with decision and switches two transistor Q1, Q2.
In the prior art, early stage switched power supply, be complementary fully the switching time of its two transistor Q1, Q2, be called synchronous switched power supplier again, that is as shown in Figure 2, when transistor Q1 opened, transistor Q2 closed promptly; When transistor Q2 opened, transistor Q1 promptly closed.(in this specification, " unlatching " refers to complete conducting; " close " and refer to not consider be not conducting fully under the situation of leakage current.) under this kind arrangement, the inductive current amount I of its correspondence
LWith direction shown in the 3rd waveform among the figure, when transistor Q1 open, when transistor Q2 closes, because of the voltage of the input IN voltage greater than output OUT, electric current flows in (among the figure with+the past output direction of expression) toward output OUT, and flow constantly increases; And when transistor Q2 unlatching, when transistor Q1 closes, because of the current potential of inductance left node Lx drops near 0, the voltage of output OUT is greater than the voltage of this node, so electric current trend changes, flow reduces before this, then changes toward flowing (among the figure with-expression opposite direction) in the other direction.
Fig. 3 and Fig. 4 illustrate booster type switched power supply 2 and back-pressure type switched power supply 3 respectively, its mode of operation and aforementioned similar, be by the comparative result of pulse width modulating control circuit 10 equally according to feedback voltage and reference voltage Vref, how decision switches two transistor Q1, Q2, comes the voltage of control output end OUT.Its detailed circuit mode of operation is known by present technique field person, does not repeat them here.
Please return and read Fig. 1 and Fig. 2, this kind switches the arrangement of two transistor Q1, Q2 synchronously, and its shortcoming is, when the inductive current direction when just changeing negative, the expression electric current is by output OUT, and ground connection is run off by the path of inductance L and transistor Q2, that is can lose output OUT energy.
Therefore, United States Patent (USP) the 6th in prior art, in 580, No. 258 cases, a kind of practice is proposed, its main concept as shown in Figure 5, by suitable oxide-semiconductor control transistors Q1, Q2, make and promptly to close transistor Q2 by just changeing when bearing when the inductive current direction, so promptly do not have energy and run off, can reduce unnecessary consume from output OUT.As shown in FIG., transistor Q1, Q2 have one section time T of closing simultaneously, are called sleep pattern (sleep mode).
Yet the practice of this kind prior art has its shortcoming.When transistor Q1, Q2 closed simultaneously and enter sleep pattern, the electric current of its reality on inductance L and the voltage at node Lx place were not very desirable waveform, but as shown in Figure 7, when transistor Q1, Q2 close simultaneously, the inductance L electric current I
LNear concussion a little null value, and this moment node Lx place voltage V
LxBe simple harmonic quantity concussion (the damped simple harmonic motion) waveform that is obstructed.This in virtual condition, has the dead resistance R of a series connection because of as shown in Figure 6 on the inductance L
Pa, and the parasitic capacitance C of a parallel connection is arranged on transistor Q2
PaTherefore, suppose inductance value, the dead resistance R of inductance L
PaResistance value, with parasitic capacitance C
PaCapacitance be respectively L, R
Pa, C
Pa, the voltage V at node Lx place then
LxIn fact equal:
V
Lx＝(V
OUT/LC
pa)×{1/[S
2+S(R
pa/L)+1/LC
pa]}
Wherein, V
LxBe the voltage at node Lx place, V
OUTBe the voltage of output OUT, S is for being converted to the converted variable commonly used of frequency domain from time-domain.
By the represented voltage V of following formula
Lx, be a high frequency oscillation waveform, its angular frequency
0Equal respectively with concussion quality Q (damping quality)
ω
0＝1/(LC
pa)
1/2
Q＝L
1/2/[R
pa(C
pa 1/2)]
Because the voltage V at node Lx place
LxBe the high frequency oscillation waveform, will produce the EMI noise of not desired, cause puzzlement.
In view of this, the present invention promptly at the deficiency of above-mentioned prior art, proposes a kind of switched power supply that can reduce Electromagnetic Interference, with and control circuit and method.
Summary of the invention
The present invention's first purpose is to provide a kind of switched power supply, and itself and synchronous switched power supplier are compared, and has the advantage of saving energy consumption, but compares with the prior art practice shown in Figure 7 with Fig. 5, then can significantly reduce the EMI noise.
The present invention's second purpose is to provide a kind of control circuit in order to the control switched power supply.
The present invention's the 3rd purpose is to provide a kind of control method in order to the control switched power supply.
For reaching above-mentioned purpose, in one of them embodiment of the present invention, provide a kind of switched power supply, wherein comprise: mutual the first transistor and the transistor seconds that is electrically connected; Be electrically connected on the inductance of the connected node of the first transistor and transistor seconds; A pulse width modulating control circuit is in order to the open and close of control the first transistor and the unlatching of transistor seconds; And a current source control circuit, after transistor seconds was opened, when the electric current on the inductance will be when just changeing negative, control made transistor seconds become a current source of allowing that low current passes through.
Pulse width modulating control circuit described in the foregoing description and current source control circuit can directly be electrically connected with the gate node of transistor seconds, or are electrically connected with the gate node of transistor seconds by a multiplex electronics.
In addition, according to another embodiment of the invention, a kind of control circuit of switched power supply also is provided, wherein this switched power supply comprises the first transistor and the transistor seconds of mutual electrical connection, and the inductance that is electrically connected on the connected node of the first transistor and transistor seconds, control circuit comprises: a current source control circuit, in order to control when the first transistor close and inductance on electric current be timing, making transistor seconds is unlatching; When the first transistor close and inductance on electric current will be when just changeing negative, making transistor seconds is the low current circulation status, this low current circulation status is meant that the electric current by transistor seconds is 1 micromicroampere or more than it, but below the magnitude of current of the complete conducting of transistor seconds.
Again, according to another embodiment of the invention, a kind of control method of switched power supply also is provided, comprise following steps: provide a switched power supply, this switched power supply comprises the first transistor and the transistor seconds of mutual electrical connection, and is electrically connected on the inductance of the connected node of the first transistor and transistor seconds; And when the first transistor close and inductance on electric current be timing, making transistor seconds is unlatching; When the first transistor close and inductance on electric current will be when just changeing negative, making transistor seconds is the low current circulation status, this low current circulation status is meant that the electric current by transistor seconds is 1 micromicroampere or more than it, but below the magnitude of current of the complete conducting of transistor seconds.
In the various embodiments described above, described transistor seconds can have unlatching, closes, three kinds of states of low current circulation, or has and open and low current circulation two states.Under the former situation, when the first transistor was opened, transistor seconds was a closed condition; When the first transistor was closed, transistor seconds was for opening or the low current circulation status.Under latter's situation, when the first transistor was opened, transistor seconds was the low current circulation status; When the first transistor was closed, transistor seconds was for opening or the low current circulation status.
Below will illustrate in detail, when the purpose that is easier to understand the present invention, technology contents, characteristics and the effect reached thereof by specific embodiment; Wherein, similar element indicates with identical symbol.
Description of drawings
Fig. 1 is the schematic circuit diagram of the voltage-dropping type switched power supply of prior art.
Fig. 2 is the exemplary waveforms figure of the synchronous switched power supplier of prior art.
Fig. 3 is the schematic circuit diagram of the booster type switched power supply of prior art.
Fig. 4 is the schematic circuit diagram of the back-pressure type switched power supply of prior art.
Fig. 5 is the ideal waveform schematic diagram of the 6th, 580, No. 258 cases of prior art United States Patent (USP).
Fig. 6 is the parasitic capacitance and the dead resistance schematic circuit diagram of voltage-dropping type switched power supply.
Fig. 7 is the actual waveform schematic diagram of the 6th, 580, No. 258 cases of prior art United States Patent (USP).
Fig. 8 is the actual waveform schematic diagram of the embodiment of the invention.
Fig. 9 is the schematic circuit diagram of the voltage-dropping type switched power supply of the embodiment of the invention.
Figure 10 is the schematic circuit diagram of the booster type switched power supply of the embodiment of the invention.
Figure 11 is the schematic circuit diagram of the back-pressure type switched power supply of the embodiment of the invention.
Figure 12 is a schematic circuit diagram, in order to illustrate an embodiment of current source control circuit 20.
Figure 13 is a schematic circuit diagram, in order to illustrate another embodiment of current source control circuit 20.
Figure 14 is the schematic circuit diagram of the voltage-dropping type switched power supply of another embodiment of the present invention, illustrates that multiplex electronics 30 can only be a node.
Figure 15 is a schematic circuit diagram, in order to illustrate an embodiment of multiplex electronics 30.
Symbol description among the figure:
1 voltage-dropping type switched power supply
2 booster type switched power supplies
3 back-pressure type switched power supplies
10 pulse width modulating control circuits 10
11 voltage-dropping type switched power supplies
12 booster type switched power supplies
13 back-pressure type switched power supplies
20 current source control circuits 20
22 paths
24 current sources
30 multiplex electronics
C
PaParasitic capacitance (parasitic capacitance value)
The CS controlling signal
I
LElectric current by inductance
The IN input
L inductance (inductance value)
The OUT output
Q1, Q2, Q3, Q4 transistor
R
PaDead resistance (parasitic resistance values)
The T period
V
LxThe voltage at node Lx place
The Vref reference voltage
Embodiment
Main concept of the present invention is not make transistor Q1, Q2 to close simultaneously; Electric current I on inductance L
LBe about to when just changeing negative, and not exclusively close transistor Q2, but change its state, make its role, convert a current source to, and allow that the electric current of low discharge passes through by transistor switch.So, compare with the prior art practice shown in Figure 2, the present invention still has the high efficiency advantage of saving energy consumption, but compares with the prior art practice shown in Figure 7 with Fig. 5, and then the present invention can significantly reduce the EMI noise.
Please refer to Fig. 9, wherein the mode with schematic circuit diagram shows one of them embodiment of the present invention.Present embodiment is to be example with the voltage-dropping type switched power supply, as shown in the figure, in voltage-dropping type switched power supply 11 of the present invention, except bridge transistor switch Q1 up and down, Q2, inductance L, outside the pulse width modulating control circuit 10, other includes a current source control circuit 20, and pulse width modulating control circuit 10 sends a multiplex electronics (MUX) 30 to the output signal of current source control circuit 20, decide the slave mode of transistor Q2 by the output of this multiplex electronics 30, that is transistor Q2 optionally is controlled by pulse width modulating control circuit 10 or current source control circuit 20.When transistor Q2 was controlled by pulse width modulating control circuit 10, its role was a switch, and when transistor Q2 was controlled by current source control circuit 20, its role transforming was a current source.(the present invention is referred to as " current source control circuit ", refers to that this circuit oxide-semiconductor control transistors Q2 makes it become a current source, but not refers to that this circuit is controlled by current source.)
Above content please refer to Fig. 8, and contrast Fig. 5, when being easier to understand.In the prior art, the role of transistor Q2 only is a switch, and therefore standard-sized sheet and full cut-off two states are only arranged.When in order to save energy consumption, when making transistor Q1, Q2 enter aforementioned " sleep pattern ", transistor Q1, Q2 close simultaneously.But according to the present invention, then also it doesn't matter " sleep pattern "; In the 8th figure, the electric current I on inductance L
LBe about to when just changeing negative, and not exclusively close transistor Q2, but among period T, transistor Q2 is converted into a current source, allow that the electric current of low discharge passes through.To this, as shown in the figure, two kinds of practices can be arranged, first kind of practice is to make transistor Q2 when transistor Q1 conducting, still close fully, and only among period T, convert transistor Q2 to low current condition, as shown in first kind of waveform, transistor Q2 comprises standard-sized sheet, full cut-off, three kinds of states of low current; Or, make transistor Q2 except conducting, all be in low current condition, as shown in second kind of waveform, so then transistor Q2 only comprises standard-sized sheet, low current two states.Better, the latter's circuit complexity is lower, and quality is respectively arranged, and belongs to category of the present invention on energy-saving effect for the former.
Be familiar with present technique person when finding immediately that more than transistor Q1, the Q2 in the explanation is to be example with NMOS.Certainly, transistor Q1, Q2 also can change with PMOS individually and make, and the oscillogram of its correspondence is from also different, but do not break away from notion of the present invention.
Please contrast Fig. 8 and Fig. 7 again, under above-mentioned arrangement of the present invention, when transistor Q1 closes and transistor Q2 in low current condition the time, that is in the drawings among the period T, the voltage V at node Lx place
LxThough be the simple harmonic quantity concussion waveform that is obstructed equally, its concussion decay fast arrives plateau rapidly.Because the high frequency oscillation time is comparatively of short duration, so the puzzlement that caused of its EMI noise, much lower far beyond prior art.
Please return again and read Fig. 6, if make the transistor AND gate parasitic capacitance C of circuit below
Pa, its parallel resistance is R
Cs, then when transistor Q2 has low current to pass through, parallel resistance R
CsResistance can descend.At this moment, the voltage V at node Lx place
LxIn fact equal:
Wherein, V
LxBe the voltage at node Lx place, V
OUTBe the voltage of output OUT, S is for being converted to the converted variable commonly used of frequency domain from time-domain, and L is the inductance value of inductance L, C
PaBe parasitic capacitance C
PaCapacitance, R
PaBe dead resistance R
PaResistance value, R
CsBe parallel resistance R
CsResistance value.
By the represented voltage V of following formula
Lx, its concussion quality Q equals
As can be seen from the above equation, work as R
CsValue when descending, Q value also descends thereupon, represents to shake more rapid convergence.Therefore, if keep make transistor Q2 have low current by but not close fully, will make the circuit high frequency oscillation time comparatively of short duration, can reduce the EMI noise that circuit produces.
Described low current according to the present invention, is meant to be 1 μ A (micromicroampere) or more than it, but below the magnitude of current (not containing) of the complete conducting of transistor Q2, the magnitude of current in this scope.It should be noted that in addition though in the period T in Fig. 8, the grid-control voltage of transistor Q2 is to illustrate to be definite value, the present invention is not limited thereto; In period T, the grid-control voltage of transistor Q2 can be for changing waveform arbitrarily, only need its corresponding magnitude of current that produces, meet above-mentioned condition and get final product.
The notion of the invention described above, when being applied to booster type switched power supply 12 with back-pressure type switched power supply 13, its illustrative circuitry is familiar with present technique person and is learnt its operation behavior when analogizing respectively as the 10th figure and the 11st figure, seldom gives at this and giving unnecessary details.
Next the how magnitude of current on the oxide-semiconductor control transistors Q2 of current source control circuit 20 is described.Please refer to Figure 12, this is one of them embodiment of current source control circuit 20, as shown in the figure, current mirror of current source control circuit 20 and the common formation of transistor Q2, electric current with on current source control circuit 20 inner tracks 22 copies on the path by transistor Q2 source-drain electrode pro rata.As for the size of current on current source control circuit 20 inner tracks 22, can control decision by current source 24.
Certainly, the execution mode of current source control circuit 20 is not only a kind of, and for example, the 13rd figure is another embodiment of current source control circuit 20, the electric current on the inner track 22 can be copied on the path by transistor Q2 source-drain electrode pro rata equally; Be familiar with present technique person when drawing inferences about other cases from one instance, think and other kind enforcement kenel.
In Figure 12 and Figure 13, between the grid of current source control circuit 20 and transistor Q2, omit and illustrated multiplex electronics 30.This because of multiplex electronics 30 even and need not be a grid circuit, and can only be a node, as long as can make transistor Q2 optionally be controlled by pulse width modulating control circuit 10 or current source control circuit 20, get final product.
See also Figure 14, multiplex electronics 30 only is a node in this embodiment; At this moment, pulse width modulating control circuit 10 must have the ability to draw high the voltage (or when transistor Q2 is PMOS, having the ability to drag down the voltage of node 30) of node 30.When transistor Q2 was NMOS, the waveform that this circuit produced was corresponding to second kind of Q2 waveform among Fig. 8.In detail, in the ordinary course of things, transistor Q2 is subjected to current source control circuit 20 controls, and making has the low current circulation on it, that is the normality of transistor Q2 (normally) is a low current condition; Pulse width modulating control circuit 10 this moment Control Node 30 not, for pulse width modulating control circuit 10, node 30 is in quick condition.And when pulse width modulating control circuit 10 decision oxide-semiconductor control transistors Q2 make its complete conducting, the output signal of 10 pairs of nodes 30 of pulse width modulating control circuit covered the control of (override) current source control circuit 20, and the voltage of node 30 is drawn high (or dragging down) to being enough to make the complete conducting of transistor Q2.
Certainly, multiplex electronics 30 also can be complicated circuit, to reach complicated controlled function, for example reaches first kind of Q2 waveform among Fig. 8.This moment, multiplex electronics 30 for example can comprise two transistor switch Q3, Q4 as shown in figure 15, and was controlled by controlling signal CS.When controlling signal CS was high levels, the grid of transistor Q2 was controlled by current source control circuit 20, and when controlling signal CS was low level, the grid of transistor Q2 was controlled by pulse width modulating control circuit 10; And under latter instance, pulse width modulating control circuit 10 can be exported the accurate signal in high or low position, and the switching that comes oxide-semiconductor control transistors Q2 so can be reached first kind of Q2 waveform among Fig. 8.
Certainly, foregoing circuit is only for illustrating, wherein two transistor switch Q3, Q4, may not necessarily as shown be NMOS and PMOS, and can be other arrangement, its corresponding controlling signal design, from also different, this is known by being familiar with present technique person, does not repeat them here.
Below at preferred embodiment the present invention is described, the above only is familiar with present technique person and is easy to understand content of the present invention for making, and is not the interest field that is used for limiting the present invention.For being familiar with present technique person, when can in spirit of the present invention, thinking immediately and various equivalence variation; For example, shown among each embodiment, for example in the dividing potential drop mode,, compare for pulse width modulating control circuit 10 and reference voltage Vref, but the mode of extraction feedback signal is not limited thereto from output extraction feedback voltage signal.And for example, on current source control circuit 20 inner tracks 22, produce the method for electric current, be not limited to provide current source 24.So all a notion and spirit impartial for it a variation or modification according to the present invention all should be included in the present invention's the claim.
Claims (29)
1. switched power supply comprises:
Mutual the first transistor and the transistor seconds that is electrically connected;
Be electrically connected on the inductance of the connected node of the first transistor and transistor seconds;
A pulse width modulating control circuit is in order to the open and close of control the first transistor and the unlatching of transistor seconds; And
A current source control circuit, after transistor seconds is opened, when the electric current on the inductance will be when just changeing negative, it is the low current circulation status that control makes transistor seconds, this low current circulation status is meant that the electric current by the transistor seconds source-drain electrode is 1 micromicroampere or more than it, but below the magnitude of current of the complete conducting of transistor seconds.
2. switched power supply as claimed in claim 1, wherein transistor seconds have unlatching, close, three kinds of states of low current circulation, when the first transistor was opened, transistor seconds was for closing; When the first transistor close and inductance on electric current will be when just changeing negative, transistor seconds is the low current circulation status.
3. switched power supply as claimed in claim 1, wherein transistor seconds has unlatching and low current circulation two states, and when the first transistor was opened, transistor seconds was the low current circulation status; When the first transistor close and inductance on electric current be timing, transistor seconds is for opening; When the first transistor close and inductance on electric current will be when just changeing negative, transistor seconds is the low current circulation status.
4. switched power supply as claimed in claim 1, wherein this pulse width modulating control circuit and this current source control circuit are connected to the gate node of transistor seconds jointly.
5. switched power supply as claimed in claim 4, wherein this pulse width modulating control circuit is controlled the voltage of this gate node, and transistor seconds is opened.
6. switched power supply as claimed in claim 5, wherein except that transistor seconds the opening time, transistor seconds is subjected to this current source control circuit control and is the low current circulation status.
7. switched power supply as claimed in claim 1, wherein the output of one of this pulse width modulating control circuit output and this current source control circuit is electrically connected to a multiplex electronics, and the output of this multiplex electronics is electrically connected with the grid of transistor seconds.
8. switched power supply as claimed in claim 1, wherein current mirror of the common formation of this current source control circuit and transistor seconds.
9. switched power supply as claimed in claim 1 when wherein transistor seconds becomes a current source, is the current source of low current circulation status.
10. switched power supply as claimed in claim 1, wherein this switched power supply is voltage-dropping type, booster type, back-pressure type thrin.
11. the control circuit of a switched power supply, this switched power supply comprise the first transistor and the transistor seconds of mutual electrical connection, and the inductance that is electrically connected on the connected node of the first transistor and transistor seconds, control circuit comprises:
A current source control circuit, in order to control when the first transistor close and inductance on electric current be timing, making transistor seconds is unlatching; When the first transistor close and inductance on electric current will be when just changeing negative, making transistor seconds is the low current circulation status, this low current circulation status is meant that the electric current by transistor seconds is 1 micromicroampere or more than it, but below the magnitude of current of the complete conducting of transistor seconds.
12. the control circuit of switched power supply as claimed in claim 11, wherein this switched power supply comprises input, output, reaches earth terminal, the three is connected with an intermediate node, and wherein, the first transistor is between this input and this intermediate node, and transistor seconds is between this intermediate node and this earth terminal.
13. the control circuit of switched power supply as claimed in claim 11, wherein this switched power supply comprises input, output, reaches earth terminal, the three is connected with an intermediate node, and wherein, the first transistor is between this intermediate node and this output, and transistor seconds is between this intermediate node and this earth terminal.
14. the control circuit of switched power supply as claimed in claim 11, wherein this switched power supply comprises input, output, reaches earth terminal, the three is connected with an intermediate node, and wherein, the first transistor is between this input and this intermediate node, and transistor seconds is between this intermediate node and this output.
15. the control circuit of switched power supply as claimed in claim 11, wherein when the first transistor was opened, transistor seconds was for closing.
16. the control circuit of switched power supply as claimed in claim 11, wherein when the first transistor was opened, transistor seconds was the low current circulation status.
17. the control circuit of switched power supply as claimed in claim 11, wherein current mirror of the common formation of this current source control circuit and transistor seconds.
18. the control circuit of switched power supply as claimed in claim 11, wherein this current source control circuit is electrically connected with the grid of transistor seconds.
19. the control circuit of switched power supply as claimed in claim 11, wherein this current source control circuit is electrically connected by a multiplex electronics with the grid of transistor seconds.
20. the control method of a switched power supply comprises following steps:
A switched power supply is provided, and this switched power supply comprises the first transistor and the transistor seconds of mutual electrical connection, and is electrically connected on the inductance of the connected node of the first transistor and transistor seconds; And
When the first transistor close and inductance on electric current be timing, making transistor seconds is unlatching; When the first transistor close and inductance on electric current will be when just changeing negative, making transistor seconds is the low current circulation status, this low current circulation status is meant that the electric current by transistor seconds is 1 micromicroampere or more than it, but below the magnitude of current of the complete conducting of transistor seconds.
21. the control method of switched power supply as claimed in claim 20, wherein this switched power supply comprises input, output, reaches earth terminal, the three is connected with an intermediate node, and wherein, the first transistor is between this input and this intermediate node, and transistor seconds is between this intermediate node and this earth terminal.
22. the control method of switched power supply as claimed in claim 20, wherein this switched power supply comprises input, output, reaches earth terminal, the three is connected with an intermediate node, and wherein, the first transistor is between this intermediate node and this output, and transistor seconds is between this intermediate node and this earth terminal.
23. the control method of switched power supply as claimed in claim 20, wherein this switched power supply comprises input, output, reaches earth terminal, the three is connected with an intermediate node, and wherein, the first transistor is between this input and this intermediate node, and transistor seconds is between this intermediate node and this output.
24. the control method of switched power supply as claimed in claim 20 still comprises following steps: after transistor seconds is low current circulation status a period of time, transistor seconds is closed.
25. the control method of switched power supply as claimed in claim 24, wherein when the first transistor was opened, transistor seconds was for closing.
26. the control method of switched power supply as claimed in claim 20, wherein only conversion between unlatching and low current circulation two states of this transistor seconds.
27. the control method of switched power supply as claimed in claim 26, wherein when the first transistor was opened, transistor seconds was the low current circulation status.
28. the control method of switched power supply as claimed in claim 20 still comprises following steps:
When the electric current on the inductance will provide a controlling signal by just changeing when bearing, transistor seconds is switched to the low current circulation status.
29. the control method of switched power supply as claimed in claim 20, wherein this switched power supply still includes a pulse width modulating control circuit, and method still comprises following steps:
Making the transistor seconds normality is the low current circulation status;
Output according to this pulse width modulating control circuit is opened transistor seconds.
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| CN101860199B (en) * | 2009-04-09 | 2013-03-27 | 登丰微电子股份有限公司 | Current trigger circuit and switch type power converter applying same |
| CN101873062B (en) * | 2009-04-21 | 2013-05-01 | 台达电子工业股份有限公司 | Power supply and power supply system with a plurality of power supplies |
| TWI458245B (en) * | 2013-01-07 | 2014-10-21 | Richtek Technology Corp | Switching power conversion device and its switching controller and driving method |
| CN106712513B (en) * | 2017-01-11 | 2023-10-13 | 北京集创北方科技股份有限公司 | Peak current detection circuit and power conversion device |
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| US6580258B2 (en) * | 1993-03-23 | 2003-06-17 | Linear Technology Corporation | Control circuit and method for maintaining high efficiency over broad current ranges in a switching regulator circuit |
| US5982161A (en) * | 1998-10-14 | 1999-11-09 | Intel Corporation | Voltage regulator having variable frequency-based control |
| CN1278120A (en) * | 2000-05-17 | 2000-12-27 | 深圳市华为电气技术有限公司 | Soft switch topology circuit for step-up/step-down voltage conversion |
| CN1599219A (en) * | 2004-08-20 | 2005-03-23 | 艾默生网络能源有限公司 | Conversion soft switch circuit |
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| Publication number | Publication date |
|---|---|
| CN101154888A (en) | 2008-04-02 |
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