CN1355648A - Control method for test module of CCD - Google Patents
Control method for test module of CCD Download PDFInfo
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- CN1355648A CN1355648A CN00134272A CN00134272A CN1355648A CN 1355648 A CN1355648 A CN 1355648A CN 00134272 A CN00134272 A CN 00134272A CN 00134272 A CN00134272 A CN 00134272A CN 1355648 A CN1355648 A CN 1355648A
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Abstract
A control method for detecting module of charge coupled device (CCD) divides the photodetector within CCD detecting module into the first photodector group and the second photodector group and it works as follows: making exposure to the abovesaid two groups, shifting and outputting the first signal charge and the second signal charge the CCD shift register to a charge receiving unit in sequence, picking the image signal corresponding to the first signal charge and making exposure to the abovesaid two groups once more, and finally shifting and outputting the first and the second signal charges the CCD shift register to the charge receiving unit in sequence and picking the image signal corresponding to the second signal charge.
Description
The present invention relates to a kind of control method of test module of CCD, the control method of the test module of CCD of particularly a kind of use in scanner.
In image scanner, charge coupled cell (CCD) detection module is in order to capturing the pairing light signal of image to be scanned, and converts it to the analog signal processing circuit that sends subordinate behind the signal of video signal to and do further signal of video signal and handle.For the purpose of the image scan that reaches high-res, the high-res image detector of staggered (staggered) detection architecture of a kind of use has disclosed in United States Patent (USP) case numbers the 4th, 438,457.And the CCD detection module that uses this staggered detection architecture widely industry use.
With reference to Fig. 1, it illustrates is the schematic diagram that tradition is used the alternating expression CCD detection module 100 of staggered detection architecture.Fig. 1 is that the resolution with each row is 600dpi (dot per inch), and length is that 9 inches CCD detection module 100 is done explanation for example.The CCD detection module 100 of Fig. 1 is for example to be that resolution is the image scan of 1200dpi in order to carry out high-res scanning.CCD detection module 100 is to include an odd number photodetector group 102 and an even number photodetector group 104.Photodetector D1, D3...D10799 in the odd number photodetector group 102 be with even number photodetector group 104 in photodetector D2, D4....D10800 be staggered.Each photodetector D1-D10800 is the signal of video signal that corresponds to a pixel (pixel).When CCD detection module 100 is exposed, after odd number photodetector group 102 and 104 while of the even number photodetector group sensed light signal, photodetector D1, D3...D10799 and photodetector D2, D4....D10800 produce corresponding signal charge S1, S3....S10799 and S2, S4...S10800 respectively.Signal charge S1, S3....S10799 and S2, S4...S10800 then are that parallel model ground is sent in the CCD shift register cell 105 simultaneously via logic with shift grid (shift gate) (not being shown among the figure).After all signal charge S1-S10800 all are sent in the CCD shift register cell 105, the exposure actions that can carry out next time CCD detection module 100.
Wherein, CCD shift register cell 105 comprises CCD shift register 106 and 108.Signal charge S1, S3...S10799 and S2, S4...S10800 are sent to respectively in CCD shift register 106 and 108.And signal charge S1-S10800 is referred to as signal charge S.
Then, by the control of clock signal C K, CCD shift register 106 and 108 is string type ground with signal charge S1, the S3....S10799 that is stored and S2, input to an electric charge receiving element 109 the S4...S10800 alternative expression.This electric charge receiving element 109 comprises a control circuit 110 and a charge receiver, and this charge receiver for example is an output capacitance C.Signal charge S1, S3....S10799 and S2, S4...S10800 export among the output capacitance C via control circuit 110.Just, output capacitance C will receive signal charge S1, S2, S3, S4....S10799 and S10800 in regular turn.CCD detection module 100 then with the cross-pressure of output capacitance C as output signal OS, comprised the signal of video signal of each pixel among the output signal OS, this signal of video signal is that the analog signal processing circuit 112 that inputs to subordinate is handled to carry out further signal of video signal.
With reference to Fig. 2, it illustrates is that tradition is in order to the clock signal of the CCD detection module 100 of control chart 1 and the oscillogram of reset signal.Clock signal C K is the action in order to control CCD shift register 106 and 108.When clock pulse of the every input of clock signal CK (clock pulse), CCD shift register 106 and 108 alternative expression ground signal charge S of displacement output are to output capacitance C.For instance, at time point t
1The time, clock pulse 202 is to input in CCD shift register 106 and 108, at this moment, CCD shift register 106 is to export to signal charge S1 among the output capacitance C and obtain the corresponding image signal.Then, before next clock pulse 204 inputs to CCD shift register 106 and 108, the replacement pulse 208 of reset signal RS is to input in the control circuit of CCD detection module 100 110, output capacitance C is reset, that is be that all electric charges among the output capacitance C are eliminated, prepare to hold next signal electric charge S.
Then, time point t
2The time, clock pulse 204 inputs to CCD shift register 106 and 108, and at this moment, CCD shift register 108 is to export among the output capacitance C signal charge S2 to answer when obtaining signal charge S2 institute signal of video signal.Then, replacement pulse 210 then inputs in the CCD detection module 100 so that output capacitance C is reset.Afterwards, at time point t
3The time, clock pulse 206 inputs to CCD shift register 106 and 108, and at this moment, CCD shift register 106 is that signal charge S3 is exported among the output capacitance C to obtain the pairing signal of video signal of signal charge S3.So, repeat above-mentioned action, signal charge S4, S5...S10800 are exported among the output capacitance C in order, to obtain its pairing signal of video signal.After the signal charge S in all CCD shift registers 106 and 108 all exports output capacitance C to, the signal charge S that CCD shift register 106 and 108 is produced after can then receiving and CCD detection module 100 being exposed next time.
Generally speaking, in clock signal C K, the minimum 1 μ s (10 that is required to be in the interval between per two clock pulse
-6Sec), could make output signal OS that the enough stable state time is arranged, allow analog signal processing circuit 112 successfully be captured the signal of video signal that is comprised among the output signal OS.And for 5400 photodetector D of every row, the CCD detection module 100 of 10800 photodetector D altogether then must be through 10800
*The time of 1 μ s=10.8ms, signal charge S1, the S2....S10800 output that odd number photodetector group 102 and even number photodetector group 104 can be produced finishes, to obtain desired signal of video signal.In order to allow the analog signal processing circuit of subordinate that enough processing times are arranged, to avoid it to produce the situation of misoperation, traditional design is that the optimum exposure time with CCD detection module 100 is set at 16ms, and CCD shift register 106 and 108 also can have the time of 16ms to carry out the action that signal charge S displacement is exported to output capacitance C.
Yet, when the optimum exposure time of CCD detection module 100 is set at 16ms, then must select darker or more suitable fluorescent tube for use, can allow CCD detection module 100 after exposure 16ms, reach optimum exposure, or obtain maximum signal/noise ratio, so that the influence of noise reduces to minimum.Yet this kind design is most probably because the brightness of selected fluorescent tube is excessive, and the generation overexposure makes photodetector D that the saturated situation of electric charge be arranged.So, therefore the quality of the picture of scanning gained will reduce.
In addition, when the CCD detection module 100 that uses Fig. 1 scanned the scanning of low-res, when for example being 600dpi scanning, its operating principle was as follows.At first, CCD detection module 100 is carried out exposure actions, so that photodetector D1～D10800 produces signal charge S1～S10800.Then, signal charge S1～S10800 is sent to CCD shift register 106 and 108 respectively.Then, CCD shift register 106 and 108 is in regular turn signal charge S1～S10800 displacement to be exported among the output capacitance C, and only captures signal charge S1, the S3....S10799 that odd number photodetector group 102 is produced.Wherein, in order only to capture signal charge S1, the S3....S10799 of odd number photodetector group 102, the waveform of clock signal C K and reset signal RS can be as shown in Figure 3.
In Fig. 3, at time point t
4Before, replacement pulse 302 inputs to CCD detection module 100 so that output capacitance C is reset.Then, at time point t
4In, input clock pulse 304 so that signal charge S1 displacement input among the output capacitance C.Then, at time point t
5In, input clock pulse 306 so that signal charge S2 displacement input among the output capacitance C.At this moment, signal charge S1 and S2 have been comprised among the output capacitance C.In like manner, at time point t
6 Import replacement pulse 308 so that output capacitance C is reset before, eliminated after signal charge S1 and the S2, treat again signal charge S3 displacement to be inputed among the output capacitance C after clock pulse 310 inputs.And at time point t
7Afterwards, signal charge S3 and S4 all store and input among the output capacitance C.So carry out in regular turn up to all signal charge S all from CCD shift register 106 and 108, be shifted exported output capacitance C to till.And analog signal processing circuit 112 can only capture the pairing signal of video signal of signal charge S1, S3...S10799, and can reach resolution is the purpose of the low-res scanning of 600dpi.
As seen from Figure 3, use the CCD detection module 100 of Fig. 1 to carry out low-res, when for example being the image scan of 600dpi, its needed time is and carries out high-res, and the required time equates when for example being the image scan of 1200dpi.Can obtain optimum exposure because set exposure during 16ms, so, in the time for exposure of also needing when resolution is the scanning of 600dpi carrying out 16ms.And CCD shift register 106 and 108 be because must all be shifted all signal charge S1, S3....S10799 and S2, S4...S10800 and export among the output capacitance C, and its required time is identical when also scanning with high-res.
So when low-res scanned, the required time of traditional practice was identical when scanning with high-res.Though carry out resolution when being the scanning of 600dpi, only choose signal charge S1, S3...S10799 or the pairing signal of video signal of signal charge S2, S4...S10800, but the time of its needed displacement output is to be that the scanning of 12000dpi is identical with carrying out resolution.Therefore, though be to carry out low-res scanning, still need to take the time that equates with high-res scanning just can finish scanning.
In view of this, purpose of the present invention is exactly in that a kind of control method of test module of CCD is provided, and when high-res scans, can avoid the saturated situation of electric charge in the CCD detection module.And when low-res scans, can reach quick scanning, the purpose of saving sweep time.
According to purpose of the present invention, the control method of a kind of charge coupled cell (CCD) detection module is proposed.The CCD detection module include a plurality of photodetectors, a CCD shift register cell, with an electric charge receiving element.These a little photodetectors are to be divided into two groups, comprise one first photodetector group and one second photodetector group.These a little photodetectors are in order to convert detected light signal to signal charge, afterwards, to export above-mentioned CCD shift register cell again to parallel model.Control method of the present invention comprises: at first, the first photodetector group and the second photodetector group are exposed, and first signal charge and the secondary signal electric charge of the first photodetector group and second photodetector group exposure back gained will store into respectively in this above-mentioned CCD shift register cell.Then, first signal charge in the above-mentioned CCD shift register cell and secondary signal electric charge be shifted in regular turn to be exported in the above-mentioned electric charge receiving element, and captures the pairing signal of video signal of first signal charge.Then, the first photodetector group and the second photodetector group are exposed, and first signal charge and the secondary signal electric charge of the first photodetector group and second photodetector group exposure back gained will store into respectively in the above-mentioned CCD shift register cell.At last, first signal charge in the above-mentioned CCD shift register and secondary signal electric charge be shifted in regular turn to be exported in the above-mentioned electric charge receiving element, and the pairing signal of video signal of acquisition secondary signal electric charge.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and in conjunction with the accompanying drawings, elaborate.
Fig. 1 illustrates the schematic diagram that uses the alternating expression CCD detection module of staggered detection architecture into tradition.
Fig. 2 illustrate into tradition in order to the clock signal of the CCD detection module of control chart 1 and the oscillogram of reset signal.
Fig. 3 illustrates to when low-res scans, and tradition is in order to the clock signal of the CCD detection module of control chart 1 and the oscillogram of reset signal.
Fig. 4 illustrates according to the clock signal of a kind of CCD detection module in order to control chart 1 of a preferred embodiment of the present invention and the oscillogram of reset signal.
Fig. 5 A illustrates the schematic diagram for the CCD detection module of the staggered detection architecture of using two output capacitances.
Fig. 5 B illustrates the oscillogram into employed clock signal and reset signal after the exposure for the first time among Fig. 5 A.
Fig. 5 C illustrate is the oscillogram of expose for the second time among Fig. 5 A employed clock signal in back and reset signal.
Fig. 6 illustrates the schematic diagram into the CCD detection module of single-column type.
In the control method of charge coupled cell of the present invention (CCD) detector, the CCD detection module be include a plurality of photodetectors, at least one CCD shift register, with at least one output capacitance.These a little photodetectors are divided into two groups, comprise an odd number photodetector group and an even number photodetector group, and these photodetectors are in order to convert detected light signal to signal charge, afterwards, to export the CCD shift register again to parallel model.Control method of the present invention comprises: at first, enter step (a), odd number photodetector group and even number photodetector group are exposed, and the odd number signal charge and the even signal electric charge of odd number photodetector group and even number photodetector group exposure back gained will store into respectively in the aforesaid CCD shift register.
Then, enter step (b), the odd number signal charge in the CCD shift register and even signal electric charge are shifted in regular turn to be exported in the output capacitance, and the pairing signal of video signal of acquisition odd number signal charge.Then, enter step (c), again odd number photodetector group and even number photodetector group are exposed, and the odd number signal charge and the even signal electric charge of odd number photodetector group and even number photodetector group exposure back gained will store into respectively in the aforesaid CCD shift register.At last, enter step (d), the odd number signal charge in the CCD shift register and even signal electric charge are shifted in regular turn to be exported in the output capacitance, and the pairing signal of video signal of acquisition even signal electric charge.
Now the CCD detection module 100 that is applied to Fig. 1 with the control method of CCD detector of the present invention is that example is done explanation.At first, enter step (a), CCD detection module 100 is exposed.Because even number photodetector group 104 be with respect to odd number photodetector group 102 to the width of half photodetector D of side translation apart from alternating expression be disposed on the CCD detection module 100, so, when CCD detection module 100 exposed, odd number photodetector group 102 was to be exposed simultaneously with even number photodetector group 104.And odd number signal charge S1, S3...S10799 and even signal electric charge S2, the S4...S10800 of odd number photodetector group 102 and even number photodetector group 104 exposure back gained will store into respectively in CCD shift register 106 and 108.
Then, enter step (b), odd number signal charge S1, S3...S10799 in the CCD shift register 106 and even signal electric charge S2, S4...S10800 in the CCD shift register 108 be shifted in regular turn to be exported among the output capacitance C, and acquisition odd number signal charge S1, the pairing signal of video signal of S3...S10799.
Wherein, can be by suitably control clock signal CK and reset signal RS reach the purpose that only captures odd number signal charge S1, the pairing signal of video signal of S3...S10799.With reference to Fig. 4, it illustrates according to the clock signal of a kind of CCD detection module 100 in order to control chart 1 of a preferred embodiment of the present invention and the oscillogram of reset signal.At time point t
1In ' time, the replacement pulse 402 of reset signal RS is to input in the CCD detection module 100, with the output capacitance C action of resetting.Afterwards, at time point t
2In ' time, the clock pulse 404 of clock signal C K is to input in the CCD detection module 100, and at this moment, signal charge S1 exports among the output capacitance C after the translation in CCD shift register 106.
Then, at time point t
3In ' time, the replacement pulse 406 of reset signal RS is to input in the CCD detection module 100, and with the output capacitance C action of resetting.Then, at time point t
4In ' time, the clock pulse 408 of clock signal C K is to input in the CCD detection module 100, and at this moment, signal charge S2 exports among the output capacitance C after the translation in CCD shift register 108.Wherein, the cycle of clock pulse 408 be than cycle of clock pulse 404 for short, the cycle of clock pulse 408 be about clock pulse 404 cycle 1/5.
Afterwards, at time point t
5In ' time, the replacement pulse 410 of reset signal RS is to input in the CCD detection module 100, and with the output capacitance C action of resetting.At this moment, script is stored in the signal charge S2 of output capacitance C then because of output capacitance C resets, and has not existed in output capacitance C.Until time point t
6In ' time, clock pulse 412 inputs to respectively after CCD shift register 106 and 108, and signal charge S3 inputs to again among the output capacitance C just now.
Wherein, (the time point t of the time interval between the clock pulse 408 and 412
4'～t
6') be the time interval (the time point t that only is about between clock pulse 404 and 408
2'～t
4') 1/5.Its former because, at time point t
2'～t
4' between, after signal voltage S1 inputs to output capacitance C, must be through time of about 1 μ s, it is enough long to make the magnitude of voltage of output capacitance C keep time of stable state, and analog signal processing circuit 112 can successfully capture desired signal of video signal from output signal OS.And at time point t
4'～t
6' between, after signal charge S2 inputs to output capacitance C, then just output capacitance C being reset, signal charge S2 also eliminates thereupon.In the present invention, do not need to obtain the signal of video signal that corresponds to signal charge S2, so, need not make the magnitude of voltage of output capacitance C have enough stable state for a long time.Therefore, time point t
4'～t
6' the time interval only be required to be time point t
2'～t
4' the time interval 1/5 can meet the institute ask.
So, repeat above-mentioned steps, till odd number signal charge S1, the pairing signal of video signal of S3...S10799 are finished by the acquisition of success.
In step (b) afterwards, then enter step (c), again odd number photodetector group and even number photodetector group are exposed.This step is identical with step (a), does not repeat them here.
At last, enter step (d), odd number signal charge S1, S3...S10799 in the CCD shift register 106 and even signal electric charge S2, S4...S10800 in the CCD shift register 108 be shifted in regular turn to be exported among the output capacitance C, and acquisition even signal electric charge S2, the pairing signal of video signal of S4...S10800.Step (d) is similar to step (b), its difference is, when the input first clock pulse make even signal electric charge S2, when S4...S10800 inputs to output capacitance C, after 1 μ s, continue second clock pulse of input just now, and then CCD detection module 100 is imported a replacement pulse to eliminate odd number signal charge S1, the S3...S10799 on the output capacitance C.So, analog signal processing circuit 112 will only capture even signal electric charge S2, the pairing signal of video signal of S4...S10800.
In brief, in step (a) and (b), can capture odd number signal charge S1, the pairing signal of video signal of S3...S10799, and even signal electric charge S2, S4...S10800 are disposed.And in step (c) and (d), can capture even signal electric charge S2, the pairing signal of video signal of S4...S10800, and odd number signal charge S1, S3...S10799 are disposed.So, whole CCD detection module 100 signal of video signal can be by double exposing to CCD detection module 100, obtains with the action of twice pick-up image data.
The advantage of control method of the present invention is, because it is that 1/5 of the pairing signal of video signal of acquisition signal charge S is only arranged that signal charge S is disposed the required time, so, whenever to show the CCD detection module 100 of 5400 photodetector D, then must be through at least 5400
*1.2 the time of μ s=6.7ms, finish above-mentioned step (b).So, the required time for exposure in the step (a), can select to get final product greater than the value of 6.7ms, for example be that selected 8ms is used as optimum exposure time.
Because when using control method of the present invention, selected optimum exposure time is only to be 1/2 of conventional practice, so can avoid in the conventional practice overexposure and the saturated situation of electric charge of when being the scanning of 1200dpi (for example be resolution) when high-res scans effectively.Must use darker fluorescent tube to avoid the generation of overexposure in the conventional practice, and use after the control method of the present invention, as long as select for use the fluorescent tube of general brightness can reach splendid effect.
In addition, when carrying out low-res when scanning, for example be resolution when being the scanning of 600dpi, can only use step (a) and step (b) in the control method of the present invention can reach the purpose of low-res scanning.With selected 8ms is the condition of optimum exposure time, because only need expose once, can obtain desired signal of video signal so only need spend the time of 8ms when carrying out low-res scanning.The 16ms required with conventional method compares, and uses control method of the present invention can reach quick scanning and the purpose of saving sweep time when low-res scans.
Furthermore, control method of the present invention not only can be applied to the CCD detection module 100 of staggered (staggered) detection architecture shown in Figure 1, also can be used in the other forms of CCD detection module.With reference to Fig. 5 A～5C, wherein, Fig. 5 A illustrate is the schematic diagram of the CCD detection module 500 of the staggered detection architecture of using two output capacitances, it is the oscillogram of the employed clock signal in exposure back and reset signal for the first time among Fig. 5 A that Fig. 5 B illustrates, and Fig. 5 C to illustrate be the oscillogram of employed clock signal and reset signal after exposing for the second time among Fig. 5 A.CCD shift register cell 505 includes CCD shift register 506 and 508, electric charge receiving element 509 then is to include two charge receivers and a plurality of control circuit, for example be output capacitance C1 and output capacitance C2 and with control circuit 510,512 and 514.Clock signal C K1 and CK2 input to respectively in CCD shift register 506 and 508, and reset signal RS1 and RS2 then are difference input control circuits 510 and 512, control the action of output capacitance C1 and C2.Output capacitance C1 and C2 input to respectively in the control circuit 514, by control signal CNTL control, and control circuit 514 and in order to output signal output OS to analog signal processing circuit 516.
Similarly, the control method of the CCD detection module 500 of control chart 5A is as follows.At first, execution in step (a), odd number photodetector group 502 and even number photodetector group 504 are exposed, and odd number signal charge S1, S3..S10799 and even signal electric charge S2, the S4...S10800 of odd number photodetector group 502 and even number photodetector group 504 exposure back gained will store into respectively in CCD shift register 506 and 508.
Then, execution in step (b), with odd number signal charge S1, S3...S10799 in the CCD shift register 506 and even signal electric charge S2, S4...S10800 in regular turn respectively displacement export among output capacitance C1 and the C2, and capture odd number signal charge S1, the pairing signal of video signal of S3...S10799.In this step with odd number signal charge S1, S3...S10799 and even signal electric charge S2, S4..S10800 employed clock signal C K1 and CK2 when displacement exports output capacitance C1 and C2 to respectively in regular turn, and the waveform of reset signal RS1 and RS2 is shown in Fig. 5 B.That is to say, each clock pulse of enable clock signal CK1 be spaced apart 1 μ s, and each clock pulse of enable clock signal CK2 be spaced apart 0.2 μ s, can reach acquisition odd number signal charge S1, the pairing signal of video signal of S3...S10799, and the purpose of eliminating even signal electric charge S2, S4...S10800.
Then, execution in step (c), again odd number photodetector group 502 and even number photodetector group 504 are exposed, and odd number signal charge S1, S3...S10799 and even signal electric charge S2, the S4...S10800 of odd number photodetector group 502 and even number photodetector group 504 exposure back gained will store into respectively in CCD shift register 506 and 508.
At last, execution in step (d), with 506 and 508 odd number signal charge S1, S3...S10799 in the CCD shift register and even signal electric charge S2, S4...S10800 in regular turn respectively displacement export among output capacitance C1 and the C2, and capture even signal electric charge S2, the pairing signal of video signal of S4...S10800.In this step with odd number signal charge S1, S3...S10799 and even signal electric charge S2, S4...S10800 employed clock signal C K1 and CK2 when displacement exports output capacitance C1 and C2 to respectively in regular turn, and reset signal RS1 and RS2 are shown in Fig. 5 C.In step, make clock signal C K1 each clock pulse be spaced apart 0.2 μ s, and make clock signal C K2 each clock pulse be spaced apart 1 μ s, can reach acquisition even signal electric charge S2, the pairing signal of video signal of S4...S10800, and the purpose of eliminating odd number signal charge S1, S3...S10799.
Above method is to use in the image scan of high-res, similarly, and when carrying out the image scan of low-res, as long as execution in step (a) and step (b).
On the other hand, the present invention also can use in the CCD of single-column type shown in Figure 6 detection module 600.CCD displacement temporary storage unit 605 in the CCD detection module 600 includes CCD shift register 605, the electric charge receiving element 609 of CCD detection module 600 then is to include control circuit 610 and a charge receiver, and this charge receiver for example is output capacitance C3.Control method of the present invention is as follows.At first, execution in step (a) is exposed to photodetector group 602, and signal charge S1, S2, S3, S4...S10799, the S10800 of exposure back gained will store CCD shift register 606 into.
Then, execution in step (b), signal charge S1, S2 in the CCD shift register 606, S3, S4...S10799, S10800 be shifted in regular turn to be exported among the output capacitance C3, and acquisition odd number signal charge S1, the pairing signal of video signal of S3...S10799.Employed clock signal C K and reset signal RS can be as shown in Figure 4 in this step.So, can reach acquisition odd number signal charge S1, the pairing signal of video signal of S3...S10799, and the purpose of eliminating even signal electric charge S2, S4...S10800.
Then, execution in step (c) is exposed to photodetector group 602 again, and signal charge S1, S2, S3, S4...S10799, the S10800 of exposure back gained will store CCD shift register 606 into.
At last, execution in step (d), signal charge S1, S2 in the CCD shift register 606, S3, S4...S10799, S10800 be shifted in regular turn to be exported among the output capacitance C3, and acquisition even signal electric charge S2, the pairing signal of video signal of S4...S10800.
The above is so that all photodetectors are divided into two groups, be odd number photodetector group and even number photodetector group, for example is done explanation, yet the control method of CCD detector of the present invention also can be applicable to all photodetectors is divided under the situation of N group, wherein, this N group photodetector group is respectively the 1st to N photodetector group, and N is the positive integer greater than 2.Its detailed step is as described below.
At first, enter step (a '), setting a parameter i value is 1, and i is a positive integer.Then, enter step (b '), expose to N photodetector group the 1st, and the 1st to the 1st of N photodetector group exposure back gained be to store into respectively in the CCD shift register cell to the n-signal electric charge.Afterwards, enter step (c '), the 1st in the CCD shift register cell is shifted in regular turn to the n-signal electric charge to be exported in the electric charge receiving element, and captures the pairing signal of video signal of i signal charge.Then, enter step (d '), the i value is added 1.At last, enter step (e '), repeating step (b ') is to (d '), till the i value is greater than N.
The control method of the disclosed a kind of test module of CCD of the above embodiment of the present invention when high-res scans, can be avoided the saturated situation of electric charge in the CCD detection module.And when low-res scans, can reach quick scanning, the purpose of saving sweep time.
Therefore, of the present invention being characterized as: the consideration with the CCD detection module of single or half resolution obtains best exposure, and repeatedly to capture the control method of signal with the CCD detection module that reaches high-res.So, to scanner generally speaking, can reach and scan effect the most fast, and can reach best signal/noise ratio.
In sum; though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention should be with being as the criterion that the claim scope is defined.
Claims (8)
1. the control method of a charge coupled cell (CCD) detection module, this CCD detection module include a plurality of photodetectors, a CCD shift register cell, with an electric charge receiving element, those photodetectors are divided into two groups, comprise one first photodetector group and one second photodetector group, those photodetectors are in order to convert detected light signal to signal charge, export in the above-mentioned CCD shift register cell, this control method comprises parallel model again:
(a) this first photodetector group and this second photodetector group are exposed, and a plurality of first signal charges and a plurality of secondary signal electric charge of this first photodetector group and this second photodetector group exposure back gained will store into respectively in the above-mentioned CCD shift register cell;
(b) those first signal charges in the above-mentioned CCD shift register cell and those secondary signal electric charges are shifted in regular turn export in the above-mentioned electric charge receiving element, and capture the pairing signal of video signal of those first signal charges;
(c) those first photodetector groups and those second photodetector groups are exposed, and those first signal charges and those secondary signal electric charges of those first photodetector groups and those second photodetector groups exposure back gained will store into respectively in the above-mentioned CCD shift register cell; And
(d) those first signal charges in the above-mentioned CCD shift register cell and those secondary signal electric charges are shifted in regular turn export in the above-mentioned electric charge receiving element, and capture the pairing signal of video signal of those secondary signal electric charges.
2. control method as claimed in claim 1, wherein, this CCD shift register cell comprises one first shift register and one second shift register, this electric charge receiving element comprises an output capacitance, this first photodetector group is an odd number photodetector group, this second photodetector group then is an even number photodetector group, this odd number photodetector group and this second photodetector group are interconnected, the signal charge of those photodetectors in this first photodetector group is to input in the CCD shift register, and the signal charge of those photodetectors in this second photodetector group is to input in the 2nd CCD shift register.
3. control method as claimed in claim 2, wherein, also in order to receive a clock signal, this clock signal comprises a plurality of first clock pulse and a plurality of second clock pulse to this CCD detection module, and the cycle of this first clock pulse is less than the cycle of this second clock pulse.
4. control method as claimed in claim 3, wherein, the cycle of this second clock pulse be first clock pulse cycle 1/5.
5. control method as claimed in claim 1, wherein, this CCD shift register cell comprises one first shift register and one second shift register, this electric charge receiving element comprises one first output capacitance and one second output capacitance, this first photodetector group is an odd number photodetector group, this second photodetector group then is an even number photodetector group, this odd number photodetector group and this second photodetector group are interconnected, the signal charge of those photodetectors in this first photodetector group is to input in the CCD shift register, and the signal charge of those photodetectors in this second photodetector group is to input in the 2nd CCD shift register, those first signal charges in the one CCD shift register are that displacement exports in this first output capacitance, and those secondary signal electric charges in the 2nd CCD shift register are to be shifted to export in this second output capacitance.
6. control method as claimed in claim 1, wherein, this CCD shift register cell comprises a shift register, this electric charge receiving element comprises an output capacitance, the CCD detection module is a single-column type CCD detection module, this first photodetector group is an odd number photodetector group, and this second photodetector group then is an even number photodetector group.
7. the control method of a charge coupled cell (CCD) detection module, this CCD detection module can be used for low-res scanning, this CCD detection module include a plurality of photodetectors, a CCD shift register cell, with an electric charge receiving element, those photodetectors are divided into two groups, comprise one first photodetector group and one second photodetector group, those photodetectors are in order to convert detected light signal to signal charge, export in the above-mentioned CCD shift register cell, this control method comprises parallel model again:
(a) this first photodetector and this second photodetector group are exposed, and a plurality of first signal charges and a plurality of secondary signal electric charge of this first photodetector group and this second photodetector group exposure back gained will store into respectively in the above-mentioned CCD shift register cell; And
(b) those first signal charges in the above-mentioned CCD shift register cell and those secondary signal electric charges are shifted in regular turn export in the above-mentioned electric charge receiving element, and capture the pairing signal of video signal of those first signal charges.
8. the control method of a charge coupled cell (CCD) detection module, this CCD detection module includes a plurality of photodetectors, one CCD shift register cell, with an electric charge receiving element, those photodetectors are divided into the N group, N is the positive integer greater than 2, comprises first to N photodetector group, and those photodetectors are in order to convert detected light signal to signal charge, export in the above-mentioned CCD shift register cell, this control method comprises parallel model again:
(a) setting the i value is 1, and i is a positive integer;
(b) expose to N photodetector group to the 1st, and the 1st to N photodetector group exposure back gained a plurality of the 1st to the n-signal electric charge with store in the above-mentioned CCD shift register cell respectively;
(c) in the above-mentioned CCD shift register cell those the 1st are shifted in regular turn to the n-signal electric charge and export in the above-mentioned electric charge receiving element, and capture the pairing signal of video signal of those i signal charges;
(d) the i value is added 1;
(e) repeating step (b) is to (d), till the i value is greater than the N value.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB00134272XA CN1178452C (en) | 2000-11-29 | 2000-11-29 | Control method for test module of CCD |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB00134272XA CN1178452C (en) | 2000-11-29 | 2000-11-29 | Control method for test module of CCD |
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| CN1355648A true CN1355648A (en) | 2002-06-26 |
| CN1178452C CN1178452C (en) | 2004-12-01 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105763758A (en) * | 2014-10-21 | 2016-07-13 | 虹光精密工业股份有限公司 | Image sensing device |
| CN105791706A (en) * | 2014-12-24 | 2016-07-20 | 昆达电脑科技(昆山)有限公司 | Photographing device and method |
-
2000
- 2000-11-29 CN CNB00134272XA patent/CN1178452C/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105763758A (en) * | 2014-10-21 | 2016-07-13 | 虹光精密工业股份有限公司 | Image sensing device |
| CN105763758B (en) * | 2014-10-21 | 2018-12-21 | 虹光精密工业股份有限公司 | Image sensing device |
| CN105791706A (en) * | 2014-12-24 | 2016-07-20 | 昆达电脑科技(昆山)有限公司 | Photographing device and method |
| CN105791706B (en) * | 2014-12-24 | 2018-12-11 | 昆达电脑科技(昆山)有限公司 | Camera and its method |
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| Publication number | Publication date |
|---|---|
| CN1178452C (en) | 2004-12-01 |
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