The motherboard that is used for PCI Express computer system
Technical field:
The present invention is about a kind of motherboard, especially a kind of motherboard that is used for PCI Express computer system.
Background technology:
Press, motherboard belongs to the element of the bottom in the whole computer system, is responsible for carrying central processing unit, system chipset and storer, and getting in touch and data transfer path of these elements and other peripheral devices is provided.The main element of motherboard includes system chipset and connector.System chipset is the maincenter element of whole computer system running, major function be to be responsible for all the other elements between, the distribution of signal and data and transmission, and the different central processing units different system chipset of use of need arranging in pairs or groups.The function of connector then is in order to connect computer system each several part element, as display card, central processing unit, storer and hard disc etc.
The computer framework generally be to adopt south bridge (South Bridge), north bridge (North Bridge) chip independent design separately, and element and function that the north and south bridge chip is controlled is also had nothing in common with each other now.Please refer to shown in Figure 1ly, is the synoptic diagram of a typical computer framework.North bridge chips 100 mainly is responsible for the transmission of central processing unit 120, primary memory 140 and 160 data of AGP connector and signal near central processing unit 120, and links up by specific transfer protocol and South Bridge chip 200.The reception and the transmission of signal (Input/Output Signal) and data gone in every peripheral device on 200 responsible motherboards of South Bridge chip (for example PCI connector 220, CD-ROM device or Hard Disk Drive 240, soft disc player 260 and keyboard/mouse 280) output.And, include the controller of IDE controller, USB controller and soft dish, keyboard and the mouse of pci controller, hard disc and CD-ROM device in the South Bridge chip 200 in order to control and drive every peripheral device 220,240,260,280.It can (Interrupt Request IR), be passed to working routine and the action of central processing unit 120 to distribute institute's desire to carry out by north bridge chips 100 with interrupt request that these peripheral devices sent by this.
The fundamental purpose of AGP bus-bar is to provide a kind of high-speed transport interface, and the mass data that is produced in response to 3D picture pinup picture (Texture Mapping) is with the restriction of the display card data processing speed that solves conventional P CI interface.Yet, development along with other high performance PCI interface computer peripherals, as the networking card that the SCSI hard disc and the transmission speed of ultra320 specification reaches 10G, the transmission speed of conventional P CI bus-bar can't be supported already, and therefore the generation of I/O bus-bar interface PCI Express of new generation has also been arranged.
The development of PCI Express system focuses on high-performance and high scalability, and the PCI Express interface of developing out putting before this not only can provide high performance transfer efficiency, and, can with the compatible work of equipment at original PCI interface.Please refer to shown in Figure 2ly, is the synoptic diagram that a typical case adopts the computer framework at PCI Express interface.As shown in FIG., System on Chip/SoC 110 not only can be connected directly to PCI Express connector 310, also can pass through breakout box (Switch) 320 and connect a plurality of PCI Express connectors 330, simultaneously, can also pass through bridge (Bridge) 340 and connect compatible to PCI connector 350.This shows that PCI Express interface cording has enough potentiality with the widely used now PCI of replacement interface, or even the AGP interface, and become the main flow specification of transport interface.
PCI Express system is with tandem moor, and use " transmission of low voltage differential formula " (promptly utilize two transmission lines between voltage difference presentation logic signal 0 and 1) with of the influence of reduction noise signal, use significantly promoting transmission frequency for the signal transmission.According to the technical manual of PCI Express, a most basic PCIExpress link (LINK) has comprised two to " transmission of low voltage differential formula " signal, and four signal line are just arranged, a pair of responsible transmission, and another is to then being responsible for reception.Such basic framework is called one " path (Lane) ".In accordance with regulations, the transfer rate in " path " is 2.5Gbit/S approximately.
Hence one can see that, by the mechanism of PCI Express, can increase data bandwidth by the quantity that increases " path ", and the increase of " path " quantity to be reflected on the PCI Express connector be the increase of pin number.In present technology, disclosed the PCI Express connector that uses one, two, four, eight, 12,16,32 unequal number amounts " path ", correspond to the transmission bandwidth that 2.5Gb/S to 80Gb/S does not wait respectively.
Please refer to shown in Figure 3ly, is typical case one times of speed (1 *) PCI Express connector 330a, and Figure 12 corresponding definition of pin position table that is it.In addition, please refer to shown in Figure 4ly, is typical case's four times of speed (4 *) PCIExpress connector 330b, and Figure 13 corresponding definition of pin position table that is it.In the definition of pin position table of Figure 12 and Figure 13, " RSVD " is that representative keeps untapped stitch; " GND " is the stitch of representative in order to ground connection; " JTAG1~JTAG5 " is the stitch of test usefulness; " 3.3Vaux " is in order to feed an auxiliary voltage; " SMCLK " and " SMDAT " is in order to the exchanges data between control linkage device and chipset; " REFCLK+ " and " REFCLK-" are in order to the clock signal of differential transmission to be provided; " HSOp (i) " and " HSOn (i) " are in order to carrying out differential transmission to transmit data, and " HSIp (i) " and " HSIn (i) " are in order to carry out differential transmission to receive data; " PRSNT#1 " is whether to insert in order to detect the interface plug-in card with " PRSNT#2 ".
In comparison, four times of fast PCI Express connector 330b and one times of fast PCI Express connector 330a except length is different, " path " quantity difference that the two had, its pin number order is also different certainly.Briefly, if times speed of PCI Express connector is high more, the pin number order that it has is just many more.For example, the PCI Express connector 330a of one times of speed only has one group " path ", and the PCI Express connector 330b of four times of speed then has four groups " paths ".In addition, via comparing Figure 12 and Figure 13, more can find, the PCI Express connector 330b of four times of speed (the configuration of #1~#18), has more increased by 14 pin positions (#19~#32) so that more " paths " to be provided except having with the identical pin of the PCIExpress connector 330a position of one times of speed.And (#19~#32) is the arrangement that extends back of least significant end (#18) by former one times of fast PCI Express connector 330a pin position in the pin position that it increased.
As previously mentioned, the stitch quantity system of the visible high power speed PCI Express connector PCI Express connector of low power speed relatively is many, and similarly, the golden finger length of high power speed PCI Express interface plug-in card is also longer.Therefore, the PCI Express equipment side of low speed might insert in the PCI Express connector at a high speed, and equipment at a high speed then can not insert in the connector of low speed.
And under this restriction, when the user selects peripheral equipment for use, often be subjected to the restriction of PCIExpress connector existing on the motherboard, and the PCI Express peripheral equipment that only has transmission speed to be equal to or less than this connector specification can be selected for use.In addition, because this PCI Express connector family corresponds to the System on Chip/SoC of motherboard, therefore often misread again,, promptly do not had the possibility of selecting high-speed peripheral equipment for use if system chipset is not supported the PCI Express interface of high power speed.In other words, high-speed peripheral equipment also just can't be compatible to the connector and the system chipset of low speed downwards, and causes the development of PCI Express peripheral equipment to be subject to connector and system chipset.Illustrate, if system chipset is only supported the PCI Express transport interface of one times of speed, its employed connector also is the PCI Express connector of one times of speed of standard.And in the case, even if the PCI Express peripheral equipment of two times of above transmission speeds of speed is arranged can be selected, but can form with the side of PCI Express connector and interfere (interference), think use and can't be connected to system chipset via PCI Express connector than low velocity because of the golden finger of fair speed PCI Express peripheral equipment.
So, for the user is provided bigger selection elasticity in the selection of device upgrade, and the specification that must not be subject to system chipset limits, the PCI Express connector system chipset corresponding with it of low power speed can be used with the PCI Express peripheral equipment of high power speed, become an important problem.
Summary of the invention:
Fundamental purpose of the present invention is that a kind of PCI Express connector is provided, and the PCI Express interface plug-in card with high speed can be plugged together in the PCI of low power speed Express connector.
Motherboard provided by the present invention is can form with high power speed PCI Express interface plug-in card to be connected.This motherboard comprises a central processing unit, low power speed PCI Express controller and low power speed PCIExpress connector, wherein, low power speed PCI Express controller system is connected to central processing unit, and low power speed PCI Express connector family links to low power speed PCI Express controller.And, be formed with an opening in the side of low power speed PCIExpress connector, to avoid when high power speed PCI Express interface plug-in card plugs together in low power speed PCI Express connector, producing interference (interference) between interface plug-in card and connector.
In one embodiment of this invention, in the opening of the PCI of low power speed Express connector side, have more an elastic component, with the immobile interface plug-in card.
In one embodiment of this invention, system is preset with otch at the PCI of low power speed Express connector side, when a fairly large number of high power of golden finger speed Express interface plug-in card is inserted in the PCIExpress connector of low power speed by force, this incision fracture and form an opening and plug together in wherein to hold this interface plug-in card, and make remaining golden finger thus opening extend.
Can be about the advantages and spirit of the present invention by following detailed Description Of The Invention and appended graphic being further understood.
Description of drawings:
Fig. 1 is the synoptic diagram of an exemplary systems chipset structure.
Fig. 2 is the synoptic diagram of the computer framework at a typical PCI Express interface.
Fig. 3 shows one times of fast PCI Express connector of a typical case.
Fig. 4 shows four times of fast PCI Express connectors of a typical case.
Fig. 5 is the synoptic diagram of PCI Express connector of the present invention one preferred embodiment.
Fig. 6 shows that a PCI Express interface plug-in card that has than high power speed transmission speed plugs together in PCI Express connector of the present invention.
Fig. 7 is the synoptic diagram of another embodiment of PCI Express connector of the present invention.
Fig. 8 is the synoptic diagram of the another embodiment of PCI Express connector of the present invention.
Fig. 9 is the synoptic diagram that adopts computer system one preferred embodiment of PCI Express connector of the present invention.
Figure 10 is the synoptic diagram that adopts another embodiment of computer system of PCI Express connector of the present invention.
Figure 11 is the synoptic diagram that adopts the another embodiment of computer system of PCI Express connector of the present invention.
Figure 12 is the definition of pin position of one times of fast PCI Express of tabular.
Figure 13 is the definition of pin position of four times of fast PCI Express of tabular.
Embodiment:
Please refer to shown in Figure 5ly, is the synoptic diagram of PCI Express connector 400 first embodiment of the present invention.Be that PCI Express connector with one times of speed illustrates among the figure.As shown in FIG., the housing cording of this PCI Express connector 400 has the slot of a upward opening.This slot is divided into two parts 410 and 420 through a lattice plate 430, wherein, disposes the pin position that corresponds to #1~#11 among Figure 12 in the slot 410, then dispose the pin position of #12~#18 in the slot 420, and, the side 400a of connector, promptly be adjacent to #18 place, pin position, have an opening 440.That is to say that the minor face cording of slot 420 has an opening 440 to connect to the housing of connector 400, and the metal pin system that corresponds to each pin position is arranged in slot 410 and 420 two relative limits of growing.
By being made in the opening 440 of connector side 400a, can avoid housing than the golden finger part of the PCI Express interface plug-in card (daughter board) (not shown) of high power speed and connector 400 to form and interfere (interference), allow that just this PCI Express interface plug-in card than high power speed plugs together in connector 400 of the present invention.Further specify, the PCI Express that supposes above-mentioned low power speed means the doubly fast PCI Express of n, and the PCI Express of high power speed means the doubly above PCI Express of speed of m times of speed or m, connector 400 tolerable m of the present invention take place greater than the situation of n, for example during n=1, m can be 2,4,8,16 or 32.
Please refer to shown in Figure 6ly, show that a PCI Express interface plug-in card 500 that has than high power speed transmission speed plugs together in Fig. 5 PCI Express of the present invention connector 400.As shown in FIG., and please be simultaneously with reference to Fig. 3 and Fig. 4, because the PCI Express interface than high power speed needs more pin number amount, the golden finger 510 quantity systems of this PCIExpress interface plug-in card 500 are greater than the corresponding pin number amount of PCI Express connector 400.Therefore, in this PCI Express interface plug-in card, part is to plug together in connector 400 to the golden finger 510 that the pin position should be arranged, and all the other do not pass opening to the golden finger 510b system that the pin position should be arranged and extend to the outside of connector 400.
It should be noted that in the definition of pin position table as PCI Express among Figure 12 and Figure 13 that (#1~#11) all is to be positioned at slot 410 relevant for the pin position of signal transmission and control.And the pin position (#12~) that is disposed in the slot 420 is and transmission speed, and just " path (Lane) " is relevant.Therefore, the PCI Express interface plug-in card 500 of high power speed is plugged together in the PCI of low power speed of the present invention Express connector 400, (#1~#11) all is connected with connector 400 to be connected about signal transmission and the pin position of controlling in the interface plug-in card 500, that is to say, this interface plug-in card 500 is stretched out by the opening 440 of connector side, and cause sky to meet the golden finger 510b of (opened), be can the normal operation at PCI Express interface not to be impacted.
For this PCI Express interface plug-in card 500 is fixed in the connector 400, please refer to shown in Figure 7ly, in second embodiment of connector of the present invention, more be equiped with shell fragment 450 at opening 440 sides.Therefore, when the golden finger of interface plug-in card partly inserts in the opening 440, shell fragment 450 is extrusion, and produces a restoring force with clamping interface plug-in card.
In addition, please refer to shown in Figure 8ly, in the 3rd embodiment of connector of the present invention, the side 400a of connector in the positions that correspond to the long relatively limits of 420 liang of slots, cuts a kerf 460 respectively in advance.When the interface plug-in card of golden finger quantity more (just golden finger length is longer) is inserted in this connector 400 by force, the stressed fracture in otch 460 places, and form opening (not shown) to hold the interface plug-in card in the side of connector.
Please refer to shown in Figure 9ly, is the synoptic diagram that adopts computer system one preferred embodiment of PCI Express connector of the present invention.As shown in FIG., this computer system comprises central processing unit 120, system chipset 110, one times of speed (1 *) PCI Express connector 400 and four times of speed (4 *) PCI Express interface plug-in card 500.Wherein, central processing unit 120, system chipset 110 and one times of speed (1 *) PCI Express connector 400 are to be made on the motherboard 10.Comprise one times of fast PCI Express controller 130 in the System on Chip/SoC 110, be connected to one times of fast PCI Express connector 400 and think control.And as shown in Figure 6, the side of this times fast PCI Express connector 400 has an opening 440, so the aforementioned four times of fast PCIExpress interface plug-in cards 500 of tolerable plug together in wherein.
Please refer to shown in Figure 10ly, is the synoptic diagram that adopts another embodiment of computer system of PCI Express connector of the present invention.Compared to the embodiment of Fig. 9, be to adopt four times of speed (4 *) PCI Express connector 600 and 16 times of speed (16 *) PCI Express interface plug-in card 700 in the present embodiment.Wherein, central processing unit 120, system chipset 110 and four times of speed (4 *) PCI Express connector 600 are to be made on the motherboard 10.And, include four times of fast PCI Express controllers 630 in the System on Chip/SoC 110 in order to control this connector 600.
Hence one can see that, and the connector of computer system of the present invention is not limited to one times of speed (1 *) PCI Express connector, and different transmission such as two times of speed, four times of speed, six times of speed, octuple speed are the connectors of speed doubly, can be according to conceptual design of the present invention.Identical, in computer system of the present invention, interface plug-in card corresponding to this PCI Express connector also is not limited to use four times of fast PCI Express interface plug-in cards, and two times of speed, four times of speed, octuple speed, 16 times of doubly fast interface plug-in cards of differences such as speed transmission all can use.
Please refer to shown in Figure 11ly, is the synoptic diagram that adopts the another embodiment of computer system of PCI Express connector of the present invention.Compared to the embodiment of Fig. 9, be to adopt two one times fast PCI Express connector 400, four times of fast PCI Express interface plug-in cards 500 and one 16 times fast PCI Express interface plug-in cards 700 in the present embodiment.Wherein, central processing unit 120, system chipset 110 and one times of fast PCI Express connector 400 are to be made on the motherboard 10.One times of fast PCI Express controller 130 in the System on Chip/SoC 110 be connection so far two one times fast PCI Express connector 400 think control.Hence one can see that, and computer system of the present invention can be used more than one connector 400, and again, each connector 400 can also connect the doubly interface plug-in card 500 and 700 of speed of different transmission.
In sum, because PCI Express connector of the present invention allows that the PCIExpress equipment with high speed inserts wherein, change speech, just allow that also the PCI Express connector system chipset corresponding with it of low transmission speed is upwards compatible.Therefore, by computer system of the present invention, the user does not need to be subject to the specification of system chipset on the motherboard in the selection of device upgrade.That is to say that even if system chipset is only supported one times of fast PCI Express peripheral equipment, by PCI Express connector of the present invention, the user still can select the peripheral equipment that has than high power speed PCI Express interface for use.
The above is to utilize preferred embodiment to describe the present invention in detail, but not limit the scope of the invention, and know this type of skill personage and all can understand, suitably do slightly change and adjustment, will not lose main idea of the present invention place, also not break away from the spirit and scope of the present invention.