CN1315258C - Method of generating chaos timing sequential signal - Google Patents

Method of generating chaos timing sequential signal Download PDF

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Publication number
CN1315258C
CN1315258C CNB2004100345785A CN200410034578A CN1315258C CN 1315258 C CN1315258 C CN 1315258C CN B2004100345785 A CNB2004100345785 A CN B2004100345785A CN 200410034578 A CN200410034578 A CN 200410034578A CN 1315258 C CN1315258 C CN 1315258C
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China
Prior art keywords
chaos
sequence signal
timing sequence
time
value
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CN1564459A (en
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王林泽
赵文礼
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Hangzhou Electronic Science and Technology University
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Hangzhou Electronic Science and Technology University
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Abstract

The present invention provides a method capable of producing a time sequence signal with changeable time intervals and a change law having the characteristic of chaos. The signal can be used as a time control signal to control a machine to generate definite behavior (action, events) which is indefinable and changeable in time interval, and the change has the characteristic of chaos. The embodiment provided by the present invention takes a single-chip microcomputer as a hardware core, software utilizes a one-dimensional mathematic model in a chaos state, and chaos data x(i) is generated by way of calculation, wherein i represents 0, 1, 2, 3, etc., and x(i) is used as a time interval parameter for controlling an output port to alternatively output 1 or 0 by way of timing delay, so that chaos time sequence signal output y(t) is generated.

Description

The method that chaos timing sequence signal produces
Technical field:
The present invention relates to a kind of timing sequence signal generating method of electricity.This timing sequence signal is to be determined by the chaos data that chaos system produces on the time interval that changes.
Background technology:
Traditional timing controlled, its time interval be clocklike, predefined.For example: the motion of the yaw of electric fan, in case configure, just always according to regular time at interval rule swing back and forth.If certain behavior (action that machine is produced, incident) time interval of Fa Shenging is uncertain, vicissitudinous, and this variation has chaos characteristic, and (chaos characteristic is a kind of feature that nature extensively exists, has this feature if can control the behavior of machine, then be expected to make the more approaching nature of behavior of machine), then must have to produce sort signal, that be easy to realize, low cost method.Along with the proposition and the development of chaology, become possibility based on the timing method of chaology.
Summary of the invention:
But the objective of the invention is to provide a kind of generation time variable spaced, and Changing Pattern has the method for the timing sequence signal of chaos characteristic.Sort signal can be used for as a kind of timing controling signal, and the control machine produces certain behavior (action, incident), and this behavior (action, incident) is uncertain, vicissitudinous on the time interval, and this variation has chaos characteristic.
Method of the present invention may further comprise the steps:
(1) utilize arbitrary pre-determined Mathematical Modeling, use the numerical computations method for solving, calculate chaos data x (i) with chaotic behavior, i=0,1,2,3 ...Described chaos data x (i) is the arbitrary state variable that has in the Mathematical Modeling of chaotic behavior.
(2) whenever calculating an x (i), just with x (i) as the time interval controls parameter, form the no symbol shaping corresponding according to the value of x (i) and count L with it i, i=0,1,2,3 ...
(3) it is the time interval with Δ T fiducial time who determines, to L iBegin countdown from lowest order, L delays time at every turn i* Δ T works as L iCountdown is 0 o'clock, and time-delay finishes.Δ T utilizes the timer of chip internal to produce.The size of timer counting initial value and hardware clock frequency decision Δ T.After the hardware clock frequency is determined, change timer counting initial value and can change Δ T.Also available other timers of Δ T or system clock produce.
(4) after time-delay finishes, change the amplitude y of the chaos timing sequence signal of determining as required in advance, produce timing controling signal next time.The method that changes can be non-to last y value fetch logic, and even last y value is 1, and then new y value is 0; Also can get negatively to last y value, even last y value is 1, and then new y value is-1.
(5) according to the ascending order of i value, whenever calculate a corresponding chaos data x (i) value, repeating step (2), (3) and (4) promptly obtain chaos timing sequence signal.
Mathematical Modeling with chaotic behavior is meant and satisfies in the chaology about the " chaos " Mathematical Modeling of definition.A most important characteristic of such Mathematical Modeling is that initial value is had responsive dependence, that is: the small difference of initial value all can cause a series of data x of calculating 1(i) and x 2(i) difference, i=0,1,2,3 ... and can't describe out these data in advance and will change n., by what kind of track.x 1(i) and x 2(i) represent result of calculation under the different initial values respectively.For example: " chaotic dynamics " 48 pages that translation issuing company in Shanghai publishes nineteen ninety, 97 pages of " talk---chaotic dynamics draws opinion " that Science and Technology of Shanghai education publishing house 1997 is published from parabola, " chaotic dynamics is preliminary " 42 pages that publishing house of Wuhan Water Conservancy and Electric Power Univ published in 1998, initial value is had this feature of sensitive dependence detailed description is all arranged Mathematical Modeling in the documents such as 25 pages of " chaos in the natural science and fractal " that BJ University Press 2003 publishes with chaotic behavior.
This more famous class Mathematical Modeling comprises:
The Duffing equation
x · = y
y · = - My + x - x 3 + γ cos t
M=0.5,0.6<γ<0.826
The Chua equation
x · = α ( y - x - m 1 x - 1 2 ( m 0 - m 1 ) | x + 1 | - 1 2 ( m 1 - m 0 ) | x - 1 | )
y · = x - y + z
z · = - βy
a=9,β=100/7,m 0=-1/7,m 1=2/7
The Lorenz equation
x · = - 16 ( x - y )
y · = - xz + 45.92 x - y
z · = xy - 4 z
The Rossler equation
x · = - y - z
y · = x + αy
z · = b + z ( x - c )
a=0.2,b=0.2,c=5.7
a=0.398,b=2,c=4
The Logist equation
x n+1=μx n(1-x n)
3.57≤μ≤4
H é non equation
x n + 1 = 1 + 0.3 y n - 1.4 x n 2
y n+1=x n
The tent mapping equation
x n + 1 = 2 x n , 0 &le; x n &le; 1 2 2 - 2 x n , 1 2 < x n &le; 1
The sawtooth mapping equation
x n + 1 = 2 x n , 0 &le; x n < 1 2 2 x n - 1 , 1 2 &le; x n &le; 1
Because the inventive method is based on the numerical computations that the chaos Mathematical Modeling is carried out, the data that obtain are the chaos data, utilize these chaos data to control the length of timing as the time interval controls parameter, the timing of consequent timing sequence signal has just had chaos characteristic at interval, is chaos timing sequence signal.
Description of drawings
Fig. 1 is the chaos timing sequence signal schematic representation that will produce;
Fig. 2 is that the hardware of present embodiment is realized;
Fig. 3 is the software flow pattern of embodiment.
Embodiment
As shown in Figure 2, hardware selects a slice MCS-51 series monolithic (8751) to constitute minimum system, and this embodiment selects single-chip microcomputer P 0The lowest order of mouth is a signal output.
Mathematical Modeling with chaotic behavior is selected x (i+1)=μ [x (i)-(x (i)) 2], μ=4 wherein, the scope of choosing of initial value x (0) is 0<x (0)<1.Concerning chaos system, the difference of initial value can cause different chaos data sequences, thereby can be by selecting different initial values, selects to wish the chaos data sequence that produces.
Software design elaborates referring to Fig. 3 software flow pattern.
(1) initialization module need be finished following work among Fig. 3:
1) sets timer 0 working method;
Working method is a mode 1, is about to 0x1H and writes timer 0 mode control register TMOD.
2) timer 0 presets initial value, is about to initial value and writes TH 0And TL 0Under the clock cycle of determining, initial value will determine the length of Δ T;
3) start timer 0, be about to the TR of control register TCON 0The position, position;
4) required variable x, y, L etc. are calculated in definition and initialization;
5) make y=1, in 0<x (0)<1 scope, choose the initial value of an x.
(2) output module is finished following work among Fig. 3: deposit the x value in counting unit L, P 0.0Mouthful put 1 or clear 0, produce a new output, then to the y logic NOT, for output is next time got ready by the value of y.
(3) calculate a new x. with chaos Mathematical Modeling algoritic module among Fig. 3
Chaos Mathematical Modeling algoritic module comprises following content:
1) calculates x with multiplying order 2
2) calculate x-x with subtraction instruction 2
3) calculate 4 (x-x with multiplying order 2), obtain a new x;
(4) postpone Δ T among Fig. 3.
(5) start timer and begin once new Δ T delay among Fig. 3.
Among Fig. 3 (6), (7), (4), the circulation of (5) produces the delay of L Δ T.In (6) during L=0,, produce a new output if termination routine not then returns (2).This process can circulate always.Until when in (6) during L=0, if finish, EP (end of program) then.The end mode of program can finish by modes such as countings.
The chaos timing sequence signal schematic representation that produces as shown in Figure 1.Wherein, t i=L iΔ T, t I+1=L I+1Δ T, i=0,1,2,3 ..., L i, L I+1It is count value with chaos characteristic.
To the foregoing description, in specific implementation process: 1) because there is rounding error in computational process, the long-term action of timing signal has periodically, if be necessary, can be as required, long single-chip microcomputer of selected character or embedded system chip also can be solved by the multibyte operation subprogram of write specialized; 2), can the x value when at every turn finishing store the initial value when beginning as next time if think that each chaos sequence that produces is all different; 3) end mode can realize by Control Circulation number of times or external bond prosecutor formula.
Above-described embodiment only is for technological thought of the present invention and characteristics are described, its purpose makes the technical staff who is familiar with this field can understand content of the present invention and is implementing according to this, when can not with qualification claim of the present invention, promptly the equalization of doing according to disclosed spirit generally changes or modifies, and must be encompassed within the claim of the present invention.

Claims (4)

1, the method for chaos timing sequence signal generation is characterized in that this method may further comprise the steps:
(1) utilize arbitrary pre-determined Mathematical Modeling, use the numerical computations method for solving, calculate chaos data x (i) with chaotic behavior, i=0,1,2,3, Described chaos data x (i) is the arbitrary state variable that has in the Mathematical Modeling of chaotic behavior;
(2) whenever calculating an x (i), just with x (i) as the time interval controls parameter, form the no symbol shaping corresponding according to the value of x (i) and count L with it i, i=0,1,2,3,
(3) it is the time interval with Δ T fiducial time who determines, to L iBegin countdown from lowest order, L delays time at every turn i* Δ T works as L iCountdown is 0 o'clock, and time-delay finishes;
(4) after time-delay finishes, change the amplitude y of the chaos timing sequence signal of determining as required in advance, produce timing controling signal next time;
(5) according to the ascending order of i value, whenever calculate a corresponding chaos data x (i) value, repeating step (2), (3) and (4) promptly obtain chaos timing sequence signal.
2, the method for chaos timing sequence signal generation as claimed in claim 1 is characterized in that the Δ T in the described step (3) produces by the timer in the hardware.
3, the method for chaos timing sequence signal generation as claimed in claim 1 is characterized in that the method for the amplitude y of the chaos timing sequence signal that the change in the step (4) is determined in advance as required is non-to last y value fetch logic.
4, the method for chaos timing sequence signal generation as claimed in claim 1 is characterized in that the method for the amplitude y of the chaos timing sequence signal that the change in the step (4) is determined in advance as required is to get negative to last y value.
CNB2004100345785A 2004-04-20 2004-04-20 Method of generating chaos timing sequential signal Expired - Fee Related CN1315258C (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101789860B (en) * 2010-01-27 2012-02-15 江苏技术师范学院 Chaotic signal generator
CN103684263B (en) * 2013-11-14 2017-06-06 杭州电子科技大学 A kind of method based on the simple mixed signal generator of chip microcontroller

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1323103A (en) * 2001-04-09 2001-11-21 王琳 Chaotic interleaving device designing method
CN1359211A (en) * 2002-01-10 2002-07-17 张红雨 Chaotic encipher series generator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1323103A (en) * 2001-04-09 2001-11-21 王琳 Chaotic interleaving device designing method
CN1359211A (en) * 2002-01-10 2002-07-17 张红雨 Chaotic encipher series generator

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Denomination of invention: Method of generating chaos timing sequential signal

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