CN1770094A - High quality true random number generator - Google Patents
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- CN1770094A CN1770094A CN 200510061136 CN200510061136A CN1770094A CN 1770094 A CN1770094 A CN 1770094A CN 200510061136 CN200510061136 CN 200510061136 CN 200510061136 A CN200510061136 A CN 200510061136A CN 1770094 A CN1770094 A CN 1770094A
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Abstract
The invention discloses a generator for real random numbers which comprises: real random numbers generating module; data shuffle module; entropy detecting module for judging quality of random numbers; weak password detecting module. The invention has the advantages that: 1. having good quality real random numbers by performing shuffle, entropy and weak password detecting on random numbers and; 2. being rapid to generating real random numbers.
Description
Technical field
The present invention relates to a kind of high quality true random number generator.Especially, relate to the initial password of a kind of key that is used to generate cryptographic algorithm, bank client and the anti-saturated high-quality true Random Number Generator of the password of storage drive automatically.
Background technology
Random number is divided into two kinds of pseudo random number and true random numbers.Pseudo random number is to have certain rule governed, and Cycle Length is time-limited random number, so pseudo random number is predictable.True random number generally is to be produced by the real random number generator that mimic channel constitutes, owing to introduced noise in circuit, true random number does not have rule to follow, and is uncertain fully.
Because existing most cryptographic algorithm is disclosed, the assurance of information security just depends on the protection to key, generally all needs to use random number and produce key.So the random number that is used to produce key has just become the key that ensures information security, and has only the safety that complete uncertain true random number could real guarantee information.
The domestic tandom number generator of having developed has plenty of the pseudorandom number generator with Design of Digital Circuit; And often speed is slow with the true Random Number Generator of Analog Circuit Design, and the quality of random numbers that produces is also bad.
Summary of the invention
The objective of the invention is at the deficiencies in the prior art, a kind of high quality true random number generator is provided.
The objective of the invention is to be achieved through the following technical solutions:
High quality true random number generator comprises:
Be used to produce the random number generation module of random number;
Described high quality true random number generator also comprises
Be used for further increasing the randomness of data, play the data of the effect of shuffling function and shuffle module;
Be used to judge the period entropy detection module of the quality of random number;
Whether the random series that is used to detect output is the weak key detection module of weak key.
Described data are shuffled module: be added on after the random number generation module, be used for further increasing the randomness of data, play the effect of shuffling function.
Period entropy detection module: use the LZ algorithm that proposes by Israelis Lempel and Ziv to judge the quality of random number.
The weak key detection module: whether the random series that is used for detecting output is weak key, checks 0 string in the key or the length of 1 string, provides indicated value result.
The present invention has following technique effect:
1. the quality of true random number is very high: the random number that produces is shuffled, increase its randomness, and data are carried out period entropy test and weak key test of heuristics, guarantee its randomness; 2. the generation speed of true random number is fast.
Description of drawings
Fig. 1 is the high quality true random number generator structured flowchart;
Fig. 2 is the workflow diagram of true Random Number Generator;
Fig. 3 is the workflow diagram of period entropy detection module;
Fig. 4 is the fundamental diagram that data are shuffled module;
Fig. 5 is the workflow diagram that data are shuffled module;
Fig. 6 is a weak key detection module workflow diagram.
Embodiment
Describe the present invention below with reference to the accompanying drawings in detail.
As shown in Figure 1, a kind of high quality true random number generator framework comprises the random number generation module, and data are shuffled module, period entropy monitoring modular and weak key monitoring modular.Wherein data are shuffled module and are added on after the random number generation module, are used for further increasing the randomness of data, play the effect of shuffling function.Period entropy detection module adopts the LZ algorithm that is proposed by Israelis Lempel and Ziv to judge the quality of random number.Whether the random series that the weak key detection module is used for detecting output is weak key, checks 0 string in the key or the length of 1 string, provides indicated value result.
As shown in Figure 2, after tandom number generator is reset, the random number generation module is started working, the random number sequence of its generation is carried out randomness by period entropy module and is detected, and provides detected value, simultaneously, this random number sequence is shuffled module by data and is carried out shuffle process, further increase randomness, the random number sequence after shuffling is detected by the weak key module, provides detected value.
As shown in Figure 3, period entropy detection module workflow: address pointer zero clearing in the initialization procedure, the whole zero setting of storer.The uncertainty judging circuit is from the parallel-to-serial converter data, and at this circuit internal calculation binary tree branch address, judge whether this branch address is empty: if the address of branch is not address blank, whether the length of then judging the data of input reaches 65536 bits: if do not reach 65536 bits, then with above-mentioned branch address as the current address, continue to read in 1 Bit data; If reached the data of 65536 bits, then the result is differentiated in output; If above-mentioned branch address is empty, then storer in this branch address mark non-NULL, counter is added 1, judge whether the data length of input has reached 65536 bits: if reached 65536 bit lengths, then the result is differentiated in output; If do not reach 65536 bit long, then with the address pointer zero clearing, continue to read in the data of next bit, judge.
As shown in Figure 4, data are shuffled the randomness that module is used for further increasing data, play the effect of shuffling function.Its course of work: when enable signal is effective, two 1bit bit wide data inputs, data of each clock period input, the data of importing the input of 1 port are placed among the initial shift register init32, after next input1 data are come in, previous data are to moving to left, deposit among the initial shift register init33, analogize in proper order, deposit 32 data (by counter counter control, do not import data, the value of counter increases by 1) in always, first data exist among the initial shift register init63 like this, and last data exists among the initial shift register init32.The data of Input2 input are placed among the init0 of initial shift register, after next input1 data are come in, previous data are to moving to left, deposit among the initial shift register init31, analogize in proper order, deposit 32 data in, first data exist among the initial shift register init63 so always, and last data exists among the initial shift register init0.When the value of counter when 0 is incremented to 31, will must be worth among the initial shift register init to compose and give the fsr register assignment, the rule of assignment is: fsr[127:64]=~ init[63:0], fsr[63:0]=init[63:0].128 bit shift register are started working after by assignment, and each clock period moves to right one.The value that shifts out through a non-linear boolean logic function f to output terminal output.
Each clock period: the 111st, 61,11 that gets the fsr register is carried out Boolean calculation one time; 127,126,121,0 that get the fsr register are carried out XOR; Above-mentioned two values are carried out XOR once more with output output, and the gained result deposits the 127th of fsr register in.Finish the process that once moves to right of fsr.
As shown in Figure 5, data are shuffled the workflow diagram of module, and key is exactly the shifting process of two groups of shift registers, and at first 64 initial register assignment are given 128 feedback shift registers, by feedback shift register output signal is fed back to input signal, realize the scramble function of data.
As shown in Figure 6, the weak key module is exactly to check whether the sequence immediately of shuffling after the resume module through data is weak key.Its workflow is specific as follows: when weak key detection module reset signal is effective, and system start-up, the count initialized device is started working.1. in the initialization procedure, " current run length " counter, " maximum run length " counter are cleared.Read in one digit number according to depositing " present bit register " in; 2. start working, read in one digit number according to depositing " next bit register " in.Judge then whether " next bit " and present bit equate: if equate, " present bit register " adds 1, give " present bit " with " next bit ", follow the size of the more current distance of swimming and maximum run, if the current distance of swimming greater than maximum run, is then given maximum run length with current run length; If first distance of swimming is then given current run length first run length register, preserve first distance of swimming classification (1 distance of swimming or 0 distance of swimming); 3. judge whether to finish to check: if not, then read in the one digit number certificate and deposit " next bit " in, and repeat 2..Check if will finish, then the current distance of swimming and the first distance of swimming are compared, if the similar distance of swimming (all be 1 distance of swimming or all be 0 distance of swimming), judge that then whether " first run length+current run length " be greater than " maximum run length ", if then " first run length+current run length " gives " maximum run length ".Compare maximum run length value and theoretic run length threshold value (total length according to data calculates) size then and export the result.
Illustrate the workflow of true Random Number Generator below:
At first produce sequence immediately by the random number generation module, as:
0100，1100，0101，1011，1110，0000，1111，1011，1001，0110，0111，1100，0000，1110，0111，1001，1，1101，0001。
Sequence increases its randomness through shuffling module, gets the preceding 64bit of random number generation module, and even bit is as high 32, and odd bits obtains sequence as low 32:
1010，1101，1000，1101，0110，1110，0010，1101，0010，0011，1100，1111，1001，0110，0011，0110。
With this 64bit negate, obtain sequence:
0101，0010，0111，0010，1001，0001，1101，0010，1101，1100，0011，0000，0110，1001，1100，1001。
Original 64bit and the 64bit after the negate are merged initial value as shift register, and the 64bit after the negate is as high 64, and 64bit originally totally 128, obtains sequence as low 64:
0101，0010，0111，0010，1001，0001，1101，0010，1101，1100，0011，0000，0110，1001，1100，1001，1010，1101，1000，1101，0110，1110，0010，1101，0010，0011，1100，1111，1001，0110，0011，0110。
Total input: 1101,
The 1st clock: input: 11.
The data of the bit register of 128bit become:
1，0101，0010，0111，0010，1001，0001，1101，0010，1101，1100，0011，0000，0110，1001，1100，1001，1010，1101，1000，1101，0110，1110，0010，1101，0010，0011，1100，1111，1001，0110，0011，011。
Output: 0.
The 2nd clock, input: 01.
The data of the bit register of 128bit become:
1，1，0101，0010，0111，0010，1001，0001，1101，0010，1101，1100，0011，0000，0110，1001，1100，1001，1010，1101，1000，1101，0110，1110，0010，1101，0010，0011，1100，1111，1001，0110，0011，01。Output: 0.
Judge that by period entropy detection module the quality of random number, period entropy module clock frequency are 2 times of clock frequency of other module, guarantee that all outputs of random number generation module can both in time be handled by the weak key detection module, this module is input as:
0100，1100，0101，1011，1110，0000，1111，1011，1001，0110，0111，1100，0000，1110，0111，1001，1，1101，0001。
Input: 0 address 0: be changed to non-NULL
Input: 1 address 1: be changed to non-NULL
Input: 0 address 0: non-NULL
Input: 0 address 00: be changed to non-NULL
Input: 1 address 1: non-NULL
Input: 1 address 11: be changed to non-NULL
Input: 0 address 0: non-NULL
Input: 0 address 00: non-NULL
Input: 0 address 000: be changed to non-NULL
Input: 1 address 1: non-NULL
……
Till the full 65536bit of input, the number of calculating the address space that is changed to non-NULL is S.If S, represents then that test result is good greater than pre-set threshold N; If S is not more than N, represent that then test result is bad.
Whether the random series that the weak key detection module detects output is weak key.Suppose that shuffling module is output as:
0011，1010，1100，1000，……
The data volume of predefined detection is M=16bit, and then the longest 0 or 1 distance of swimming of Yun Xuing is: Limit=2+log2M=6.
Input: 0 present bit: the 0 current distance of swimming: the 1 the longest distance of swimming: 1
Input: 0 present bit: the 0 current distance of swimming: the 2 the longest distances of swimming: 2
Input: 1 present bit: the 1 current distance of swimming: the 1 the longest distance of swimming: 2
Input: 1 present bit: the 1 current distance of swimming: the 2 the longest distances of swimming: 2
Input: 1 present bit: the 1 current distance of swimming: the 3 the longest distances of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 1 present bit: the 1 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 1 present bit: the 1 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 1 present bit: the 1 current distance of swimming: the 2 the longest distances of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 2 the longest distances of swimming: 3
Input: 1 present bit: the 1 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 1 the longest distance of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 2 the longest distances of swimming: 3
Input: 0 present bit: the 0 current distance of swimming: the 3 the longest distances of swimming: 3
Head and the tail are checked: the 1st identical with the 16th, and therefore end to end, 0 the distance of swimming is 5, and greater than the longest known distance of swimming 3, therefore, the longest distance of swimming of these 16bit data of being measured is 5.The longest distance of swimming 5＜Limit=6, this expression test result is good.
The foregoing description is used for the present invention that explains, rather than limits the invention, and in the protection domain of spirit of the present invention and claim, any modification and change to the present invention makes all fall into protection scope of the present invention.
Claims (4)
1. high quality true random number generator comprises:
Be used to produce the random number generation module of random number;
It is characterized in that described high quality true random number generator, also comprise
Be used for further increasing the randomness of data, play the data of the effect of shuffling function and shuffle module;
Be used to judge the period entropy detection module of the quality of random number;
Whether the random series that is used to detect output is the weak key detection module of weak key.
2. a kind of high quality true random number generator according to claim 1 is characterized in that described data shuffle module: be added on after the random number generation module, be used for further increasing the randomness of data, play the effect of shuffling function.
3. a kind of high quality true random number generator according to claim 1 is characterized in that described period entropy detection module: use the LZ algorithm that is proposed by Israelis Lempel and Ziv to judge the quality of random number.
4. a kind of high quality true random number generator according to claim 1, it is characterized in that described weak key detection module: whether the random series that is used for detecting output is weak key, check 0 string or 1 length of going here and there in the key, provide indicated value result.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101470597B (en) * | 2007-12-25 | 2010-09-29 | 中国科学院软件研究所 | High-speed random detection card |
| CN101364171B (en) * | 2008-07-07 | 2011-05-11 | 武汉大学 | Dynamic real random number generator |
| CN102411594A (en) * | 2010-09-25 | 2012-04-11 | 中国移动通信集团湖南有限公司 | Method and device for obtaining information |
| CN102541508A (en) * | 2010-12-29 | 2012-07-04 | 鸿富锦精密工业（深圳）有限公司 | True random number generating system and method |
| CN105027073A (en) * | 2013-03-12 | 2015-11-04 | 高通股份有限公司 | Interrupt driven hardware random number generator |
| CN106354475A (en) * | 2016-08-30 | 2017-01-25 | 安徽问天量子科技股份有限公司 | High-performance random number generation method and generator |
| CN107943450A (en) * | 2017-11-17 | 2018-04-20 | 上海众人网络安全技术有限公司 | Random digit generation method, device, computer equipment and computer-readable medium |
| CN113377338A (en) * | 2021-07-09 | 2021-09-10 | 广东电网有限责任公司 | Self-feedback true random number generation method and system based on power Internet of things |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6539410B1 (en) * | 1999-03-17 | 2003-03-25 | Michael Jay Klass | Random number generator |
| GB0102840D0 (en) * | 2001-02-05 | 2001-03-21 | Cambridge Silicon Radio Ltd | Generating random data |
| US6871206B2 (en) * | 2001-11-20 | 2005-03-22 | Ip-First, Llc | Continuous multi-buffering random number generator |
| JP3695409B2 (en) * | 2002-03-05 | 2005-09-14 | ソニー株式会社 | Random number data generation circuit |
| US7047262B2 (en) * | 2002-08-21 | 2006-05-16 | Koninklijke Philips Electronics N.V. | Entropy estimation and decimation for improving the randomness of true random number generation |
| CN2594867Y (en) * | 2002-12-12 | 2003-12-24 | 浙江大学 | True random number generator |
| CN1208715C (en) * | 2002-12-12 | 2005-06-29 | 浙江大学 | Real random number generator |
| CN100365564C (en) * | 2004-08-18 | 2008-01-30 | 浙江大学 | High speed true random number generator |
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- 2005-10-17 CN CNB2005100611364A patent/CN100461088C/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101470597B (en) * | 2007-12-25 | 2010-09-29 | 中国科学院软件研究所 | High-speed random detection card |
| CN101364171B (en) * | 2008-07-07 | 2011-05-11 | 武汉大学 | Dynamic real random number generator |
| CN102411594A (en) * | 2010-09-25 | 2012-04-11 | 中国移动通信集团湖南有限公司 | Method and device for obtaining information |
| CN102411594B (en) * | 2010-09-25 | 2013-06-26 | 中国移动通信集团湖南有限公司 | Method and device for obtaining information |
| CN102541508A (en) * | 2010-12-29 | 2012-07-04 | 鸿富锦精密工业（深圳）有限公司 | True random number generating system and method |
| CN105027073A (en) * | 2013-03-12 | 2015-11-04 | 高通股份有限公司 | Interrupt driven hardware random number generator |
| CN106354475A (en) * | 2016-08-30 | 2017-01-25 | 安徽问天量子科技股份有限公司 | High-performance random number generation method and generator |
| CN107943450A (en) * | 2017-11-17 | 2018-04-20 | 上海众人网络安全技术有限公司 | Random digit generation method, device, computer equipment and computer-readable medium |
| CN113377338A (en) * | 2021-07-09 | 2021-09-10 | 广东电网有限责任公司 | Self-feedback true random number generation method and system based on power Internet of things |
| CN113377338B (en) * | 2021-07-09 | 2023-07-14 | 广东电网有限责任公司 | Self-feedback true random number generation method and system based on electric power Internet of things |
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