CN1298050C - Method for extracting layout/circuit in bipolar integrated circuit design - Google Patents

Method for extracting layout/circuit in bipolar integrated circuit design Download PDF

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CN1298050C
CN1298050C CNB031154476A CN03115447A CN1298050C CN 1298050 C CN1298050 C CN 1298050C CN B031154476 A CNB031154476 A CN B031154476A CN 03115447 A CN03115447 A CN 03115447A CN 1298050 C CN1298050 C CN 1298050C
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points
line segment
directed line
base
emitter region
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CN1523663A (en
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林争辉
林涛
荣荧
范宏春
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Shanghai core Microelectronics Co., Ltd.
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Xinhua Microelectronic Co Ltd Shanghai
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Abstract

The present invention relates to a method for extracting a layout/circuit in a design of a bipolar integrated circuit. Special technical difficulties in the layout/circuit extraction work of the bipolar integrated circuit are caused by the complexity of bipolar integrated circuit process manufacture and the diversity of element varieties, and the extraction work is especially a critical point for verifying the correctness of the design of the integrated circuit. The present invention firstly provides a layout relation diagram and an element relation diagram of the bipolar integrated circuit and establishes a mapping relation between the two diagrams and a mapping method of the two diagrams. The present invention provides an element recognizing table of the bipolar integrated circuit on the basis of the relation and the method. The present invention also provides steps of the bipolar integrated circuit layout/circuit extraction established on the basis of the element recognizing table and introduces the steps into a computer program to form a block diagram for circuit recognition and circuit extraction. The present invention has the advantages of universality and strictness. The application range of the present invention covers all the bipolar integrated circuits and all the MOS integrated circuits.

Description

Domain and circuit diagram extracting method in the bipolar integrated circuit design
(1) technical field
The present invention relates to the field of integrated circuit (IC) design technology, refer in particular to domain and circuit diagram extracting method in the bipolar integrated circuit design.
(2) background technology
Development of integrated circuits has entered ultra-large and the sub-micro stage, because being increased sharply of its integrated level caused a series of difficulties in the design, and these difficulty some imperfection and imperfections from eda tool.In view of this, steps such as the checking in the design process, identification and check have become the conditio sune qua non that guarantees that design is successful.
A complete Integrated Circuit CAD system must comprise multiple functional checking, identification and a nucleus correcting system, to guarantee obtaining the correct layout data of electrical property in the past in plate-making and flow.According to the common recognition of present integrated circuit industry circle, checking, identification and nucleus correcting system should comprise Design Rule Checking, parts such as circuit stages checking and logic level checking.Wherein the circuit stages checking should be made up of circuit extraction, electric network consistency comparison (checking) and breadboardin three parts.
So-called circuit extraction promptly from integrated circuit diagram information extraction circuit theory diagrams, is to carry out graphic operation according to domain structure, obtains the component information of circuit and the process of topological structure; So-called electric network consistency is (checking) relatively, be the information that the result according to circuit extraction is connected with circuit topology, the electric network and the intrinsic electric network that are extracted are carried out consistency process relatively, and the purpose of this process is in order to check and to verify whether the topological structure of designed circuit and component value are consistent with former design circuit; So-called breadboardin then is the information according to circuit extraction, and circuit is done the analysis of multiple electrical property, whether has reached intrinsic requirement with the electrical property of checking designed circuit.
Obviously, circuit extraction, electric network consistency comparison (checking) and breadboardin are indivisible, mutual related component parts in the circuit stages checking.Simultaneously, because breadboardin has had ripe eda tool in the world, supply as relatively independent commercialization design tool.The present invention only relates to the related content of domain and circuit diagram extraction.In addition, the electrical network consistency of content related to the present invention comparison (checking) method is applied for a patent separate case.
The present invention only relates to domain and the circuit diagram extracting method in the above-mentioned bipolar integrated circuit design wherein, and the domain and the circuit diagram that do not relate in the MOS integrated circuit (IC) design extract problem.This be because, compare with the technology of MOS integrated circuit, the technology of bipolar integrated circuit is more complex, the domain of bipolar integrated circuit and circuit diagram extract much more difficult than the MOS integrated circuit, its reason is that the primary element kind of formation bipolar integrated circuit is many, it is big that all elements in the domain are discerned difficulty, particularly, raising along with circuit level, the parts number that constitutes bipolar integrated circuit increases, and the domain of bipolar integrated circuit and circuit diagram extract difficulty more to be increased.Extract problem about domain in the MOS integrated circuit (IC) design and circuit diagram, the existing separate case narration of the inventor.
The relevant patent of this class prior art has:
(1) patent of Texas ,Usa instrument company (Texas, USA): VLSI static random access memory (Chinese patent publication number 1043587, application number 89103683.0);
(2) patent of Deutsche ITT Industries GmbH's (Freiburg, Germany): monolithic integrated digital circuit (Chinese patent publication number 86101674, application number 86101674).
In these prior aries, only relate to the problems such as graphics process in the verification technique of MOS integrated circuit, do not relate to the bipolar integrated circuit design in domain and circuit diagram extracts and the electric network consistency of bipolar integrated circuit in designing relatively waits relevant problem.
(3) summary of the invention
In view of above situation, the objective of the invention is to provide originally a kind of in the bipolar integrated circuit design domain and the circuit diagram extracting method in the circuit stages checking.
The object of the present invention is achieved like this:
Domain and circuit diagram extracting method in a kind of bipolar integrated circuit design, it comprises:
Step 1: the layout data input, from the layout data information of external world's acquisition bipolar integrated circuit;
Step 2: the data preliminary treatment to the data of input with figure sorts and preliminary treatment such as interval division, is that next step figure and data retrieval created NSC;
Step 3: graphic operation, carry out topological computing to the mask pattern information of domain;
Step 4: identification from the domain graph of a relation to the element graph of a relation, main points according to the component recognition table of the domain graph of a relation of bipolar integrated circuit and element graph of a relation operate automatically, and the domain graph of a relation of described bipolar integrated circuit and the component recognition table of element graph of a relation are meant:
(1) sub-piece of domain has: the e utmost point is contained in the b utmost point, and the b utmost point is contained in the c utmost point; The directed line segment of the fairlead h of the e utmost point points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of b utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of c utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation has been described a NPN triode;
(2) sub-pieces of domain have: the e utmost point is contained in the c utmost point, and the c utmost point is contained in the b utmost point; The directed line segment of e utmost point fairlead h points to P +The base, P +The directed line segment of base points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of b utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of c utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described a lateral PNP triode;
(3) sub-pieces of domain have: the b utmost point is contained in the e utmost point, and the c utmost point is extremely irrelevant with e on topology; The directed line segment of e utmost point fairlead h points to P +The base, P +The directed line segment in district points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of b utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; C utmost point fairlead h and e are extremely irrelevant, and then above element graph of a relation is described a longitudinal P NP triode;
(4) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base has another N simultaneously +The directed line segment of emitter region points to this P +Base, and this P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described an emitter open circuit diode;
(5) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; Another N is arranged simultaneously +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described an open collector diode;
(6) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to the I isolated area, and another directed line segment of p utmost point fairlead h points to the AL metal connecting line; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; AL metal connecting line and P +Base and N +Intersect the emitter region; Another directed line segment of electrodeless fairlead h points to the AL metal connecting line simultaneously, and then above element graph of a relation is described the diode of a B-C short circuit;
(7) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; Simultaneously, another directed line segment of p utmost point fairlead h points to the AL metal connecting line, and another directed line segment of electrodeless fairlead h also points to the AL metal connecting line; AL metal connecting line and P +Base and N +Intersect the emitter region, and then above element graph of a relation is described the diode of a B-E short circuit;
(8) sub-pieces of domain have: the directed line segment of n utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of p utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; In addition, the directed line segment of p utmost point fairlead h points to the AL metal connecting line; The directed line segment of electrodeless fairlead h points to the AL metal connecting line; AL metal connecting line and two N +Intersect the emitter region, and then above element graph of a relation is described the diode of a C-E short circuit;
(9) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described the diode of an independent BC knot;
(10) sub-pieces of domain have: p utmost point fairlead h and P +The base intersects, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; N utmost point fairlead h and P +The base intersects, and then above element graph of a relation is described a Zener diode;
(11) sub-pieces of domain have: the directed line segment of fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to P +The base; N +There are two directed line segments the emitter region, and one of them directed line segment points to P +The base, another directed line segment points to the I isolated area, and then above element graph of a relation is described a base channel resistance;
(12) sub-pieces of domain have: the directed line segment of fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to P +The base; P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described a base diffusion resistance;
(13) sub-pieces of domain have: the directed line segment of fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to N +The emitter region; N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described an emitter region diffusion resistance;
Step 5: extract various diodes, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
Step 6: extract various transistors, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
Step 7: extract various resistance, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
Step 8: result's output that bipolar integrated circuit domain and circuit diagram extract, the circuit information net table of output result for from bipolar integrated circuit domain information, extracting.
Effect of the present invention:
1, have versatility: the present invention is not only applicable to bipolar integrated circuit, because the MOS integrated circuit is simple than bipolar integrated circuit, therefore, technology of the present invention and method are applicable to various MOS integrated circuits after doing suitably to simplify fully, comprise NMOS, the integrated circuit of PMOS and CMOS technology, in other words, range of application of the present invention has contained all bipolar integrated circuits and MOS integrated circuit.
2, have careful property: in " domain graph of a relation " of the present invention and " the element graph of a relation " 13 kinds of situations carefully think out, careful, the various situations that can run into have now all been considered.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 is the type of separation of one of correlation figure between domain figure and the circuit element information in the bipolar integrated circuit: (a) domain graphical information, (b) element relation information;
Fig. 2 is two the crossing type of the correlation figure between domain figure and the circuit element information in the bipolar integrated circuit: (a) domain graphical information, (b) element relation information;
Fig. 3 is three the containing type of the correlation figure between domain figure and the circuit element information in the bipolar integrated circuit: (a) domain graphical information, (b) element relation information;
Fig. 4 for the correlation figure between domain figure in the bipolar integrated circuit and the circuit element information four be contained in type: (a) domain graphical information, (b) element relation information;
Fig. 5 is the multiple containing type of one of correlation figure between domain figure and the circuit element information in the bipolar integrated circuit: (a) domain graphical information, (b) element relation information;
Fig. 6 is the NPN triode type of one of component recognition figure of bipolar integrated circuit:
(a) domain graph of a relation, (b) element graph of a relation;
Fig. 7 is two the lateral PNP triode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Fig. 8 is three the longitudinal P NP triode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Fig. 9 is four the emitter open circuit diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 10 is five the open collector diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 11 is six the B-C short circuit diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 12 is seven the B-E short circuit diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 13 is eight the C-E short circuit diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 14 is nine the independent BC junction diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 15 is ten the Zener diode type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 16 is 11 the base channel resistance type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 17 is 12 the base diffusion resistance type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 18 is 13 the echo area diffusion resistance type of the component recognition figure of bipolar integrated circuit: (a) domain graph of a relation, (b) element graph of a relation;
Figure 19 is bipolar integrated circuit domain and circuit diagram identification and extraction block diagram.
(5) embodiment
As previously mentioned, in the design work of bipolar integrated circuit, its circuit identification is discerned and is extracted than the circuit of MOS integrated circuit with extraction, and its special difficulty is arranged.Because the complexity on bipolar integrated circuit technology is made, it generally need be through six times photoetching (buried, isolation, base, emitter region, fairlead and anti-carve etc.), four times diffusion (buried, isolation, base, emitter region etc.), and operation such as evaporation, extension.Complexity in this technology manufacturing has caused the complexity of domain, thereby the difficulty that causes discerning domain increases.Simultaneously, to the identification of bipolar integrated circuit domain, must investigate the feature of concrete element in domain.The various elements of identification will extract Useful Information exactly and be discerned from given each layer mask pattern from the panoramic figure of domain.
The present invention proposes " the domain graph of a relation " and " element graph of a relation " of bipolar integrated circuit, and set up mapping method between the two.
Still need and point out, content of the present invention is to be based upon on the basis of graph topology operation rule, has proposed a series of inner links of node, branch road topological relation in the mask pattern topological relation of bipolar integrated circuit and the circuit diagram.
Table 1 has disclosed the correlation between the domain figure and circuit element information in the bipolar integrated circuit.
Table 1. bipolar integrated circuit graph topology relation table (simultaneously referring to Fig. 1-5)
Type The domain graphical information The element relation information
Separate Referring to Fig. 1 (a) Referring to Fig. 1 (b)
Intersect Referring to Fig. 2 (a) Referring to Fig. 2 (b)
Comprise Referring to Fig. 3 (a) Referring to Fig. 3 (b)
Be contained in Referring to Fig. 4 (a) Referring to Fig. 4 (b)
Multiple comprising Referring to Fig. 5 (a) Referring to Fig. 5 (b)
More than five kinds of situations from the planar graph of domain, be summed up as:
(1) type of separation: A and B are irrelevant; (2) intersecting type: A and B intersects;
(3) containing type: A comprises B; (4) be contained in type: A is contained in B;
(5) multiple comprising: A comprises B, and B comprises C, multiple comprising.
More than (b) figure of five kinds of figures be the element graph of a relation that planar graph shone upon of domain.In view of the above, the inventor proposes the mapping table of " domain graph of a relation " and " element graph of a relation ", and this table is called the component recognition table of bipolar integrated circuit again, as shown in Table 2.In this table, the implication of relevant symbol is as follows:
I-isolated area figure
P +-base figure
N +-emitter region figure
H-fairlead figure
AL-metal connecting line figure
The present invention proposes: the domain of integrated circuit can be defined as a relation on S set: S={ buried layer, I isolated area, P from the viewpoint of mathematics +The district, N +The district, fairlead, line }
Above-mentioned domain graph of a relation, element graph of a relation and domain, part drawing are the corresponding relation that has one by one between them.Because buried layer is inoperative for the identification of component type, therefore, element graph of a relation of the present invention is by I isolated area, P +The district, N +The district, the node that fairlead and line are five types constitutes.
The component recognition table of table 2. bipolar integrated circuit (simultaneously referring to Fig. 6-18)
Numbering The domain graph of a relation The element graph of a relation The component type that obtains
1 Referring to Fig. 6 (a) Referring to Fig. 6 (b) The NPN triode
2 Referring to Fig. 7 (a) Referring to Fig. 7 (b) Horizontal NPN triode
3 Referring to Fig. 8 (a) Referring to Fig. 8 (b) Vertical NPN triode
4 Referring to Fig. 9 (a) Referring to Fig. 9 (b) Emitter open circuit diode
5 Referring to Figure 10 (a) Referring to Figure 10 (b) The open collector diode
6 Referring to Figure 11 (a) Referring to Figure 11 (b) B-C short circuit diode
7 Referring to Figure 12 (a) Referring to Figure 12 (b) B-E short circuit diode
8 Referring to Figure 13 (a) Referring to Figure 13 (b) C-E short circuit diode
9 Referring to Figure 14 (a) Referring to Figure 14 (b) Independent BC junction diode
10 Referring to Figure 15 (a) Referring to Figure 15 (b) Zener diode
11 Referring to Figure 16 (a) Referring to Figure 16 (b) The base channel resistance
12 Referring to Figure 17 (a) Referring to Figure 17 (b) The base diffusion resistance
13 Referring to Figure 18 (a) Referring to Figure 18 (b) The generator diffusion resistance
Referring to table,, two and Fig. 6-18, the technology contents of domain graph of a relation of the present invention and element graph of a relation is presented below:
(1) sub-piece of domain is if having: the e utmost point is contained in the b utmost point, and the b utmost point is contained in the c utmost point; The directed line segment of the fairlead h of the e utmost point points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of b utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of c utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation has been described a NPN triode.
(2) sub-pieces of domain are if having: the e utmost point is contained in the c utmost point, and the c utmost point is contained in the b utmost point; The directed line segment of e utmost point fairlead h points to P +The base, P +The directed line segment of base points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of b utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of c utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described a lateral PNP triode.
(3) sub-pieces of domain are if having: the b utmost point is contained in the e utmost point, and the c utmost point is extremely irrelevant with e on topology; The directed line segment of e utmost point fairlead h points to P +The base, P +The directed line segment in district points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of b utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; C utmost point fairlead h and e are extremely irrelevant, and then above element graph of a relation is described a longitudinal P NP triode.
(4) sub-pieces of domain are if having: the directed line segment of p utmost point fairlead h points to P +The base has another N simultaneously +The directed line segment of emitter region points to this P +Base, and this P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described an emitter open circuit diode.
(5) sub-pieces of domain are if having: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; Another N is arranged simultaneously +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described an open collector diode.
(6) sub-pieces of domain are if having: the directed line segment of p utmost point fairlead h points to the I isolated area, and another directed line segment of p utmost point fairlead h points to the AL metal connecting line; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; AL metal connecting line and P +Base and N +Intersect the emitter region; Another directed line segment of electrodeless fairlead h points to the AL metal connecting line simultaneously, and then above element graph of a relation is described the diode of a B-C short circuit.
(7) sub-pieces of domain are if having: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; Simultaneously, another directed line segment of p utmost point fairlead h points to the AL metal connecting line, and another directed line segment of electrodeless fairlead h also points to the AL metal connecting line; AL metal connecting line and P +Base and N +Intersect the emitter region, and then above element graph of a relation is described the diode of a B-E short circuit.
(8) sub-pieces of domain are if having: the directed line segment of n utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of p utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; In addition, the directed line segment of p utmost point fairlead h points to the AL metal connecting line; The directed line segment of electrodeless fairlead h points to the AL metal connecting line; AL metal connecting line and two N +Intersect the emitter region, and then above element graph of a relation is described the diode of a C-E short circuit.
(9) sub-pieces of domain are if having: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described the diode of an independent BC knot.
(10) sub-pieces of domain are if having: p utmost point fairlead h and P +The base intersects, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; N utmost point fairlead h and P +The base intersects, and then above element graph of a relation is described a Zener diode.
(11) sub-pieces of domain are if having: the directed line segment of fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to P +The base; N +There are two directed line segments the emitter region, and one of them directed line segment points to P +The base, another directed line segment points to the I isolated area, and then above element graph of a relation is described a base channel resistance.
(12) sub-pieces of domain are if having: the directed line segment of fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to P +The base; P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described a base diffusion resistance.
(13) sub-pieces of domain are if having: the directed line segment of fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to N +The emitter region; N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described an emitter region diffusion resistance.
With the bipolar integrated circuit component recognition table among the present invention, can in extracting, the domain of bipolar integrated circuit and circuit diagram make identification to various elements.Obviously, at first will convert known domain to corresponding domain graph of a relation, the domain graph of a relation of listing in this table is actually each the part subgraph in the whole bipolar integrated circuit domain, and whole domain is a complete overall pattern.All domain graphs of a relation (subgraph) and element graph of a relation are compared, just can determine all circuit elements, thereby accomplish identification and extract circuit diagram.
Fig. 1 has provided bipolar integrated circuit domain of the present invention and circuit diagram identification and the block diagram that extracts.
Referring to Fig. 1, bipolar integrated circuit domain of the present invention and circuit diagram identification are as follows with extracting method:
S 1Step: the layout data input, from the layout data information of external world's acquisition bipolar integrated circuit;
S 2Step: the data preliminary treatment to the data of input with figure sorts and preliminary treatment such as interval division, is that next step figure and data retrieval created NSC;
S 3Step: graphic operation, the mask pattern information of domain is carried out topological computing, wherein the computing figure choose strategy, step and method, will produce material impact to the speed and the efficient of circuit extraction;
S 4Step: the identification from the domain graph of a relation to the element graph of a relation operates automatically according to previous table two described main points about bipolar integrated circuit component recognition tables;
S 5Step: extract various diodes, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
S 6Step: extract various transistors, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
S 7Step: extract various resistance, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
S 8Step: result's output that bipolar integrated circuit domain and circuit diagram extract, the circuit information net table of output result for from bipolar integrated circuit domain information, extracting.
Those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.

Claims (4)

1, domain and the circuit diagram extracting method in a kind of bipolar integrated circuit design, its feature comprises:
Step 1: the layout data input, from the layout data information of external world's acquisition bipolar integrated circuit;
Step 2: the data preliminary treatment to the data of input with figure sorts and the preliminary treatment of interval division, is that next step figure and data retrieval created NSC;
Step 3: graphic operation, carry out topological computing to the mask pattern information of domain;
Step 4: identification from the domain graph of a relation to the element graph of a relation, main points according to the component recognition table of the domain graph of a relation of bipolar integrated circuit and element graph of a relation operate automatically, and the domain graph of a relation of described bipolar integrated circuit and the component recognition table of element graph of a relation are meant:
(1) sub-piece of domain has: the e utmost point is contained in the b utmost point, and the b utmost point is contained in the c utmost point; The directed line segment of the fairlead h of the e utmost point points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of b utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of c utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation has been described a NPN triode;
(2) sub-pieces of domain have: the e utmost point is contained in the c utmost point, and the c utmost point is contained in the b utmost point; The directed line segment of e utmost point fairlead h points to P +The base, P +The directed line segment of base points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of b utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of c utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described a lateral PNP triode;
(3) sub-pieces of domain have: the b utmost point is contained in the e utmost point, and the c utmost point is extremely irrelevant with e on topology; The directed line segment of e utmost point fairlead h points to P +The base, P +The directed line segment in district points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of b utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; C utmost point fairlead h and e are extremely irrelevant, and then above element graph of a relation is described a longitudinal P NP triode;
(4) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base has another N simultaneously +The directed line segment of emitter region points to this P +Base, and this P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described an emitter open circuit diode;
(5) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; Another N is arranged simultaneously +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described an open collector diode;
(6) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to the I isolated area, and another directed line segment of p utmost point fairlead h points to the AL metal connecting line; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; AL metal connecting line and P +Base and N +Intersect the emitter region; Another directed line segment of electrodeless fairlead h points to the AL metal connecting line simultaneously, and then above element graph of a relation is described the diode of a B-C short circuit;
(7) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; Simultaneously, another directed line segment of p utmost point fairlead h points to the AL metal connecting line, and another directed line segment of electrodeless fairlead h also points to the AL metal connecting line; AL metal connecting line and P +Base and N +Intersect the emitter region, and then above element graph of a relation is described the diode of a B-E short circuit;
(8) sub-pieces of domain have: the directed line segment of n utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of p utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of electrodeless fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area; In addition, the directed line segment of p utmost point fairlead h points to the AL metal connecting line; The directed line segment of electrodeless fairlead h points to the AL metal connecting line; AL metal connecting line and two N +Intersect the emitter region, and then above element graph of a relation is described the diode of a C-E short circuit;
(9) sub-pieces of domain have: the directed line segment of p utmost point fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to the I isolated area, and then above element graph of a relation is described the diode of an independent BC knot;
(10) sub-pieces of domain have: p utmost point fairlead h and P +The base intersects, P +The directed line segment of base points to the I isolated area; The directed line segment of n utmost point fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; N utmost point fairlead h and P +The base intersects, and then above element graph of a relation is described a Zener diode;
(11) sub-pieces of domain have: the directed line segment of fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to P +The base; N +There are two directed line segments the emitter region, and one of them directed line segment points to P +The base, another directed line segment points to the I isolated area, and then above element graph of a relation is described a base channel resistance;
(12) sub-pieces of domain have: the directed line segment of fairlead h points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to P +The base; P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described a base diffusion resistance;
(13) sub-pieces of domain have: the directed line segment of fairlead h points to N +The emitter region, N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area; The directed line segment of another fairlead h points to N +The emitter region; N +The directed line segment of emitter region points to P +The base, P +The directed line segment of base points to the I isolated area, and then above element graph of a relation is described an emitter region diffusion resistance;
Step 5: extract various diodes, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
Step 6: extract various transistors, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
Step 7: extract various resistance, operate automatically by the main points of above-mentioned bipolar integrated circuit component recognition table;
Step 8: result's output that bipolar integrated circuit domain and circuit diagram extract, the circuit information net table of output result for from bipolar integrated circuit domain information, extracting.
2, domain and the circuit diagram extracting method in the bipolar integrated circuit as claimed in claim 1 design is characterized in that the domain of described integrated circuit from the viewpoint of mathematics, being defined as a relation on S set: S={ buried layer, I isolated area, P +The district, N +The district, fairlead, line }.
3, domain and the circuit diagram extracting method in the bipolar integrated circuit design as claimed in claim 1 is characterized in that described element graph of a relation is by I isolated area, P +Base, N +The node that emitter region, fairlead h and AL metal connecting line are five types constitutes.
4, domain and the circuit diagram extracting method in the bipolar integrated circuit design as claimed in claim 1, it is characterized in that the domain graph of a relation of listing in the described component recognition table is meant each the part subgraph in the whole bipolar integrated circuit domain, whole domain is a complete overall pattern, all domains are concerned that subgraph and element graph of a relation compare, just can determine all circuit elements, thereby accomplish identification and extract circuit diagram.
CNB031154476A 2003-02-19 2003-02-19 Method for extracting layout/circuit in bipolar integrated circuit design Expired - Fee Related CN1298050C (en)

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Publication number Priority date Publication date Assignee Title
JPH07200643A (en) * 1993-12-28 1995-08-04 Fujitsu Ltd Layout data extracting method/device for semiconductor integrated circuit
JP2001298088A (en) * 2000-04-14 2001-10-26 Nec Corp Method for verifying layout data

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07200643A (en) * 1993-12-28 1995-08-04 Fujitsu Ltd Layout data extracting method/device for semiconductor integrated circuit
JP2001298088A (en) * 2000-04-14 2001-10-26 Nec Corp Method for verifying layout data

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