CN1282218C - Structure of superposition mark and method for forming same - Google Patents
Structure of superposition mark and method for forming same Download PDFInfo
- Publication number
- CN1282218C CN1282218C CN 03148238 CN03148238A CN1282218C CN 1282218 C CN1282218 C CN 1282218C CN 03148238 CN03148238 CN 03148238 CN 03148238 A CN03148238 A CN 03148238A CN 1282218 C CN1282218 C CN 1282218C
- Authority
- CN
- China
- Prior art keywords
- rete
- external label
- label
- mark
- stress
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The present invention provides a method for forming a folding mark. A material layer is firstly formed on a substrate, and a patterning material layer is formed into an outer mark. A first film layer is formed on the material layer, and a flatting step is carried out to remove a part of the first film layer. A second film layer is formed on the material layer to cover the first film layer, and the stress of the second film layer is different from the stress of the first film layer. The second film layer above the outer mark is removed, and an inner mark is formed at the inner periphery of the outer mark. Because the second film layer above the outer mark is removed, the condition that the nonuniform deposition thickness of the second film layer with high stress causes the wrong measurement of the folding mark can be avoided.
Description
Technical field
The structure that the invention relates to a kind of superimposed mark (Overlay Mark) with and forming method thereof, and particularly relevant for a kind of structure of the superimposed mark that amount of alignment sniffing mistake can take place when avoiding utilizing superimposed markers align in semiconductor technology with and forming method thereof.
Background technology
Usually determine the factor of lithography process (Photolithography Process) success or failure of a wafer, except the control of critical size (Critical Dimension), another important person is alignment accuracy (Alignment Accuracy).Therefore, the measurement of alignment accuracy, the measurement that is superimposed error is a ring important in the semiconductor technology, and superimposed mark is exactly the instrument that is used for measuring superimposed error, and it is to be used for judging between the rete before on the photoresist layer pattern of lithography process institute patterning and the wafer whether accurate the aligning is arranged.
Common superimposed mark can design the corner at wafer top wafer periphery, in order between the rete before on the photoresist layer pattern that measures this time lithography process institute patterning and the wafer whether accurate the aligning is arranged.
Fig. 1, it is the schematic top plan view that is known in a superimposed mark in the metal interconnecting technology; Shown in Fig. 2 A to Fig. 2 C, it is by the generalized section of I-I ' among Fig. 1.Please refer to Fig. 1 and Fig. 2 A, usually in metal interconnecting technology, can in substrate 100, form a dielectric layer 102 earlier, pattern dielectric layer 102 afterwards, to form contact window (not illustrating) in specific location, and become superimposed mark part to form irrigation canals and ditches pattern 104 in preboarding simultaneously, with usefulness as an external label (Outer Mark).
Afterwards, continue metal interconnecting technology, promptly on above-mentioned formed structure, form a metal tungsten layer, and insert in contact window and the irrigation canals and ditches 104, but because of the width of irrigation canals and ditches 104 reaches wide, therefore tungsten can not fill up irrigation canals and ditches 104 fully, utilizes chemical mechanical milling method to remove contact window and irrigation canals and ditches 104 metal tungsten layer outward afterwards, promptly forms the metal tungsten layer 106 that is formed among Fig. 2 A in the irrigation canals and ditches 104.
Then, please refer to Fig. 2 B, after forming contact window, can continue another metal level 108 of deposition on dielectric layer 102 and metal tungsten layer 106, and the back extended meeting is defined as lead with metal level 108.
Yet because of the stress (stress) of metal level 108 is bigger, therefore if stress direction is a label 110, formed metal level 108 has the uneven situation of deposit thickness at irrigation canals and ditches 104 places.In other words, metal level 108 thickness that are positioned on irrigation canals and ditches 104 two sides are also unequal.
Please refer to Fig. 1 and Fig. 2 C, on metal level 108, form the photoresist layer (not illustrating) of a patterning, the follow-up etch mask that is used as patterned metal layer 108 of this photoresist layer, particularly, this photoresist layer be formed at enclose the place in the external label photoresistance pattern 112 as an interior label (Inner Mark).
Afterwards, promptly carry out the measurement step of superimposed mark, wherein dotted line 114 is indicated in Fig. 2 C locates central point signal for 108 liang of corners of external label 104 upper metal layer (arrow indication part), and same dotted line 116 part that indicates is the central point signal at places, interior label 112 two edges (arrow indication part).By the signal 114 of external label 104 and the signal 116 of interior label 112, can judge promptly whether interior label has and aim at external label accurately, and then judge whether this time gold-tinted technology has the situation of aligning mistake, in other words, judged whether accurate the aligning by A among the figure with A ' numerical value.
Yet, can see that in Fig. 2 C because of the event of metal level 108 stress, the thickness that is deposited in the irrigation canals and ditches 104 is also inhomogeneous.So, the signal 114 that also will cause metal level 108 to be produced produces skew, and in other words, it is not to show groove 104 central point parts that signal 114 produces part.But be that interior label 112 have with external label 104 aim at by A and the judged result of A ' this moment, yet, in fact if this time gold-tinted technology has produced skew, and is therefore follow-up during with this photoresist layer definition metal level 108, will cause contact window accurately to aim at lead.
Summary of the invention
Therefore the purpose of the present invention structure that just provides a kind of superimposed mark with and forming method thereof, to solve the known situation that heavily stressed rete can cause the amount of alignment dendrometry mistake of superimposed mark that has.
The present invention proposes a kind of method that forms superimposed mark, and the method at first forms a material layer in a substrate, and is patterned in material layer, and to form an external label, it can be ditching type external label or convex type external label.Then, on material layer, form one first rete, and carry out a planarisation step, to remove part first rete.Afterwards, form one second rete on material layer, and cover first rete, wherein the stress of second rete is different with the stress of first rete, and particularly the stress of second rete is greater than the stress of first rete.Remove second rete of external label top afterwards, or remove external label top and external label in all second retes of enclosing, in external label, enclose the place afterwards again and form an interior label.
The present invention proposes a kind of structure of superimposed mark, its be by an external label and be configured in external label in the interior label that encloses constituted, wherein, external label can be ditching type external label or convex type external label.And externally the side-walls of mark is formed with one first rete, and externally the zone beyond the mark is coated with one second rete, and the stress of the stress of first rete and second rete is inequality.In addition, interior label is configured on second rete that encloses in the external label.In another preferred embodiment, except the top of external label is not coated with second rete, externally mark in enclose and all be not coated with second rete, interior label is configured in and encloses the place in the external label.
Because the present invention removes second rete on the external label, even also removes second rete that encloses in the external label, so external label will can not be subjected to the influence of heavily stressed second rete fully, and the problem that produces error that measures of aiming at is arranged.
Description of drawings
Fig. 1 is the schematic top plan view of a superimposed mark in the metal interconnecting technology;
Fig. 2 A to Fig. 2 C is the flow process generalized section that forms superimposed mark in the known metal interconnecting technology;
Fig. 3 A to Fig. 3 G is the flow process generalized section according to the superimposed mark of formation of a preferred embodiment of the present invention;
Fig. 4 is the schematic top plan view of Fig. 3 E;
Fig. 5 is the generalized section according to the superimposed mark of another preferred embodiment of the present invention;
Fig. 6 is the generalized section according to the superimposed mark of another preferred embodiment of the present invention;
Fig. 7 is the generalized section according to the superimposed mark of another preferred embodiment of the present invention;
Fig. 8 is the generalized section according to the superimposed mark of another preferred embodiment of the present invention;
Fig. 9 is the generalized section according to the superimposed mark of another preferred embodiment of the present invention.
100: substrate
102; Dielectric layer
104,104a: external label
106,108,108a: metal level
110: stress direction
112: interior label
114,116,202,204: signal
112a, 200: photoresist layer
Embodiment
Superimposed mark of the present invention with and forming method thereof be to remove with having heavily stressed rete on the superimposed mark, to avoid heavily stressed rete inhomogeneous because of deposit thickness, and the aligning measurement that causes superimposed mark has the situation of skew, and aiming between this time gold-tinted technology and the wafer anterior layer rete slipped up.Below be that structure of exemplifying the superimposed mark in the metal interconnecting technology and forming method thereof explains, but superimposed mark of the present invention is not only to be defined in the metal interconnecting technology, in other processing step, have heavily stressed rete and the aligning of superimposed mark measured cause harmful effect person all suitable.
Fig. 1 is the schematic top plan view according to a superimposed mark of a preferred embodiment of the present invention; Fig. 3 A to Fig. 3 G is the flow process generalized section according to the formation one superimposed mark of a preferred embodiment of the present invention, and it is by the profile of I-I ' among Fig. 1.
Please refer to Fig. 1 and Fig. 3 A, in metal interconnecting technology, at first deposition one dielectric layer 102 in substrate 100 carries out a lithography process and an etch process afterwards, with pattern dielectric layer 102, and forms contact window (not illustrating) in dielectric layer 102.At the same time, can on wafer, preboarding become superimposed mark part to form irrigation canals and ditches pattern 104, with usefulness as an external label.In a preferred embodiment, the external label of superimposed mark is to surround a rectangle by four irrigation canals and ditches patterns 104 to be constituted, and the width of irrigation canals and ditches pattern 104 is much larger than the width of contact window.
Please refer to Fig. 3 B, deposition layer of metal layer 105 on dielectric layer 102, this metal level 105 can be inserted in contact window and the irrigation canals and ditches 104, yet, because of the width of contact window width much smaller than irrigation canals and ditches 104, therefore contact window can be filled up by metal level 105, and irrigation canals and ditches 104 can not filled up by metal level 105.
Please refer to Fig. 3 C, carry out a chemical mechanical milling tech, to remove contact window metal level 105 in addition to form a plug structure (not illustrating), at the same time, also the metal level 105 beyond the irrigation canals and ditches 104 can be removed, and retain metal level 106 in the irrigation canals and ditches 104, and metal level 106 can not fill up irrigation canals and ditches 104.
Please refer to Fig. 3 D, after forming contact plunger, another layer of deposition metal level 108 on dielectric layer 102, back extended meeting is defined as metal level 108 conductor structure that is connected with contact plunger.And formed metal level 108 mark part externally also can be inserted in the irrigation canals and ditches 104, covers metal level 106, and because of the width of irrigation canals and ditches 104 is enough big, so metal level 108 also can not fill up irrigation canals and ditches 104.
Yet, because of the stress of metal level 108 is different with the stress of metal level 106, particularly, the stress of metal level 108 is greater than the stress of metal level 106, therefore formed metal level 108 will be subjected to the influence of stress direction 110, and the uneven situation of deposit thickness is arranged.In other words, metal level 108 thickness that are positioned on irrigation canals and ditches 104 two sides are also unequal.And the factor that causes metal level 108 deposit thickness inequalities may be the stress influence that difference caused, the stress influence that architectural difference caused between two retes, the stress influence that bond caused between two retes of depositing temperature between two retes or stress influence that the accumulation of many factors forms or the like.
Please refer to Fig. 3 E, in order to eliminate metal level 108 situations that cause the measurement generation skew of follow-up superimposed mark in uneven thickness, the present invention removes the metal level 108 of superimposed mark, the method that removes for example is the photoresist layer 200 that forms a patterning on metal level 108, expose superimposed mark part on the wafer, its vertical view as shown in Figure 4.Afterwards, please refer to Fig. 3 F, is that etch mask carries out an etching step with photoresist layer 200, removes the metal level 108 that is not covered by photoresist layer 200, forming metal level 108a, it exposes the dielectric layer 102 that encloses in the external label and the metal level 106 in the irrigation canals and ditches 104.
Please refer to Fig. 1 and Fig. 3 G, remove photoresist layer 200, then, become lead in order to define metal level 108, carry out a gold-tinted technology, and form the photoresist layer 112a of patterning in the top of substrate 100, wherein this photoresist layer 112a is positioned at superimposed mark encloses on the wafer photoresistance pattern 112 usefulness as an interior label.
Afterwards, carry out the measurement step of superimposed mark, in Fig. 3 G, dotted line 202 part that indicates be the metal level 106 of external label 104 tops in two corners the central point signal of (arrow indication part), same dotted line 204 part that indicates is the central point signal at places, interior label 112 two edges (arrow indication part).By the signal 202 of external label 104 and the signal 204 of interior label 112, can judge promptly whether interior label has to aim at external label accurately, and then judge whether this time gold-tinted technology has the situation of aligning mistake.It for example is to judge whether aligning mistake by B among the figure and B ' numerical value.
What is particularly worth mentioning is that among above-mentioned Fig. 3 E to Fig. 3 F, the step that removes metal level 108 can also only remove the metal level 108 in the irrigation canals and ditches 104, and keep external label peripheral and in enclose the metal level 108a at place, as shown in Figure 5.The metal level 108 that also is about to part in uneven thickness removes, and can eliminate to cause the true problem of amount of alignment indeterminacy because of thicknesses of layers is inhomogeneous.
Formerly in the step, remove owing to will cause aligning to measure the metal level 108 that produces skew earlier in the external label, therefore the position that can show irrigation canals and ditches 104 accurately by the obtained signal 202 of external label at this moment.Thus, if having between external label and the interior label accurately, represent that promptly contact hole can aim at accurately with follow-up formed lead on time.
Be to be that example explains in the above description with the metal level that in metal interconnecting technology, utilizes chemical mechanical milling method to remove beyond the contact window, certainly, if the metal interconnecting technology of utilizing etch back process to remove contact window metal level in addition also is applicable to the present invention, its icon as shown in Figure 6.In Fig. 6, if with etch back process substituted chemistry mechanical milling tech (step of corresponding previous Fig. 3 B), then only can retain the metal level 106a that is positioned at its side-walls in the irrigation canals and ditches 104, in other words, the metal level of irrigation canals and ditches 104 bottoms also can be etched back carving technology in the lump and remove, and other processing step is all same as the previously described embodiments.Therefore, the structure of the superimposed mark in Fig. 6, except metal level 106a covering was not arranged at the bottom at irrigation canals and ditches 104, externally (being in the irrigation canals and ditches 104) and the Nei Weichu of external label 104 were not coated with metal level 108a on the mark 104.
Same, the metal interconnecting technology of utilizing etch back process of Fig. 6, it can also only remove metal level 108 irrigation canals and ditches 104 in the step that removes metal level 108, and keep the external label periphery and in enclose the metal level 108a at place, as shown in Figure 7.In Fig. 7, externally on the mark 104 (being in the irrigation canals and ditches 104) is not coated with metal level 108a, causes the true problem of amount of alignment indeterminacy because of thicknesses of layers is inhomogeneous so as to eliminating on the external label 104.
In each above embodiment, external label is to be that example explains with the ditching type external label.External label can also be the convex type external label, as shown in Figure 8 but in fact.In Fig. 8, have external label 104a in the dielectric layer 102, and external label 104a is a raised design.Particularly, externally the Nei Weichu of mark 104a top and external label 104a is not coated with metal level 108a.
In addition, it can be that externally mark 104a is not coated with metal level 108a that the design with superimposed mark of convex type external label comes, and externally place, the periphery of mark 104a and in enclose the place and all still be coated with metal level 108a, as shown in Figure 9.
Above explanation is that the superimposed mark with metal interconnecting technology explains, but superimposed mark of the present invention and forming method thereof is not to be limited in the metal interconnecting technology.In other words, dielectric layer 102 can be other material, for example be electric conducting material, silicon materials or the like, and metal level 106 or 106a and metal 108 can also be other material, for example is dielectric material, silicon materials or the like.
Because the present invention removes the heavily stressed metal level on the external label, even also all removes the heavily stressed metal level that encloses in the external label, so external label will can not be subjected to the influence of heavily stressed metal level fully, and the wrong problem that produces that measures of aiming at is arranged.
Claims (10)
1. method that forms superimposed mark is characterized in that this method comprises:
In a substrate, form a material layer;
This material layer of patterning is to form an external label;
On the surface of this material layer, form one first rete;
Carry out a planarisation step, to remove this first rete of part;
Form one second rete on this material layer, cover this first rete, wherein the stress of this second rete is different with the stress of this first rete;
Remove this second rete of this external label top; And
In this external label, enclose and form an interior label.
2. the method for the superimposed mark of formation as claimed in claim 1 is characterized in that, the step that removes this second rete of this external label top comprises that more this second rete that encloses that will be positioned at this external label all removes.
3. the method for the superimposed mark of formation as claimed in claim 2 is characterized in that, remove this external label top and this external label in the method for this second rete of enclosing comprise:
On this second rete, form a patterning photoresist layer, expose to should external label and this external label in the zone of enclosing; And
Carry out an etching step, to remove this second rete that is not covered by this photoresist layer.
4. the method for the superimposed mark of formation as claimed in claim 1 is characterized in that, this external label is a ditching type external label or a convex type external label.
5. the method for the superimposed mark of formation as claimed in claim 1 is characterized in that, this planarisation step comprises that carrying out a chemical mechanical milling method technology is to carry out an etch back process.
6. the method for the superimposed mark of formation as claimed in claim 1 is characterized in that the stress of this second rete is greater than the stress of this first rete.
7. the structure of a superimposed mark is characterized in that, this structure comprises:
One external label; And
One interior label, be configured in this external label in enclose,
Wherein, side-walls in this external label is formed with one first rete, and the zone beyond this external label is coated with one second rete, and the stress of the stress of this first rete and this second rete is inequality, in addition, this interior label is configured on this second rete that encloses in this external label.
8. the structure of superimposed mark as claimed in claim 7 is characterized in that, except the top of this external label is not coated with this second rete, encloses in this external label all not to be coated with this second rete.
9. the structure of superimposed mark as claimed in claim 7 is characterized in that, this external label is a ditching type external label or a convex type external label.
10. the structure of superimposed mark as claimed in claim 7 is characterized in that, the stress of this second rete is greater than the stress of this first rete.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03148238 CN1282218C (en) | 2003-07-03 | 2003-07-03 | Structure of superposition mark and method for forming same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03148238 CN1282218C (en) | 2003-07-03 | 2003-07-03 | Structure of superposition mark and method for forming same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1567532A CN1567532A (en) | 2005-01-19 |
| CN1282218C true CN1282218C (en) | 2006-10-25 |
Family
ID=34472232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03148238 Expired - Fee Related CN1282218C (en) | 2003-07-03 | 2003-07-03 | Structure of superposition mark and method for forming same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1282218C (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103165442B (en) * | 2011-12-12 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | Back-patterned method |
| US8908181B2 (en) * | 2012-06-28 | 2014-12-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Overlay mark and method of measuring the same |
| CN112563151A (en) * | 2021-03-01 | 2021-03-26 | 晶芯成(北京)科技有限公司 | Overlay precision measuring method |
-
2003
- 2003-07-03 CN CN 03148238 patent/CN1282218C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN1567532A (en) | 2005-01-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7485975B2 (en) | Alignment error measuring mark and method for manufacturing semiconductor device using the same | |
| CN101047165B (en) | Overlay mark arrangement for reducing overlay shift | |
| CN1282218C (en) | Structure of superposition mark and method for forming same | |
| CN1226077A (en) | Method for manufacturing semiconductor device | |
| CN1293604C (en) | Structure of superposition mark and method for forming same | |
| US20230106533A1 (en) | Process and structure of overlay offset measurement | |
| CN1905153A (en) | Method for reducing wafer harm caused by shallow slot insulation chemical mechanical polishing technique | |
| CN102097303B (en) | Photolithographic process for thick metal | |
| KR970010569B1 (en) | Fabrication method of semiconductor device | |
| US6399259B1 (en) | Method of forming alignment marks for photolithographic processing | |
| CN114823626A (en) | Test structure, forming method thereof and alignment precision detection method | |
| CN113394198A (en) | Photoetching alignment mark and forming method thereof | |
| CN1231501A (en) | Semiconductor device and making process thereof | |
| CN113539797B (en) | Semiconductor device and method for manufacturing the same | |
| KR100843889B1 (en) | Measurement marks of Semiconductor devices and Method for forming the same | |
| KR100579852B1 (en) | Method for fabricating metal pattern to prevent form alignment mark shift phenomenon | |
| US20090311844A1 (en) | Alignment mark and method for fabricating the same and alignment method of semiconductor | |
| KR19990006078A (en) | Method of forming overlay measurement mark of semiconductor device | |
| TW594448B (en) | Overlay mark and method for making the same | |
| KR100847638B1 (en) | Overlay mark of semiconductor apparatus and its forming method | |
| KR100868634B1 (en) | Semiconductor device and manufacturing method of semiconductor device | |
| KR100469910B1 (en) | A exposure mask and A method for forming a semiconductor device | |
| KR20040057634A (en) | Method for forming align vernier | |
| KR100293268B1 (en) | Pressure sensor and method for fabricating the same | |
| KR950001756B1 (en) | Manufacturing method of multi-layer wiring of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20061025 Termination date: 20190703 |