CN1262067C - Internal electric power starting resetting circuit and method adapted to lower voltage chip - Google Patents
Internal electric power starting resetting circuit and method adapted to lower voltage chip Download PDFInfo
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- CN1262067C CN1262067C CN 03123849 CN03123849A CN1262067C CN 1262067 C CN1262067 C CN 1262067C CN 03123849 CN03123849 CN 03123849 CN 03123849 A CN03123849 A CN 03123849A CN 1262067 C CN1262067 C CN 1262067C
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Abstract
The present invention discloses a power supply starting resetting circuit and a method thereof. The power supply starting resetting circuit comprises a power supply, an oscillator, a frequency detector and a resetting signal output circuit, wherein the power supply provides transience voltage, the oscillator generates oscillation frequency increasing with the raising process of the transience voltage, the frequency detector converts the oscillation frequency to first output voltage, and the resetting signal output circuit outputs a resetting signal according to the first output voltage.
Description
(1) technical field
The relevant a kind of power initiation reset circuit (Power-On Reset Circuit) of the present invention, the interior power initiation reset circuit and the method for especially relevant a kind of low voltage chip.
(2) background technology
General power initiation is reset two kinds of methods is arranged, and a kind of is to utilize resistance capacitance sluggishness (RC delay) to realize, please referring to Fig. 1 circuit diagram and Fig. 2 associated voltage clock pulse figure; Another kind is to utilize the critical voltage of aggressive device (activedevice) to trigger, please referring to Fig. 3 circuit diagram and Fig. 4 associated voltage clock pulse figure.Be the power initiation reset circuit that utilizes the resistance capacitance sluggishness as shown in Figure 1, comprise a resistance capacitance divider 11, a comparator 12, a voltage source V DD, one become fixed ratio with the voltage swing of voltage source V DD output input voltage α VDD, a reset signal Reset and an earth terminal 13.Wherein, this resistance capacitance divider 11 further comprises the resistance 111 of a voltage divider, the electric capacity 112 of a voltage divider and the output voltage V RC of a voltage divider.This comparator 12 is the output voltage V of this input voltage α VDD and this voltage divider relatively
RC, when making V because of the resistance capacitance hysteresis at the beginning
RCDuring＜α VDD, this comparator will produce the reset signal Reset of a high potential (high), until V
RCDuring＞=α VDD, this moment, this comparator produced the reset signal Reset of an electronegative potential (low), and finished to reset.Clock pulse figure by Fig. 2 can find out that when power initiation, voltage source V DD exports a transient voltage, and its size is increased in time by 0 beginning.At the beginning, work as V
RCDuring＜α VDD, this comparator will produce the reset signal Reset of a high potential (high), when from V
RC＜α VDD is transformed into V
RCThe moment of＞=α VDD, reset signal also changes electronegative potential into by high potential.Be for utilizing the power initiation reset circuit of resistance metal oxide semiconductor voltage divider as shown in Figure 3, comprise a resistance metal oxide semiconductor voltage divider 21, a comparator 22, a voltage source V DD, one become fixed ratio with the voltage of voltage source V DD output input voltage α VDD, a reset signal Reset and an earth terminal 23, wherein this resistance metal oxide semiconductor voltage divider 21 further comprises the resistance 211 of a voltage divider, the metal-oxide semiconductor (MOS) 212 of a voltage divider and the output voltage V of a voltage divider
ThThis comparator 22 is used for the relatively output voltage V of this input voltage α VDD and this resistance metal oxide semiconductor voltage divider
Th, as the critical voltage V of the metal-oxide semiconductor (MOS) 212 of voltage divider
ThDuring＞α VDD, this comparator 22 can produce the reset signal Reset of a high potential (high), and works as V
Th＜=α VDD, 22 reset signal Reset that produce an electronegative potential (low) of this comparator, and finish to reset.Clock pulse figure by Fig. 4 can find out that when power initiation, voltage source V DD exports a transient voltage, and its size is increased in time by 0 beginning.At the beginning, work as V
ThDuring＞α VDD, this comparator will produce the reset signal Reset of a high potential (high), when from V
Th＞α VDD is transformed into V
Th＜=α VDD moment, reset signal also changes electronegative potential into by high potential.But still there is its shortcoming in above-mentioned known techniques, existing division is as follows: the mode of utilizing resistance capacitance sluggishness (RCdelay), usually need plug-in capacitor just can obtain enough big sluggishness (delay) time, and the mode of utilizing aggressive device (active device) to trigger as the critical voltage of metal-oxide semiconductor (MOS), then the size of critical voltage is at an easy rate owing to difference (process variation), variation of ambient temperature and other conditions of processing procedure change.So the condition of signal ended is also inconsistent, and can change along with the change of environmental condition.Like this, the mistake that can cause reset signal to finish or too early finish.When low more operating voltage, the operating voltage of voltage source V DD output is more little, and then when power initiation, the variation of transient voltage is just more little, and therefore tolerable threshold voltage variations is just more little.Therefore known power initiation reset circuit also is not suitable for low-work voltage.
(3) summary of the invention
Main purpose of the present invention is to provide a kind of interior power initiation reset circuit of chip that is applicable to low-voltage, this reset circuit can be applicable under the low-work voltage, and the not difference of reason processing procedure (processvariation) or variations in temperature and produce the misoperation of the action of resetting behind the power initiation.
Another main purpose of the present invention is to provide a kind of interior power initiation reset circuit of chip that is applicable to low-voltage, this circuit utilizes the conducting of the Characteristics Control diverter switch that frequency of oscillation that ring-type oscillator (Ring Oscillator) provides raises with transient voltage, make capacitor charge and discharge, conversion produces first voltage, compare through one second voltage that voltage divider produces in this transient voltage, determine whether to reset this circuit.
According to conception of the present invention, a kind of power initiation (power on) reset circuit is provided, comprise: a power supply, wherein, when this power initiation, be used to provide a transient voltage, the value of this transient voltage is to raise in time; One oscillator is electrically connected on this power supply, and this oscillator is to be used to produce an oscillator signal, and wherein, the frequency of oscillation of this oscillator signal is to increase with this transient voltage; One frequency detector is electrically connected on this power supply and this oscillator, and this frequency detector is to be used to receive this oscillator signal and to export corresponding one first output voltage in view of the above; And a reset signal output circuit, be electrically connected on this frequency detector, be used to receive this first output voltage and export a reset signal in view of the above.
Another conception according to the present invention, a kind of power initiation remapping method is provided, use a power initiation reset circuit, this power initiation reset circuit comprises an oscillator, a frequency detector and a comparator, it is characterized in that, this method comprises the following step: when power initiation, provide a transient voltage, wherein the value of this transient voltage is to increase in time; Provide a corresponding oscillator signal according to this transient voltage, wherein, the frequency of oscillation of this oscillator signal increases with the rising gradually of this transient voltage; Export corresponding one first output voltage according to this oscillator signal; Relatively this first output voltage and one second output voltage; And, export a reset signal according to the comparative result of this first and second output voltage.
For clearer understanding purpose of the present invention, characteristics and advantage, preferred embodiment of the present invention is elaborated below in conjunction with accompanying drawing.
(4) description of drawings
Fig. 1 is for using the power initiation reset circuit schematic diagram of resistance capacitance sluggishness;
Fig. 2 is the associated voltage clock pulse figure for the power initiation reset circuit that uses the resistance capacitance sluggishness;
Fig. 3 is for using the power initiation reset circuit schematic diagram of metal-oxide semiconductor (MOS) critical voltage;
Fig. 4 is the associated voltage clock pulse figure for the power initiation reset circuit that uses the metal-oxide semiconductor (MOS) critical voltage;
Fig. 5 is a kind of power initiation reset circuit schematic diagram for preferred embodiment of the present invention; And
Fig. 6 is the associated voltage clock pulse figure for a kind of power initiation reset circuit of preferred embodiment of the present invention.
(5) embodiment
Please referring to Fig. 5, operation principles of the present invention is to utilize an oscillator 31 and frequency detector 32 to cooperate comparator circuit 33 to produce reset signal Reset to have the digital circuit (not shown) of low-work voltage on the chip of resetting.Wherein, the frequency of the oscillator signal ck of oscillator 31 outputs is relevant with the size of transient voltage.So the present invention is during by power initiation, the magnitude variations of transient voltage VDD decides the frequency of the oscillator signal ck of oscillator 31 outputs and then the state of control reset signal Reset.Because its mode of operation of circuit proposed by the invention is not influenced by low-work voltage, so be applicable to the situation of low-work voltage.
Circuit framework of the present invention as shown in Figure 5, this circuit comprises an oscillator 31, frequency detector 32, a voltage source V DD, a comparator circuit 33 and an earth terminal 34.Wherein this oscillator 31 is to comprise one at least three reverser that above odd number is contacted each other 311 and a feedback circuit 312 is electrically connected on the output of last reverser and the input of first reverser.Wherein, each inverter couples with VDD all respectively.This oscillator 31 also can produce an oscillator signal ck.This frequency detector 32 is to be electrically connected on a voltage source V DD and to comprise a current source 321, one first electric capacity 322, one second electric capacity 323, one first switch 324 and a second switch 325.This frequency detector 32 can be exported one first output voltage V according to this oscillator signal ck that this oscillator 31 is produced
FDWherein this current source 321 is electrically connected on this voltage source V DD, this first electric capacity 322, comprise output and one second end ground connection 34 that one first end is electrically connected this current source 321, this second electric capacity 323 holds 34 altogether with this first electric capacity 322, this first switch 324 is to be electrically connected first end of this first electric capacity 322 and the other end of this second electric capacity 323, and this second switch 325 is to be connected in parallel with this second electric capacity 323.Wherein this comparator circuit 33 comprises a resitstance voltage divider 331, a comparator 332.Resitstance voltage divider 331 is to be electrically connected on a voltage source V DD, and can be with first resistance 3311 of this resitstance voltage divider 311 and second resistance 3312 producing second an output voltage α VDD who becomes fixed ratio with this voltage source V DD, this comparator 332 is in order to this first output voltage V relatively
FDWith this second output voltage α VDD, when this first output voltage V
FDDuring greater than this second output voltage α VDD, this comparator 332 produces the reset signal Reset (H) of a high potential; When this first output voltage V
FDWhen being less than or equal to this second output voltage α VDD, this comparator 332 produces an electronegative potential reset signal Reset (L).
In this preferred embodiment, when power initiation, voltage source V DD can export transient voltage, and its size is increased in time by 0 beginning.Its frequency of oscillation of oscillator signal ck of this oscillator 31 can rise with transient voltage and increase.And its frequency of oscillation also can reduce along with the number of serial connection inverter in the oscillator 31.Event is by the size of the transient voltage of these inverters of control input, and the number of serial connection inverter, can determine the frequency of oscillation of the oscillator signal ck of oscillator 31 outputs.In frequency detector 32, the switching of its first switch 324 and second switch 325 is to control by oscillator signal ck.And the state of first switch 324 is the opposite states with second switch.Promptly when first switch 324 was connection (ON), second switch 325 was disconnection (OFF), otherwise when first switch 324 was OFF, second switch 325 was ON.Because oscillator signal ck vibrates according to a frequency of oscillation, so the ON/OFF state of first switch 324 and second switch 325 is the switchings that replace for carrying out along with the frequency of oscillation of this oscillator signal ck, and the switching state of first switch 324 and second switch 325 has nothing in common with each other.In the realization of circuit, being equivalent to first switch 324 is to switch according to oscillator signal ck, and first switch 324 then switches according to the inversion signal of oscillator signal ck, as shown in Figure 5.The first/the second electric capacity 322,323 that has a current source 321 and two parallel connections in the frequency detector 32.When the ON/OFF state of first switch 324 and second switch 325 is when carrying out switching alternately along with the frequency of oscillation of this oscillator signal ck, then current source 321 can discharge and recharge the first/the second electric capacity 322,323 respectively according to the ON/OFF state of first switches 324 and second switch 325.When the frequency of oscillation of oscillator signal ck hour, the time that the first/the second electric capacity 322,323 discharges and recharges at every turn is longer, this moment first output voltage V
FDSize can be near transient voltage VDD.When the frequency of oscillation of oscillator signal ck was big, the time that the first/the second electric capacity 322,323 discharges and recharges at every turn was shorter, this moment first output voltage V
FDCan be less than transient voltage VDD, and reduce along with the increase of the frequency of oscillation of oscillator signal ck.If if a current value of this current source 321 is I in this frequency detector 32, and a capacitance of this first electric capacity 322 is C1, one capacitance of this second electric capacity 323 is C2, and the frequency of oscillation of this oscillator signal ck is fck, then first output voltage V that produced of this frequency detector 32
FDSize be V
FD=(I/fck). ((2.C1+C2)/(C1.C2)).
Can learn first output voltage V of this frequency detector 32 by above-mentioned formula
FDBe inversely proportional to the frequency of oscillation fCK of frequency of oscillation ck, when the value fck of frequency of oscillation ck is high more, first output voltage V
FDWill be low more.
The operation principle of comparator circuit 33 and mode of operation are approximate with known techniques, please refer to the corresponding description of preamble, repeat no more in this.
Be noted that in the present invention, comparator circuit 33 can also be realized by an inverter.Inverter receives this first output voltage V
FD, and according to this first output voltage V
FDSize decide the position of reset signal of output accurate.When power supply just starts, this first output voltage V
FDValue less than the default critical value of inverter, at this moment, inverter is with this first output voltage V
FDBe considered as a low level signal, and the reset signal Reset (H) of anti-phase output one high levels.And along with this first output voltage V
FDValue increase in time, when this first output voltage V
FDValue during greater than the default critical value of inverter, inverter is with this first output voltage V
FDBe considered as a high levels signal, and the reset signal Reset (H) of anti-phase output one low level.Compare with aforesaid comparator circuit 33, use the advantage of inverter to be that circuit is simpler, do not need to utilize electric resistance partial pressure to produce second output voltage.But shortcoming is to switch reset signal as comparator circuit 33 accurately.
Among this embodiment, the operation principle of this power initiation reset circuit 3 sees also Fig. 6.Because the oscillator signal ck of oscillator 31 outputs, its frequency of oscillation is relevant with the size of transient voltage VDD.When transient voltage VDD is low, the oscillator signal ck of oscillator 31 outputs, its frequency of oscillation fCK is also lower.By the first above-mentioned output voltage V
FDFormula as can be known, first output voltage V
FDCan be near VDD, so first output voltage V
FDCan be greater than α VDD.When first output voltage V
FDDuring greater than α VDD, the output of comparator 332 is reset signal Reset (H) of a high potential (high), and the digital circuit that need be reset on this chip this moment promptly is in replacement (reset) state.And along with transient voltage VDD rises, the frequency of oscillation fck of oscillator signal ck uprises, at this moment, and first output voltage V
FDJust can descend gradually.When dropping to when being less than or equal to α Vdd, the output of comparator 332 will become the reset signal Reset (L) of an electronegative potential (go low), and just reset (reset) finishes, and this moment, digital circuit just can be started working.During actual the use, the current source 321 in the above circuit can replace with resistance, and the also available general reverser of comparator 332 replaces, and makes this circuit can be than low-work voltage work, and characteristic still meets demand.
As previously mentioned, the present invention has improved many shortcomings of relevant power initiation reset circuit known techniques.As utilized the mode of resistance capacitance sluggishness (RC delay) in the past, usually need plug-in capacitor just can obtain enough big sluggishness (delay) time, and the mode of utilizing aggressive device (active device) to trigger as the critical voltage of metal-oxide semiconductor (MOS), then be easy to owing to processing procedure difference (process variation) and variations in temperature change the condition that reset signal switches the mistake that causes reset signal to finish or too early finish.The present invention be except can improving many shortcomings of above-mentioned known circuit, and can be in the environment operate as normal of low-work voltage.
Claims (10)
1. a power initiation reset circuit is characterized in that, comprises:
One power supply is used for providing a transient voltage when this power initiation, and the value of this transient voltage is to raise in time;
One oscillator is electrically connected on this power supply in order to produce an oscillator signal, and the frequency of oscillation of this oscillator signal is to increase with this transient voltage;
One frequency detector is electrically connected on this power supply and this oscillator, in order to receive this oscillator signal and to export corresponding one first output voltage in view of the above; And
One reset signal output circuit is electrically connected on this frequency detector, in order to receive this first output voltage and to export a reset signal in view of the above.
2. power initiation reset circuit as claimed in claim 1 is characterized in that, this oscillator be a ring-type oscillator and a voltage controlled oscillator the two one of.
3. power initiation reset circuit as claimed in claim 1 is characterized in that, this frequency detector comprises:
One current source is electrically connected on this power supply;
One first electric capacity comprises output and one second end ground connection that one first end is electrically connected this current source;
One second electric capacity and this first electric capacity are held altogether;
One first switch is to be electrically connected first end of this first electric capacity and the other end of this second electric capacity; And
One second switch is to be connected in parallel with this second electric capacity;
Wherein, first end of this first electric capacity is in order to export this first output voltage.
4. device as claimed in claim 3, it is characterized in that, this first switch and this second switch are the states that decides this first switch and this second switch according to this oscillator signal, when this first switch is connection, this second switch is for disconnecting, and when this first switch was disconnection, this second switch was for connecting.
5. power initiation reset circuit as claimed in claim 3 is characterized in that, the size of this first output voltage is that the frequency of oscillation with this oscillator signal is inversely proportional to.
6. power initiation reset circuit as claimed in claim 3 is characterized in that, this current source is a resistance.
7. power initiation reset circuit as claimed in claim 1, it is characterized in that, this reset signal output circuit is a comparator circuit, couple with this frequency detector, in order to export corresponding reset signal according to this first output voltage and one second output voltage, the value of this second output voltage is to be a fixed proportion with this transient voltage, wherein, when this first output voltage during greater than this second output voltage, this reset signal has one first signal value, when this first output voltage during less than this second output voltage, this reset signal has a secondary signal value.
8. power initiation reset circuit as claimed in claim 7 is characterized in that, this second output voltage is exported by a voltage divider, and this voltage divider comprises:
One first resistance is and this supply coupling; And
One second resistance, an end and this first resistance are coupled to an output node, other end ground connection;
Wherein, this output node is in order to exporting this second output voltage, and the value of this second output voltage is that resistance by this first resistance and this second resistance is determined.
9. power initiation reset circuit as claimed in claim 1 is characterized in that, this reset signal output circuit is an inverter, in order to export this reset signal according to this first output voltage.
10. a power initiation remapping method is used a power initiation reset circuit, and this power initiation reset circuit comprises an oscillator, a frequency detector and a comparator, it is characterized in that, this method comprises the following step:
When power initiation, a transient voltage is provided, wherein the value of this transient voltage is to increase in time;
Provide a corresponding oscillator signal according to this transient voltage, wherein, the frequency of oscillation of this oscillator signal increases with the rising gradually of this transient voltage;
Export corresponding one first output voltage according to this oscillator signal;
Relatively this first output voltage and one second output voltage; And
According to the comparative result of this first and second output voltage, export a reset signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03123849 CN1262067C (en) | 2003-05-13 | 2003-05-13 | Internal electric power starting resetting circuit and method adapted to lower voltage chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03123849 CN1262067C (en) | 2003-05-13 | 2003-05-13 | Internal electric power starting resetting circuit and method adapted to lower voltage chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1549449A CN1549449A (en) | 2004-11-24 |
| CN1262067C true CN1262067C (en) | 2006-06-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03123849 Expired - Lifetime CN1262067C (en) | 2003-05-13 | 2003-05-13 | Internal electric power starting resetting circuit and method adapted to lower voltage chip |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102386896B (en) * | 2008-08-07 | 2014-04-30 | 联咏科技股份有限公司 | Reset signal filter |
| TWI382184B (en) | 2009-02-27 | 2013-01-11 | Realtek Semiconductor Corp | Frequency detecting device and method |
| CN101826871B (en) * | 2009-03-03 | 2015-12-09 | 瑞昱半导体股份有限公司 | Frequency detecting device and method |
| CN102201809B (en) * | 2010-03-22 | 2013-11-06 | 瑞昱半导体股份有限公司 | Oscillation device and control method thereof |
| CN113452367A (en) * | 2020-03-27 | 2021-09-28 | 奇景光电股份有限公司 | Oscillation circuit and self-starting control circuit |
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2003
- 2003-05-13 CN CN 03123849 patent/CN1262067C/en not_active Expired - Lifetime
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| CN1549449A (en) | 2004-11-24 |
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Granted publication date: 20060628 |