CN1211931C - 用于最大后验概率解码器的存储器体系结构 - Google Patents

用于最大后验概率解码器的存储器体系结构 Download PDF

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Publication number
CN1211931C
CN1211931C CNB998121525A CN99812152A CN1211931C CN 1211931 C CN1211931 C CN 1211931C CN B998121525 A CNB998121525 A CN B998121525A CN 99812152 A CN99812152 A CN 99812152A CN 1211931 C CN1211931 C CN 1211931C
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CN
China
Prior art keywords
group
state metric
window
decoding
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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CNB998121525A
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English (en)
Chinese (zh)
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CN1323462A (zh
Inventor
S·J·霍尔特
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Qualcomm Inc
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Qualcomm Inc
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Filing date
Publication date
Priority claimed from US09/259,665 external-priority patent/US6381728B1/en
Priority claimed from US09/283,013 external-priority patent/US6434203B1/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN1323462A publication Critical patent/CN1323462A/zh
Application granted granted Critical
Publication of CN1211931C publication Critical patent/CN1211931C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3972—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using sliding window techniques or parallel windows
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6566—Implementations concerning memory access contentions

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Dram (AREA)
  • Detection And Correction Of Errors (AREA)
  • Static Random-Access Memory (AREA)
  • Navigation (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CNB998121525A 1998-08-14 1999-08-13 用于最大后验概率解码器的存储器体系结构 Expired - Lifetime CN1211931C (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US9648998P 1998-08-14 1998-08-14
US60/096,489 1998-08-14
US09/259,665 US6381728B1 (en) 1998-08-14 1999-02-26 Partitioned interleaver memory for map decoder
US09/259,665 1999-02-26
US09/283,013 US6434203B1 (en) 1999-02-26 1999-03-31 Memory architecture for map decoder
US09/283,013 1999-03-31

Publications (2)

Publication Number Publication Date
CN1323462A CN1323462A (zh) 2001-11-21
CN1211931C true CN1211931C (zh) 2005-07-20

Family

ID=27378195

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB998121525A Expired - Lifetime CN1211931C (zh) 1998-08-14 1999-08-13 用于最大后验概率解码器的存储器体系结构

Country Status (12)

Country Link
EP (1) EP1118158B1 (https=)
JP (2) JP4405676B2 (https=)
CN (1) CN1211931C (https=)
AT (1) ATE476016T1 (https=)
AU (1) AU766116B2 (https=)
BR (1) BR9912990B1 (https=)
CA (1) CA2340366C (https=)
DE (1) DE69942634D1 (https=)
ES (1) ES2347309T3 (https=)
HK (1) HK1040842B (https=)
ID (1) ID28538A (https=)
WO (1) WO2000010254A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3450788B2 (ja) * 2000-03-06 2003-09-29 松下電器産業株式会社 復号化装置および復号化処理方法
DE10012873A1 (de) 2000-03-16 2001-09-27 Infineon Technologies Ag Optimierter Turbo-Decodierer
FI109162B (fi) 2000-06-30 2002-05-31 Nokia Corp Menetelmä ja järjestely konvoluutiokoodatun koodisanan dekoodaamiseksi
US6662331B1 (en) * 2000-10-27 2003-12-09 Qualcomm Inc. Space-efficient turbo decoder
JP4090996B2 (ja) * 2001-12-28 2008-05-28 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ データウィンドウを使用するデータ復号方法
WO2004028004A2 (en) * 2002-09-18 2004-04-01 Koninklijke Philips Electronics N.V. Method for decoding data using windows of data
US7702968B2 (en) * 2004-02-27 2010-04-20 Qualcomm Incorporated Efficient multi-symbol deinterleaver
CN102571107B (zh) * 2010-12-15 2014-09-17 展讯通信（上海）有限公司 LTE系统中高速并行Turbo码的解码系统及方法
US9128888B2 (en) * 2012-08-30 2015-09-08 Intel Deutschland Gmbh Method and apparatus for turbo decoder memory collision resolution
US10014026B1 (en) * 2017-06-20 2018-07-03 Seagate Technology Llc Head delay calibration and tracking in MSMR systems

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5862190A (en) * 1995-12-29 1999-01-19 Motorola, Inc. Method and apparatus for decoding an encoded signal

Also Published As

Publication number Publication date
CA2340366A1 (en) 2000-02-24
EP1118158A1 (en) 2001-07-25
JP4405676B2 (ja) 2010-01-27
JP2002523914A (ja) 2002-07-30
HK1040842A1 (en) 2002-06-21
CN1323462A (zh) 2001-11-21
AU5563899A (en) 2000-03-06
EP1118158B1 (en) 2010-07-28
JP2010016861A (ja) 2010-01-21
ES2347309T3 (es) 2010-10-27
ID28538A (id) 2001-05-31
HK1040842B (zh) 2005-12-30
JP5129216B2 (ja) 2013-01-30
CA2340366C (en) 2008-08-05
WO2000010254A1 (en) 2000-02-24
BR9912990A (pt) 2001-12-11
DE69942634D1 (de) 2010-09-09
BR9912990B1 (pt) 2012-10-02
AU766116B2 (en) 2003-10-09
ATE476016T1 (de) 2010-08-15

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Address after: Holy land, California, Egypt

Patentee after: Qualcomm Inc.

Address before: Holy land, California, Egypt

Patentee before: Qualcomm Inc.

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Granted publication date: 20050720

CX01 Expiry of patent term