CN118738136A - 半导体装置、显示装置及半导体装置的制造方法 - Google Patents

半导体装置、显示装置及半导体装置的制造方法 Download PDF

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Publication number
CN118738136A
CN118738136A CN202410305656.8A CN202410305656A CN118738136A CN 118738136 A CN118738136 A CN 118738136A CN 202410305656 A CN202410305656 A CN 202410305656A CN 118738136 A CN118738136 A CN 118738136A
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CN
China
Prior art keywords
layer
insulating layer
semiconductor device
region
oxide semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410305656.8A
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English (en)
Chinese (zh)
Inventor
渡部将弘
渡壁创
津吹将志
佐佐木俊成
望月真里奈
田丸尊也
小野寺凉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Idemitsu Kosan Co Ltd
Japan Display Inc
Original Assignee
Japan Display Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Display Inc filed Critical Japan Display Inc
Publication of CN118738136A publication Critical patent/CN118738136A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G09F9/335—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes being organic light emitting diodes [OLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/35—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
CN202410305656.8A 2023-03-28 2024-03-18 半导体装置、显示装置及半导体装置的制造方法 Pending CN118738136A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023050864A JP2024139916A (ja) 2023-03-28 2023-03-28 半導体装置、表示装置、及び半導体装置の製造方法
JP2023-050864 2023-03-28

Publications (1)

Publication Number Publication Date
CN118738136A true CN118738136A (zh) 2024-10-01

Family

ID=92853996

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410305656.8A Pending CN118738136A (zh) 2023-03-28 2024-03-18 半导体装置、显示装置及半导体装置的制造方法

Country Status (5)

Country Link
US (1) US20240332429A1 (enExample)
JP (1) JP2024139916A (enExample)
KR (1) KR102878611B1 (enExample)
CN (1) CN118738136A (enExample)
TW (1) TWI898488B (enExample)

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8871565B2 (en) 2010-09-13 2014-10-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
KR102099445B1 (ko) * 2012-06-29 2020-04-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
EP2880690B1 (en) 2012-08-03 2019-02-27 Semiconductor Energy Laboratory Co. Ltd. Semiconductor device with oxide semiconductor stacked film
TWI761605B (zh) * 2012-09-14 2022-04-21 日商半導體能源研究所股份有限公司 半導體裝置及其製造方法
KR102220279B1 (ko) 2012-10-19 2021-02-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 산화물 반도체막을 포함하는 다층막 및 반도체 장치의 제작 방법
JP6345023B2 (ja) * 2013-08-07 2018-06-20 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US9425217B2 (en) 2013-09-23 2016-08-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
TWI685116B (zh) * 2014-02-07 2020-02-11 日商半導體能源研究所股份有限公司 半導體裝置
KR102593883B1 (ko) * 2015-06-19 2023-10-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치, 그 제작 방법, 및 전자 기기
CN109121438B (zh) 2016-02-12 2022-02-18 株式会社半导体能源研究所 半导体装置以及包括该半导体装置的显示装置
WO2019087002A1 (ja) * 2017-11-02 2019-05-09 株式会社半導体エネルギー研究所 半導体装置

Also Published As

Publication number Publication date
US20240332429A1 (en) 2024-10-03
TW202443917A (zh) 2024-11-01
KR20240145882A (ko) 2024-10-07
TWI898488B (zh) 2025-09-21
JP2024139916A (ja) 2024-10-10
KR102878611B1 (ko) 2025-10-30

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Effective date of registration: 20250626

Address after: Tokyo, Japan

Applicant after: JAPAN DISPLAY Inc.

Country or region after: Japan

Applicant after: IDEMITSU KOSAN Co.,Ltd.

Address before: Tokyo, Japan

Applicant before: JAPAN DISPLAY Inc.

Country or region before: Japan