CN118367075A - Display panel and preparation method thereof - Google Patents

Display panel and preparation method thereof Download PDF

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Publication number
CN118367075A
CN118367075A CN202410791300.XA CN202410791300A CN118367075A CN 118367075 A CN118367075 A CN 118367075A CN 202410791300 A CN202410791300 A CN 202410791300A CN 118367075 A CN118367075 A CN 118367075A
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layer
display panel
hemispherical
area
hole
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CN118367075B (en
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陈良键
梁秋敏
岳大川
蔡世星
李小磊
伍德民
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Ji Hua Laboratory
Shenzhen Aoshi Micro Technology Co Ltd
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Ji Hua Laboratory
Shenzhen Aoshi Micro Technology Co Ltd
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Abstract

The disclosure relates to the technical field of display, and in particular relates to a display panel and a preparation method of the display panel. Wherein, the display panel includes: the pixel unit is bonded on the driving substrate through the protective layer; the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces the light emitting side of the display panel; in the direction perpendicular to the plane area, an area, with the distance from the plane area being greater than or equal to the distance threshold, in the curved surface area is a preset area, the light-emitting layer coats the preset area, and the hole transmission layer is located on one side, far away from the preset area, of the light-emitting layer. According to the technical scheme, the problem of reduction of the external quantum efficiency of the pixel unit caused by uneven electron-hole density in the light-emitting layer can be solved, and the display effect of the display panel can be improved.

Description

Display panel and preparation method thereof
Technical Field
The disclosure relates to the technical field of display, and in particular relates to a display panel and a preparation method of the display panel.
Background
Micro LIGHT EMITTING diodes (Micro LEDs) display chips have the characteristics of small size, high integration level, self-luminescence and the like, and have larger advantages in the aspects of brightness, resolution, contrast, energy consumption, service life, response speed, thermal stability and the like. In recent years, with the development of new application scenes such as car lights, projection, illumination, communication and the like, the demands of users for high-brightness Micro LED display chips with high current density are increasing.
In the related art, there is a serious problem of external quantum efficiency degradation when operating at a high current density for the LED device, thereby affecting the display effect of the display panel. This is mainly caused by the following reasons: the electron mobility in the LED device is far greater than the hole mobility, so that a large number of electrons can leak out through the quantum well epitaxial layer (light-emitting layer) directly without being composited with the hole; the high current density injection increases the carrier concentration of electrons, holes and the like, enhances the auger recombination among carriers and reduces the luminous efficiency.
Disclosure of Invention
In order to solve the above technical problems or at least partially solve the above technical problems, the present disclosure provides a display panel and a method for manufacturing the display panel, which can improve the problem of the decrease of the quantum efficiency outside the pixel unit caused by the uneven electron-hole density in the light emitting layer, and is beneficial to improving the display effect of the display panel.
In a first aspect, the present disclosure provides a display panel, comprising:
the pixel unit is bonded on the driving substrate through the protective layer;
the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, wherein the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces to the light emitting side of the display panel;
in the direction perpendicular to the plane area, an area, which is larger than or equal to a distance threshold, of the curved surface area is a preset area, the light-emitting layer coats the preset area, and the hole transport layer is located on one side, far away from the preset area, of the light-emitting layer.
In some embodiments, the display panel further comprises:
an electron blocking layer between the hole transport layer and the light emitting layer;
The electron blocking layer coats one side, far away from the preset area, of the light emitting layer, and the hole transport layer coats one side, far away from the light emitting layer, of the electron blocking layer.
In some embodiments, the anode of the pixel cell wraps around a side of the hole transport layer remote from the light emitting layer;
In some embodiments, a first through hole is formed in the protective layer, and a first conductive structure is filled in the first through hole;
the anode of the pixel unit is electrically connected with the bonding electrode of the driving substrate through the first conductive structure.
In some embodiments, the electron transport layer further comprises a second hemispherical structure located above the first hemispherical structure;
The planar region of the second hemispherical structure is opposite the planar region of the first hemispherical structure.
In some embodiments, the display panel further comprises: interconnecting the cathodes;
the planar region of the second hemispherical structure and the edge position far away from the first hemispherical structure are electrically connected with the interconnection cathode.
In some embodiments, the interconnect cathode includes a common region; a second through hole is formed in the protective layer, and a second conductive structure is filled in the second through hole;
the common region is electrically connected with the bonding electrode of the driving substrate through the second conductive structure.
In a second aspect, the present disclosure provides a method for manufacturing a display panel, including:
Preparing a display panel; the display panel includes: the pixel unit is bonded on the driving substrate through the protective layer;
the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, wherein the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces to the light emitting side of the display panel;
in the direction perpendicular to the plane area, an area, which is larger than or equal to a distance threshold, of the curved surface area is a preset area, the light-emitting layer coats the preset area, and the hole transport layer is located on one side, far away from the preset area, of the light-emitting layer.
In some embodiments, the preparing a display panel includes:
Sequentially stacking a buffer layer and an electron transmission prefabricated layer on one side of a substrate, etching one side of the electron transmission prefabricated layer far away from the substrate, and forming a plurality of first hemispherical structures on the electron transmission prefabricated layer;
Covering the protective layer on one side of the electron transport prefabricated layer, where the first hemispherical structures are formed, removing part of the protective layer, and retaining the protective layer on the electron transport prefabricated layer between the adjacent first hemispherical structures;
Sequentially forming the light-emitting layer and the hole transport layer on the surface of the first hemispherical structure;
etching part of the protective layer to form a cathode graphical region;
Depositing metal to the cathode patterned region to form an interconnect cathode, and depositing metal on the hole transport layer to form an anode of the pixel cell; wherein the interconnect cathode comprises a common region;
Covering the protective layer on the whole surface of the side where the anode is located, forming a first through hole penetrating to the anode and a second through hole penetrating to the public area on the protective layer, and filling metal into the first through hole and the second through hole to form a first conductive structure and a second conductive structure respectively;
bonding the side, on which the first conductive structure and the second conductive structure are formed, of the protective layer with the driving substrate, and peeling off the substrate and the buffer layer;
Etching one side of the electron transmission prefabricated layer far away from the driving substrate, and forming a second hemispherical structure, wherein the second hemispherical structure covers the first hemispherical structure, and the second hemispherical structure and the first hemispherical structure form the electron transmission layer.
In some embodiments, the preparing a display panel includes:
Sequentially stacking a buffer layer and an electron transmission prefabricated layer on one side of a substrate, etching one side of the electron transmission prefabricated layer far away from the substrate, and forming a plurality of first hemispherical structures on the electron transmission prefabricated layer;
Covering the protective layer on one side of the electron transport prefabricated layer, where the first hemispherical structures are formed, removing part of the protective layer, and retaining the protective layer on the electron transport prefabricated layer between the adjacent first hemispherical structures;
Sequentially forming the light-emitting layer, the electron blocking layer and the hole transport layer on the surface of the first hemispherical structure;
etching part of the protective layer to form a cathode graphical region;
Depositing metal to the cathode patterned region to form an interconnect cathode, and depositing metal on the hole transport layer to form an anode of the pixel cell; wherein the interconnect cathode comprises a common region;
Covering the protective layer on the whole surface of the side where the anode is located, forming a first through hole penetrating to the anode and a second through hole penetrating to the public area on the protective layer, and filling metal into the first through hole and the second through hole to form a first conductive structure and a second conductive structure respectively;
bonding the side, on which the first conductive structure and the second conductive structure are formed, of the protective layer with the driving substrate, and peeling off the substrate and the buffer layer;
Etching one side of the electron transmission prefabricated layer far away from the driving substrate, and forming a second hemispherical structure, wherein the second hemispherical structure covers the first hemispherical structure, and the second hemispherical structure and the first hemispherical structure form the electron transmission layer.
The display panel provided by the embodiment of the disclosure comprises: the pixel unit is bonded on the driving substrate through the protective layer; the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces the light emitting side of the display panel; in the direction perpendicular to the plane area, an area, with the distance from the plane area being greater than or equal to the distance threshold, in the curved surface area is a preset area, the light-emitting layer coats the preset area, and the hole transmission layer is located on one side, far away from the preset area, of the light-emitting layer. Therefore, the coated light-emitting layer is arranged in the preset area of the first hemispherical structure, and the light-emitting layer can be arranged into a hemispherical hollow structure. The inner surface of the hemispherical hollow structure, namely the contact surface with the first hemispherical structure, is an electron injection surface, and the outer surface of the hemispherical hollow structure, namely the opposite surface of the inner surface, is a hole injection surface. The outer surface area of the hemispherical hollow structure is larger than the inner surface area, which is equivalent to increasing the electron injection area of the light-emitting layer and reducing the hole injection area of the light-emitting layer, which is beneficial to injecting holes into the light-emitting layer, thereby improving the problem of reduced quantum efficiency outside the pixel unit due to uneven electron-hole density in the light-emitting layer caused by far larger electron mobility than hole mobility, and being beneficial to improving the display effect of the display panel.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, the drawings that are required for the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a top view of a display panel according to an embodiment of the disclosure;
fig. 2 is a schematic diagram of a film structure of a display panel according to an embodiment of the disclosure;
fig. 3 is a schematic diagram of a film structure of another display panel according to an embodiment of the disclosure;
Fig. 4 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of the disclosure;
fig. 5 is a specific process schematic diagram of a method for manufacturing a display panel according to an embodiment of the disclosure;
Fig. 6 is a top view of a structure corresponding to S504 provided in an embodiment of the disclosure;
fig. 7 is a top view corresponding to the structure shown in S505 according to an embodiment of the disclosure;
Fig. 8 is a specific process schematic diagram of another method for manufacturing a display panel according to an embodiment of the disclosure.
Detailed Description
In order that the above objects, features and advantages of the present disclosure may be more clearly understood, a further description of aspects of the present disclosure will be provided below. It should be noted that, without conflict, the embodiments of the present disclosure and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced otherwise than as described herein; it will be apparent that the embodiments in the specification are only some, but not all, embodiments of the disclosure.
According to the display panel provided by the embodiment of the disclosure, the luminous layer is coated in the preset area of the first hemispherical structure, so that the luminous layer can be arranged into the hemispherical hollow structure. The inner surface of the hemispherical hollow structure, namely the contact surface with the first hemispherical structure, is an electron injection surface, and the outer surface of the hemispherical hollow structure, namely the opposite surface of the inner surface, is a hole injection surface. The outer surface area of the hemispherical hollow structure is larger than the inner surface area, which is equivalent to increasing the electron injection area of the light-emitting layer and reducing the hole injection area of the light-emitting layer, which is beneficial to injecting holes into the light-emitting layer, thereby improving the problem of reduced quantum efficiency outside the pixel unit due to uneven electron-hole density in the light-emitting layer caused by far larger electron mobility than hole mobility, and being beneficial to improving the display effect of the display panel.
The display panel and the manufacturing method of the display panel provided by the embodiment of the disclosure are described below by way of example with reference to the accompanying drawings.
Fig. 1 is a top view of a display panel according to an embodiment of the disclosure, and fig. 2 is a schematic film structure of the display panel according to an embodiment of the disclosure. Wherein fig. 2 is a cross-sectional view taken along AA' in fig. 1. As shown in conjunction with fig. 1 and 2, the display panel includes: a drive substrate 11, a protective layer 21, and a pixel unit 13, the pixel unit 13 being bonded to the drive substrate 11 through the protective layer 21; the pixel unit 13 includes an electron transport layer 14, a light emitting layer 15, and a hole transport layer 16; the electron transport layer 14 includes a first hemispherical structure 141, and the first hemispherical structure 141 includes a curved surface area and a planar area, and the planar area faces the light emitting side of the display panel; in the direction perpendicular to the plane area, an area, in the curved surface area, with the distance from the plane area being greater than or equal to a distance threshold value is a preset area; the light-emitting layer 15 covers the preset area, and the hole transport layer 16 is located at one side of the light-emitting layer 15 away from the preset area.
The electron transport layer 14 includes a first hemispherical structure 141, where the first hemispherical structure 141 includes a curved surface area facing the driving substrate 11 and a planar area facing the light emitting side of the display panel. For ease of understanding, the planar area is shown with gray line 01, and the surface of the first hemispherical structure 141 is a curved area except for the planar area.
In the direction YY' perpendicular to the planar area, the preset area is an area of the curved surface area, the distance from the planar area being greater than or equal to a distance threshold. For ease of understanding, the preset area is shown with a grey dashed box 02.
Specifically, the coated light emitting layer 15 is disposed in a predetermined region of the first hemispherical structure 141, and the light emitting layer 15 may be disposed in a hemispherical hollow structure. The inner surface of the light emitting layer 15, i.e., the contact surface with the first hemispherical structure 141, is an electron injection surface, and the outer surface of the light emitting layer 15, i.e., the opposite surface to the inner surface, is a hole injection surface. Since the outer surface area of the light emitting layer 15 of the hemispherical hollow structure is larger than the inner surface area, this corresponds to an increase in the electron injection area of the light emitting layer 15 and a decrease in the hole injection area of the light emitting layer 15.
Illustratively, as shown in fig. 2, the light-emitting layer 15 is configured in a hemispherical hollow structure, which increases the contact area of the light-emitting layer 15 and the hole-transporting layer 16 and decreases the contact area of the light-emitting layer 15 and the electron-transporting layer 14. Illustratively, as shown in fig. 3, the light-emitting layer 15 is configured in a hemispherical hollow structure, which increases the contact area between the light-emitting layer 15 and the electron blocking layer 18, and since holes in the hole-transporting layer 16 are transported to the light-emitting layer 15 through the electron blocking layer 18, this corresponds to increasing the contact area between the light-emitting layer 15 and the hole-transporting layer 16, and decreasing the contact area between the light-emitting layer 15 and the electron-transporting layer 14.
Thus, holes are advantageously injected into the light emitting layer 15, so that the problem of reduced external quantum efficiency of the pixel unit 13 due to uneven electron-hole density in the light emitting layer 15 caused by far greater electron mobility than hole mobility can be improved, and the display effect of the display panel can be improved.
The display panel provided by the embodiment of the disclosure comprises: the pixel unit is bonded on the driving substrate through the protective layer; the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces the light emitting side of the display panel; in the direction perpendicular to the plane area, an area, which is larger than or equal to the distance threshold value, of the curved surface area is a preset area, the light-emitting layer coats the preset area, and the hole-transporting layer coats one side, far away from the preset area, of the light-emitting layer. Therefore, the coated light-emitting layer is arranged in the preset area of the first hemispherical structure, and the light-emitting layer can be arranged into a hemispherical hollow structure. The inner surface of the hemispherical hollow structure, namely the contact surface with the first hemispherical structure, is an electron injection surface, and the outer surface of the hemispherical hollow structure, namely the opposite surface of the inner surface, is a hole injection surface. The outer surface area of the hemispherical hollow structure is larger than the inner surface area, which is equivalent to increasing the electron injection area of the light-emitting layer and reducing the hole injection area of the light-emitting layer, which is beneficial to injecting holes into the light-emitting layer, thereby improving the problem of reduced quantum efficiency outside the pixel unit due to uneven electron-hole density in the light-emitting layer caused by far larger electron mobility than hole mobility, and being beneficial to improving the display effect of the display panel.
Continuing to show in fig. 2, the light-emitting layer 15 is configured as a hemispherical hollow structure, which is advantageous for making the carrier distribution of electrons and holes in the light-emitting layer 15 more uniform, compared with the light-emitting layer configured as a strip in the prior art, so as to improve the auger recombination of the carriers in the light-emitting layer 15.
In some embodiments, fig. 3 is a schematic diagram of a film structure of another display panel according to an embodiment of the disclosure. As shown in fig. 3, the display panel further includes: an electron blocking layer 18 between the hole transport layer 16 and the light emitting layer 15; the electron blocking layer 18 covers a side of the light emitting layer 15 away from the predetermined region, and the hole transporting layer 16 covers a side of the electron blocking layer 18 away from the light emitting layer 15.
Specifically, by providing the electron blocking layer 18 between the hole transporting layer 16 and the light emitting layer 15, leakage of electrons injected into the light emitting layer 15 directly through the light emitting layer 15 can be blocked.
In some embodiments, referring to fig. 2 or 3, the anode 19 of the pixel unit 13 wraps around the side of the hole transport layer 16 remote from the light emitting layer 15.
Specifically, by arranging the anode 19 of the pixel unit 13 to cover the side of the hole transport layer 16 away from the light emitting layer 15, the contact area between the anode 19 and the hole transport layer 16 can be increased, which is beneficial to realizing rapid heat conduction and high current injection of the display panel. In addition, the contact area between the anode 19 and the hole transport layer 16 is increased, which is advantageous in increasing the injection density of holes into the light emitting layer 15, and in improving the problem of uneven density of electrons and holes injected into the light emitting layer 15.
With continued reference to fig. 2 or fig. 3, by providing the anode 19 of the pixel unit to cover the side of the hole transport layer 16 far away from the light emitting layer, the anode 19 can be provided with a hemispherical hollow structure, and the anode 19 of the hemispherical hollow structure can play roles in collimating and reflecting light, so that the external quantum efficiency of the pixel unit 13 can be improved, and the display effect of the display panel can be improved.
For example, as shown in fig. 2, when the light emitted from the light-emitting layer 15 is incident on the anode 19, the light can be reflected to the light-emitting side on the anode 19, which is beneficial to improving the light-emitting effect.
In some embodiments, referring to fig. 2 or 3, a first via 221 is disposed on the protective layer 21, and the first via 221 is filled with a first conductive structure 231; the anode 19 of the pixel unit 13 is electrically connected to a bonding electrode (not shown) of the driving substrate 11 through the first conductive structure 231. Thereby, the driving substrate 11 can output the driving signal to the pixel unit 13.
In some embodiments, referring to fig. 2 or 3, the electron transport layer 14 further includes a second hemispherical structure 142 located above the first hemispherical structure 141; the planar area of the second hemispherical structure 142 is opposite to the planar area of the first hemispherical structure 141.
Specifically, when the light emitted by the light emitting layer 15 exits through the surface of the second hemispherical structure 142, the incident angle of the light exiting surface is smaller than the critical angle of full emission, which is beneficial to improving the light extraction rate and the viewing angle of the display panel.
With continued reference to fig. 2 or 3, the projection of the anode 19 on the driving substrate 11 is disposed within the projection of the second hemispherical structure 142 on the driving substrate 11, so as to further improve the viewing angle of the display panel.
In some embodiments, referring to fig. 1-3, the display panel further includes: an interconnect cathode 17; the edge locations of the planar areas of the second hemispherical structures 142 are electrically connected to the interconnect cathode 17. Specifically, the edge position of the planar region of the second hemispherical structure 142 is disposed to be electrically connected to the interconnection cathode 17, and the migration path of electrons in the electron transport layer 14 can be increased, so that the injection rate of electrons in the light emitting layer 15 can be reduced.
Illustratively, in connection with fig. 1-3, the second hemispherical structure 142 is provided as a major hemisphere, the first hemispherical structure 141 is a minor hemisphere, the left side of the major hemisphere is connected to the minor hemisphere, and the right side edge of the major hemisphere is positioned to be connected to the interconnect cathode 17. In addition, in the horizontal direction XX', a protection layer 21 is disposed between the interconnection cathode 17 and the first hemispherical structure 141, and electrons cannot directly migrate to the first hemispherical structure 141 through the protection layer 21, but migrate to the first hemispherical structure 141 through the second hemispherical structure 142, so as to increase the transfer path of electrons in the electron transport layer 14, thereby improving the problem of electron leakage caused by too fast electron mobility.
In some embodiments, referring to fig. 1-3, the interconnect cathode includes a common region 20; the protection layer 21 is provided with a second through hole 222, and the second through hole 222 is filled with a second conductive structure 232;
The common region 20 is electrically connected to a bonding electrode (not shown) of the driving substrate 11 through a second conductive structure 232. Thereby, the driving substrate 11 can output the driving signal to the pixel unit 13.
On the basis of the embodiment, the embodiment of the disclosure provides a preparation method of a display panel. The preparation method of the display panel comprises the following steps: a display panel was prepared.
Specifically, as shown in fig. 1 and 2, the display panel includes: a drive substrate 11, a protective layer 21, and a pixel unit 13, the pixel unit 13 being bonded to the drive substrate 11 through the protective layer 21; the pixel unit 13 includes an electron transport layer 14, a light emitting layer 15, and a hole transport layer 16; the electron transport layer 14 includes a first hemispherical structure 141, and the first hemispherical structure 141 includes a curved surface area and a planar area, and the planar area faces the light emitting side of the display panel; in the direction perpendicular to the planar region, a region of the curved surface region, which is greater than or equal to the distance threshold from the planar region, is a preset region, the light-emitting layer 15 covers the preset region, and the hole-transporting layer 16 is located on a side of the light-emitting layer 15 away from the preset region.
Therefore, the coated light-emitting layer is arranged in the preset area of the first hemispherical structure, and the light-emitting layer can be arranged into a hemispherical hollow structure. The inner surface of the hemispherical hollow structure, namely the contact surface with the first hemispherical structure, is an electron injection surface, and the outer surface of the hemispherical hollow structure, namely the opposite surface of the inner surface, is a hole injection surface. The outer surface area of the hemispherical hollow structure is larger than the inner surface area, which is equivalent to increasing the electron injection area of the light-emitting layer and reducing the hole injection area of the light-emitting layer, which is beneficial to injecting holes into the light-emitting layer, thereby improving the problem of reduced quantum efficiency outside the pixel unit due to uneven electron-hole density in the light-emitting layer caused by far larger electron mobility than hole mobility, and being beneficial to improving the display effect of the display panel.
In some embodiments, fig. 4 is a specific flow chart of a method for manufacturing a display panel according to an embodiment of the disclosure. As shown in fig. 4, the preparation method of the display panel specifically includes the following steps:
s401, sequentially stacking a buffer layer and an electron transmission prefabricated layer on one side of a substrate, etching one side of the electron transmission prefabricated layer away from the substrate, and forming a plurality of first hemispherical structures on the electron transmission prefabricated layer.
Specifically, fig. 5 is a specific process schematic diagram of a method for manufacturing a display panel according to an embodiment of the disclosure. In this step, as shown in S501 of fig. 5, the buffer layer 25 and the electron transport preform 26 are sequentially stacked on one side of the substrate 24, one side of the electron transport preform layer 26 away from the substrate 24 is etched, and a plurality of first hemispherical structures 141 are formed on the electron transport preform layer 26.
Illustratively, the first hemispherical structure 141 may be prepared in combination with a photolithography and wet etching process. The diameter of the first hemispherical structure 141 may be, for example, 1um to 2um.
And S402, covering a protective layer on one side of the electron transmission prefabricated layer, where the first half sphere structures are formed, removing part of the protective layer, and reserving the protective layer on the electron transmission prefabricated layer between the adjacent first half sphere structures.
In this step, as shown in S502 of fig. 5, a protective layer 21 is deposited on the side surface of the electron transport pre-formation layer 26 where the plurality of first hemispherical structures 141 are formed, and the protective layer 21 on the surface of the first hemispherical structure 141 is removed by, for example, a photolithography process, and the protective layer 21 on the electron transport pre-formation layer 26 between adjacent first hemispherical structures 141 is maintained. The protective layer 21 may be silicon oxide, for example, and the thickness of the protective layer 21 may be 100nm to 200nm.
S403, sequentially forming a light-emitting layer and a hole transport layer on the surface of the first hemispherical structure.
In this step, as shown in S503 of fig. 5, the light emitting layer 15 is epitaxially grown on the surface of the first hemispherical structure 141, and then the hole transporting layer 16 is epitaxially grown on the surface of the light emitting layer 15.
Because the electron transport prefabricated layer 26 between the adjacent first hemispherical structures 141 is provided with the protective layer 21, the light-emitting layer 15 and the hole transport layer 16 can only grow on the surfaces of the first hemispherical structures 141 in sequence, the selected growth is realized, the segmentation of pixel units can be directly realized, independent pixel units are not required to be realized by an etching process, and etching damage can be effectively avoided.
In addition, the light-emitting layer 15 and the hole-transporting layer 16 which are grown by the selection have lower defects and polarization electric fields, so that defect quenching of injection current and quantum confinement stark effect (Quantum Confined STARK EFFECT, QCSE) can be reduced, and the external quantum efficiency of the pixel unit can be improved.
S404, etching part of the protective layer to form a cathode graphical region.
Illustratively, fig. 6 is a top view of a structure corresponding to S504 provided in an embodiment of the disclosure. In this step, in combination with S504 of fig. 5 and fig. 6, the protective layer 21 is selectively etched, forming a cathode patterned region 017.
S405, depositing metal to the cathode patterned region to form an interconnection cathode, and depositing metal on the hole transport layer to form an anode of the pixel unit; wherein the interconnect cathode comprises a common region.
Illustratively, fig. 7 is a top view of a structure corresponding to S505 provided in an embodiment of the disclosure. Specifically, in this step, as shown in conjunction with S505 of fig. 5, fig. 6 and fig. 7, metal is deposited onto the cathode patterned region 017 to form the interconnect cathode 17, and metal is deposited onto the hole transport layer 16 to form the anode 19 of the pixel cell. Wherein the interconnect cathode 17 comprises a common region 20.
S406, covering the protective layer on the whole surface of the side where the anode is located, forming a first through hole penetrating to the anode and a second through hole penetrating to the public area on the protective layer, and filling metal into the first through hole and the second through hole to form a first conductive structure and a second conductive structure respectively.
Specifically, in this step, as shown in S506 of fig. 5, the protective layer 21 is covered over the entire surface of the side where the anode is located, planarized, and a first through hole 221 penetrating to the anode 19 and a second through hole 222 penetrating to the common region 20 are formed on the protective layer 21; filling metal such as metallic copper or tungsten into the first and second via holes 221 and 222 forms the first and second conductive structures 231 and 232, respectively.
S407, bonding the side of the protective layer, on which the first conductive structure and the second conductive structure are formed, with the driving substrate, and stripping the substrate and the buffer layer.
Specifically, in this step, as shown in S507 of fig. 5, the protective layer 21 is bonded to the drive substrate 11, and the substrate 24 and the buffer layer 25 are peeled off.
And S408, etching one side of the electron transmission prefabricated layer away from the driving substrate, and forming a second hemispherical structure, wherein the second hemispherical structure covers the first hemispherical structure, and the second hemispherical structure and the first hemispherical structure form an electron transmission layer.
Specifically, in this step, as shown in S508 of fig. 5, the electron transport preform layer 26 shown in S507 is etched, the second hemispherical structure 142 is prepared corresponding to the first hemispherical structure 141, and the first hemispherical structure 141 and the second hemispherical structure 142 form the electron transport layer 14.
Fig. 8 is a schematic process diagram of another method for manufacturing a display panel according to an embodiment of the disclosure.
As shown in fig. 8, in S801, the buffer layer 25 and the electron transport pre-formation layer 26 are sequentially stacked on one side of the substrate 24, one side of the electron transport pre-formation layer 26 away from the substrate 24 is etched, and a plurality of first hemispherical structures 141 are formed on the electron transport pre-formation layer 26.
In S802, the protective layer 21 is covered on the side of the electron transport pre-formation layer 26 where the first hemispherical structures 141 are formed, a part of the protective layer 21 is removed, and the protective layer 21 on the electron transport pre-formation layer 26 between adjacent first hemispherical structures 141 remains.
In S803, the light emitting layer 15, the electron blocking layer 18, and the hole transporting layer 16 are sequentially formed on the surface of the first hemispherical structure 141.
In S804, a portion of the protective layer 21 is etched to form a cathode patterned region 017.
In S805, depositing metal to the cathode patterned region 017 to form the interconnect cathode 17 and depositing metal on the hole transport layer 16 to form the anode 19 of the pixel cell; wherein the interconnect cathode 17 comprises a common region 20.
In S806, the protective layer 21 is covered on the entire surface of the anode 19, a first via hole 221 penetrating to the anode 19 and a second via hole 222 penetrating to the common region 20 are formed on the protective layer 21, and the first conductive structure 231 and the second conductive structure 232 are formed by filling metal into the first via hole 221 and the second via hole 222, respectively.
In S807, the side of the protective layer 21 where the first conductive structures 231 and the second conductive structures 232 are formed is bonded to the driving substrate 11, and the substrate 24 and the buffer layer 25 are peeled off.
In S807, the side of the electron transport pre-formed layer 26 away from the driving substrate 11 is etched, and a second hemispherical structure 142 is formed, the second hemispherical structure 142 covers the first hemispherical structure 141, and the second hemispherical structure 142 and the first hemispherical structure 141 form the electron transport layer 14.
Fig. 5 differs from fig. 8 in that: in S803 of fig. 5, a light emitting layer and a hole transporting layer are sequentially formed on the surface of the first hemispherical structure, and the display panel shown in fig. 2 can be formed corresponding to the steps shown in fig. 5; in S803 of fig. 6, a light emitting layer, an electron blocking layer and a hole transporting layer are sequentially formed on the surface of the first hemispherical structure, and the display panel shown in fig. 3 can be formed corresponding to the steps shown in fig. 8.
On the basis of the above embodiments, the present disclosure further provides a display device, including the display panel described in the above embodiments, so that the display device has the same or similar beneficial effects, which are not described herein.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The above is merely a specific embodiment of the disclosure to enable one skilled in the art to understand or practice the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A display panel, comprising:
the pixel unit is bonded on the driving substrate through the protective layer;
the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, wherein the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces to the light emitting side of the display panel;
in the direction perpendicular to the plane area, an area, of the curved surface area, with a distance from the plane area being greater than or equal to a distance threshold value is a preset area; the light-emitting layer coats the preset area, and the hole transport layer is positioned on one side of the light-emitting layer far away from the preset area.
2. The display panel of claim 1, further comprising:
an electron blocking layer between the hole transport layer and the light emitting layer;
The electron blocking layer coats one side, far away from the preset area, of the light emitting layer, and the hole transport layer coats one side, far away from the light emitting layer, of the electron blocking layer.
3. The display panel of claim 1, wherein an anode of the pixel cell wraps around a side of the hole transport layer remote from the light emitting layer.
4. A display panel according to claim 3, wherein a first through hole is provided in the protective layer, and the first through hole is filled with a first conductive structure;
the anode of the pixel unit is electrically connected with the bonding electrode of the driving substrate through the first conductive structure.
5. The display panel of claim 1, wherein the electron transport layer further comprises a second hemispherical structure located above the first hemispherical structure;
The planar region of the second hemispherical structure is opposite the planar region of the first hemispherical structure.
6. The display panel of claim 5, further comprising: interconnecting the cathodes;
the planar region of the second hemispherical structure and the edge position far away from the first hemispherical structure are electrically connected with the interconnection cathode.
7. The display panel of claim 6, wherein the interconnect cathode comprises a common region; a second through hole is formed in the protective layer, and a second conductive structure is filled in the second through hole;
the common region is electrically connected with the bonding electrode of the driving substrate through the second conductive structure.
8. A method for manufacturing a display panel, comprising:
Preparing a display panel; the display panel includes: the pixel unit is bonded on the driving substrate through the protective layer;
the pixel unit comprises an electron transport layer, a light emitting layer and a hole transport layer; the electron transport layer comprises a first hemispherical structure, wherein the first hemispherical structure comprises a curved surface area and a plane area, and the plane area faces to the light emitting side of the display panel;
in the direction perpendicular to the plane area, an area, which is larger than or equal to a distance threshold, of the curved surface area is a preset area, the light-emitting layer coats the preset area, and the hole transport layer is located on one side, far away from the preset area, of the light-emitting layer.
9. The method of manufacturing a display panel according to claim 8, wherein the manufacturing a display panel comprises:
Sequentially stacking a buffer layer and an electron transmission prefabricated layer on one side of a substrate, etching one side of the electron transmission prefabricated layer far away from the substrate, and forming a plurality of first hemispherical structures on the electron transmission prefabricated layer;
Covering the protective layer on one side of the electron transport prefabricated layer, where the first hemispherical structures are formed, removing part of the protective layer, and retaining the protective layer on the electron transport prefabricated layer between the adjacent first hemispherical structures;
Sequentially forming the light-emitting layer and the hole transport layer on the surface of the first hemispherical structure;
etching part of the protective layer to form a cathode graphical region;
Depositing metal to the cathode patterned region to form an interconnect cathode, and depositing metal on the hole transport layer to form an anode of the pixel cell; wherein the interconnect cathode comprises a common region;
Covering the protective layer on the whole surface of the side where the anode is located, forming a first through hole penetrating to the anode and a second through hole penetrating to the public area on the protective layer, and filling metal into the first through hole and the second through hole to form a first conductive structure and a second conductive structure respectively;
bonding the side, on which the first conductive structure and the second conductive structure are formed, of the protective layer with the driving substrate, and peeling off the substrate and the buffer layer;
Etching one side of the electron transmission prefabricated layer far away from the driving substrate, and forming a second hemispherical structure, wherein the second hemispherical structure covers the first hemispherical structure, and the second hemispherical structure and the first hemispherical structure form the electron transmission layer.
10. The method of manufacturing a display panel according to claim 8, wherein the manufacturing a display panel comprises:
Sequentially stacking a buffer layer and an electron transmission prefabricated layer on one side of a substrate, etching one side of the electron transmission prefabricated layer far away from the substrate, and forming a plurality of first hemispherical structures on the electron transmission prefabricated layer;
Covering the protective layer on one side of the electron transport prefabricated layer, where the first hemispherical structures are formed, removing part of the protective layer, and retaining the protective layer on the electron transport prefabricated layer between the adjacent first hemispherical structures;
Sequentially forming the light-emitting layer, the electron blocking layer and the hole transport layer on the surface of the first hemispherical structure;
etching part of the protective layer to form a cathode graphical region;
Depositing metal to the cathode patterned region to form an interconnect cathode, and depositing metal on the hole transport layer to form an anode of the pixel cell; wherein the interconnect cathode comprises a common region;
Covering the protective layer on the whole surface of the side where the anode is located, forming a first through hole penetrating to the anode and a second through hole penetrating to the public area on the protective layer, and filling metal into the first through hole and the second through hole to form a first conductive structure and a second conductive structure respectively;
bonding the side, on which the first conductive structure and the second conductive structure are formed, of the protective layer with the driving substrate, and peeling off the substrate and the buffer layer;
Etching one side of the electron transmission prefabricated layer far away from the driving substrate, and forming a second hemispherical structure, wherein the second hemispherical structure covers the first hemispherical structure, and the second hemispherical structure and the first hemispherical structure form the electron transmission layer.
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