CN111933653A - Display panel, preparation method thereof and display device - Google Patents

Display panel, preparation method thereof and display device Download PDF

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Publication number
CN111933653A
CN111933653A CN202010778869.4A CN202010778869A CN111933653A CN 111933653 A CN111933653 A CN 111933653A CN 202010778869 A CN202010778869 A CN 202010778869A CN 111933653 A CN111933653 A CN 111933653A
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layer
type semiconductor
electrode
light emitting
display panel
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Chinese (zh)
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戴文君
邢亮
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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Priority to CN202010778869.4A priority Critical patent/CN111933653A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Led Device Packages (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The embodiment of the invention discloses a display panel, a preparation method thereof and a display device. The method comprises the following steps: providing a light-emitting device motherboard, wherein the light-emitting device motherboard comprises a first bearing substrate and a light-emitting device layer, and the light-emitting device layer comprises a second type semiconductor layer, a light-emitting film layer, a first type semiconductor layer and a first electrode layer; providing an array substrate mother board; the array substrate motherboard comprises a plurality of pixel driving circuits and a plurality of connecting structures; the connecting structures are electrically connected with the pixel driving circuits in a one-to-one correspondence manner; transferring at least one light-emitting device mother board on the array substrate mother board in a mode that the first electrode layer faces the array substrate mother board; stripping the first bearing substrate; patterning the second type semiconductor layer, the light-emitting film layer, the first type semiconductor layer and the first electrode layer, wherein the first electrode is arranged corresponding to the connecting structure; forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard, so as to form a display panel motherboard; and cutting the display panel mother board along cutting lines to form the display panel.

Description

Display panel, preparation method thereof and display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel, a preparation method of the display panel and a display device.
Background
A Micro Light Emitting Diode (LED) display is a display using a micron-sized LED, and has been widely researched due to its characteristics of independent pixel control, independent Light emission control, high luminance, low power consumption, ultra-high resolution, high chroma, and the like. While the key technology of Micro-LED displays is the bulk transfer technology.
In the prior art, a huge transfer technology is to transfer the LED chip particles from the original substrate to the substrate with the driving circuit by manufacturing a transfer head. The transfer technology in the prior art has the disadvantages of complex process, low efficiency and high cost.
Disclosure of Invention
The embodiment of the invention provides a display panel, a preparation method thereof and a display device, and aims to solve the problems of complex process, low efficiency and high cost of a mass transfer technology in the prior art.
In a first aspect, an embodiment of the present invention provides a method for manufacturing a display panel, where the method for manufacturing a display panel includes:
providing a light-emitting device motherboard, wherein the light-emitting device motherboard comprises a first bearing substrate and a light-emitting device layer, and the light-emitting device layer comprises a second type semiconductor layer, a light-emitting film layer, a first type semiconductor layer and a first electrode layer which are arranged on one side of the first bearing substrate in a laminated manner;
providing an array substrate mother board; the array substrate motherboard comprises a display panel setting area, and the display panel setting area is provided with a plurality of pixel driving circuits and a plurality of connecting structures; the connecting structures are electrically connected with the pixel driving circuits in a one-to-one correspondence manner;
transferring at least one of the light emitting device motherboards on the array substrate motherboard in a manner that the first electrode layer faces the array substrate motherboard; wherein the first electrode layer is electrically connected with the connection structure;
stripping the first bearing substrate;
patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer to form a second type semiconductor, a light emitting layer, a first type semiconductor and a first electrode, wherein the first electrode is arranged corresponding to the connecting structure;
forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard, so as to form a display panel motherboard;
and cutting the display panel mother board along a cutting line to form the display panel.
In a second aspect, an embodiment of the present invention further provides a display panel, including:
a substrate base plate;
a plurality of sub-pixels located at one side of the substrate base plate; the sub-pixels comprise pixel driving circuits and micro light-emitting diodes; the micro light-emitting diode comprises a first electrode, a first type semiconductor, a light-emitting layer, a second type semiconductor and a second electrode which are arranged on one side of the substrate in a laminated mode; wherein, the vertical projection of the first type semiconductor on the plane of the substrate base plate is positioned in the vertical projection of the first electrode on the plane of the substrate base plate;
a plurality of connection structures; the pixel driving circuits are electrically connected with the first electrodes of the micro light-emitting diodes in a one-to-one correspondence mode through the connecting structures.
In a third aspect, an embodiment of the present invention further provides a display device, which includes the display panel described in the second aspect.
According to the display panel and the preparation method thereof and the display device provided by the embodiment of the invention, the light emitting device layer in the light emitting device motherboard is subjected to patterning treatment and the second electrode is formed after the at least one light emitting device motherboard is transferred to the array substrate motherboard, so that the plurality of micro light emitting diodes in the display panel are formed, and compared with the prior art that LED chip particles are transferred from one primary substrate to one substrate with a pixel driving circuit through a transfer head, the preparation method of the display panel provided by the embodiment of the invention does not need to transfer a large amount, so that the preparation efficiency of the display panel is improved; the method improves the alignment precision between the pixel driving circuit and the micro light-emitting diode and the accuracy of the electric connection between the pixel driving circuit and the micro light-emitting diode; meanwhile, a certain area does not need to be reserved for transfer errors during transfer, so that the preparation method of the display panel provided by the embodiment can greatly improve the resolution of the display panel.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a motherboard of a light emitting device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an array substrate motherboard according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a mother board of at least one light emitting device transferred to a mother board of an array substrate according to an embodiment of the present invention;
fig. 5 is a schematic top view of a plurality of light emitting device motherboards transferred on an array substrate motherboard according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another structure after at least one light emitting device motherboard is transferred on an array substrate motherboard according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another structure after at least one light emitting device motherboard is transferred on an array substrate motherboard according to an embodiment of the present invention;
FIG. 8 is a schematic structural diagram illustrating a first carrier substrate after being peeled according to an embodiment of the invention;
FIG. 9 is a schematic structural diagram of a second type semiconductor, a light emitting layer, a first type semiconductor and a first electrode after being formed according to an embodiment of the present invention;
FIG. 10 is a schematic structural view of a second type semiconductor layer after forming a rough undulating surface according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram illustrating an insulating layer after being formed according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a first light shielding structure after being formed according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a structure after a second electrode layer is formed according to an embodiment of the invention;
fig. 14 is a schematic structural diagram of a second electrode formed according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of a second electrode according to an embodiment of the present invention;
fig. 16 is a schematic structural diagram of another second electrode provided in the embodiment of the present invention;
fig. 17 is a schematic structural diagram of another second electrode provided in the embodiment of the present invention;
fig. 18 is a schematic structural diagram of a display panel after being formed according to an embodiment of the present invention;
FIG. 19 is a schematic diagram of a structure after an encapsulation layer is formed according to an embodiment of the present invention;
FIG. 20 is a schematic structural diagram of a second carrier substrate forming a first carrier substrate according to an embodiment of the present invention;
FIG. 21 is a schematic diagram illustrating a structure of a light conversion layer after being formed according to an embodiment of the present invention;
fig. 22 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 23 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 24 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 25 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be fully described by the detailed description with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, not all embodiments, and all other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without inventive efforts fall within the scope of the present invention.
In view of the problems of the background art, embodiments of the present invention provide a method for manufacturing a display panel, including: providing a light-emitting device motherboard, wherein the light-emitting device motherboard comprises a first bearing substrate and a light-emitting device layer, and the light-emitting device layer comprises a second type semiconductor layer, a light-emitting film layer, a first type semiconductor layer and a first electrode layer which are arranged on one side of the first bearing substrate in a laminated manner; providing an array substrate mother board; the array substrate motherboard comprises a display panel setting area, and the display panel setting area is provided with a plurality of pixel driving circuits and a plurality of connecting structures; the connecting structures are electrically connected with the pixel driving circuits in a one-to-one correspondence manner; transferring at least one light-emitting device mother board on the array substrate mother board in a mode that the first electrode layer faces the array substrate mother board; the first electrode layer is electrically connected with the connecting structure; stripping the first bearing substrate; patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer to form a second type semiconductor, a light emitting layer, a first type semiconductor and a first electrode, wherein the first electrode is arranged corresponding to the connecting structure; forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard, so as to form a display panel motherboard; and cutting the display panel mother board along cutting lines to form the display panel.
By adopting the technical scheme, the light-emitting device layer in the light-emitting device motherboard is subjected to patterning treatment and the second electrode is formed after the at least one light-emitting device motherboard is transferred to the array substrate motherboard, so that a plurality of micro light-emitting diodes in the display panel are formed, and compared with the prior art that LED chip particles are transferred from a primary substrate to a substrate with a pixel driving circuit through a transfer head, the preparation method of the display panel provided by the embodiment does not need to transfer a large amount, and the preparation efficiency of the display panel is improved; the method improves the alignment precision between the pixel driving circuit and the micro light-emitting diode and the accuracy of the electric connection between the pixel driving circuit and the micro light-emitting diode; meanwhile, a certain area is not required to be reserved for transfer errors during transfer, so that the resolution of the display panel is greatly improved.
The above is the core idea of the present invention, and the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the embodiments of the present invention.
Fig. 1 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention, and as shown in fig. 1, the method for manufacturing a display panel according to an embodiment of the present invention includes:
s110, providing a light-emitting device motherboard, wherein the light-emitting device motherboard comprises a first bearing substrate and a light-emitting device layer, and the light-emitting device layer comprises a second type semiconductor layer, a light-emitting film layer, a first type semiconductor layer and a first electrode layer which are arranged on one side of the first bearing substrate in a laminated mode.
Fig. 2 is a schematic structural diagram of a motherboard of a light emitting device according to an embodiment of the present invention. Referring to fig. 2, a second type semiconductor layer 21, a light emitting film layer 22, a first type semiconductor layer 23, and a first electrode layer 24 are sequentially formed on a first carrier substrate 10. The second-type semiconductor layer 21, the light emitting film layer 22, the first-type semiconductor layer 23, and the first electrode layer 24 may be sequentially formed on the first carrier substrate 10, for example, by a Metal-organic Chemical Vapor Deposition (MOCVD) process. The first carrier substrate 10 may include, for example, a sapphire substrate, a silicon substrate, etc., and the embodiment is not particularly limited as long as the second-type semiconductor layer 21, the light emitting film layer 22, the first-type semiconductor layer 23, and the first electrode layer 24 may be formed on the first carrier substrate 10. Alternatively, the first type semiconductor layer 23 in this embodiment may be, for example, a P-type semiconductor, and the second type semiconductor layer 21 may be, for example, an N-type semiconductor; for example, the first type semiconductor layer 23 may include P-type gallium nitride or gallium arsenide, and the second type semiconductor layer 21 may include N-type gallium nitride or gallium arsenide. The light-emitting layer 22 may include a multi-quantum well light-emitting layer, and the first electrode layer 24 may include indium tin oxide or metal, for example.
Alternatively, with continued reference to fig. 2, at least one buffer layer 25 may be grown on the first carrier substrate 10 before forming the second type semiconductor layer 21 on the first carrier substrate 10. The material of buffer layer 25 may be, for example, microcrystalline gallium nitride, and the lattice defect density in second-type semiconductor layer 21 is reduced by growing buffer layer 25.
S120, providing an array substrate mother board; the array substrate motherboard comprises a display panel setting area, and the display panel setting area is provided with a plurality of pixel driving circuits and a plurality of connecting structures; the connecting structures are electrically connected with the pixel driving circuits in a one-to-one correspondence manner.
Fig. 3 is a schematic structural diagram of an array substrate motherboard according to an embodiment of the present invention. Referring to fig. 3, the array substrate motherboard 300 may include a plurality of display panel setting regions BB, for example, and one display panel setting region BB corresponds to one display panel subsequently. One display panel setting area BB comprises a plurality of sub-pixel setting areas CC, each sub-pixel setting area CC is provided with one pixel driving circuit 30 and one connecting structure 34, and the connecting structures 34 are electrically connected with the pixel driving circuits 30 in a one-to-one correspondence manner; when the micro light emitting diodes are subsequently disposed in the sub-pixel disposing region CC, the pixel driving circuit 30 may drive the micro light emitting diodes through the connection structure 34.
It should be noted that fig. 3 only exemplifies that the array substrate mother board 200 includes two display panel installation regions BB, but the present application is not limited thereto, and those skilled in the art can set the display panel installation regions BB according to actual situations.
S130, transferring at least one light-emitting device mother board on the array substrate mother board in a mode that the first electrode layer faces the array substrate mother board; wherein the first electrode layer is electrically connected with the connection structure.
Fig. 4 is a schematic structural diagram of the array substrate after the at least one light emitting device motherboard is transferred to the array substrate motherboard according to the embodiment of the present invention. Referring to fig. 4, at least one light emitting device motherboard 100 is transferred on the array substrate motherboard 300 in such a manner that the first electrode layer 24 faces the array substrate motherboard 300. When the sizes of the light emitting device mother board 100 and the array substrate mother board 300 correspond to each other, transferring one light emitting device mother board 100 on the array substrate mother board 300; when the size of the light emitting device motherboard 100 is small, a plurality of light emitting device motherboards 100 may be transferred on the array substrate motherboard 300, so that the array substrate motherboard 300 is completely covered by the light emitting device motherboards 100, for example, fig. 5 is a schematic diagram of a top view structure after the plurality of light emitting device motherboards are transferred on the array substrate motherboard 300 according to an embodiment of the present invention, referring to fig. 5, four light emitting device motherboards 100 are transferred on the array substrate motherboard 300 in a manner that the first electrode layer 24 faces the array substrate motherboard 300, wherein one light emitting device motherboard 100 corresponds to four display panel setting regions BB, one display panel setting region BB includes a plurality of sub-pixel setting regions CC, each sub-pixel setting region CC subsequently corresponds to one micro light emitting diode, that is, all the micro light emitting diodes in four display panels may be formed by subsequent patterning of one light emitting device motherboard 100, that is to say, the transfer of a plurality of micro light-emitting diodes is completed at one time, and the transfer efficiency is greatly improved.
It should be noted that fig. 5 exemplarily illustrates that four light emitting device mother boards 100 are transferred on the array substrate mother board 300, each light emitting device mother board 100 corresponds to four display panel arrangement regions BB, and one display panel arrangement region BB includes four sub-pixel arrangement regions CC, but the present application is not limited thereto.
Optionally, the light emitting device motherboard may correspond to one display panel setting region; or the light-emitting device mother board corresponds to a plurality of display panel setting areas; or, a plurality of light emitting device mother boards correspond to one display panel setting area. That is, the size of the light emitting device mother board corresponds to the size of one display panel setting area; or the size of the light-emitting device mother board corresponds to the size of the plurality of display panel setting areas; alternatively, a plurality of light emitting device mother boards correspond to one display panel disposition region. That is, the number of the transferred light emitting device mother boards is determined according to the size of the light emitting device mother board.
Illustratively, referring to fig. 4, the size of the light emitting device motherboard 100 corresponds to the size of one display panel setting area BB; alternatively, referring to fig. 6, the light emitting device mother substrate 100 corresponds to the size of the two display panel arrangement regions BB; alternatively, referring to fig. 7, two light emitting device mother boards 100 correspond to the size of one display panel arrangement region BB.
Optionally, with reference to fig. 7, when a plurality of light emitting device motherboards 100 correspond to one display panel arrangement region BB, a vertical projection of a gap between adjacent light emitting device motherboards 100 on the plane of the first carrier substrate 10 is located within a vertical projection of a gap between adjacent pixel driving circuits 30 on the plane of the first carrier substrate 10. Therefore, the problem that the vertical projection of the gap between adjacent light emitting device motherboards 100 on the plane of the first carrier substrate 10 is located in the vertical projection of the adjacent pixel driving circuit 30 on the plane of the first carrier substrate 10, and the display effect of the display panel is affected when the display panel is formed subsequently, is avoided.
S140, stripping the first bearing substrate.
Fig. 8 is a schematic structural diagram of the first carrier substrate peeled according to an embodiment of the present invention. Referring to fig. 8, when the plurality of light emitting device motherboards 100 are transferred on the array substrate motherboard 300 in a manner that the first electrode layer 24 faces the array substrate motherboard 300, the plurality of light emitting device motherboards 100 may be all transferred to the array substrate motherboard 300, and then the first carrier substrate 10 of the plurality of light emitting device motherboards 100 may be individually or simultaneously peeled off; or transferring one light emitting device motherboard 100, then peeling off the first carrier substrate 10 in the light emitting device motherboard 100, then transferring the next light emitting device motherboard 100, and then peeling off the first carrier substrate 100 of the next light emitting device motherboard 100 until all the light emitting device motherboards 100 are transferred onto the array substrate motherboard 300 and all the first carrier substrates 100 corresponding to the light emitting device motherboards 100 are peeled off.
Optionally, with continued reference to fig. 8, when the light emitting device motherboard 100 includes the buffer layer 25, after the first carrier substrate 10 is peeled off, the buffer layer 25 needs to be peeled off, and at this time, the light emitting device motherboard 100 includes: a first electrode layer 24, a first type semiconductor layer 23, a light emitting film layer 22 and a second type semiconductor layer 21.
S150, patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer to form the second type semiconductor, the light emitting layer, the first type semiconductor and the first electrode, wherein the first electrode is arranged corresponding to the connecting structure.
Fig. 9 is a schematic structural diagram of a second type semiconductor, a light emitting layer, a first type semiconductor, and a first electrode formed according to an embodiment of the present invention. Referring to fig. 9, the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer are patterned to form a second type semiconductor 210, a light emitting layer 220, a first type semiconductor 230 and a first electrode 240. In the prior art, LED chip particles are transferred from a native substrate to a substrate having a pixel driving circuit by a transfer head, but in this embodiment, a light emitting device motherboard is first transferred to an array substrate motherboard, and then a second type semiconductor layer, a light emitting film layer, a first type semiconductor layer and a first electrode layer are patterned, and a plurality of second type semiconductors 210, a light emitting layer 220, a first type semiconductor 230 and a first electrode 240 are simultaneously formed, i.e., a plurality of micro light emitting diodes are simultaneously formed, compared with the bulk transfer in the prior art, the embodiment does not need the bulk transfer, and can realize the electrical connection between the micro light emitting diodes and the pixel driving circuit, thereby greatly improving the preparation efficiency of the display panel; meanwhile, a certain area does not need to be reserved for transfer errors during transfer, and the resolution of the display panel is greatly improved.
Optionally, patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer, and the first electrode layer to form the second type semiconductor, the light emitting layer, the first type semiconductor, and the first electrode, includes: simultaneously patterning the second type semiconductor layer, the light emitting film layer and the first type semiconductor layer to form a second type semiconductor, a light emitting layer and a first type semiconductor; patterning the first electrode layer to form a first electrode; wherein, the vertical projection of the first type semiconductor on the plane of the first electrode is positioned in the first electrode; or simultaneously patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer to form the second type semiconductor, the light emitting layer, the first type semiconductor and the first electrode.
The second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer can be simultaneously subjected to patterning treatment through an etching process to form the second type semiconductor, the light emitting layer, the first type semiconductor and the first electrode, so that the process steps are simplified. Alternatively, referring to fig. 9, for example, the second type semiconductor layer, the light emitting layer and the first type semiconductor layer may be etched at the same time by a dry etching process, or the first type semiconductor layer, the light emitting layer and the second type semiconductor layer may be etched by a dry etching process, respectively, to form the second type semiconductor 210, the light emitting layer 220 and the first type semiconductor 230, and when the first type semiconductor layer, the light emitting layer and the second type semiconductor layer are etched at the same time, the process steps may be simplified; then, dry etching, wet etching, laser etching or other etching methods known to those skilled in the art may be used to pattern the first electrode layer to form the first electrode 240, and at this time, along a direction parallel to the plane of the first electrode 240, the width of the first electrode 240 is wider than the width of the pixel driving circuit 30, and the width of the first electrode 240 is wider than the width of the first type semiconductor 230, so that the advantage is that, when the display panel is formed subsequently, the pixel driving circuit 30 is protected by the first electrode 240, and light emitted by the micro light emitting diode corresponding to the pixel driving circuit 30 and the micro light emitting diode corresponding to the adjacent pixel driving circuit 30 is prevented from being incident on the pixel driving circuit 30, which causes the pixel driving circuit 30 to be unstable, thereby affecting the display effect.
Optionally, before the patterning the second type semiconductor layer, the light emitting layer, the first type semiconductor layer, and the first electrode layer, the method further includes: and carrying out rough treatment on the surface of the second type semiconductor layer, which is far away from the light-emitting film layer, so as to form a rough undulating surface.
Fig. 10 is a schematic structural view of a second type semiconductor layer after forming a rough undulating surface according to an embodiment of the present invention. Referring to fig. 10, the surface of the second type semiconductor layer 21 away from the light-emitting film layer 22 is roughened to form a rough and undulating surface, so that the light-emitting efficiency can be improved after a display panel is subsequently formed, and the problem that the light-emitting rate is affected by total reflection of light emitted by the micro light-emitting diode is avoided.
Optionally, after forming the second type semiconductor, the light emitting layer, the first type semiconductor, and the first electrode, the method further includes: an insulating layer is formed on the sidewalls of the first type semiconductor, the light emitting layer, and the second type semiconductor.
Fig. 11 is a schematic structural diagram of an insulating layer formed according to an embodiment of the present invention, and referring to fig. 11, an insulating layer 40 is formed on sidewalls of the second type semiconductor 210, the light emitting layer 220, and the first type semiconductor 230, and the insulating layer 40 is disposed to prevent the second type semiconductor 210 and the first type semiconductor 230 from leaking electricity through the sidewalls, so as to avoid the problem of affecting the performance of the micro light emitting diode when a display panel is formed subsequently. Here, the material of the insulating layer 40 is not particularly limited in this embodiment as long as the second-type semiconductor 210 and the first-type semiconductor 230 can be prevented from leaking through the sidewalls.
Optionally, before forming the second electrode layer on a side of the second type semiconductor facing away from the array substrate motherboard, the method further includes: a first light shielding structure is formed in a gap between adjacent first type semiconductors, the light emitting layer, the second type semiconductor and the first electrode.
Fig. 12 is a schematic structural diagram of a structure after forming a first light shielding structure according to an embodiment of the present invention, referring to fig. 12, a first light shielding structure 50 is formed in a gap between adjacent first-type semiconductors 230, light emitting layers 220, second-type semiconductors 210, and first electrodes 240, and by disposing the first light shielding structure 50, cross talk between light emitted by adjacent micro light emitting diodes is prevented after forming a display panel, thereby improving the display effect of the display panel.
It is understood that the insulating layer 40 may be formed on the sidewalls of the second type semiconductor 210, the light emitting layer 220 and the first type semiconductor 230 first, and then the first light blocking structure 50 may be formed in the gap between the adjacent first type semiconductor 230, the light emitting layer 220, the second type semiconductor 210 and the first electrode 240.
And S160, forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard, so as to form a display panel motherboard.
Fig. 13 is a schematic structural diagram of a second electrode layer formed according to an embodiment of the present invention. Referring to fig. 13, a second electrode layer 26 is formed on a side of the second type semiconductor 210 facing away from the array substrate motherboard 300 to form a display panel motherboard.
Optionally, forming a second electrode layer on a side of the second type semiconductor departing from the array substrate motherboard to form a display panel motherboard, including: forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard; patterning the second electrode layer to form a second electrode; the second electrode is positioned in the display panel setting area; the shape of the second electrode comprises a grid shape, a finger fork shape or a comb tooth shape, or the second electrode is arranged on the whole surface corresponding to the display panel arrangement area.
Fig. 14 is a schematic structural diagram of a second electrode formed according to an embodiment of the present invention. Referring to fig. 14, after forming a second electrode layer 26 on a side of the second type semiconductor 210 away from the array substrate motherboard 300, patterning the second electrode layer 26 to form a plurality of second electrodes 250, where the second electrodes 250 correspond to the display panel setting regions BB one to one, and the second electrodes 250 of the display panel setting regions BB are all interconnected, where the second electrodes 250 may be continuously arranged in a whole layer, or may be patterned second electrodes 250, and when a subsequently formed display panel is top-emitting, the patterned second electrodes 250 may improve light transmittance of the display panel; for example, fig. 15 is a schematic structural diagram of a second electrode according to an embodiment of the present invention, and referring to fig. 15, the second electrode 250 may be in a grid shape; fig. 16 is a schematic structural diagram of another second electrode according to an embodiment of the present invention, and referring to fig. 16, the second electrode 250 may also be in a fork shape; fig. 17 is a schematic structural diagram of another second electrode according to an embodiment of the present invention, and referring to fig. 17, the second electrode 250 may also be in a comb-tooth shape. It is understood that the shape of the second electrode 250 includes, but is not limited to, the above examples, and can be set by those skilled in the art according to the actual situation. The shape of the second electrode 250 can be designed reasonably to ensure uniform current density distribution in the light-emitting layer 220, thereby ensuring light-emitting efficiency and uniformity of light emission. Alternatively, the material of the second electrode 250 may include gold, aluminum, titanium, indium tin oxide, or the like, for example.
And S170, cutting the display panel mother board along the cutting line to form the display panel.
Fig. 18 is a schematic structural diagram of a display panel formed according to an embodiment of the present invention. Referring to fig. 18, the display panel mother substrate is cut along a cutting line to form a display panel.
Optionally, before cutting the display panel mother substrate along the cutting line, the method further includes: and forming an encapsulation layer on one side of the second electrode, which is far away from the array substrate motherboard.
Fig. 19 is a schematic structural diagram after an encapsulation layer is formed according to an embodiment of the present invention. Referring to fig. 19, an encapsulation layer 60 is formed on a side of the second electrode 250 facing away from the array substrate motherboard 300, wherein the encapsulation layer 60 corresponds to the display panel arrangement regions BB one to one. The packaging layer 60 protects the films in the BB setting area of the display panel, and the problem of influence of external water, oxygen and the like on the films in the display panel after the display panel is formed subsequently is solved.
In summary, in the preparation method of the display panel provided in the embodiment of the present invention, after at least one light emitting device motherboard is transferred to the array substrate motherboard, the patterning process is performed on the light emitting device layer in the light emitting device motherboard, and the second electrode is formed, so as to form a plurality of micro light emitting diodes in the display panel, compared with the prior art that LED chip particles are transferred from one primary substrate to one substrate with a pixel driving circuit by a transfer head, the preparation method of the display panel provided in the embodiment does not need to transfer a large amount, and improves the preparation efficiency of the display panel; the method improves the alignment precision between the pixel driving circuit and the micro light-emitting diode and the accuracy of the electric connection between the pixel driving circuit and the micro light-emitting diode; meanwhile, a certain area is not required to be reserved for transfer errors during transfer, so that the resolution of the display panel is greatly improved.
Since the size of the light emitting device mother board is generally small due to the limitation of the equipment for preparing the light emitting device mother board, a plurality of light emitting device mother boards need to be transferred on the array substrate mother board, that is, the light emitting device mother boards are transferred to the array substrate mother board in a splicing manner.
Therefore, optionally, before providing the light emitting device motherboard, the method further includes: providing a second bearing substrate; cutting the second bearing substrate to form a first bearing substrate; the first bearing substrate is rectangular or square.
Fig. 20 is a schematic structural diagram of a second carrier substrate forming a first carrier substrate according to an embodiment of the present invention. Referring to fig. 20, since the second carrier substrate 70 is, for example, circular, for example, the second carrier substrate 70 is a sapphire substrate, and the sapphire substrate is, for example, circular, if the circular sapphire substrate is used as the first carrier substrate, the shape of the formed light emitting device motherboard is also circular, and when the circular light emitting device motherboard is transferred to the array substrate motherboard, the utilization rate of the array substrate motherboard is greatly reduced, in this embodiment, before forming each film layer on the second carrier substrate 70, the second carrier substrate 70 is cut along the cutting line QQ to form the rectangular or square first carrier substrate 10, so that the light emitting device motherboard is transferred to the array substrate motherboard by means of splicing in the following process, and the utilization rate of the array substrate is improved.
Optionally, after forming the second electrode layer on a side of the second type semiconductor facing away from the array substrate motherboard, the method further includes: and forming a light conversion layer on one side of the second electrode layer, which is far away from the array substrate motherboard.
Fig. 21 is a schematic structural diagram of a light conversion layer after being formed according to an embodiment of the present invention. Referring to fig. 21, a light conversion layer 70 is formed on a side of the second electrode layer 26 facing away from the array substrate mother substrate 300.
Specifically, when the light emitting device motherboard is formed, all the film layers in the light emitting device motherboard are prepared in a whole layer, that is, when each film layer structure in the light emitting device motherboard is prepared, the material of each film layer is the same, for example, the material of each light emitting film layer is the same, so that the process steps are simplified, but the light emitting colors of the subsequently formed micro light emitting diodes are the same, so that the color display of the display panel can be realized by forming the light conversion layer 70 on the side of the second electrode layer 26 away from the array substrate motherboard 300. Alternatively, the material of the light conversion layer 70 may include at least one of a quantum dot material, a phosphor material, and a phosphor material, for example.
Optionally, before forming the light conversion layer on a side of the second electrode layer facing away from the array substrate motherboard, the method further includes: forming a metal block on one side of the second electrode layer, which is far away from the array substrate motherboard; forming a second shading structure on one side of the metal block, which is far away from the array substrate motherboard; forming a light conversion layer on one side of the second electrode layer, which is far away from the array substrate motherboard, wherein the light conversion layer comprises: arranging a light conversion structure between the adjacent second light shielding structures; wherein the light conversion layer comprises a plurality of light conversion structures.
With continued reference to fig. 21, a metal block 90 is formed on a side of the second electrode layer 26 away from the array substrate motherboard 300, and the resistance of the second electrode layer 26 is reduced by the metal block 90; and forming a second light shielding structure 80 on the side of the metal block 90 away from the array substrate motherboard 300, wherein the vertical projection of the second light shielding structure 80 on the plane of the second electrode layer 26 is located in the vertical projection of the first light shielding structure 50 on the plane of the second electrode layer 26. The light conversion structures 71 are arranged between the adjacent second light shielding structures 80, and after a display panel is formed subsequently, the second light shielding structures 80 prevent mutual crosstalk between light rays emitted by the adjacent light conversion structures 71, so that the display effect of the display panel is improved.
Optionally, transferring at least one light emitting device motherboard on the array substrate motherboard in a manner that the first electrode layer faces the array substrate motherboard includes: transferring at least one light-emitting device mother board on the array substrate mother board in a mode that the first electrode layer faces the array substrate mother board; bonding the first electrode layer and the connecting structure by adopting a bonding process so as to fixedly and electrically connect the first electrode layer and the connecting structure; the bonding process comprises a eutectic bonding process or a silicon-on-insulator bonding process.
With continued reference to fig. 4, after the light emitting device motherboard 100 is transferred to the array substrate motherboard 300, the first electrode layer 24 and the connection structure 34 may be fixedly and electrically connected by a eutectic bonding process or a Silicon-On-Insulator (SOI) bonding process. Illustratively, the material of the first electrode layer 24 is gold, the material of the connection structure 34 is gold/indium alloy or gold/tin alloy, and eutectic bonding can be achieved between the first electrode layer 24 and the connection structure 34 by applying pressure and heat through vacuum, so as to achieve fixed electrical connection between the first electrode layer 24 and the connection structure 34. As another example, the material of the first electrode layer 24 is gold/copper alloy, the material of the connection structure 34 is copper/molybdenum alloy, and the first electrode layer 24 and the connection structure 34 can be subjected to SOI copper-copper bonding by applying heat and pressure in vacuum, thereby achieving fixed electrical connection between the first electrode layer 24 and the connection structure 34. The above example is merely a metal-to-metal bond to achieve a fixed electrical connection between the first electrode layer 24 and the connection structure 34. Alternatively, the first electrode layer 24 and the connection structure 34 may be electrically connected by bonding between a semiconductor and a metal. Illustratively, the material of the first electrode layer 24 is a semiconductor material, the material of the connection structure 34 is a metal material, for example, gold, when the material of the first electrode layer 24 is a semiconductor material, the material of the first electrode layer 24 may be, for example, P-type gallium nitride or gallium arsenide, that is, the material of the first electrode layer 24 is the same as the material of the first-type semiconductor layer 23, at this time, the first electrode layer 24 and the first-type semiconductor layer 23 may be an integral structure, and the first electrode layer 24 and the connection structure 34 may be SOI-bonded by applying pressure through vacuum heating, so as to achieve fixed electrical connection between the first electrode layer 24 and the connection structure 34. Compared with the prior art, the bonding method provided by the embodiment can complete the electric connection between the micro light-emitting diode and the pixel driving circuit without arranging a bonding layer, and reduces the bonding cost.
Based on the same inventive concept, the embodiment of the invention also provides a display panel, and the display panel provided by the embodiment of the invention can be prepared by the preparation method of the display panel. Fig. 22 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and referring to fig. 22, the display panel according to the embodiment of the present invention includes: a substrate base plate 400; a plurality of sub-pixels on one side of the substrate 400; the sub-pixels include a pixel driving circuit 30 and a micro light emitting diode 200; the micro light emitting diode 200 includes a first electrode 240, a first type semiconductor 230, a light emitting layer 220, a second type semiconductor 210, and a second electrode 250 stacked on one side of a substrate 400; wherein, the vertical projection of the first type semiconductor 230 on the plane of the substrate 400 is located in the vertical projection of the first electrode 240 on the plane of the substrate 400; a plurality of connecting structures 34; the plurality of pixel driving circuits 30 are electrically connected to the first electrodes 240 of the plurality of micro light emitting diodes 200 in a one-to-one correspondence via the plurality of connection structures 34.
Specifically, when the display panel is prepared, the light-emitting device motherboard prepared with the second type semiconductor layer, the light-emitting film layer, the first type semiconductor layer and the first electrode layer is transferred to the array substrate motherboard, and then sub-pixels are divided; when sub-pixel division is performed, the second-type semiconductor layer, the light emitting film layer, the first-type semiconductor layer, and then the first electrode layer may be patterned to form the micro light emitting diode 200, wherein a vertical projection of the first-type semiconductor 230 of the micro light emitting diode 200 on the plane of the substrate 400 is located in a vertical projection of the first electrode 240 on the plane of the substrate 400, so that there is no problem of a large amount of transfer of the micro light emitting diode 200, and the manufacturing efficiency of the display panel is improved.
Optionally, the display panel provided in the embodiment of the present invention may be top-emitting or bottom-emitting, and this embodiment is not particularly limited.
Alternatively, the substrate base 400 may be a rigid substrate or a flexible substrate, and the material of the substrate base 400 is not limited in the embodiment of the present invention.
Alternatively, with continued reference to fig. 22, the pixel driving circuit 30 may sequentially include an active layer 31, a gate insulating layer 32, a gate layer M1, an interlayer insulating layer 33, and a source-drain electrode layer M2 on one side of the substrate 400. The gate layer M1 may form the gate 35, the scan line, and the first pole of the storage capacitor (not shown in the figure) in the pixel driving circuit 30; the source-drain electrode layer M2 may form the source electrode 36, the drain electrode 37, the data line, and the power supply signal line (not shown in the figure) in the pixel driving circuit 30. The material of the gate insulating layer 32 and the interlayer insulating layer 33 may include silicon oxide or silicon nitride, which is not limited in the embodiment of the present invention. The pixel driving circuit 30 may further include an intermediate insulating layer and an intermediate metal layer (not shown in the drawing) stacked in a direction away from the substrate 400 between the gate layer M1 and the interlayer insulating layer 33. Wherein the intermediate metal layer is typically used to form the second pole of the storage capacitor and the reference voltage line.
Optionally, with continued reference to fig. 22, a perpendicular projection of the connection structure 34 in the plane of the substrate base 400 is located within a perpendicular projection of the first electrode 240 in the plane of the substrate base 400.
Since the connection structure 34 and the first electrode 240 may be misaligned after bonding by transferring the micro light emitting diode 200 in the prior art, but in the present embodiment, the light emitting device motherboard is transferred to the array substrate motherboard first, and then the sub-pixels are divided, the connection structure 34 and the first electrode 240 in the display panel provided in the present embodiment do not have a misalignment problem, so that a vertical projection of the connection structure 34 on a plane of the substrate 400 is located in a vertical projection of the first electrode 240 on the plane of the substrate 400, thereby improving alignment accuracy between the pixel driving circuit 30 and the micro light emitting diode 200 and accuracy of electrical connection between the pixel driving circuit 30 and the micro light emitting diode 200. In addition, the vertical projection of the connection structure 34 on the plane of the substrate 400 is located in the vertical projection of the first electrode 240 on the plane of the substrate 400, so that the problem that the flatness and cleanliness of the connection structure are affected by a patterning process and the bonding of the first electrode 240 and the connection structure 34 is affected when the first electrode layer is patterned is avoided.
Optionally, with continued reference to fig. 22, the sidewalls of the first-type semiconductor 230, the light-emitting layer 220, and the second-type semiconductor 210 of the micro light-emitting diode 200 are provided with the insulating layer 40. The insulating layer 40 is advantageous in preventing the first type semiconductor 230 and the second type semiconductor 210 from leaking through the sidewalls, thereby affecting the performance of the micro light emitting diode 200.
Optionally, with continued reference to fig. 22, a first light shielding structure 50 is disposed between adjacent micro light emitting diodes 200.
The material of the first light shielding structure 50 may include, for example, a black matrix, and the specific material of the first light shielding structure 50 is not limited in this embodiment. The first light shielding structure 50 is disposed in the embodiment to prevent unnecessary light leakage and prevent crosstalk between light beams emitted from adjacent micro light emitting diodes 200, thereby providing a display effect of the display panel.
It should be noted that, the first light shielding structure 50 disposed between the adjacent micro light emitting diodes 200 is not located between the adjacent micro light emitting diodes 200 in the projection relationship, but the first light shielding structure 50 is located between the adjacent micro light emitting diodes 200 in the three-dimensional structure, that is, the first light shielding structure 50 is "filled" between the adjacent micro light emitting diodes 200.
Optionally, with continued reference to fig. 22, the surface of the second type semiconductor 210 facing away from the substrate 400 is a rough relief surface.
Specifically, the surface of the second type semiconductor 210 on the side away from the substrate 400 is set to be a rough and wavy surface, so that the light emitting efficiency of the micro light emitting diode 200 can be improved, and the problem that the light emitted by the micro light emitting diode 200 is totally reflected to affect the light emitting rate is avoided.
Optionally, fig. 23 is a schematic structural diagram of another display panel provided in the embodiment of the present invention, referring to fig. 23, light emitting colors of a plurality of micro light emitting diodes 200 are the same; the side of the micro light emitting diodes 200 facing away from the substrate 400 is also provided with a light conversion layer 70.
Specifically, when the light emitting device motherboard is manufactured, all film layers in the light emitting device motherboard are manufactured in a whole layer, that is, materials for manufacturing all film layer structures in the light emitting device motherboard are the same, so that the process steps are simplified, but the light emitting colors of the subsequently formed micro light emitting diodes 200 are the same, and therefore, the light conversion layer 70 is arranged on one side of the micro light emitting diodes 200, which is far away from the substrate 400, so that color display of the display panel can be realized.
Optionally, with continued reference to fig. 23, the light conversion layer 70 includes a plurality of light conversion structures 71; the light conversion structures 71 and the micro light-emitting diodes 200 are arranged in a one-to-one correspondence manner, and the vertical projection of the light conversion structures 71 on the plane of the substrate base plate 400 covers the vertical projection of the micro light-emitting diodes 200 on the plane of the substrate base plate 400; the plurality of micro light-emitting diodes 200 comprise a first micro light-emitting diode 201, a second micro light-emitting diode 202 and a third micro light-emitting diode 203, wherein the light-emitting colors of the first micro light-emitting diode 201, the second micro light-emitting diode 202 and the third micro light-emitting diode 203 are blue; the light conversion structure 71 includes a red light conversion structure 72, a green light conversion structure 73, and a transparent light conversion structure 74; the vertical projection of the red light conversion structure 72 on the plane of the substrate base plate 400 covers the vertical projection of the first micro light emitting diode 201 on the plane of the substrate base plate 400, and the blue light emitted by the first micro light emitting diode 201 passes through the red light conversion structure 72 and then becomes red light; the vertical projection of the green light conversion structure 73 on the plane of the substrate 400 covers the vertical projection of the second micro light emitting diode 202 on the plane of the substrate 400, and the blue light emitted by the second micro light emitting diode 202 passes through the green light conversion structure 73 and then is changed into green light; the vertical projection of the transparent light conversion structure 74 on the plane of the substrate base plate 400 covers the vertical projection of the third micro light emitting diode 203 on the plane of the substrate base plate 400, and the blue light emitted by the third micro light emitting diode 203 is still blue light after passing through the transparent light conversion structure 74.
Optionally, fig. 24 is a schematic structural diagram of another display panel according to an embodiment of the present invention, referring to fig. 24, the plurality of micro light emitting diodes 200 include a first micro light emitting diode 201, a second micro light emitting diode 202, and a third micro light emitting diode 203, and light emitting colors of the first micro light emitting diode 201, the second micro light emitting diode 202, and the third micro light emitting diode 203 are all ultraviolet colors; the light conversion structure 71 includes a red light conversion structure 72, a green light conversion structure 73, and a blue light conversion structure 74; the vertical projection of the red light conversion structure 72 on the plane of the substrate base plate 400 covers the vertical projection of the first micro light emitting diode 201 on the plane of the substrate base plate 400, and ultraviolet light emitted by the first micro light emitting diode 201 passes through the red light conversion structure 72 and then becomes red light; the vertical projection of the green light conversion structure 73 on the plane of the substrate base plate 400 covers the vertical projection of the second micro light emitting diode 202 on the plane of the substrate base plate 400, and ultraviolet light emitted by the second micro light emitting diode 202 is changed into green light after passing through the green light conversion structure 73; the vertical projection of the blue light conversion structure 74 on the plane of the substrate 400 covers the vertical projection of the third micro light emitting diode 203 on the plane of the substrate 400, and the ultraviolet light emitted by the third micro light emitting diode 203 passes through the blue light conversion structure 74 and then becomes blue light.
Optionally, with continued reference to fig. 23, a second light shielding structure 80 is disposed between adjacent light converting structures 71. The second light shielding structure 80 prevents crosstalk between light rays emitted from adjacent light conversion structures 71, thereby improving the display effect of the display panel.
It should be noted that the second light shielding structure 80 disposed between the adjacent light conversion structures 71 is not located between the adjacent light conversion structures 71 in the projection relationship, but the second light shielding structure 80 is located between the adjacent light conversion structures 71 in the three-dimensional structure, that is, the second light shielding structure 80 is "filled" between the adjacent light conversion structures 71.
Optionally, with continued reference to fig. 23, the display panel 100 further includes a metal block 90; the metal block 90 is located on a side of the micro light emitting diode 200 away from the substrate 400, a vertical projection of the metal block 90 on a plane of the substrate 400 is located between vertical projections of adjacent micro light emitting diodes 200 on a plane of the substrate 400, and the metal block 90 is in direct contact with the second electrode 250, so that the metal block 90 can reduce the resistance of the second electrode 250, and meanwhile, light of the micro light emitting diode 200 is not blocked.
Optionally, the material of the first electrode 240 includes gold, and the material of the connection structure 34 includes gold/indium alloy or gold/tin alloy; alternatively, the material of the first electrode 240 includes a gold/copper alloy and the material of the connection structure 34 includes a copper/molybdenum alloy.
Illustratively, when the material of the first electrode 240 includes gold and the material of the connection structure 34 includes gold/indium alloy or gold/tin alloy, eutectic bonding between the first electrode 240 and the connection structure 34 may be achieved by applying pressure through vacuum heating, thereby achieving a fixed electrical connection between the first electrode 240 and the connection structure 34. When the material of the first electrode 240 comprises gold/copper alloy and the material of the connection structure 34 comprises copper/molybdenum alloy, the first electrode 240 and the connection structure 34 may be pressed by vacuum heating to realize SOI copper-copper bonding, thereby realizing fixed electrical connection between the first electrode 240 and the connection structure 34.
It should be noted that the material of the first electrode 240 and the material of the connection structure 34 include, but are not limited to, the above examples, and those skilled in the art can select the materials according to practical situations as long as the fixed electrical connection between the first electrode 240 and the connection structure 34 can be achieved.
Based on the above inventive concept, the embodiment of the invention also provides a display device. The display device includes the display panel according to any embodiment of the present invention, and therefore, the display device provided in the embodiment of the present invention has the corresponding beneficial effects of the display panel provided in the embodiment of the present invention, and details are not repeated herein. For example, the display device may be an electronic device such as a mobile phone, a computer, a smart wearable device (e.g., a smart watch), and an in-vehicle display device, which is not limited in this embodiment of the present invention.
For example, fig. 25 is a schematic structural diagram of a display device according to an embodiment of the present invention. As shown in fig. 25, the display device 1001 includes the display panel 1000 in the above-described embodiment.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (19)

1. A method for manufacturing a display panel, comprising:
providing a light-emitting device motherboard, wherein the light-emitting device motherboard comprises a first bearing substrate and a light-emitting device layer, and the light-emitting device layer comprises a second type semiconductor layer, a light-emitting film layer, a first type semiconductor layer and a first electrode layer which are arranged on one side of the first bearing substrate in a laminated manner;
providing an array substrate mother board; the array substrate motherboard comprises a display panel setting area, and the display panel setting area is provided with a plurality of pixel driving circuits and a plurality of connecting structures; the connecting structures are electrically connected with the pixel driving circuits in a one-to-one correspondence manner;
transferring at least one of the light emitting device motherboards on the array substrate motherboard in a manner that the first electrode layer faces the array substrate motherboard; wherein the first electrode layer is electrically connected with the connection structure;
stripping the first bearing substrate;
patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer to form a second type semiconductor, a light emitting layer, a first type semiconductor and a first electrode, wherein the first electrode is arranged corresponding to the connecting structure;
forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard, so as to form a display panel motherboard;
and cutting the display panel mother board along a cutting line to form the display panel.
2. The method of claim 1, wherein patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer, and the first electrode layer to form the second type semiconductor, the light emitting layer, the first type semiconductor, and the first electrode comprises:
simultaneously patterning the second type semiconductor layer, the light emitting film layer and the first type semiconductor layer to form the second type semiconductor, the light emitting layer and the first type semiconductor;
patterning the first electrode layer to form the first electrode; wherein, the vertical projection of the first type semiconductor on the plane of the first electrode is positioned in the first electrode; alternatively, the first and second electrodes may be,
and simultaneously patterning the second type semiconductor layer, the light emitting film layer, the first type semiconductor layer and the first electrode layer to form the second type semiconductor, the light emitting layer, the first type semiconductor and the first electrode.
3. The manufacturing method according to claim 1, wherein the light-emitting device motherboard corresponds to one of the display panel arrangement regions; alternatively, the first and second electrodes may be,
the light-emitting device mother board corresponds to the display panel arrangement areas; alternatively, the first and second electrodes may be,
the plurality of light emitting device mother boards correspond to one display panel arrangement area.
4. The manufacturing method according to claim 3, wherein a plurality of the light emitting device mother boards correspond to one of the display panel arrangement regions, and a vertical projection of a gap between adjacent light emitting device mother boards on a plane of the first carrier substrate is located within a vertical projection of a gap between adjacent pixel driving circuits on a plane of the first carrier substrate.
5. The method of manufacturing according to claim 1, wherein before providing the light emitting device motherboard, further comprising:
providing a second bearing substrate;
cutting the second bearing substrate to form the first bearing substrate; the first bearing substrate is rectangular or square.
6. The method of claim 1, wherein before the patterning the second type semiconductor layer, the light emitting layer, the first type semiconductor layer, and the first electrode layer, the method further comprises:
and carrying out rough treatment on the surface of the second type semiconductor layer, which is far away from the light-emitting film layer, so as to form a rough undulating surface.
7. The method for preparing the semiconductor device according to claim 1, further comprising, before forming a second electrode layer on a side of the second type semiconductor facing away from the array substrate motherboard:
and forming a first shading structure in a gap between the adjacent first type semiconductor, the light emitting layer, the second type semiconductor and the first electrode.
8. The method for preparing the semiconductor device according to claim 1, further comprising, after forming a second electrode layer on a side of the second type semiconductor facing away from the array substrate motherboard:
and forming a light conversion layer on one side of the second electrode layer, which is far away from the array substrate motherboard.
9. The method according to claim 1, further comprising, after forming the second-type semiconductor, the light-emitting layer, the first-type semiconductor, and the first electrode:
and forming an insulating layer on the side walls of the first type semiconductor, the light emitting layer and the second type semiconductor.
10. The method of manufacturing according to claim 1, wherein transferring at least one of the light emitting device motherboards onto the array substrate motherboard with the first electrode layer facing the array substrate motherboard comprises:
transferring at least one of the light emitting device motherboards on the array substrate motherboard in a manner that the first electrode layer faces the array substrate motherboard;
bonding the first electrode layer and the connecting structure by adopting a bonding process so as to fixedly and electrically connect the first electrode layer and the connecting structure;
wherein the bonding process comprises a eutectic bonding process or a silicon-on-insulator bonding process.
11. The method for preparing a display panel mother board according to claim 1, wherein forming a second electrode layer on a side of the second type semiconductor facing away from the array substrate mother board to form a display panel mother board comprises:
forming a second electrode layer on one side of the second type semiconductor, which is far away from the array substrate motherboard;
patterning the second electrode layer to form a second electrode; the second electrode is positioned in the display panel setting area; the shape of the second electrode comprises a grid shape, a finger fork shape or a comb tooth shape, or the second electrode is arranged on the whole surface corresponding to the display panel arrangement area.
12. A display panel, comprising:
a substrate base plate;
a plurality of sub-pixels located at one side of the substrate base plate; the sub-pixels comprise pixel driving circuits and micro light-emitting diodes; the micro light-emitting diode comprises a first electrode, a first type semiconductor, a light-emitting layer, a second type semiconductor and a second electrode which are arranged on one side of the substrate in a laminated mode; wherein, the vertical projection of the first type semiconductor on the plane of the substrate base plate is positioned in the vertical projection of the first electrode on the plane of the substrate base plate;
a plurality of connection structures; the pixel driving circuits are electrically connected with the first electrodes of the micro light-emitting diodes in a one-to-one correspondence mode through the connecting structures.
13. The display panel of claim 12, wherein a perpendicular projection of the connection structure onto a plane of the substrate base is located within a perpendicular projection of the first electrode onto a plane of the substrate base.
14. The display panel according to claim 12, wherein the plurality of micro light emitting diodes emit light of the same color;
and a light conversion layer is arranged on one side of the micro light emitting diodes, which is far away from the substrate base plate.
15. The display panel according to claim 12, wherein a surface of the second type semiconductor facing away from the substrate base plate is a rough relief surface.
16. The display panel according to claim 12, wherein the sidewalls of the first type semiconductor, the light emitting layer, and the second type semiconductor of the micro light emitting diode are provided with an insulating layer.
17. The display panel according to claim 12, wherein a first light shielding structure is disposed between adjacent micro light emitting diodes.
18. The display panel according to claim 12, wherein the material of the first electrode comprises gold, and the material of the connection structure comprises a gold/indium alloy or a gold/tin alloy; alternatively, the first and second electrodes may be,
the material of the first electrode comprises a gold/copper alloy and the material of the connection structure comprises a copper/molybdenum alloy.
19. A display device characterized by comprising the display panel according to any one of claims 12 to 18.
CN202010778869.4A 2020-08-05 2020-08-05 Display panel, preparation method thereof and display device Pending CN111933653A (en)

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CN112562526A (en) * 2020-12-11 2021-03-26 京东方科技集团股份有限公司 Display panel, manufacturing method thereof and display device
CN113140661A (en) * 2021-04-30 2021-07-20 上海天马微电子有限公司 Display panel and display device
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