CN118199736A

CN118199736A - Integrated circuit for realizing infrared receiving and transmitting and infrared transceiver

Info

Publication number: CN118199736A
Application number: CN202410505266.5A
Authority: CN
Inventors: 杨德旺; 郭文雄; 张千文; 韩富强; 李正平
Original assignee: Guoxin Technology Guangzhou Co ltd
Current assignee: Guoxin Technology Guangzhou Co ltd
Priority date: 2024-04-25
Filing date: 2024-04-25
Publication date: 2024-06-14

Abstract

The invention relates to an integrated circuit for realizing infrared receiving and transmitting and an infrared transceiver. The integrated circuit includes: the infrared transmitting circuit, the infrared receiving circuit and the digital controller; the digital controller generates PWM signals and outputs the PWM signals to the infrared emission circuit; the infrared emission circuit generates emission current according to the PWM signal, so that an external infrared light emitting diode emits an infrared light signal according to the emission current; the infrared receiving circuit is used for detecting micro-current generated by the external infrared light emitting diode when receiving infrared light signals, so as to obtain detection signals; and the digital controller learns the corresponding infrared light signal according to the detection signal. According to the invention, only a single infrared light emitting diode is externally connected to realize the emission and the reception of infrared light signals; the emission circuit and the traditional multistage current mirror amplifying circuit which do not adopt the traditional switching tube series current limiting resistor are not adopted, and the emission current is less influenced by the power supply voltage.

Description

Integrated circuit for realizing infrared receiving and transmitting and infrared transceiver

Technical Field

The invention relates to the field of infrared light, in particular to an integrated circuit for realizing infrared receiving and transmitting and an infrared transceiver.

Background

Infrared (IR) communication is a technique for wireless information transmission using infrared light. Infrared light is located below the visible spectrum, typically ranging from 700 nanometers to 1 millimeter in wavelength. The working principle of infrared light communication is as follows: converting the data to be transmitted into an infrared light signal, and then transmitting the infrared light signal through an infrared diode; the infrared receiver receives the infrared light signal and restores the infrared light signal into the original data through a decoding algorithm, thereby completing data communication.

The most common application scenario of infrared communication is a remote controller for controlling home appliances such as televisions, audio equipment, air conditioners, and the like. With the development of the era, people hope to use the same remote controller to control various electronic devices such as a home video system, intelligent home equipment and the like, and to perform custom configuration according to requirements. The learning type remote controller can control various different electronic devices by learning and storing infrared light signals corresponding to the different electronic devices. The user only needs to aim the original remote controller at the learning type remote controller and press the corresponding keys, and the learning type remote controller can capture and store the corresponding infrared light signals, so that the signals corresponding to different electronic devices can be learned and configured according to the needs, and the different electronic devices can be controlled by switching modes or selecting the keys. The learning type remote controller is more flexible and convenient than the traditional remote controller, and is favored by users.

The learning remote control comprises an infrared light emitting diode. The infrared light emitting diode is a key component for receiving and transmitting infrared light signals. When the infrared light emitting diode is in a weak cut-off state, a microampere current can be generated under the condition of illumination, so that the infrared light emitting diode can be used as a component for receiving infrared light signals, and the infrared light signals emitted from the outside can be converted into electric signals. When the infrared light emitting diode is in a normal conduction state, the infrared light emitting diode can be used as a component for emitting infrared light signals, and converts the electric signals into infrared light signals to be emitted to the outside.

A common infrared light emitting diode is a current-mode device whose operating current should be limited to within the positive limit current value. The rated continuous working current of the general infrared light emitting diode is 30mA-100mA, and the larger the emission current is, the farther the remote controller can remotely control. The prior art infrared light emitting circuit based on the infrared light emitting diode is usually composed of a switching tube connected in series with a current limiting resistor, and the purpose of the infrared light emitting diode is to limit the working current of the infrared light emitting diode within a set range. The infrared light emitting circuit of the common switching tube series current limiting resistor has the following defects: when the battery voltage drops, the current through the infrared light emitting diode will decrease significantly, resulting in a significantly smaller remote control distance. If a common multi-stage current mirror amplifying circuit is adopted, the variation of the emission current along with the power supply voltage is still larger. In order to ensure that the battery voltage is still provided with enough remote control distance when the battery voltage is reduced, the emission current gear can only be adjusted to be high, so that larger power consumption is wasted, and the service time of the battery is shortened.

Disclosure of Invention

Accordingly, an object of the present invention is to provide an integrated circuit and an infrared transceiver for realizing infrared transmission and reception, which have the advantages of less influence of a power supply voltage and less power consumption.

The invention provides an integrated circuit for realizing infrared receiving and transmitting, which comprises: the infrared transmitting circuit, the infrared receiving circuit and the digital controller; the digital controller generates PWM signals and outputs the PWM signals to the infrared emission circuit; the infrared emission circuit generates emission current according to the PWM signal, so that an external infrared light emitting diode emits an infrared light signal according to the emission current; the infrared receiving circuit is used for detecting micro-current generated by the external infrared light emitting diode when receiving infrared light signals, so as to obtain detection signals; and the digital controller learns the corresponding infrared light signal according to the detection signal.

The integrated circuit for realizing infrared receiving and transmitting can realize the transmission and the reception of infrared light signals only by externally connecting a single infrared light emitting diode; the emission circuit and the traditional multistage current mirror amplifying circuit which do not adopt the traditional switching tube series current limiting resistor are not adopted, and the emission current is less influenced by the power supply voltage.

Further, the infrared emission circuit comprises a first reference voltage generation module and a current amplification module; the first reference voltage generation module generates a first reference voltage according to the PWM signal; and the current amplifying module is used for converting the first reference voltage into current and amplifying the current to obtain emission current so as to drive an external infrared light-emitting diode.

Further, the current amplifying module comprises a first operational amplifier, a first resistor, a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube; the non-inverting input end of the first operational amplifier is grounded through the first resistor, and the inverting input end of the first operational amplifier is connected with the first reference voltage; the first MOS tube is a PMOS tube, the source electrode of the first MOS tube is connected with a power supply on the sheet, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier; the second MOS tube is a PMOS tube, the source electrode of the second MOS tube is connected with a power supply on the sheet, the grid electrode of the second MOS tube is connected with the output end of the first operational amplifier, and the drain electrode of the second MOS tube is connected with the drain electrode of the third MOS tube; the third MOS tube is an NMOS tube, the source electrode of the third MOS tube is grounded, and the grid electrode of the third MOS tube is connected with the drain electrode of the third MOS tube; the fourth MOS tube is an NMOS tube, the grid electrode of the fourth MOS tube is connected with the grid electrode of the third MOS tube, the source electrode of the fourth MOS tube is grounded, and the drain electrode of the fourth MOS tube is connected with an infrared light emitting diode external pin.

Further, the digital controller controls the infrared emission circuit by sending an emission enabling control signal; the infrared emission circuit also comprises a logic control module; the logic control module includes: a first AND gate and a first inverter; the first AND gate performs AND operation on the PWM signal and the emission enabling control signal to obtain a normal phase control signal; the first inverter performs inversion processing on the normal-phase control signal to obtain an inversion control signal; the first reference voltage generation module includes: the positive temperature coefficient current source, the fifth PNP tube and the first capacitor; one end of the positive temperature coefficient current source is connected with a power supply on the sheet, and the other end of the positive temperature coefficient current source is connected with the emitter of the fifth PNP tube; the base electrode and the collector electrode of the fifth PNP tube are grounded; the emitter of the fifth PNP tube is connected with the inverting input end of the first operational amplifier OTA and is the first reference voltage output end; one end of the first capacitor is connected with the emitter of the fifth PNP tube, and the other end of the first capacitor is grounded; the current amplifying module further comprises a sixth MOS tube, a seventh MOS tube and a second resistor; the sixth MOS tube is an NMOS tube, the drain electrode of the sixth MOS tube is connected with the inverting input end of the first operational amplifier, the source electrode of the sixth MOS tube is grounded, and the grid electrode of the sixth MOS tube is connected with the inverting control signal; the seventh MOS tube is a PMOS tube, the source electrode of the seventh MOS tube passes through the power supply on the second resistor connection sheet, the drain electrode of the seventh MOS tube is connected with the output end of the first operational amplifier, and the grid electrode of the seventh MOS tube is connected with the normal phase control signal.

Further, the digital controller also sends a gear adjusting signal to control the infrared emission circuit to generate a gear of emission current; the gear adjusting signals comprise a first original gear adjusting signal and a second original gear adjusting signal; the logic control module further comprises a second inverter, a third inverter, a fourth inverter and a fifth inverter; the second inverter performs inversion processing on the first original gear adjusting signal to obtain a first inverted gear signal; the third inverter performs inversion processing on the first inversion gear signal again to obtain a first secondary inversion gear signal; the fourth inverter performs inversion processing on the second original gear adjusting signal to obtain a second inverted gear signal; the fifth inverter performs inversion processing on the second inversion gear signal again to obtain a second inversion gear signal; the current amplifying module further comprises a gear adjusting unit; the gear position adjusting unit includes: the first gear adjusting MOS tube, the second gear adjusting MOS tube, the third gear adjusting MOS tube, the fourth gear adjusting MOS tube, the eighth MOS tube and the ninth MOS tube are all PMOS tubes; the source electrode of the first gear adjusting MOS tube is connected with a power supply, the drain electrode of the first gear adjusting MOS tube is connected with the source electrode of the second gear adjusting MOS tube, and the grid electrode of the first gear adjusting MOS tube is connected with the first secondary reverse phase gear signal; the source electrode of the second gear adjusting MOS tube is connected with the drain electrode of the first gear adjusting MOS tube, the drain electrode is connected with the output end of the first operational amplifier, and the grid electrode is connected with the first reverse phase gear signal; the source electrode of the eighth MOS tube is connected with a power supply, the drain electrode of the eighth MOS tube is connected with the drain electrode of the second MOS tube, and the grid electrode of the eighth MOS tube is connected with the drain electrode of the first gear adjusting MOS tube; the source electrode of the third gear adjusting MOS tube is connected with a power supply, the drain electrode of the third gear adjusting MOS tube is connected with the source electrode of the fourth gear adjusting MOS tube, and the grid electrode of the third gear adjusting MOS tube is connected with the second secondary reverse phase gear signal; the source electrode of the fourth gear adjusting MOS tube is connected with the drain electrode of the third gear adjusting MOS tube, the drain electrode is connected with the output end of the first operational amplifier, and the grid electrode is connected with the second reverse phase gear signal; and a source electrode of the ninth MOS tube is connected with a power supply on a connecting sheet, a drain electrode of the ninth MOS tube is connected with a drain electrode of the second MOS tube, and a grid electrode of the ninth MOS tube is connected with a drain electrode of the third gear adjusting MOS tube.

Further, the infrared receiving circuit includes: the device comprises a micro-current detection module, a second reference voltage generation module and a comparison module; the micro-current detection module is used for obtaining micro-current generated by an external infrared light emitting diode after receiving an infrared light signal and converting the micro-current into a first detection voltage; the second reference voltage generation module generates a second reference voltage; the comparison module is used for comparing the first detection voltage with the second reference voltage to obtain a second detection voltage, and outputting the second detection voltage as a detection signal to the digital controller.

Further, the micro-current detection module includes: an amplifier and a feedback circuit; the input end of the amplifier is connected with an external pin of the infrared light-emitting diode, and the output end of the amplifier is connected with the inverting input end of the comparison module; the feedback circuit is connected between the input end and the output end of the amplifier in a bridging way; the output end of the second reference voltage generation module is connected with the non-inverting input end of the comparison module.

Further, the infrared receiving circuit further comprises an auxiliary circuit; the auxiliary circuit generates a first bias voltage, a second bias voltage and a third bias voltage; the amplifier comprises a tenth MOS tube, an eleventh MOS tube and a twelfth MOS tube; the tenth MOS tube is a PMOS tube, a source electrode of the tenth MOS tube is connected with a power supply on a sheet, a drain electrode of the tenth MOS tube is connected with an external pin of the infrared light-emitting diode, and a grid electrode of the tenth MOS tube is connected with the first bias voltage; the eleventh MOS tube is a PMOS tube, the source electrode of the eleventh MOS tube is connected with an external pin of the infrared light-emitting diode, the grid electrode of the eleventh MOS tube is connected with the second bias voltage, the drain electrode of the eleventh MOS tube is a first detection voltage output end, and the eleventh MOS tube is connected with the inverting input end of the comparison module; the twelfth MOS transistor is an NMOS transistor, the drain electrode of the twelfth MOS transistor is connected with the source electrode of the eleventh MOS transistor, the source electrode is grounded, and the grid electrode is connected with the third bias voltage; the feedback circuit comprises a thirteenth MOS tube and a third resistor; the thirteenth MOS tube is an NMOS tube, the grid electrode of the thirteenth MOS tube is connected with the drain electrode of the eleventh MOS tube, the drain electrode of the thirteenth MOS tube is connected with the external pin of the infrared light-emitting diode, and the source electrode of the thirteenth MOS tube is grounded through the third resistor.

Further, the second reference voltage generating module comprises a fourteenth MOS tube, a fifteenth MOS tube, an adjustable resistor, a sixteenth MOS tube and a fourth resistor; the fourteenth MOS tube is a PMOS tube, a source electrode of the fourteenth MOS tube is connected with a power supply on a sheet, a grid electrode of the fourteenth MOS tube is connected with the first bias voltage, and a drain electrode of the fourteenth MOS tube is connected with a source electrode of the fifteenth MOS tube; the fifteenth MOS tube is a PMOS tube, the grid electrode of the fifteenth MOS tube is connected with the second bias voltage, and the drain electrode of the fifteenth MOS tube is connected with one end of the adjustable resistor; the sixteenth MOS tube is an NMOS tube, the drain electrode of the sixteenth MOS tube is connected with the other end of the adjustable resistor, the grid electrode of the sixteenth MOS tube is connected with the drain electrode of the fifteenth MOS tube, and the source electrode of the sixteenth MOS tube is grounded through the fourth resistor; the drain electrode of the sixteenth MOS tube is a second reference voltage output end and is connected with the non-inverting input end of the comparison module; the digital controller sends out an accuracy configuration signal to adjust the resistance value of the adjustable resistor.

Based on the same inventive concept, the present invention also provides an infrared transceiver, comprising: an infrared light emitting diode and any one of the integrated circuits for realizing infrared receiving and transmitting; the integrated circuit for realizing infrared receiving and transmitting is provided with an infrared light-emitting diode external pin; and the cathode of the infrared light emitting diode is connected with an external pin of the infrared light emitting diode of the integrated circuit for realizing infrared receiving and transmitting, and the anode of the infrared light emitting diode is connected with a power supply.

For a better understanding and implementation, the present invention is described in detail below with reference to the drawings.

Drawings

FIG. 1 is a block diagram of an infrared transceiver of the present invention;

fig. 2 is a schematic structural diagram of an infrared transceiver according to embodiment 1 of the present invention;

FIG. 3 is a schematic diagram of an infrared emission circuit according to embodiment 2 of the present invention;

Fig. 4 is a schematic diagram of an infrared receiving circuit according to embodiment 2 of the present invention;

FIG. 5 is a schematic diagram of simulation results of an infrared emission circuit according to embodiment 2 of the present invention;

Fig. 6 is a schematic diagram of a simulation result of the infrared receiving circuit in embodiment 2 of the present invention.

Detailed Description

Referring to fig. 1, fig. 1 is a schematic block diagram of an infrared transceiver according to the present invention. The infrared transceiver of the invention comprises the integrated circuit for realizing infrared transceiver and the infrared light-emitting diode D1. The integrated circuit for realizing infrared receiving and transmitting comprises an infrared transmitting circuit 1, an infrared receiving circuit 2 and a digital controller 3. The integrated circuit for realizing infrared receiving and transmitting is provided with an infrared light emitting diode external pin PAD for externally connecting an infrared light emitting diode D1.

The digital controller 3 generates a PWM signal tx_sig conforming to an infrared communication protocol and outputs the PWM signal tx_sig to the infrared transmitting circuit. The infrared emission circuit 1 generates an emission current according to a PWM signal TX_SIG sent by the digital controller, so that the external infrared light emitting diode D1 emits an infrared light signal according to the emission current. The infrared receiving circuit 2 detects micro-current generated by the external infrared light emitting diode D1 when receiving an infrared light signal, obtains a detection signal rx_sig, and outputs the detection signal to the digital controller 3. The digital controller 3 learns the corresponding infrared light signal according to the detection signal RX_SIG output by the infrared receiving circuit.

The digital controller 3 also outputs an emission enabling control signal TX_EN and a gear adjusting signal S to control the work of the infrared emission circuit 1; and outputs a reception enable control signal rx_en and an accuracy configuration signal P to control the operation of the infrared receiving circuit 2.

The integrated circuit for realizing infrared receiving and transmitting belongs to a half-duplex circuit, and the infrared transmitting circuit and the infrared receiving circuit cannot work simultaneously, namely cannot transmit infrared light signals and receive infrared light signals simultaneously. The integrated circuit for realizing infrared receiving and transmitting is used for transmitting an infrared light signal or receiving an infrared light signal, and is determined by the level states of a transmission enabling control signal TX_EN and a receiving enabling control signal RX_EN sent by the digital controller. When the emission enable control signal tx_en is at a high level and the reception enable control signal rx_en is at a low level, the infrared emission circuit operates, and the infrared light emitting diode D1 emits an infrared light signal. When the emission enable control signal tx_en is at a low level and the reception enable control signal rx_en is at a high level, the infrared receiving circuit operates, and the infrared light emitting diode D1 receives an infrared light signal.

The gear adjusting signal S sent by the digital controller 3 can adjust the amplitude of the emission current output by the infrared emission circuit, so that the intensity gear of the infrared light emitting diode D1 emitting infrared light signals is adjusted. The precision configuration signal P sent by the digital controller 3 can adjust the precision of receiving the micro current by the infrared receiving circuit 2, thereby adjusting the sensitivity of detecting the infrared light signal.

Example 1

Referring to fig. 2, fig. 2 is a schematic structural diagram of an infrared transceiver according to embodiment 1 of the present invention. In this embodiment, the infrared emission circuit 1 includes a first reference voltage generation module Vrefgen1 and a current amplification module. The first reference voltage generation module Vrefgen1 generates a first reference voltage Vref1 according to a PWM signal TX_SIG sent by the digital controller; the first reference voltage generation module Vrefgen1 is controlled by a transmission enable control signal tx_en sent by the digital controller 3. The current amplifying module converts the first reference voltage Vref1 into current and amplifies the current to obtain emission current so as to drive an external infrared light emitting diode D1.

Specifically, the current amplifying module includes a first operational amplifier OTA, a first resistor R1, a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, and a fourth MOS transistor M4.

The non-inverting input end of the first operational amplifier OTA is grounded to VSS through the first resistor R1, and the inverting input end of the first operational amplifier OTA is connected with the first reference voltage Vref1.

The first MOS tube M1 is a PMOS tube, the source electrode of the first MOS tube M is connected with the power supply VDD1, the drain electrode of the first MOS tube M is connected with the non-inverting input end of the first operational amplifier OTA, and the grid electrode of the first MOS tube M is connected with the output end of the first operational amplifier OTA.

The second MOS tube M2 is a PMOS tube, the source electrode of the second MOS tube M is connected with the power supply VDD1, the grid electrode of the second MOS tube M is connected with the output end of the first operational amplifier OTA, and the drain electrode of the second MOS tube M3 is connected with the drain electrode of the third MOS tube.

The third MOS tube M3 is an NMOS tube, the drain electrode of the third MOS tube M3 is connected with the drain electrode of the second MOS tube M2, the source electrode of the third MOS tube M is grounded, and the grid electrode of the third MOS tube M is connected with the drain electrode of the third MOS tube.

The fourth MOS tube M4 is an NMOS tube, the grid electrode of the fourth MOS tube is connected with the grid electrode of the third MOS tube, the source electrode of the fourth MOS tube is grounded, and the drain electrode of the fourth MOS tube is connected with the infrared light emitting diode external pin PAD.

The cathode of the infrared light emitting diode D1 is connected with the infrared light emitting diode external pin PAD, and the anode is connected with an external power supply VDD.

The working principle of the infrared emission circuit of the embodiment 1 of the invention is as follows: the first reference voltage Vref1 corresponds to the PWM signal tx_sig transmitted by the digital controller. Due to the imaginary short nature of the operational amplifiers, the voltages at the non-inverting and inverting inputs of the first operational amplifier OTA are both equal to the first reference voltage Vref1. The two ends of the first resistor R1 are respectively connected to the non-inverting input terminal of the first operational amplifier OTA and the ground, so that the current flowing through the first resistor R1 is equal to the first reference voltage Vref1 divided by the resistance value of the first resistor R1, and obviously, the current flowing through the first resistor R1 is proportional to the first reference voltage Vref1. Due to the nature of the virtual circuit breaker of the operational amplifier, the drain current of the first MOS transistor M1 is equal to the current flowing through the first resistor R1, and thus the drain current of the first MOS transistor M1 is also proportional to the first reference voltage Vref1. The first MOS transistor M1, the second MOS transistor M2, the third MOS transistor M3, and the fourth MOS transistor M4 form a current mirror, which plays a role in amplifying the drain current of the first MOS transistor M1, so that the drain current of the fourth MOS transistor M4 is proportional to the current of the output end of the first operational amplifier OTA. The amplification ratio of the drain current of the first MOS tube M1 by the current mirror formed by the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 can be adjusted by adjusting the parameter ratio of the first MOS tube M1 and the second MOS tube M2 and/or the parameter ratio of the third MOS tube M3 and the fourth MOS tube M4. The drain electrode of the fourth MOS transistor M4 is connected to the external pin PAD of the infrared light emitting diode, so that when the infrared emission circuit works, the emission current of the infrared light emitting diode D1 is proportional to the first reference voltage Vref1, and corresponds to the PWM signal sent by the digital controller, and the current direction of the PWM signal is from the anode to the cathode of the infrared light emitting diode D1.

Specifically, the infrared receiving circuit 2 includes a micro-current detecting module 21, a second reference voltage generating module Vrefgen2, and a comparing module 22. The micro-current detection module 21 obtains a micro-current Itest generated by the external infrared light emitting diode D1 after receiving an external infrared light signal, and converts the micro-current Itest into a first detection voltage Vo1. The second reference voltage generating module Vrefgen2 generates a second reference voltage Vref2. The comparing module 22 compares the first detection voltage Vo1 with the second reference voltage Vref2 to obtain a second detection voltage OUT, and outputs the second detection voltage OUT as a detection signal rx_sig to the digital controller 3. The digital controller 3 learns its corresponding infrared light signal by analyzing the detection signal rx_sig.

The micro-current detection module comprises an amplifier A1 and a feedback circuit G(s). The input end of the amplifier A1 is connected with the external pin PAD of the infrared light emitting diode to obtain micro-current Iest. The output of the amplifier A1 is connected to the inverting input of the comparison module 22. The amplifier A1 functions to amplify the micro current Itest to obtain the first detection voltage Vo 1. The feedback circuit G(s) is connected between the input end and the output end of the amplifier A1 in a bridging mode and plays a role in reducing the input impedance of the micro-current detection module.

The inverting input end of the comparison module 22 is connected to the output end of the amplifier A1, the non-inverting input end is connected to the second reference voltage Vref2 output by the second reference voltage generation module Vrefgen2, and the output end is connected to the detection signal receiving end rx_sig of the digital controller.

Example 2

Referring to fig. 3, fig. 3 is a schematic diagram of an infrared emission circuit according to embodiment 2 of the present invention. The infrared emission circuit of embodiment 2 of the invention comprises a logic control module, a first reference voltage generation module Vrefgen1 and a current amplification module.

The logic control module is used for processing the PWM signal TX_SIG, the enable control signal TX_EN and the gear adjusting signal S sent by the digital controller and generating a normal-phase control signal TX_CTRL, an inversion control signal TX_CTRLN, a first inversion gear signal S1n, a first second inversion gear signal S1nn, a second inversion gear signal S2n and a second inversion gear signal S2nn which control the infrared emission circuit.

The lower half of fig. 3 shows the structure of the logic control module of embodiment 2 of the present invention. The logic control module includes a first AND gate AND1, a first inverter INV1, a second inverter INV2, a third inverter INV3, a fourth inverter INV4, AND a fifth inverter INV5. The first AND gate performs AND operation on the PWM signal TX_SIG and the emission enabling control signal TX_EN to obtain a normal phase control signal TX_CTRL; and then the first inverter performs inversion processing on the normal phase control signal TX_CTRL to obtain an inversion control signal TX_CTRLN.

The gear adjusting signal S sent by the digital controller comprises a first original gear adjusting signal S1 and a second original gear adjusting signal S2. The second inverter INV2 performs an inversion process on the first original gear adjusting signal s1 to obtain a first inverted gear signal s1n; the third inverter INV3 performs an inversion process on the first inverted gear signal s1n again to obtain a first secondary inverted gear signal s1nn. The fourth inverter INV4 performs an inversion process on the second original gear adjusting signal s2 to obtain a second inverted gear signal s2n; the fifth inverter INV5 performs an inversion process on the second inverted gear signal s2n again, to obtain a second inverted gear signal s2nn.

Specifically, referring to fig. 3, the first reference voltage generating module Vrefgen1 includes a positive temperature coefficient current source Iptat, a fifth PNP transistor M5, and a first capacitor C1. The power supply VDD1 is connected to the connecting piece of one end of the positive temperature coefficient current source Iptat, the other end of the positive temperature coefficient current source Iptat is connected with the emitter of the fifth PNP tube M5, and the current direction is as follows: from one end of the power supply VDD1 on the connection pad to the other end connected to the emitter of the fifth PNP transistor M5. And the emitter of the fifth PNP tube M5 is connected with the other end of the positive temperature coefficient current source Iptat, and the base electrode and the collector are both grounded to VSS. The emitter voltage of the fifth PNP transistor M5 is the first reference voltage Vref1, and the emitter of the fifth PNP transistor M5 is the node Vref1. One end of the first capacitor C1 is connected to the emitter of the fifth PNP transistor M5, and the other end is grounded to VSS.

Since the fifth PNP transistor M5 is a PNP transistor, the base-emitter voltage Vbe thereof decreases with increasing temperature, and is a negative temperature coefficient; and the positive temperature coefficient current source Iptat is a positive temperature coefficient current source. Therefore, by reasonably adjusting the temperature coefficients of the current source Iptat and the fifth PNP transistor M5, the influence of temperature on the first reference voltage Vref1 can be offset, and the first reference voltage Vref1 is zero temperature coefficient. The first capacitor C1 plays roles of reducing the change speed of the first reference voltage Vref1, filtering noise, and suppressing surge current.

Specifically, referring to fig. 3, the current amplifying module includes a first operational amplifier OTA, a first resistor R1, a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a sixth MOS transistor M6, a seventh MOS transistor M7, a second resistor R2, and a gear adjusting unit.

The non-inverting input end of the first operational amplifier OTA is grounded to VSS through a first resistor R1, and the inverting input end of the first operational amplifier OTA is connected with a first reference voltage Vref1, namely, the emitter of the fifth PNP tube M5.

The second MOS tube M2 is a PMOS tube, the source electrode of the second MOS tube M is connected with the power supply VDD1, the grid electrode of the second MOS tube M is connected with the output end of the first operational amplifier OTA, and the drain electrode of the second MOS tube M3 is connected with the drain electrode of the third MOS tube. Further, the second MOS transistor M2 is composed of n PMOS transistor units with the same parameters as the first MOS transistor M1; the n PMOS tube units are in parallel connection, the source electrode of each PMOS tube unit is connected with a power supply VDD1, the grid electrode is connected with the output end of the first operational amplifier OTA, and the drain electrode is connected with the drain electrode of the third MOS tube M3; n is a set multiple of the number of current mirrors.

The sixth MOS tube is an NMOS tube, the drain electrode of the sixth MOS tube is connected with the inverting input end of the first operational amplifier OTA, the source electrode of the sixth MOS tube is grounded to VSS, and the grid electrode of the sixth MOS tube is connected with the inverting control signal TX_CTRLN output by the logic control module.

The seventh MOS tube M7 is a PMOS tube, the source electrode of the seventh MOS tube M is connected with the power supply VDD1 on the sheet through the second resistor R2, the drain electrode of the seventh MOS tube M is connected with the output end of the first operational amplifier OTA, and the grid electrode of the seventh MOS tube M is connected with the normal phase control signal TX_CTRL output by the logic control module.

The gear position adjusting unit includes: first gear adjustment MOS pipe Mj1, second gear adjustment MOS pipe Mj2, third gear adjustment MOS pipe Mj3, fourth gear adjustment MOS pipe Mj4, eighth MOS pipe M8 and ninth MOS pipe M9. The first gear adjusting MOS tube Mj1, the second gear adjusting MOS tube Mj2, the third gear adjusting MOS tube Mj3, the fourth gear adjusting MOS tube Mj4, the eighth MOS tube M8 and the ninth MOS tube M9 are PMOS tubes.

The source electrode of the first gear adjusting MOS tube Mj1 is connected with a power supply VDD1, the drain electrode of the first gear adjusting MOS tube Mj1 is connected with the source electrode of the second gear adjusting MOS tube Mj2, and the grid electrode of the first gear adjusting MOS tube Mj1 is connected with a first secondary reverse phase gear signal s1nn.

And the source electrode of the second gear adjusting MOS tube Mj2 is connected with the drain electrode of the first gear adjusting MOS tube Mj1, the drain electrode is connected with the output end of the first operational amplifier OTA, and the grid electrode is connected with the first reverse phase gear signal s1n.

And a drain electrode of the eighth MOS tube M8 is connected with a drain electrode of the second MOS tube M2, and a grid electrode of the eighth MOS tube M8 is connected with a drain electrode of the first gear adjusting MOS tube Mj 1. Further, the eighth MOS transistor M8 is composed of 2n PMOS transistor units with the same parameters as the first MOS transistor M1; the 2n PMOS tube units are in parallel connection, the source electrode of each PMOS tube unit is connected with the power supply VDD1, the drain electrode is connected with the drain electrode of the second MOS tube M2, and the grid electrode is connected with the drain electrode of the first gear adjusting MOS tube Mj 1; n is a set multiple of the number of current mirrors.

And a source electrode of the third gear adjusting MOS tube Mj3 is connected with a power supply VDD1 on a connecting sheet, a drain electrode of the third gear adjusting MOS tube Mj4 is connected with a source electrode of the fourth gear adjusting MOS tube Mj4, and a grid electrode of the third gear adjusting MOS tube Mj3 is connected with a second secondary reverse phase gear signal s2nn.

And the source electrode of the fourth gear adjusting MOS tube Mj4 is connected with the drain electrode of the third gear adjusting MOS tube Mj3, the drain electrode is connected with the output end of the first operational amplifier OTA, and the grid electrode is connected with the second reverse phase gear signal s2n.

And a source electrode of the ninth MOS tube M9 is connected with a power supply VDD1 on a connecting sheet, a drain electrode of the ninth MOS tube M9 is connected with a drain electrode of the second MOS tube M2, and a grid electrode of the ninth MOS tube M9 is connected with a drain electrode of the third gear adjusting MOS tube Mj 3. Further, the ninth MOS transistor M9 is composed of 4n PMOS transistor units with the same parameters as the first MOS transistor M1; the 4n PMOS tube units are in parallel connection, the source electrode of each PMOS tube unit is connected with the power supply VDD1, the drain electrode is connected with the drain electrode of the second MOS tube M2, and the grid electrode is connected with the drain electrode of the third gear adjusting MOS tube Mj 3; n is a set multiple of the number of current mirrors.

The working principle of the infrared emission circuit of embodiment 2 of the present invention includes:

1. The logic control module is configured to determine that, when the emission enable control signal tx_en sent by the digital controller is at a high level, the level state of the normal phase control signal tx_ctrl follows the PWM signal tx_sig sent by the digital controller, and the level state of the reverse phase control signal tx_ctrln is opposite to the PWM signal tx_sig sent by the digital controller.

① When the emission enable control signal tx_en is at a high level and the PWM signal tx_sig is at a high level, the non-inverting control signal tx_ctrl is at a high level and the inverting control signal tx_ctrln is at a low level. Since the gate of the sixth MOS transistor M6 is connected to the inverted control signal tx_ctrln, when the inverted control signal tx_ctrln is at a low level, the sixth MOS transistor M6 is turned off. Since the gate of the seventh MOS transistor M7 is connected to the positive control signal tx_ctrl, the seventh MOS transistor M7 is turned off when the positive control signal tx_ctrl is at a high level.

When the sixth MOS transistor M6 and the seventh MOS transistor M7 are turned off, the node Vref1 is high level through the power supply VDD1 on the current source Iptat connection pad. The output end of the first operational amplifier is at a low level, so that the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are all conducted. The infrared light emitting diode D1 normally transmits an emission current.

② When the emission enable control signal tx_en is at a high level and the PWM signal tx_sig is at a low level, the non-inverting control signal tx_ctrl is at a low level and the inverting control signal tx_ctrln is at a high level. Since the gate of the sixth MOS transistor M6 is connected to the inverted control signal tx_ctrln, when the inverted control signal tx_ctrln is at a high level, the sixth MOS transistor M6 is turned on. Since the gate of the seventh MOS transistor M7 is connected to the positive control signal tx_ctrl, the seventh MOS transistor M7 is turned on when the positive control signal tx_ctrl is at a low level.

When the sixth MOS transistor M6 and the seventh MOS transistor M7 are turned on, the node Vref1 is grounded VSS through the ds channel of the sixth MOS transistor M6, and the first reference voltage Vref1 is equal to 0. The output end of the first operational amplifier is at a high level through the ds channel of the seventh MOS tube M7 and the power supply VDD1 on the second resistor R2 connecting sheet, so that the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are all cut off. No current passes through the infrared light emitting diode D1.

③ When the emission enabling control signal TX_EN is in a low level, the level state of the normal phase control signal TX_CTRL is always kept in a low level, and is irrelevant to a PWM signal TX_SIG sent by the digital controller; the level state of the inversion control signal tx_ctrln also remains high all the time. As in the case where the emission enable control signal tx_en is at a high level and the PWM signal is at a low level, no current flows through the infrared light emitting diode D1 regardless of the PWM signal tx_sig when the emission enable control signal tx_en is at a low level.

From the above analysis, it can be derived that: when the emission enable control signal tx_en is at a high level, the emission current Iout passing through the infrared light emitting diode D1 follows the first reference voltage Vref1, that is, follows the PWM signal tx_sig sent by the digital controller; at this time, the infrared light emitting diode D1 emits an infrared light signal conforming to an infrared communication protocol corresponding to the PWM signal. When the emission enable control signal tx_en is at a low level, the emission current Iout passing through the infrared light emitting diode D1 is equal to 0; at this time, the infrared light emitting diode D1 cannot emit an infrared light signal, and only receives an external infrared light signal.

2. The gear adjusting unit can adjust the intensity gear of the infrared light emitting diode D1 emitting infrared light signals according to the gear adjusting signal S sent by the digital controller, and the principle is as follows:

① When the first original gear adjusting signal s1 is at a high level, the first reverse phase gear signal s1n is at a low level, the first secondary reverse phase gear signal s1nn is at a high level, the first gear adjusting MOS tube Mj1 is turned off, the second gear adjusting MOS tube Mj2 is turned on, the grid electrode of the eighth MOS tube M8 is connected with the output end of the first operational amplifier OTA through the second gear adjusting MOS tube Mj2, and the eighth MOS tube M8 works normally as a current mirror. On the contrary, when the first original gear adjusting signal s1 is at a low level, the first reverse phase gear signal s1n is at a high level, the first secondary reverse phase gear signal s1nn is at a low level, the first gear adjusting MOS tube Mj1 is turned on, the second gear adjusting MOS tube Mj2 is turned off, so that the gate of the eighth MOS tube M8 is turned off through the power supply VDD1 on the connecting piece of the first gear adjusting MOS tube Mj1, and the eighth MOS tube M8 is turned off.

② When the second original gear adjusting signal s2 is at a high level, the second reverse phase gear signal s2n is at a low level, the second reverse phase gear signal s2nn is at a high level, the third gear adjusting MOS tube Mj3 is turned off, the fourth gear adjusting MOS tube Mj4 is turned on, so that the grid of the ninth MOS tube M9 is connected with the output end of the first operational amplifier OTA through the fourth gear adjusting MOS tube Mj4, and the ninth MOS tube M9 works normally as a current mirror. On the contrary, when the second original gear adjusting signal s2 is at a low level, the second reverse phase gear signal s2n is at a high level, the second reverse phase gear signal s2nn is at a low level, the third gear adjusting MOS tube Mj3 is turned on, the fourth gear adjusting MOS tube Mj4 is turned off, so that the gate of the ninth MOS tube M9 is turned off through the power supply VDD1 on the third gear adjusting MOS tube Mj3 connecting piece, and the ninth MOS tube M9 is turned off.

In summary, at the point ①②, the corresponding relationship between the gear adjusting signal S and whether the second MOS transistor M2, the eighth MOS transistor M8, and the ninth MOS transistor M9 are turned on is as shown in the following table:

Gear adjusting signal (s 2, s 1)	M2	M9	M8
				(0,0)	1	0	0
(0,1)	1	0	1
				(1,0)	1	1	0
(1,1)	1	1	1

In the table, (s 2, s 1) represents the level states of the second original gear position adjustment signal s2 and the first original gear position adjustment signal s1, 1 represents a high level, and 0 represents a low level; m2, M9 and M8 respectively represent the conducting states of the second MOS transistor M2, the ninth MOS transistor M9 and the eighth MOS transistor M8, 1 represents the conducting state, and 0 represents the cutting-off state.

③ In one embodiment, the second MOS transistor M2 is composed of n PMOS transistor units, the eighth MOS transistor M8 is composed of 2n PMOS transistor units, and the ninth MOS transistor M9 is composed of 4n PMOS transistor units. When the second MOS tube M2 is conducted, n PMOS tube units forming the second MOS tube M2 are all used as current mirrors to work normally; when the eighth MOS tube M8 is conducted, all 2n PMOS tube units forming the eighth MOS tube M8 work normally as current mirrors; when the ninth MOS tube M9 is conducted, the 4n PMOS tube units forming the ninth MOS tube M9 are all used as current mirrors to work normally. Therefore, the corresponding relation between the gear adjusting signal S and the number K of the PMOS tube units which are connected to the circuit to work as the current mirror is shown in the following table:

Gear adjusting signal (s 2, s 1)	M2	M9	M8	K
					(0,0)	1	0	0	n
(0,1)	1	0	1	3n
					(1,0)	1	1	0	5n
(1,1)	1	1	1	7n

Therefore, by adjusting the gear adjusting signal S, the number K of PMOS tube units connected to the output end of the first operational amplifier OTA and operating as a current mirror can be determined. When the number of PMOS tube units forming the second MOS tube M2, the eighth MOS tube M8 and the ninth MOS tube M9 meets the relation of 1:2:4, the value corresponding to the gear adjusting signal S has a linear relation. As can be deduced by a person skilled in the art, the emission current Iout through the infrared light emitting diode D1 approximately satisfies the following formula when the infrared emission circuit is in operation: Wherein K represents the number of PMOS tube units which are connected to the output end of the first operational amplifier OTA and work as a current mirror, vref1 represents a first reference voltage, and R1 represents the resistance value of a first resistor R1. In one embodiment, the resistance value of the first resistor R1 is adjustable, and the digital controller 3 may adjust the resistance value of the first resistor R1 through a digital signal, so as to calibrate the value of the emission current Iout.

In addition, in other embodiments, the number of PMOS units that form the second MOS transistor M2, the eighth MOS transistor M8, and the ninth MOS transistor M9 does not have to satisfy a ratio relationship of 1:2:4, and those skilled in the art can specifically adjust the ratio relationship as required. The specific ratio relation of 1:2:4 only affects the linearity of gear adjustment, and does not affect the technical problem of how to adjust the infrared light intensity gear through the gear adjustment signal.

In summary, the gear adjusting signal S sent by the digital controller may control the number K of connected current mirrors, so as to adjust the emission current Iout passing through the infrared light emitting diode D1, and further adjust the intensity gear of the infrared light emitting diode D1 emitting infrared light signals. The larger the number K of the connected current mirrors is, the higher the intensity gear of the infrared light emitting diode D1 emitting infrared light signals is.

Specifically, referring to fig. 4, fig. 4 is a schematic structural diagram of an infrared receiving circuit in embodiment 2 of the present invention. The infrared receiving circuit 3 of embodiment 2 of the present invention includes an auxiliary circuit (not shown), a micro-current detecting module 21, a second reference voltage generating module Vrefgen2, and a comparing module 22. The micro-current detection module 21 obtains a micro-current Itest generated by the external infrared light emitting diode D1 after receiving an external infrared light signal, and converts the micro-current Itest into a first detection voltage Vo1. The second reference voltage generating module Vrefgen2 generates a second reference voltage Vref2. The comparing module 22 compares the first detection voltage Vo1 with the second reference voltage Vref2 to obtain a second detection voltage OUT, and outputs the second detection voltage OUT as a detection signal rx_sig to the digital controller. The digital controller learns the corresponding infrared light signal by analyzing the detection signal RX_SIG.

The auxiliary circuit is used for generating a first bias voltage Vpbias, a second bias voltage Vpbias and a third bias voltage Vnbias so as to provide bias voltages required by normal operation in a saturation region for the MOS tube in the micro-current detection module.

Referring to fig. 4, the micro-current detection module 21 includes an amplifier A1 and a feedback circuit G(s).

The amplifier A1 comprises a tenth MOS tube M10, an eleventh MOS tube M11 and a twelfth MOS tube M12. The tenth MOS tube M10 is a PMOS tube, the source electrode of the tenth MOS tube is connected with the power supply VDD1 on the sheet, the drain electrode of the tenth MOS tube is connected with the external pin PAD (namely, connected with micro current Itest) of the infrared light emitting diode, and the grid electrode of the tenth MOS tube is connected with the first bias voltage Vpbias1. The eleventh MOS tube M11 is a PMOS tube, the source electrode of the eleventh MOS tube M is connected with the infrared light emitting diode external pin PAD, the drain electrode of the eleventh MOS tube M is an output end of the first detection voltage Vo1, and the grid electrode of the eleventh MOS tube M is connected with the second bias voltage Vpbias. The twelfth MOS transistor M12 is an NMOS transistor, the drain electrode thereof is connected with the source electrode of the eleventh MOS transistor M11, the source electrode is grounded, and the gate electrode thereof is connected with the third bias voltage Vnbias.

The feedback circuit G(s) comprises a thirteenth MOS tube M13 and a third resistor R3. The thirteenth MOS transistor M13 is an NMOS transistor, the gate of which is connected to the drain of the eleventh MOS transistor M11 (i.e., connected to the first detection voltage Vo 1), the drain is connected to the external pin PAD of the infrared light emitting diode, and the source is grounded through the third resistor R3.

The second reference voltage generating module Vrefgen2 includes a fourteenth MOS transistor M14, a fifteenth MOS transistor M15, an adjustable resistor RD, a sixteenth MOS transistor M16, and a fourth resistor R4. The fourteenth MOS tube M14 is a PMOS tube, the source electrode of the fourteenth MOS tube is connected with the power supply VDD1 on the sheet, the grid electrode of the fourteenth MOS tube is connected with the first bias voltage Vpbias1, and the drain electrode of the fourteenth MOS tube is connected with the source electrode of the fifteenth MOS tube M15. The fifteenth MOS transistor M15 is a PMOS transistor, a source thereof is connected to a drain of the fourteenth MOS transistor M14, a gate thereof is connected to the second bias voltage Vpbias, and a drain thereof is connected to one end of the adjustable resistor RD. The sixteenth MOS transistor M16 is an NMOS transistor, a drain thereof is connected to the other end of the adjustable resistor RD, a gate thereof is connected to the drain of the fifteenth MOS transistor M15, and a source thereof is grounded through the fourth resistor R4. The drain electrode of the sixteenth MOS transistor M16 is the output end of the second reference voltage Vref 2. The resistance value of the adjustable resistor RD can be adjusted by an accuracy configuration signal P sent by the digital controller, so that the sensitivity of the infrared receiving circuit for detecting infrared light signals is adjusted.

The comparison module 22 comprises a hysteresis comparator CMP. The non-inverting input end of the hysteresis comparator CMP is connected to the drain electrode of the sixteenth MOS transistor M16, i.e. to the second reference voltage Vref2. The inverting input end of the hysteresis comparator CMP is connected to the drain electrode of the twelfth MOS transistor M12, i.e. to the first detection voltage Vo1. The output end of the hysteresis comparator CMP is a second detection voltage OUT output end and is connected with the signal input end of the digital controller.

The working principle of the infrared receiving circuit of the embodiment 2 of the invention comprises:

1. When the emission enabling control signal TX_EN sent by the digital controller is at a low level, the infrared emission circuit stops working, and the fourth MOS tube M4 is cut off. At this time, the external infrared light emitting diode D1 cannot emit an infrared light signal, but only can receive the infrared light signal. When the external infrared light emitting diode D1 receives an external infrared light signal, an inverted micro current Itest of microampere level is generated in the infrared light emitting diode D1.

2. Considering the whole micro-current detection module as a whole, its input is micro-current Itest, its output is first detection voltage Vo1, and it can be deduced by those skilled in the art that the input impedance Z _in of the micro-current detection module can be approximately expressed as:

Wherein Z _in represents the input impedance of the micro-current detection module, V _in represents the input voltage (i.e., voltage Vtest), I _in represents the input current (i.e., micro-current Iest), r _o11 represents the intrinsic input impedance of the eleventh MOS transistor M11, r _o12 represents the intrinsic input impedance of the twelfth MOS transistor M12, G _m11 represents the transconductance of the eleventh MOS transistor M11, G _m13 represents the equivalent transconductance of the thirteenth MOS transistor M13, G _m13 denotes the transconductance of the thirteenth MOS transistor M13.

As can be deduced by those skilled in the art, the output transimpedance R _TIA of the microcurrent detection module can be approximately expressed as:

Wherein R _TIA represents the output transimpedance of the micro-current detection module, V _o1 represents the output voltage of the micro-current detection module (i.e., the first detection voltage Vo 1), I _in represents the input current (i.e., the micro-current Itest), and G _m13 represents the equivalent transconductance of the thirteenth MOS transistor M13.

The micro current Itest is multiplied by the input impedance Z _in to obtain the voltage Vtest of the node Vtest, and the voltage of the node Vtest is amplified by the eleventh MOS transistor M11 to form a pulse voltage at the output end of the first detection voltage Vo 1. By introducing the third resistor R3, the first detection voltage Vo1 can be raised and the influence of the on-chip power supply VDD1 on the transconductance can be reduced.

3. The tenth MOS transistor M10 and the fourteenth MOS transistor M14 form a current mirror, and the eleventh MOS transistor M11 and the fifteenth MOS transistor M15 form a current mirror, so as to ensure that a current I _M13 flowing through a ds channel of the thirteenth MOS transistor M13 is equal to a current I _M16 flowing through a ds channel of the sixteenth MOS transistor M16, and further ensure that a gate voltage of the sixteenth MOS transistor M16 is equal to a gate voltage of the thirteenth MOS transistor. The gate of the sixteenth MOS transistor M16 is denoted as a node Vicm, and since the gate voltage of the thirteenth MOS transistor is denoted as the first detection voltage Vo1, the voltage of the node Vicm is equal to the first detection voltage Vol. One end of the adjustable resistor RD is connected with the Vicm node, and the other end is the output end of the second reference voltage Vref 2. By adjusting the precision configuration signal P, the resistance value of the adjustable resistor RD can be adjusted, and the value of the second reference voltage Vref2 can be adjusted, so that it is ensured that the Vref2 can be between the maximum value and the minimum value of the first detection voltage Vol converted from the micro current Itest no matter the value of the micro current Itest, the comparison result OUT can accurately reflect the waveform of the micro current Itest, and the detection accuracy is improved.

Referring to fig. 5, fig. 5 is a schematic diagram showing a simulation result of an infrared emission circuit according to embodiment 2 of the present invention. In fig. 5, the PWM signal tx_sig sent by the digital controller 3 is a 38kHZ pulse signal; the transmission enable control signal tx_en remains at a high level (1V). As can be seen, the waveforms of the first reference voltage Vref1 and the emission current Iout are the same as the PWM signal tx_sig; the first detection voltage Vref1 varies between 1.3V and 0, and the peak value of the emission current Iout is around 300 mA.

Referring to fig. 6, fig. 6 is a schematic diagram showing a simulation result of an infrared receiving circuit according to embodiment 2 of the present invention. In fig. 6, itest represents a micro-current Itest flowing out of the infrared light emitting diode D1 in opposite phase when receiving an infrared light signal, and the amplitude thereof does not exceed 2 μa; the reception enable control signal rx_en maintains a high level (1V). The waveform of the first detection voltage Vo1 is the same as that of the micro current Itest, and the amplitude is between 850mV and 1V. The comparison result OUT obtained by comparing the first detection voltage Vo1 with the second reference voltage Vref2, namely the detection signal EX_SIG, has a waveform opposite to the micro current Iest, and the amplitude is between 0 and 1V.

The infrared transceiver and the integrated circuit for realizing the infrared transceiver have the following technical effects: 1. the infrared emission circuit does not adopt a traditional emission circuit with a switching tube connected in series with a current limiting resistor and a traditional multistage current mirror amplifying circuit, and the emission current Iout is less influenced by the power supply voltage VDD 1.2. According to the infrared emission circuit, the quantity K of the connected current mirrors is controlled to adjust the gear of the emission current Iout, the adjustment linearity is excellent, the circuit power consumption is small, the energy is effectively saved, and the service time of a battery is prolonged. 3. According to the infrared emission circuit, the positive temperature coefficient current source Iptat and the fifth PNP tube M5 with the base-emitter voltage being negative temperature coefficient are adopted, so that the first reference voltage Vref1 is enabled to achieve zero temperature coefficient, the temperature drift is very low, and the emission current and the emitted infrared light signals are more stable and controllable. 4. The micro-current detection module of the infrared receiving circuit reduces input impedance by introducing the feedback circuit G(s), and improves the sensitivity of detecting micro-current. 5. The resistance values of the first resistor R1 and the controllable resistor RD can be flexibly adjusted through digital signals, and the values of the emission current Iout and the second reference voltage Vref2 can be conveniently adjusted, so that the invention is suitable for various application environments.

The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that modifications and improvements can be made by those skilled in the art without departing from the spirit of the invention, and the invention is intended to encompass such modifications and improvements.

Claims

1. An integrated circuit for implementing infrared transceiving, comprising:

the infrared transmitting circuit, the infrared receiving circuit and the digital controller;

The digital controller generates PWM signals and outputs the PWM signals to the infrared emission circuit;

The infrared emission circuit generates emission current according to the PWM signal, so that an external infrared light emitting diode emits an infrared light signal according to the emission current;

The infrared receiving circuit is used for detecting micro-current generated by the external infrared light emitting diode when receiving infrared light signals, so as to obtain detection signals;

and the digital controller learns the corresponding infrared light signal according to the detection signal.

2. The integrated circuit for implementing infrared transceiving according to claim 1, wherein:

the infrared emission circuit comprises a first reference voltage generation module and a current amplification module;

The first reference voltage generation module generates a first reference voltage according to the PWM signal;

and the current amplifying module is used for converting the first reference voltage into current and amplifying the current to obtain emission current so as to drive an external infrared light-emitting diode.

3. The integrated circuit for implementing infrared transceiving according to claim 2, wherein:

The current amplifying module comprises a first operational amplifier, a first resistor, a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube;

the non-inverting input end of the first operational amplifier is grounded through the first resistor, and the inverting input end of the first operational amplifier is connected with the first reference voltage;

the first MOS tube is a PMOS tube, the source electrode of the first MOS tube is connected with a power supply on the sheet, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier;

The second MOS tube is a PMOS tube, the source electrode of the second MOS tube is connected with a power supply on the sheet, the grid electrode of the second MOS tube is connected with the output end of the first operational amplifier, and the drain electrode of the second MOS tube is connected with the drain electrode of the third MOS tube;

the third MOS tube is an NMOS tube, the source electrode of the third MOS tube is grounded, and the grid electrode of the third MOS tube is connected with the drain electrode of the third MOS tube;

the fourth MOS tube is an NMOS tube, the grid electrode of the fourth MOS tube is connected with the grid electrode of the third MOS tube, the source electrode of the fourth MOS tube is grounded, and the drain electrode of the fourth MOS tube is connected with an infrared light emitting diode external pin.

4. An integrated circuit for implementing infrared transceiving as defined in claim 3, wherein:

The digital controller controls the infrared emission circuit by sending an emission enabling control signal;

The infrared emission circuit also comprises a logic control module; the logic control module includes: a first AND gate and a first inverter; the first AND gate performs AND operation on the PWM signal and the emission enabling control signal to obtain a normal phase control signal; the first inverter performs inversion processing on the normal-phase control signal to obtain an inversion control signal;

The first reference voltage generation module includes: the positive temperature coefficient current source, the fifth PNP tube and the first capacitor; one end of the positive temperature coefficient current source is connected with a power supply on the sheet, and the other end of the positive temperature coefficient current source is connected with the emitter of the fifth PNP tube; the base electrode and the collector electrode of the fifth PNP tube are grounded; the emitter of the fifth PNP tube is connected with the inverting input end of the first operational amplifier OTA and is the first reference voltage output end; one end of the first capacitor is connected with the emitter of the fifth PNP tube, and the other end of the first capacitor is grounded;

The current amplifying module further comprises a sixth MOS tube, a seventh MOS tube and a second resistor; the sixth MOS tube is an NMOS tube, the drain electrode of the sixth MOS tube is connected with the inverting input end of the first operational amplifier, the source electrode of the sixth MOS tube is grounded, and the grid electrode of the sixth MOS tube is connected with the inverting control signal; the seventh MOS tube is a PMOS tube, the source electrode of the seventh MOS tube passes through the power supply on the second resistor connection sheet, the drain electrode of the seventh MOS tube is connected with the output end of the first operational amplifier, and the grid electrode of the seventh MOS tube is connected with the normal phase control signal.

5. The integrated circuit for implementing infrared transceiving as defined in claim 4, wherein:

the digital controller also sends a gear adjusting signal to control the infrared emission circuit to generate a gear of emission current;

the gear adjusting signals comprise a first original gear adjusting signal and a second original gear adjusting signal;

The logic control module further comprises a second inverter, a third inverter, a fourth inverter and a fifth inverter;

the second inverter performs inversion processing on the first original gear adjusting signal to obtain a first inverted gear signal;

the third inverter performs inversion processing on the first inversion gear signal again to obtain a first secondary inversion gear signal;

the fourth inverter performs inversion processing on the second original gear adjusting signal to obtain a second inverted gear signal;

The fifth inverter performs inversion processing on the second inversion gear signal again to obtain a second inversion gear signal;

The current amplifying module further comprises a gear adjusting unit; the gear position adjusting unit includes: the first gear adjusting MOS tube, the second gear adjusting MOS tube, the third gear adjusting MOS tube, the fourth gear adjusting MOS tube, the eighth MOS tube and the ninth MOS tube are all PMOS tubes;

the source electrode of the first gear adjusting MOS tube is connected with a power supply, the drain electrode of the first gear adjusting MOS tube is connected with the source electrode of the second gear adjusting MOS tube, and the grid electrode of the first gear adjusting MOS tube is connected with the first secondary reverse phase gear signal;

The source electrode of the second gear adjusting MOS tube is connected with the drain electrode of the first gear adjusting MOS tube, the drain electrode is connected with the output end of the first operational amplifier, and the grid electrode is connected with the first reverse phase gear signal;

the source electrode of the eighth MOS tube is connected with a power supply, the drain electrode of the eighth MOS tube is connected with the drain electrode of the second MOS tube, and the grid electrode of the eighth MOS tube is connected with the drain electrode of the first gear adjusting MOS tube;

The source electrode of the third gear adjusting MOS tube is connected with a power supply, the drain electrode of the third gear adjusting MOS tube is connected with the source electrode of the fourth gear adjusting MOS tube, and the grid electrode of the third gear adjusting MOS tube is connected with the second secondary reverse phase gear signal;

The source electrode of the fourth gear adjusting MOS tube is connected with the drain electrode of the third gear adjusting MOS tube, the drain electrode is connected with the output end of the first operational amplifier, and the grid electrode is connected with the second reverse phase gear signal;

And a source electrode of the ninth MOS tube is connected with a power supply on a connecting sheet, a drain electrode of the ninth MOS tube is connected with a drain electrode of the second MOS tube, and a grid electrode of the ninth MOS tube is connected with a drain electrode of the third gear adjusting MOS tube.

6. The integrated circuit for implementing infrared transceiving according to claim 1, wherein:

the infrared receiving circuit includes: the device comprises a micro-current detection module, a second reference voltage generation module and a comparison module;

The micro-current detection module is used for obtaining micro-current generated by an external infrared light emitting diode after receiving an infrared light signal and converting the micro-current into a first detection voltage;

the second reference voltage generation module generates a second reference voltage;

the comparison module is used for comparing the first detection voltage with the second reference voltage to obtain a second detection voltage, and outputting the second detection voltage as a detection signal to the digital controller.

7. The integrated circuit for implementing infrared transceiving as defined in claim 6, wherein:

The microcurrent detection module comprises: an amplifier and a feedback circuit; the input end of the amplifier is connected with an external pin of the infrared light-emitting diode, and the output end of the amplifier is connected with the inverting input end of the comparison module; the feedback circuit is connected between the input end and the output end of the amplifier in a bridging way; the output end of the second reference voltage generation module is connected with the non-inverting input end of the comparison module.

8. The integrated circuit for implementing infrared transceiving as defined in claim 7, wherein:

the infrared receiving circuit further comprises an auxiliary circuit; the auxiliary circuit generates a first bias voltage, a second bias voltage and a third bias voltage;

the amplifier comprises a tenth MOS tube, an eleventh MOS tube and a twelfth MOS tube;

The tenth MOS tube is a PMOS tube, a source electrode of the tenth MOS tube is connected with a power supply on a sheet, a drain electrode of the tenth MOS tube is connected with an external pin of the infrared light-emitting diode, and a grid electrode of the tenth MOS tube is connected with the first bias voltage;

the eleventh MOS tube is a PMOS tube, the source electrode of the eleventh MOS tube is connected with an external pin of the infrared light-emitting diode, the grid electrode of the eleventh MOS tube is connected with the second bias voltage, the drain electrode of the eleventh MOS tube is a first detection voltage output end, and the eleventh MOS tube is connected with the inverting input end of the comparison module;

The twelfth MOS transistor is an NMOS transistor, the drain electrode of the twelfth MOS transistor is connected with the source electrode of the eleventh MOS transistor, the source electrode is grounded, and the grid electrode is connected with the third bias voltage;

the feedback circuit comprises a thirteenth MOS tube and a third resistor;

the thirteenth MOS tube is an NMOS tube, the grid electrode of the thirteenth MOS tube is connected with the drain electrode of the eleventh MOS tube, the drain electrode of the thirteenth MOS tube is connected with the external pin of the infrared light-emitting diode, and the source electrode of the thirteenth MOS tube is grounded through the third resistor.

9. The integrated circuit for implementing infrared transceiving as defined in claim 8, wherein:

The second reference voltage generation module comprises a fourteenth MOS tube, a fifteenth MOS tube, an adjustable resistor, a sixteenth MOS tube and a fourth resistor;

the fourteenth MOS tube is a PMOS tube, a source electrode of the fourteenth MOS tube is connected with a power supply on a sheet, a grid electrode of the fourteenth MOS tube is connected with the first bias voltage, and a drain electrode of the fourteenth MOS tube is connected with a source electrode of the fifteenth MOS tube;

the fifteenth MOS tube is a PMOS tube, the grid electrode of the fifteenth MOS tube is connected with the second bias voltage, and the drain electrode of the fifteenth MOS tube is connected with one end of the adjustable resistor;

the sixteenth MOS tube is an NMOS tube, the drain electrode of the sixteenth MOS tube is connected with the other end of the adjustable resistor, the grid electrode of the sixteenth MOS tube is connected with the drain electrode of the fifteenth MOS tube, and the source electrode of the sixteenth MOS tube is grounded through the fourth resistor;

The drain electrode of the sixteenth MOS tube is a second reference voltage output end and is connected with the non-inverting input end of the comparison module;

the digital controller sends out an accuracy configuration signal to adjust the resistance value of the adjustable resistor.

10. An infrared transceiver, comprising:

An infrared light emitting diode and an integrated circuit for implementing infrared transceiving according to any one of claims 1-9;

the integrated circuit for realizing infrared receiving and transmitting is provided with an infrared light-emitting diode external pin;

And the cathode of the infrared light emitting diode is connected with an external pin of the infrared light emitting diode of the integrated circuit for realizing infrared receiving and transmitting, and the anode of the infrared light emitting diode is connected with a power supply.