JP2007318723A - Electric power amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electric power amplifier which reduces fluctuations of high frequency characteristics corresponding to fluctuations of power supply voltage and can compensate fluctuations of bias current due to manufacturing variability of transistors. <P>SOLUTION: The electric power amplifier has an electric power amplifying transistor 101 which amplifies high frequency signals, a power supply voltage depending current generation circuit 104 which generates a reference current corresponding to a power supply voltage, a reference current detection resistance 105 which detects a reference current to convert it to a first reference voltage V1, a bias current detection resistance 106 which detects a bias current of the amplifying transistor 101 to convert it to a second reference voltage V2, and an operation amplifier 107 which compares the first and the second reference voltages to voltage control terminals of the amplifying transistor 101. The electric power amplifier controls the bias current that flows in the electric power amplifying transistor 101 to maintain stable high frequency characteristics. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a power amplifier mounted on a transmitter or the like of a wireless communication device.

  A high-frequency power amplifier (hereinafter sometimes referred to as PA) is mounted in a transmitter of a wireless communication device, and amplifies a high-frequency signal transmitted to an antenna.

  Conventional analog circuits almost always use a so-called “vertical stack” structure for the supply voltage. It is possible to employ a circuit structure that hardly affects the characteristics of the transistor even when the power supply voltage fluctuates.

On the other hand, the PA is often operated by directly applying a power supply voltage to the amplifying transistor in order to increase the amplitude voltage of the output signal.
When a transistor is operated with a power supply voltage, it is difficult to maintain a constant high-frequency output characteristic with respect to fluctuations in the power supply voltage.
Further, when the power supply voltage to the circuit is directly supplied from a small battery, the output voltage of the battery greatly fluctuates, so it is inevitable that the characteristics of the PA fluctuate greatly.
As shown in FIG. 1, it is common that the output power increases as the power supply voltage increases, and the output power decreases as the power supply voltage decreases.

  FIG. 2 is a diagram showing an example of a power amplifier in which measures are taken so that the high frequency characteristics do not fluctuate with respect to fluctuations in the power supply voltage (see, for example, Patent Document 1).

The power amplifier 10 includes a power amplification transistor 11, an input matching circuit 12, an output load 13, a DC-DC converter circuit 14, resistors R1 and R2, a high frequency input terminal T1, a reference voltage supply terminal T2, a power supply terminal T3, and a high frequency. It has an output terminal T4.
Here, a case where an FET element is used as the power amplification transistor 11 is cited.

  The DC-DC converter circuit 14 always has a function for outputting a constant voltage. By mounting the DC-DC converter circuit 14, the drain-source voltage of the power amplification transistor 11 operates so as to be always constant regardless of the power supply voltage.

On the other hand, the high-frequency characteristics of PAs manufactured by mass production vary due to various factors.
Although it is not possible to completely compensate for variations in the high frequency characteristics, the high frequency characteristics greatly depend on the DC bias current of the PA. If the bias current is the same, the transistor characteristics are almost the same, and the high frequency characteristics are also almost the same. Can be expected.

However, in the semiconductor process, due to manufacturing variations of transistors and other elements, it is not easy to suppress individual variations in the DC bias current of PA.
This is because, in the PA, since the size of the transistor is large, slight transistor manufacturing variations cause large current variations.
In general, the bias current is made constant by a circuit configuration called a current mirror. However, when the manufacturing variation of the threshold voltage of the transistor is very large, the circuit may not function effectively. This is because in the current mirror circuit, it is assumed that the transistor characteristics of the copy side and the copy side are the same.

FIG. 3 is a diagram showing a bias current adjusting method for the power amplifier of FIG. 2 (see, for example, Patent Document 2).
The power amplifier 10A of FIG. 3 does not include a DC-DC converter circuit, and includes a trimming resistor R3 instead of the resistor R1.

In the power amplifier (PA) 10A, the bias current of the PA 10A is determined by the voltage supplied to the gate terminal of the transistor 11. If the gate terminal voltage is fixed, the bias current is greatly affected by the manufacturing variation of the threshold voltage of the transistor 11.
In order to adjust the bias current, the trimming resistor R3 is adjusted while monitoring the bias current to adjust the current to a constant value.
It is possible to completely compensate for the bias current variation by making adjustments for all the individuals. This adjustment is usually performed by an inspection before shipping the product.
JP 2000-196387 A JP 2004-248161 A JP 2000-101373 A

Although the voltage applied to the power amplification transistor 11 can be made constant by using the DC-DC converter circuit 14 as in the power amplifier 10 of FIG. 2, power consumption loss in the DC-DC converter circuit 14 is reduced. It becomes a problem.
The power loss is a voltage conversion loss of the DC-DC converter itself. Since PA consumes a very large current among communication devices, even if the conversion efficiency of the DC-DC converter is high, the loss cannot be ignored.
In addition, the DC-DC converter often uses a large coil for improving the conversion efficiency, and there is a problem that the product size at the time of mounting increases. Of course, the manufacturing cost also increases.

In the case of a method of adjusting the trimming resistor R3 as in the power amplifier 10A of FIG. 3, an increase in cost due to an increase in inspection time for adjustment becomes a problem.
In addition, the trimming resistor is difficult to manufacture on a semiconductor process and becomes a separate part, so that the size when mounted becomes large.

A method for automatically controlling the bias current of PA has already been proposed (see, for example, Patent Document 3).
However, this method has a drawback that the set current varies when the absolute value of the current detection resistor varies.

  It is an object of the present invention to provide a power amplifier capable of suppressing fluctuations in high-frequency characteristics with respect to power supply voltage fluctuations and compensating for fluctuations in bias current due to transistor manufacturing variations.

  An aspect of the present invention provides a power amplification transistor for amplifying a high-frequency signal supplied to a control terminal, a power supply voltage-dependent current generation circuit for generating a reference current according to a power supply voltage, and detecting the reference current A reference current detection resistor for converting to a first reference voltage, a bias current detection resistor for detecting a bias current of the amplifying transistor and converting it to a second reference voltage, and the first and second An operational amplifier for comparing a reference voltage and controlling a voltage at a control terminal of the amplification transistor according to a comparison result, and controlling a bias current flowing through the power amplification transistor by an output of the operational amplifier To do.

  Preferably, a current switch that is turned on for at least a predetermined period is provided in the bias current path of the power amplification transistor.

  Preferably, the first terminal of the power amplification transistor is connected to a power supply terminal side to which a power supply voltage is supplied, the second terminal is connected to a reference potential side, and one end of the reference current detection resistor is connected to the power supply voltage The dependence current generating circuit is connected to a reference current supply line and a non-inverting input terminal of the operational amplifier, the other end is connected to a reference potential, and one end of the bias current detection resistor is connected to the inverting input terminal of the operational amplifier and the operational amplifier. A current switch is connected to the second terminal of the power amplification transistor, the other end is connected to a reference potential, and a DC cut capacitor is connected between the second terminal of the power amplification transistor and the reference potential. ing.

  Preferably, the first terminal of the power amplification transistor is connected to a power supply terminal side to which a power supply voltage is supplied, the second terminal is connected to a reference potential side, and one end of the reference current detection resistor is connected to the power supply voltage A dependency current generating circuit connected to a reference current supply line and the inverting input terminal of the operational amplifier, the other end is connected to the power supply terminal, and one end of the bias current detection resistor is connected to the non-inverting input terminal of the operational amplifier and The power amplification transistor is connected to the first terminal side through the current switch, and the other end is connected to the power supply terminal.

  Preferably, the reference current detection resistor and the bias current detection resistor are mounted on a chip of the same process having uniformity.

  According to the present invention, it is possible to suppress fluctuations in high-frequency characteristics with respect to power supply voltage fluctuations using only small elements of a semiconductor integrated circuit, and to compensate for fluctuations in bias current due to transistor manufacturing variations.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 4 is a diagram illustrating the power amplifier according to the first embodiment employing the bias control method of the present invention.

As shown in FIG. 4, the power amplifier 100 includes a power amplification transistor 101, an input matching circuit 102, an output load 103, a power supply voltage dependent current generation circuit 104, a reference current detection resistor 105, a bias current detection resistor 106, an operational amplifier. (Hereinafter referred to as an operational amplifier) 107, a current switch 108, a resistor R101, a DC cut capacitor C101, a high frequency input terminal T101, a power supply terminal T102, an enable signal input terminal T103, and a high frequency output terminal T104.
Here, a case where an FET element is used as the power amplification transistor 101 is cited. The drain of the transistor 101 corresponds to a first terminal, the source corresponds to a second terminal, and the gate corresponds to a control terminal.
The current switch 108 is formed by an n-channel MOS transistor. The power supply voltage VDD is supplied to the power supply terminal T102.
In the following description, the high frequency signal is described as an RF signal.

The gate (control terminal) of the power amplification transistor 101 is connected to the high frequency input terminal T101 via the input matching circuit 102, and is connected to the output terminal of the operational amplifier 107 via the resistor R101.
The source of the transistor 101 is connected to the source of the current switch 108 and is connected to the reference potential (ground potential) VSS via the capacitor C101. The drain of the transistor 101 is connected to the high frequency output terminal T104, and is connected to the power supply terminal T102 via the output load 103.

The power supply voltage dependent current generation circuit 104 is connected to the power supply terminal T102 and generates a reference current Io corresponding to the power supply voltage VDD.
In other words, the power supply voltage-dependent current generation circuit 104 generates a PA bias reference current Io that varies with the power supply voltage VDD.
The power supply voltage dependent current generation circuit 104 has a characteristic that the output reference current Io is smaller as the power supply voltage VDD is higher, and the output reference current Io is larger as the power supply voltage is lower.

  FIG. 5 is a circuit diagram showing a configuration example of the power supply voltage dependent current generation circuit according to the present embodiment.

  5 includes a p-channel MOS transistor 1041, 1042, an n-channel MOS transistor 1044, an operational amplifier 1043, resistors R1041, R1042, a reference voltage supply terminal T1041, and a reference current output that form a current mirror CMR. A terminal T1042 is provided.

Resistors R1041 and R1042 are connected in series between the power supply terminal T102 and the reference potential VSS.
The sources of the MOS transistors 1041 and 1042 are connected to the power supply terminal T102, and the drain of the MOS transistor 1041 is connected to its own gate and the gate of the MOS transistor 1042.
The operational amplifier 1043 has a non-inverting input terminal (+) connected to the reference voltage supply terminal T1041, an inverting input terminal (−) connected to the connection point ND1 of the resistors R1041 and R1042, and an output terminal connected to the gate of the MOS transistor 1044. Has been.

  In the circuit of FIG. 5, the operational amplifier 1043 adjusts the gate potential of the MOS transistor 1044 so that the potential of the node ND1 is held at a predetermined level, and I1 is expressed by the following equation.

  When the MOS transistors 1041 and 1042 in FIG. 5 operate as ideal current mirrors, the output current Io has a value equal to I1.

  The output current Io is determined by the reference voltage Vref and the values of the two resistors R1041 and R1042.

  FIG. 6 is a circuit diagram showing another configuration example of the power supply voltage dependent current generation circuit according to the present embodiment.

  The power supply voltage dependent current generation circuit 104A of FIG. 6 has a resistor R1051, and the resistor R1051 is connected between the power supply terminal T102 and the reference current output terminal T1042, and the output current Io is expressed by the following equation. .

  R105 in the above formula represents the value of the reference current detection resistor 105 in FIG.

  Normally, the resistance value of R1051 is selected to be much larger than that of the reference current detection resistor 105, so that the output current Io is substantially determined by R1051 and the power supply voltage Vcc.

One end of the reference current detection resistor 105 is connected to the reference current Io supply line of the power supply voltage dependent current generation circuit 104 and the non-inverting input terminal (+) of the operational amplifier 107, and the other end is connected to the reference potential VSS.
The reference current detection resistor 105 has a function of detecting the reference current Io, converting it to the first reference voltage V1, and supplying it to the operational amplifier 107.

The bias current detection resistor 106 has one end connected to the drain of the current switch 108 and the inverting input terminal (−) of the operational amplifier 107, and the other end connected to the reference potential VSS.
The bias current detection resistor 106 has a function of detecting the bias current IB of the amplifying transistor 101, converting it to the second reference voltage V 2, and supplying it to the operational amplifier 107.

The operational amplifier 107 compares the two first reference voltages V1 and the second reference voltage V2, and generates a signal S107 for controlling the voltage of the gate of the amplifying transistor 101.
The operational amplifier 107 generates a signal S107 and supplies it to the gate of the transistor 101 so that the first reference voltage V1 and the second reference voltage V2 are equal.

In the current switch 108, the gate of the MOS transistor forming the switch is connected to the enable signal input terminal T103.
The current switch 108 is controlled by an unillustrated control system so that an enable signal EN that is set to an active high level only during bias current control is supplied to the gate and is turned on only during that period.

  The bias control operation of the power amplifier having the above configuration will be described below.

When operating as a power amplifier (PA), a high frequency signal RF is input to the high frequency input terminal T101, amplified by the power amplification transistor 101, and then from a high frequency output terminal T104 connected to the drain of the transistor 101. A high frequency signal RF is output.
Even when operating as a power amplifier (PA), bias control described below is performed.

The following operations are performed during bias control.
In the power supply voltage dependent current generation circuit 104, the power supply voltage VDD is input as a signal, and a DC bias reference current Io that changes according to the power supply voltage VDD is generated.
In this case, the reference current is generated so that the output current is smaller as the power supply voltage VDD is larger than a certain standard, and the output current is larger as the power supply voltage is smaller.

  The reference current Io generated in the power supply voltage dependent current generation circuit 104 flows to the reference current detection resistor 105 and is converted into the first reference voltage signal V1.

On the other hand, the bias current IB flowing through the power amplification transistor 101 flows through the current switch 108 to the bias current detection resistor 106, where it is converted to the second reference voltage signal V2.
Although the source terminal of the power amplification transistor 101 is separated from the ground terminal in a direct current manner, it is well grounded in an alternating current manner by the DC cut capacitor C101.

The voltage comparison operational amplifier 107 compares the two reference voltages V1 and V2, outputs a signal S107 according to the comparison result, and sets the power amplification transistor 101 in a direction in which the two reference voltages V1 and V2 are equal. The gate potential is changed.
By repeating the above, the two reference voltages V1 and V2 eventually become equal, and thereafter the state is maintained.

In the present embodiment, it is important that the two current detection resistors 105 and 106 are manufactured on a semiconductor of the same process and are arranged so as to maintain the same resistance ratio as much as possible.
Thereby, the reference current and PA bias current are maintained at a good ratio. However, the absolute value of the detection resistor does not need to be strictly controlled.

FIG. 7 is a diagram showing the effect of bias current control on the power supply voltage fluctuation of the power amplifier according to the present embodiment.
In FIG. 7, the horizontal axis represents the power supply voltage VDD, and the vertical axis represents the PA bias current IB.

As can be seen from FIG. 7, according to the present power amplifier, a decrease in output power can be suppressed by increasing the bias current IB when the power supply voltage is low.
In addition, when the power supply voltage is high, the bias current is reduced, so that an increase in output power more than necessary can be suppressed.

  Further, according to the power amplifier, in addition to the above-described operation, it is possible to absorb and compensate for the fluctuation of the PA bias current IB due to the threshold variation at the time of manufacturing the power amplification transistor 101.

FIG. 8 is a diagram showing the effect of bias current control on the variation in threshold voltage of the power amplification transistor of the power amplifier according to this embodiment.
In FIG. 8, the horizontal axis indicates the threshold voltage VTH, and the vertical axis indicates the PA bias current IB. VTH1 represents a target threshold value, VTH2 represents a minimum value during manufacturing, and VTH3 represents a maximum value during manufacturing.

  From FIG. 8, it can be seen that according to the present power amplifier, the PA bias current IB can be maintained constant regardless of the threshold voltage VTH over a wide range.

Further, in the present embodiment, when the power amplifier (PA) is not operating, the current switch 108 is turned off by the enable signal, and the bias current is completely cut off because the DC path of the bias current IB is established.
Since the power amplifying transistor for PA is large in size, there may be a problem of leakage current during non-operation, but there is no such problem in this configuration.

FIG. 9 is a diagram illustrating the effect of compensation for power supply voltage fluctuations in the power amplifier according to the present embodiment.
In FIG. 9, the horizontal axis indicates the power supply voltage VDD, and the vertical axis indicates the output power. In FIG. 9, the curve indicated by A indicates the characteristics of the power amplifier of this embodiment, and the curve indicated by B indicates the characteristics of the power amplifier of FIG. 2 without compensation for power supply voltage fluctuations.

  As can be seen from FIG. 9, the power amplifier according to the present embodiment can satisfactorily suppress the fluctuation of the output power as compared with the case where there is no compensation for the power supply voltage fluctuation like the power amplifier of FIG. 2.

  FIG. 10 is a diagram showing a power amplifier according to the second embodiment that employs the bias control method of the present invention.

  The power amplifier 100A of the second embodiment is different from the power amplifier 100 of the first embodiment in that the polarity of the output current of the power supply voltage dependent current generation circuit 104A is different, and the two reference current detection resistors 105 and the bias current are different. The other end of the detection resistor 106 is connected to the power supply terminal T102, one end of the reference current detection resistor 105 is connected to the inverting input terminal (−) of the operational amplifier 107A, and one end of the bias current detection resistor 106 is a non-inverting input terminal of the operational amplifier 107A. The point is connected to (+).

The current switch 108A is formed of a p-channel MOS transistor, and its source is connected to one end of the bias current detection resistor 106, and its drain is connected to the drain of the power amplification transistor 101 via the output load. The low level active enable signal ENX is supplied to the gate of the MOS transistor forming the current switch 108A via the terminal T103.
This configuration does not require a DC cut capacity.

  The operation principle of the power amplifier 100A of FIG. 10 is the same as that of the power amplifier 100 of the first embodiment having the configuration of FIG. 4, and according to the power amplifier 100A of the second embodiment, the first amplifier described above. The same effect as that of the power amplifier 100 of the embodiment can be obtained.

As described above, according to the present embodiment, the power amplification transistor 101 for amplifying a high-frequency signal, the power supply voltage dependent current generation circuit 104 for generating a reference current corresponding to the power supply voltage, and the reference current Is detected and converted to a first reference voltage; a bias current detection resistor 106 for detecting a bias current of the amplifying transistor 101 and converting it to a second reference voltage; Since the operational amplifier 107 for comparing the first and second reference voltages and controlling the voltage of the control terminal of the amplifying transistor 101 is provided, the following effects can be obtained.
Fluctuations in high-frequency characteristics with respect to power supply voltage fluctuations using only a small element of a semiconductor integrated circuit that can be integrated on a semiconductor process without requiring a large-sized component such as a coil necessary for a DC-DC converter. In addition, it is possible to simultaneously compensate for fluctuations in bias current due to transistor manufacturing variations.
The set current accuracy does not depend on the absolute value accuracy of the bias current detection resistor.

  In the above description, the FET element is used as the power amplification transistor. However, the present invention can also be applied to a bipolar transistor.

It is a figure which shows the general relationship between a power supply voltage and the output power of a power amplifier. It is a figure which shows the adjustment method of the bias current with respect to the power amplifier of FIG. It is a figure which shows an example of the power amplifier which took the countermeasure so that a high frequency characteristic may not change with respect to the fluctuation | variation of a power supply voltage. It is a figure which shows the power amplifier which concerns on 1st Embodiment which employ | adopted the bias control system of this invention. It is a circuit diagram which shows the structural example of the power supply voltage dependence electric current generation circuit which concerns on this embodiment. It is a circuit diagram which shows another structural example of the power supply voltage dependence electric current generation circuit which concerns on this embodiment. It is a figure which shows the effect of the bias current control with respect to the power supply voltage fluctuation | variation of the power amplifier which concerns on this embodiment. It is a figure which shows the effect of bias current control with respect to the variation in the threshold voltage of the transistor for power amplification of the power amplifier which concerns on this embodiment. It is a figure which shows the effect of the compensation with respect to the power supply voltage fluctuation | variation in the power amplifier which concerns on this embodiment. It is a figure which shows the power amplifier which concerns on 2nd Embodiment which employ | adopted the bias control system of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100,100A ... Power amplifier, 101 ... Power amplification transistor, 102 ... Input matching circuit, 103, Output load, 104, 104A ... Power supply voltage dependent current generation circuit, 105 ... Reference current Detection resistor, 106... Bias current detection resistor, 107, 107A, operational amplifier (op amp), 108, 108A, current switch.

Claims (5)

A power amplification transistor for amplifying a high-frequency signal supplied to the control terminal;
A power supply voltage dependent current generation circuit for generating a reference current according to the power supply voltage;
A reference current detection resistor for detecting the reference current and converting it to a first reference voltage;
A bias current detection resistor for detecting a bias current of the amplifying transistor and converting it to a second reference voltage;
An operational amplifier for comparing the first and second reference voltages and controlling the voltage of the control terminal of the amplification transistor according to the comparison result;
A power amplifier that controls a bias current flowing through the power amplification transistor according to an output of the operational amplifier. The power amplifier according to claim 1, further comprising a current switch that is turned on for at least a predetermined period in a bias current path of the power amplification transistor. A first terminal of the power amplification transistor is connected to a power supply terminal side to which a power supply voltage is supplied, and a second terminal is connected to a reference potential side;
One end of the reference current detection resistor is connected to a reference current supply line of the power supply voltage dependent current generation circuit and a non-inverting input terminal of the operational amplifier, and the other end is connected to a reference potential.
One end of the bias current detection resistor is connected to the second terminal of the power amplification transistor via the inverting input terminal of the operational amplifier and the current switch, and the other end is connected to a reference potential.
The power amplifier according to claim 2, wherein a DC cut capacitor is connected between the second terminal of the power amplification transistor and a reference potential. A first terminal of the power amplification transistor is connected to a power supply terminal side to which a power supply voltage is supplied, and a second terminal is connected to a reference potential side;
One end of the reference current detection resistor is connected to a reference current supply line of the power supply voltage dependent current generation circuit and an inverting input terminal of the operational amplifier, and the other end is connected to the power supply terminal.
One end of the bias current detection resistor is connected to the first terminal side of the power amplification transistor via a non-inverting input terminal of the operational amplifier and the current switch, and the other end is connected to the power supply terminal. Item 3. The power amplifier according to Item 2. The power amplifier according to claim 1, wherein the reference current detection resistor and the bias current detection resistor are mounted on a chip of the same process having uniformity.

Images