CN1180343C - Device and method for automatically measuring stable working frequency - Google Patents
Device and method for automatically measuring stable working frequency Download PDFInfo
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- CN1180343C CN1180343C CNB011102950A CN01110295A CN1180343C CN 1180343 C CN1180343 C CN 1180343C CN B011102950 A CNB011102950 A CN B011102950A CN 01110295 A CN01110295 A CN 01110295A CN 1180343 C CN1180343 C CN 1180343C
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Abstract
The present invention relates to a device and a method for automatically measuring stable working frequency, which is applied to a computer system. The device comprises a central processing unit, a monitoring timer and a clock generator for generating clock frequency to a computer system. Labor can be saved, and the inconvenience of general users for adjusting a mainboard of a personal computer or a notebook computer can be avoided by the method. Under the condition of stable work, manufacturers who manufacture personal computers or notebook computers can achieve high superfrequency working capacity by settings software or hardware according to the characteristics of the mainboards of the personal computers or the notebook computers and the characteristics of parts thereof.
Description
Technical field
The present invention relates to a kind of apparatus and method that in computer system, detect stable working frequency automatically, be particularly related to a kind of in computer system, guarantee PC or notebook computer motherboard the working stability degree with reach the apparatus and method of the automatic detection stable working frequency of the highest overclocking usefulness.
Background technology
In personal computer system or notebook computer, the chip of its motherboard is to have several different clocks simultaneously, and each clock all has different purposes, the clock frequency that 100MHz, 300MHz, 450MHz or 500MHz or the like are arranged as the internal clocking of CPU (central processing unit) (hereinafter to be referred as CPU) chip, it is the fastest element of operating speed in PC or the notebook computer, the clock frequency of primary memory generally has 66MHz, 100MHz or 133MHz, and the clock frequency of input/output bus is generally 33MHz.
Various clock frequency is produced by clock generator in PC or the notebook computer, the clock frequency that connects (hereinafter to be referred as PCI) in CPU, synchronous DRAM and the external unit of being sent by clock generator must cooperate the sequential specification of chipset on the motherboard, dynamic RAM (following simple DRAM) module and PCI device, usually as long as PC or notebook computer all can be worked within the sequential specification.
But each tame PC or notebook computer manufacturer make PC work for promoting motherboard usefulness through regular meeting under the clock generator overfrequency.CPU, chipset, DRAM module and PCI device respectively have the highest frequency of operation restriction, adjusting clock generator when user's desire is when wanting overclocking or frequency reducing, general user is owing to can't be familiar with their operating characteristic, so that can't judge the working stability degree of the motherboard of PC or notebook computer, be to want overclocking or frequency reducing in the hope of maximum efficiency and adjust clock generator.
Summary of the invention
The apparatus and method that the purpose of this invention is to provide a kind of automatic detection stable working frequency, to save manpower and to exempt the inconvenience that general user adjusts the motherboard of PC or notebook computer, each individual manufacturer computer can be via the setting of software or hardware, characteristic according to the motherboard and the spare part thereof of PC or notebook computer, under the preceding topic of working stability degree, reach the task performance of high overclocking.
For achieving the above object, a kind of method of automatic detection stable working frequency is applied to a computer system, and method comprises the following steps:
The frequency of operation of setting computer system is a clock frequency;
Judge whether to change described clock frequency;
In the time will changing described clock frequency, just carrying out and storing described clock frequency is the operate as normal clock frequency, changes described clock frequency again, sets one and monitors clocking value, and begin counting;
When the numerical value of counting did not reach described supervision clocking value, the clock frequency behind the setting changing was described operate as normal clock frequency;
When described supervision clocking value had reached described supervision clocking value, watchdog timer sent a reset signal;
After CPU (central processing unit) received described reset signal, setting described operate as normal clock frequency was the clock frequency of computer system operation.
Another aspect of the present invention provides a kind of device of automatic detection stable working frequency, is applied to a computer system, it is characterized in that device comprises:
One CPU (central processing unit);
One watchdog timer; And
One clock generator is connected to described CPU (central processing unit), gives described computer system in order to produce a clock signal;
Described CPU (central processing unit) reads the default clock frequency of a Basic Input or Output System (BIOS), and described clock frequency is set to described clock generator, described CPU (central processing unit) stores described clock frequency becomes an operate as normal clock frequency, described CPU (central processing unit) changes the clock frequency of described clock generator again, Basic Input or Output System (BIOS) is set the supervision clocking value of described watchdog timer, described watchdog timer begins counting, when described watchdog timer does not reach described supervision clocking value, the clock frequency that described CPU (central processing unit) stores after changing becomes the operate as normal clock frequency, described CPU (central processing unit) changes the clock frequency of described clock generator again, described Basic Input or Output System (BIOS) is set the supervision clocking value of described watchdog timer, described watchdog timer continues to carry out the step of counting, when described watchdog timer has reached described supervision clocking value, described watchdog timer sends a reset signal to described CPU (central processing unit), after described CPU (central processing unit) receives reset signal, carry out a reset routine and set the clock frequency that the operate as normal clock frequency is described clock generator.
The invention provides a kind of apparatus and method of automatic detection stable working frequency, to save manpower and to exempt the inconvenience that general user adjusts the motherboard of PC or notebook computer, this clock generator and motherboard with raising frequency automatically or frequency reducing, must the user whether not judge the motherboard working stability voluntarily, each PC or notebook computer manufacturer can be via the settings of software or hardware, characteristic according to the motherboard and the spare part thereof of PC or notebook computer, under the preceding topic of working stability degree, reach the task performance of high overclocking.
Description of drawings
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. elaborates.
Fig. 1 is the hardware circuit synoptic diagram of the device of automatic detection stable working frequency of the present invention;
Fig. 2 A is system's raising frequency process flow diagram of the method for automatic detection stable working frequency of the present invention;
Fig. 2 B is the watchdog timer counting process flow diagram of automatic detection stable working frequency method of the present invention;
Fig. 2 C is the system reset process flow diagram of automatic detection stable working frequency method of the present invention; And
Fig. 3 is the process flow diagram of the method for automatic detection stable working frequency of the present invention.
Embodiment
Fig. 1 is the hardware circuit synoptic diagram of the device of automatic detection stable working frequency of the present invention.In Fig. 1, be installed on CPU 10 is arranged in the computer system, chip 12 and clock generator 14.Its chips 12 can be three's one of chipset, output input control chip and Application Specific Integrated Circuit (hereinafter to be referred as ASIC), this chip has a watchdog timer 16, clock generator 14 also can have watchdog timer 17, when watchdog timer 16 or watchdog timer 17 count down to 0, watchdog timer 16 or watchdog timer 17 can send signal Reset# to or install 15, or install 15 and just send reset signal to CPU 10, make CPU 10 do the action that resets.Wherein, or to install 15 function be that arbitrary input end has the signal input, at signal of its output terminal output.
CPU 10 reads the default clock frequency of Basic Input or Output System (BIOS) (hereinafter to be referred as BIOS), and with this clock frequency by give an order register (not illustrating) in clock generator 14 of System Management Bus (SM) or other buses (as bus #18), according to the numerical value that deposits this register (not illustrating) in to produce corresponding clock frequency.
CPU 10 stores this clock frequency becomes an operate as normal clock frequency to the register (not illustrating) of BIOS, CPU 10 changes the clock frequency of clock generator 14 again, BIOS sets the supervision clocking value of watchdog timer 16 and watchdog timer 17, and watchdog timer 16 begins counting and monitors clocking value.When the numerical value of watchdog timer 16 and watchdog timer 17 countings does not reach this supervision clocking value, skip to CPU 10 storage clock frequencies and become normal working clock frequency to the register (not illustrating) of BIOS, CPU 10 changes the clock frequency of clock generator 14 again, BIOS sets the supervision clocking value of watchdog timer 16, and watchdog timer 16 and watchdog timer 17 also begin to count the step continuation execution that monitors clocking value.And when one of them had been counted and has finished this and monitor clocking value when watchdog timer 16 or watchdog timer 17, the clock frequency that CPU 10 sets operate as normal was the clock frequency of clock generator 14.
Fig. 2 A is system's raising frequency process flow diagram of the method for automatic detection stable working frequency of the present invention.In Fig. 2, CPU reads the default clock frequency of BIOS (S20), and with this clock frequency setting to clock generator.CPU stores clock frequency that this clock frequency becomes operate as normal to the register of BIOS, and CPU changes the clock frequency of clock generator again, and BIOS sets the supervision clocking value (S22) of watchdog timer.
Fig. 2 B is the watchdog timer counting process flow diagram of the method for automatic detection stable working frequency of the present invention.In Fig. 2 B, behind the numerical value of BIOS setting watchdog timer, watchdog timer begins counting (S24).CPU carries out the selftest function of system, the function of setting each chip and searching external unit etc., and simultaneously, watchdog timer can judge whether the numerical value of watchdog timer counts end (S26).When the watchdog timer no count finishes this numerical value, skip to after BIOS sets the numerical value of watchdog timer, watchdog timer begins to count the step continuation execution (S24) of watchdog timer.And when the numerical value of watchdog timer had been counted end, watchdog timer sent reset signal to CPU (S28).
Fig. 2 C is the system reset process flow diagram of the method for automatic detection stable working frequency of the present invention.Among Fig. 2 C, after CPU received the reset signal that watchdog timer sent, CPU carried out the routine and be the clock frequency (S30) of clock generator with the clock frequency of setting operate as normal from the clock frequency that the register of BIOS takes out operate as normal of resetting.
Fig. 3 is the process flow diagram of the method for automatic detection stable working frequency of the present invention.In Fig. 3, automatically the step that detects the method for computer system stable working frequency comprises: at first, after opening the primary power of computer system, CPU reads program and the default value among the BIOS, comprise read computer system (as CPU, chipset, output input control chip, ASIC ... or the like) default clock frequency (S32).Secondly, judge whether BIOS will change the clock frequency of computer system (promptly changing the clock frequency that clock generator is exported), make its clock frequency increase (S34).When BIOS does not change the clock frequency of computer system, then carry out the step of the operating system that enters computer; When BIOS will change the clock frequency of computer system, then CPU stores the clock frequency that this clock frequency becomes operate as normal, for example be stored in the BIOS used register or CMOS memory, BIOS stores the new register of numerical value in clock generator by SM bus or other buses, the clock frequency that clock generator is exported with the increase clock generator according to the new numerical value that deposits register in.And set numerical value of watchdog timer, and begin to count the numerical value (S36) of watchdog timer by BIOS.
Then, work together by chipset on the motherboard or other IC via BIOS, in clock frequency Hou that changes clock generator, CPU carries out the executing state (S38) of the motherboard of the selftest function of system, the function of setting each chip and searching external unit etc. according to the program among the BIOS.
The counting of watchdog timer whether finish (S40), whether in fact represent this computer system to stablize carries out, if system stability behind the change operation frequency, the design of BIOS can make CPU return to reset numerical value of watchdog timer, and restart to count watchdog timer numerical value.If system's instability behind the change operation frequency, then CPU can not return to reset watchdog timer, so the counting of watchdog timer can finish, and sends reset signal.After CPU received the reset signal that watchdog timer sent, CPU carried out the routine and be the clock frequency (S42) of the register of clock generator with the clock frequency of setting operate as normal from the clock frequency that the register of BIOS takes out operate as normal of resetting.Selection makes clock frequency Hou of computer system stable operation, enters computer operating system and carries out its work according to user's demand.
Wherein, if user's desire is omitted the step of automatic testing frequency, can directly be set at the instruction of the clock frequency that does not change clock generator, and carry out the step that enters computer operating system at BIOS.
Therefore, advantage of the present invention provides a kind of apparatus and method of automatic detection stable working frequency, to save manpower and to exempt the inconvenience that general user adjusts the motherboard of PC or notebook computer, this clock generator and motherboard with raising frequency automatically or frequency reducing, must the user whether not judge the motherboard working stability voluntarily, each individual manufacturer computer can be via the setting of software or hardware, characteristic according to the motherboard and the spare part thereof of PC or notebook computer, under the preceding topic of working stability degree, reach the task performance of high overclocking.
In sum, though disclose the present invention with preferred embodiment, so it is not to be used to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention, can do various modifications and distortion, so protection scope of the present invention is as the criterion by the accompanying Claim scope.
Claims (7)
1. a method that detects stable working frequency automatically is applied to a computer system, and method comprises the following steps:
The frequency of operation of setting computer system is a clock frequency;
Judge whether to change described clock frequency;
In the time will changing described clock frequency, just carrying out and storing described clock frequency is the operate as normal clock frequency, changes described clock frequency again, sets one and monitors clocking value, and begin counting;
When the numerical value of counting did not reach described supervision clocking value, the clock frequency behind the setting changing was described operate as normal clock frequency;
When described supervision clocking value had reached described supervision clocking value, watchdog timer sent a reset signal;
After CPU (central processing unit) received described reset signal, setting described operate as normal clock frequency was the clock frequency of computer system operation.
2. by the method for the described automatic detection stable working frequency of claim 1, it is characterized in that after beginning counting, also comprising the step of the executing state that detects described computer system.
3. by the method for the described automatic detection stable working frequency of claim 1, it is characterized in that described clock frequency is got back to the step of described operate as normal clock frequency after, enter the computer operating system of selected described clock frequency.
4. a method that detects stable working frequency automatically is applied to a computer system, and described computer system comprises a watchdog timer and a CPU (central processing unit), and method comprises the following steps:
Described CPU (central processing unit) reads default clock frequency, and makes described computer system operate in default clock frequency;
It is an operate as normal clock frequency that described CPU (central processing unit) is set present clock frequency, changes the clock frequency of computer system and the supervision clocking value of change watchdog timer again;
Described watchdog timer begins counting;
When the numerical value of counting did not reach described supervision clocking value, the clock frequency behind the setting changing was the operate as normal clock frequency;
When described supervision clocking value had reached described supervision clocking value, described watchdog timer sent a reset signal; And
After described CPU (central processing unit) received described reset signal, setting described operate as normal clock frequency was the operated clock frequency of computer system.
5. press the method for the described automatic detection stable working frequency of claim 4, it is characterized in that after described CPU (central processing unit) changes the operated clock frequency of computer system and changes the supervision clocking value of described watchdog timer, also comprising the step of the executing state that detects described computer system.
6. a device that detects stable working frequency automatically is applied to a computer system, it is characterized in that device comprises:
One CPU (central processing unit);
One watchdog timer; And
One clock generator is connected to described CPU (central processing unit), gives described computer system in order to produce a clock signal;
Described CPU (central processing unit) reads the default clock frequency of a Basic Input or Output System (BIOS), and described clock frequency is set to described clock generator, described CPU (central processing unit) stores described clock frequency becomes an operate as normal clock frequency, described CPU (central processing unit) changes the clock frequency of described clock generator again, Basic Input or Output System (BIOS) is set the supervision clocking value of described watchdog timer, described watchdog timer begins counting, when described watchdog timer does not reach described supervision clocking value, the clock frequency that described CPU (central processing unit) stores after changing becomes the operate as normal clock frequency, described CPU (central processing unit) changes the clock frequency of described clock generator again, described Basic Input or Output System (BIOS) is set the supervision clocking value of described watchdog timer, described watchdog timer continues to carry out the step of counting, when described watchdog timer has reached described supervision clocking value, described watchdog timer sends a reset signal to described CPU (central processing unit), after described CPU (central processing unit) receives reset signal, carry out a reset routine and set the clock frequency that the operate as normal clock frequency is described clock generator.
7. press the device of the described automatic detection stable working frequency of claim 6, it is characterized in that described device is except described clock generator, also comprise a chipset, an output input control chip and an Application Specific Integrated Circuit, above-mentioned one of them have described watchdog timer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011102950A CN1180343C (en) | 2001-04-06 | 2001-04-06 | Device and method for automatically measuring stable working frequency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011102950A CN1180343C (en) | 2001-04-06 | 2001-04-06 | Device and method for automatically measuring stable working frequency |
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| CN1379327A CN1379327A (en) | 2002-11-13 |
| CN1180343C true CN1180343C (en) | 2004-12-15 |
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| CNB011102950A Expired - Fee Related CN1180343C (en) | 2001-04-06 | 2001-04-06 | Device and method for automatically measuring stable working frequency |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100461117C (en) * | 2005-12-07 | 2009-02-11 | 微星科技股份有限公司 | Method for optimizing effect of hardware element capable of regulating working frequency |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100367150C (en) * | 2003-10-13 | 2008-02-06 | 瑞昱半导体股份有限公司 | Time pulse adjusting device and method |
| CN100412814C (en) * | 2005-04-12 | 2008-08-20 | 鸿富锦精密工业（深圳）有限公司 | Central processer super frequency system and method |
| CN101630277B (en) * | 2008-07-17 | 2012-08-08 | 华硕电脑股份有限公司 | Over-frequency module, computer system and over-frequency method thereof |
| CN101876837B (en) * | 2009-04-30 | 2013-04-03 | 华硕电脑股份有限公司 | Computer device, application program, system setting method, control method of memory |
| CN101943929A (en) * | 2009-07-06 | 2011-01-12 | 微星科技股份有限公司 | External frequency adjusting method and system |
| CN102929342B (en) * | 2012-10-08 | 2016-05-18 | 浪新微电子系统（上海）有限公司 | X86-based computer |
| CN115495160B (en) * | 2022-11-16 | 2023-02-28 | 苏州浪潮智能科技有限公司 | ARM server, starting method and device thereof, and readable storage medium |
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2001
- 2001-04-06 CN CNB011102950A patent/CN1180343C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100461117C (en) * | 2005-12-07 | 2009-02-11 | 微星科技股份有限公司 | Method for optimizing effect of hardware element capable of regulating working frequency |
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| CN1379327A (en) | 2002-11-13 |
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