CN118016679A - Photoelectric sensor and forming method thereof - Google Patents

Photoelectric sensor and forming method thereof Download PDF

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Publication number
CN118016679A
CN118016679A CN202211407977.6A CN202211407977A CN118016679A CN 118016679 A CN118016679 A CN 118016679A CN 202211407977 A CN202211407977 A CN 202211407977A CN 118016679 A CN118016679 A CN 118016679A
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doped region
type doped
type
substrate
doping
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张伟
冯威
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Priority to CN202211407977.6A priority Critical patent/CN118016679A/en
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Abstract

A photoelectric sensor and a forming method thereof, the photoelectric sensor includes: the substrate is provided with a light receiving surface, the substrate comprises a photosensitive pixel area, the photosensitive pixel area comprises a plurality of pixel unit areas distributed in a matrix, and a plurality of light trapping grooves are formed in the substrate of the pixel unit areas at one side of the light receiving surface; the first type doping region is positioned in the substrate below the light trapping groove; the second type doped region is positioned in the first type doped region right below the light trapping groove, and the doping types of the second type doped region and the first type doped region are different. The invention is beneficial to improving the imaging quality.

Description

Photoelectric sensor and forming method thereof
Technical Field
The embodiment of the invention relates to the field of semiconductor manufacturing, in particular to a photoelectric sensor and a forming method thereof.
Background
A photosensor is a device that converts an optical signal into an electrical signal. The working principle is based on the photoelectric effect, which means that when light irradiates on certain substances, electrons of the substances absorb photon energy and corresponding electric effect phenomenon occurs.
For example, a CCD (Charge Coupled Device ) image sensor and a CMOS (CMOS IMAGE SENSER, CIS) image sensor, which convert an optical image into an electrical signal by using a photoelectric conversion function and output the digital image, are widely used in digital cameras and other electronic optical devices. CMOS image sensors are increasingly replacing CCDs due to their simple process, easy integration with other devices, small size, light weight, low power consumption, low cost, etc. Currently, CMOS image sensors are widely used in the fields of digital cameras, camera phones, digital video cameras, medical imaging devices (for example, gastroscopes), and vehicle imaging devices.
Currently, in high-speed CIS image sensors, a large pixel Full well capacity (Full WELL CAPACITY, FWC) is required in order to increase sensitivity due to the very short exposure time.
Disclosure of Invention
The embodiment of the invention solves the problem of providing a photoelectric sensor and a forming method thereof, and improves imaging quality.
To solve the above problems, an embodiment of the present invention provides a photoelectric sensor, including: the substrate is provided with a light receiving surface, the substrate comprises a photosensitive pixel area, the photosensitive pixel area comprises a plurality of pixel unit areas distributed in a matrix, and a plurality of light trapping grooves are formed in the substrate of the pixel unit areas at one side of the light receiving surface; the first type doping region is positioned in the substrate below the light trapping groove; the second type doped region is positioned in the first type doped region right below the light trapping groove, and the doping types of the second type doped region and the first type doped region are different.
Optionally, the second type doped region has the same shape as the light trapping groove, and the second type doped region corresponds to the light trapping groove one by one.
Optionally, the light trapping groove is in the shape of an inverted pyramid structure; the second type doped region is in the shape of an inverted pyramid structure.
Optionally, the doping concentration of the second type doped region is 1e12atom/cm 3 to 1e14atom/cm 3.
Optionally, the doping depth of the second type doped region is 50nm to 200nm.
Optionally, the doping type of the first type doping region is N type; the doping type of the second type doping region is P type.
Optionally, the photoelectric sensor further includes: and the third type doped region is positioned in the substrate between the adjacent first type doped regions and is in contact with the first type doped region, and the doping type of the third type doped region is the same as that of the second type doped region.
Optionally, the light trapping grooves are distributed in a matrix or are communicated in a grid shape.
Optionally, the photoelectric sensor includes: the substrate is positioned on one side of the pixel wafer, which is back to the logic wafer, and the light sensitive surface is the surface of the pixel wafer, which is back to the logic wafer.
Optionally, the photosensor is a back-illuminated photosensor.
The embodiment of the invention also provides a method for forming the photoelectric sensor, which comprises the following steps: providing a substrate, wherein the substrate is provided with a light receiving surface and comprises a light sensing pixel area, the light sensing pixel area comprises a plurality of pixel unit areas distributed in a matrix, a plurality of light trapping grooves are formed in the substrate of the pixel unit area at one side of the light receiving surface, and a first type doping area is formed in the substrate below the light trapping grooves; and performing ion implantation on the first type doped region along the light trapping groove, and forming a second type doped region in the first type doped region right below the light trapping groove, wherein the doping types of the second type doped region and the first type doped region are different.
Optionally, the step of forming the second type doped region includes: the second type doped region has the same shape as the light trapping groove, and the second type doped region corresponds to the light trapping groove one by one.
Optionally, in the step of providing the substrate, the light trapping groove is in the shape of an inverted pyramid structure; in the step of forming the second type doped region, the second type doped region is in the shape of an inverted pyramid structure.
Optionally, in the step of implanting ions into the first type doped region along the light trapping groove, the implantation concentration of the ions is 1e12atom/cm 3 to 1e14atom/cm 3, and the implantation energy of the ions is 10KeV to 200KeV.
Optionally, in the step of providing the substrate, the doping type of the first type doping region is N type; in the step of forming the second type doped region, the doping type of the second type doped region is P-type.
Optionally, in the step of providing the substrate, a third type doped region contacting with the first type doped region is formed in the substrate between the adjacent first type doped regions, and the doping type of the third type doped region is the same as the doping type of the second type doped region.
Optionally, in the step of providing the substrate, the light trapping grooves are distributed in a matrix or are connected in a grid shape.
Optionally, in the step of providing the substrate, the substrate is located in the pixel wafer, the pixel wafer is bonded to the logic wafer, the substrate is located at a side of the pixel wafer facing away from the logic wafer, and the light sensitive surface is a surface of the pixel wafer facing away from the logic wafer.
Optionally, the photosensor is a back-illuminated photosensor.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:
In the photoelectric sensor provided by the embodiment of the invention, the second type doped region is positioned in the first type doped region right below the light trapping groove, and the doping types of the second type doped region and the first type doped region are different, so that the second type doped region positioned in the first type doped region and the first type doped region can form a PN junction, and the contact area of the first type doped region and the second type doped region is increased by adding the second type doped region in the first type doped region in the photoelectric sensor, thereby being beneficial to increasing the PN junction area, further being beneficial to increasing the electron generation rate of the PN junction, further being beneficial to improving the full well capacity of the photoelectric sensor, improving the signal-to-noise ratio and the dynamic range of the image sensor and improving the imaging quality.
In the method for forming the photoelectric sensor provided by the embodiment of the invention, the first type doped region is subjected to ion implantation along the light trapping groove, the second type doped region is formed in the first type doped region right below the light trapping groove, the doping types of the second type doped region and the first type doped region are different, the second type doped region positioned in the first type doped region can form a PN junction with the first type doped region, and the contact area of the first type doped region and the second type doped region is increased by adding the second type doped region in the first type doped region in the photoelectric sensor, so that the increase of the PN junction area is facilitated, the electron generation rate of the PN junction is facilitated to be increased, the full well capacity of the photoelectric sensor is facilitated to be improved, the signal-to-noise ratio and the dynamic range of the image sensor are improved, and the imaging quality is improved.
Drawings
FIG. 1 is a schematic diagram of a photoelectric sensor;
Fig. 2 to 3 are schematic structural views corresponding to an embodiment of the photoelectric sensor of the present invention;
Fig. 4 to 9 are schematic structural views corresponding to each step in an embodiment of a method for forming a photoelectric sensor according to the present invention.
Detailed Description
As known from the background art, the photosensitive performance of the currently formed photoelectric sensor is poor.
Now, a photoelectric sensor is combined, and the reason that the imaging quality of the current photoelectric sensor is difficult to improve is analyzed.
Fig. 1 is a schematic structural diagram of a photoelectric sensor.
Referring to fig. 1, the photosensor includes: the substrate 10, the substrate 10 has a light receiving surface 13, and the substrate 10 includes a photosensitive pixel region, the photosensitive pixel region includes a plurality of pixel unit regions 10a distributed in a matrix, and a plurality of light trapping grooves 22 are formed in the substrate 10 of the pixel unit region 10a at one side of the light receiving surface 13; a first type doped region 11 located in the substrate 10 below the light trapping trench 22 in the pixel cell region 10 a; the second type doped region 12 is located in the substrate 10 between adjacent first type doped regions 11.
The Full Well Capacity (FWC) is the maximum charge amount that can be accumulated by the capacitance of the photodiode, and is an important index of the CIS image sensor, and when the full well capacity is saturated, the energy of the new electrons collected by the photodiode is reduced, and the imaging quality, especially in a high dynamic range, is greatly affected.
The size of the pixel unit region 10a can be increased by increasing the capacity of the full well, but the mode tends to influence the integration level of the photoelectric sensor, which is not beneficial to the development trend of higher integration level in the field of semiconductor manufacturing; the full well capacity can be improved by increasing the doping concentration of the first type doped region 11, but the isolation effect of the second type doped region 12 is higher in this way, so that the problem of electric leakage between adjacent pixel unit regions 10a is easily caused by the overlarge concentration of the first doped region 11; the full well capacity can also be increased by increasing the depth of the pixel cell region 10a, but this approach has a greater challenge for the ion implantation process for forming the first type doped region 11.
Therefore, it is currently difficult to better increase the full well capacity, thereby making it difficult to improve the imaging quality of the photosensor.
In order to solve the technical problem, an embodiment of the present invention provides a photoelectric sensor, including: the substrate is provided with a light receiving surface, the substrate comprises a photosensitive pixel area, the photosensitive pixel area comprises a plurality of pixel unit areas distributed in a matrix, and a plurality of light trapping grooves are formed in the substrate of the pixel unit areas at one side of the light receiving surface; the first type doping region is positioned in the substrate below the light trapping groove; the second type doped region is positioned in the first type doped region right below the light trapping groove, and the doping types of the second type doped region and the first type doped region are different.
In the photoelectric sensor provided by the embodiment of the invention, the second type doped region is positioned in the first type doped region right below the light trapping groove, and the doping types of the second type doped region and the first type doped region are different, so that the second type doped region positioned in the first type doped region and the first type doped region can form a PN junction, and the contact area of the first type doped region and the second type doped region is increased by adding the second type doped region in the first type doped region in the photoelectric sensor, thereby being beneficial to increasing the PN junction area, further being beneficial to increasing the electron generation rate of the PN junction, further being beneficial to improving the full well capacity of the photoelectric sensor, improving the signal-to-noise ratio and the dynamic range of the image sensor and improving the imaging quality.
In order that the above objects, features and advantages of embodiments of the invention may be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
Fig. 2 to 3 are schematic structural diagrams corresponding to an embodiment of the photoelectric sensor of the present invention.
Referring to fig. 2 to 3 in combination, fig. 2 (a) is a top view of a substrate, fig. 2 (b) is a partial enlarged view of any one of the photosensitive pixel regions in fig. 2 (a), and fig. 3 is a cross-sectional view corresponding to fig. 2 (a), the photoelectric sensor includes: the substrate 100, the substrate 100 has a light receiving surface 101, and the substrate 100 includes a photosensitive pixel region P, wherein the photosensitive pixel region P includes a plurality of pixel unit regions 100a distributed in a matrix, and a plurality of light trapping grooves 220 are formed in the substrate 100 of the pixel unit region 100a at one side of the light receiving surface 101; a first type doped region 110 located in the substrate 100 below the light trapping trench 220; the second type doped region 120 is located in the first type doped region 110 directly below the light trapping groove 220, and the doping type of the second type doped region 120 is different from that of the first type doped region 110.
As an example, the present embodiment will be described taking the photosensor as a CMOS image sensor as an example.
In other embodiments, the photosensor may also be a CCD (Charge Coupled Device, charge-coupled device) image sensor, a DTOF (DIRECT TIME of Flight ) sensor, or a iTOF (INDIRECT TIME of Flight, indirect time of Flight) sensor, or the like.
In this embodiment, the photoelectric sensor includes: the substrate 100 is located on a side of the pixel wafer facing away from the logic wafer, and the photosensitive surface 101 is a surface of the pixel wafer facing away from the logic wafer.
In this embodiment, the substrate 100 of the pixel wafer is a silicon substrate. In other embodiments, the substrate of the pixel wafer may be made of other materials such as germanium, silicon carbide, gallium arsenide, or indium gallium arsenide, and the substrate of the pixel wafer may be made of other types of materials such as a silicon substrate on an insulator or a germanium substrate on an insulator.
The photosensitive pixel region P is used for receiving an optical signal so as to convert the optical signal into an electrical signal.
In the pixel wafer, the number of the photosensitive pixel areas P is a plurality of, and the photosensitive pixel areas P are arranged in a matrix. The pixel cell area 100a is used to form a pixel.
In this embodiment, the pixel wafer has a light receiving surface 101. The light receiving surface 101 is a surface for receiving light.
In this embodiment, the light receiving surface 101 is a first surface; the pixel wafer 100 also includes a second surface 102 opposite the first surface.
In this embodiment, the photosensor is a backside illuminated (Backside Illumination, BSI) photosensor.
Accordingly, in this embodiment, the pixel wafer is a back-illuminated pixel wafer, the light-receiving surface 101 is a back surface, and the second surface 102 is a front surface.
In the present embodiment, only a part of the photosensitive pixel region P and the pixel unit region 100a is shown in the drawing, and the pixel unit region 100a may further include a device structure such as a photoelectric element (e.g., a photodiode). Wherein the photodiode may be a back-illuminated Single Photon Avalanche Diode (SPAD). For the sake of simplicity, the detailed structure of the above components is not shown in the embodiments of the present invention.
In this embodiment, a logic wafer is bonded to the second surface 102 of the pixel wafer.
The logic wafer is used for analyzing and processing the electric signals provided by the pixel wafer.
The photosensitive pixel areas P and the logic areas are respectively arranged on the two wafers, and the pixel wafers and the logic wafers are bonded together, so that a larger pixel area can be obtained, the paths of light reaching the photoelectric element can be shortened, the scattering of the light can be reduced, the light can be more focused, the photosensitive capacity of the photoelectric sensor in a weak light environment can be improved, and the system noise and crosstalk can be reduced.
In this embodiment, the substrate 100 of the pixel wafer is used as a first substrate, and the logic wafer has a second substrate 160. The second substrate 160 of the logic wafer may be a silicon substrate. In other embodiments, the second substrate of the logic wafer may be made of other materials such as germanium, silicon carbide, gallium arsenide, or indium gallium arsenide, and the second substrate of the logic wafer may be made of other types of materials such as a silicon substrate on an insulator or a germanium substrate on an insulator.
Accordingly, in this embodiment, a logic transistor (not shown) is further formed in the logic wafer, and the logic transistor is used for performing logic processing on the electrical signal provided by the pixel wafer. Specifically, the logic transistor may include a logic gate structure on a logic wafer, and a logic drain region and a logic source region respectively located in the logic wafer at both sides of the logic gate structure.
As an embodiment, the bonding between the second surface 102 of the pixel wafer and the logic wafer is achieved by Hybrid bonding.
Specifically, in the present embodiment, the second surface 102 of the pixel wafer is formed with the first interconnect structure 180, the second substrate 160 of the logic wafer is formed with the second interconnect structure 170, and the pixel wafer and the logic wafer may be bonded together by using a dielectric bonding method, and then an electrical connection between the first interconnect structure 180 and the second interconnect structure 170 is performed.
Wherein the first interconnect structure 180 may be a first metal line, or the first interconnect structure 180 is a first through silicon via interconnect structure (TSV), or the first interconnect structure 180 includes a first via interconnect structure and a first metal line on the first via interconnect structure; the second interconnect structure 170 may be a second metal line, or the second interconnect structure 170 is a second via interconnect structure (TSV), or the second interconnect structure 170 includes a second via interconnect structure and a second metal line on the second via interconnect structure.
It should be noted that the above manner of bonding between the pixel wafer and the logic wafer is merely an example, and the bonding manner between the pixel wafer and the logic wafer is not limited thereto. For example: in other embodiments, the bonding of the pixel wafer and the logic wafer may also be direct bonding (e.g., fusion bonding and anodic bonding) or indirect bonding techniques (e.g., metal eutectic, thermocompression bonding and adhesive bonding), etc.
The light trapping groove 220 is beneficial to improving the optical transmittance of the photosensitive pixel region P and the photoelectric conversion efficiency, so as to improve the optical sensitivity performance of the photoelectric sensor.
Specifically, the light trapping groove 220 is disposed above the optoelectronic element, so as to slow down the refractive index change between the air and the light receiving surface 101, reduce the high reflectivity caused by the refractive index mutation at the interface, so that more light enters the optoelectronic element, and improve the transmittance of the incident light.
As an example, the shape of the light trapping groove 220 is the shape of an inverted pyramid Structure (INVERTED PYRAMID structures).
By making the shape of the light trapping groove 220 be an inverted pyramid structure, a gradual change in refractive index between air and the light receiving surface 101 can be formed, so that the high reflectivity originally caused by abrupt change in refractive index at the interface is greatly reduced, more light enters the photoelectric element, the transmittance of incident light is improved, and an anti-reflection effect is achieved. Meanwhile, when the incident light passes through the inverted pyramid structure of the light receiving surface 101, the incident light is dispersed to various angles by reflection, scattering, refraction and other modes, so that the effective optical path of the light is increased, the light trapping effect is realized, and the absorption efficiency of the light in the photoelectric element is improved.
The shape of the light trapping groove 220 is not limited to this. In a practical process, the shape of the light trapping groove 220 may be other shapes, for example: the light source may have a rectangular shape, an eight-square shape, or a zigzag shape, and accordingly, the light transmittance of the pixel region P may be improved.
In this embodiment, the number of the light trapping grooves 220 in each pixel unit area 100a is plural, and the light trapping grooves 220 in the pixel unit area 100a are distributed in a matrix.
The number of the light trapping grooves 220 is plural, so that the density of the light trapping grooves 220 on each pixel unit area 100a is increased, thereby being beneficial to further improving the effect of increasing the optical transmittance. The plurality of light trapping grooves 220 are arranged in an array in the pixel unit area 100a, which is advantageous not only for the design and layout of the layout, but also for maximizing the number of the light trapping grooves 220 of the single pixel unit area 100a, thereby further increasing the density of the light trapping grooves 220.
In other embodiments, the light trapping grooves may not be arranged in an array in the pixel unit area, and the light trapping grooves may be arranged in other ways in the pixel unit area, for example: can be arranged in a stray shape, staggered or connected in a grid shape, etc.
During operation of the photosensor, electrons generated move to the first type doping region 110, and the first type doping region 110 is used for accumulating electrons during photoelectric conversion.
Specifically, in the present embodiment, the doping type of the first type doped region 110 is N type, the doping ions of the N type doped region are N type ions, and the N type ions include P ions, as ions or Sb ions.
The N-type doped region receives high potential in the working process of the photoelectric sensor, carriers in the N-type doped region are electrons, and the free electron concentration is far greater than the hole concentration, so that the N-type doped region is a region for accumulating electrons.
The N-doped region is used as a main photo-generated carrier generation and storage region and is located below the light trapping groove 220, so that the light trapping groove 220 can effectively increase the photo-generated carrier generation efficiency above the N-doped region, thereby being beneficial to improving the performance of the photoelectric sensor.
In the present embodiment, the second type doped region 120 is located in the first type doped region 110 directly below the light trapping groove 220, and the doping type of the second type doped region is different from that of the first type doped region 110.
Wherein the doping type of the second type doped region 120 is different from that of the first type doped region 110 means that the conductivity type of the doping ions in the second type doped region 120 is different from that of the first type doped region 110.
In this embodiment, the doping type of the first type doped region 110 is N-type, and correspondingly, the doping type of the second type doped region 120 is P-type, and the second type doped region 120 contacts the first type doped region 110 to form a PN junction.
Specifically, in the present embodiment, the doping type of the second type doped region 120 is P-type, and the doping ions of the P-type doped region are P-type ions, wherein the P-type ions include B ions, ga ions or In ions.
In the photoelectric sensor provided in this embodiment, the second type doped region 120 is located in the first type doped region 110 directly below the light trapping groove 220, and the doping types of the second type doped region 120 and the first type doped region 110 are different, so that the second type doped region 120 located in the first type doped region 110 and the first type doped region 110 can form a PN junction, and in the photoelectric sensor, by adding the second type doped region 120 in the first type doped region 110, the contact area between the first type doped region 110 and the second type doped region 120 is increased, which is beneficial to increasing the area of the PN junction, thereby being beneficial to increasing the rate of electrons generated by the PN junction, further being beneficial to improving the full well capacity of the photoelectric sensor, improving the signal-to-noise ratio and the dynamic range of the image sensor, and improving the imaging quality.
In this embodiment, the second type doped region 120 is obtained by performing ion implantation on the first type doped region 110 through the light trapping groove 220, so that the shape of the second type doped region 120 is the same as that of the light trapping groove 220, and the second type doped regions 120 are in one-to-one correspondence with the light trapping grooves 220.
In this embodiment, the light trapping groove 220 has an inverted pyramid structure, and correspondingly, the second type doped region 120 has an inverted pyramid structure.
The second type doped region 120 is in an inverted pyramid structure, so that the contact area between the second doped region 120 and the first type doped region 110 is larger, the effect of increasing the PN junction area is better achieved, the rate of generating electrons by the PN junction is increased, the full-well capacity of the photoelectric sensor is improved, the signal-to-noise ratio and the dynamic range of the image sensor are improved, and the imaging quality is improved.
In this embodiment, the doping concentration of the second type doped region 120 is not too large or too small. If the doping concentration of the second type doped region 120 is too high, the second type doped region 120 is easy to diffuse too much into the first type doped region 110, so that the second type doped region 120 occupies too much area of the first type doped region 110, and accordingly the occupied area of the first type doped region 110 is reduced, which affects the accumulation capacity of the first type doped region 110 on electrons, so as to affect the full well capacity of the photoelectric sensor; if the doping concentration of the second type doped region 120 is too small, the effect of forming the PN junction between the second doped region 120 and the first doped region 110 is easily affected, thereby affecting the effect of increasing the PN junction area, and thus it is difficult to increase the full well capacity of the photosensor. For this reason, in the present embodiment, the doping concentration of the second type doping region 120 is 1e12atom/cm 3 to 1e14atom/cm 3.
It should be noted that, in the present embodiment, the doping depth of the second type doped region 120 is not too large or too small. If the doping depth of the second type doped region 120 is too large, the second type doped region 120 is likely to occupy too much area of the first type doped region 110, and accordingly the occupied area of the first type doped region 110 is reduced, which affects the accumulation capacity of the first type doped region 110 for electrons, thereby affecting the full well capacity of the photoelectric sensor; if the doping depth of the second type doped region 120 is too small, the contact area between the second type doped region 120 and the first type doped region 110 is too small, so that the effect of increasing the PN junction area is difficult to achieve, the rate of generating electrons at the PN junction is difficult to increase, and the full well capacity of the photoelectric sensor is difficult to increase. For this reason, in the present embodiment, the doping depth of the second type doping region 120 is 50nm to 200nm.
In this embodiment, the photoelectric sensor further includes: the third type doped region 130 is located in the substrate 100 between adjacent first type doped regions 110 and contacts the first type doped region 110, and the doping type of the third type doped region 130 is the same as the doping type of the second type doped region 120.
The doping type of the third type doped region 130 is the same as the doping type of the second type doped region 120, and correspondingly, the doping type of the third type doped region 130 is P-type, the doping ions of the P-type doped region are P-type ions, and the P-type ions comprise B ions, ga ions or In ions.
The third type doped region 130 is used for isolating the adjacent first type doped region 110, and the third type doped region 130 is in contact with the first type doped region 110 and can also form a PN junction with the first type doped region 110 to realize the normal function of the photoelectric sensor.
Fig. 4 to 9 are schematic structural views corresponding to each step in an embodiment of a method for forming a photoelectric sensor according to the present invention.
Referring to fig. 4 to 8 in combination, fig. 4 (a) is a top view of a substrate, fig. 4 (b) is a partial enlarged view of any one of the photosensitive pixel regions in fig. 4 (a), fig. 5 is a cross-sectional view corresponding to fig. 4 (a), fig. 6 to 8 are cross-sectional views corresponding to fig. 5, a substrate 100 is provided, the substrate 100 has a light receiving surface 101, and the substrate 100 includes a photosensitive pixel region P, the photosensitive pixel region P includes a plurality of pixel unit regions 100a distributed in a matrix, a plurality of light trapping grooves 220 are formed in the substrate 100 of the pixel unit region 100a at one side of the light receiving surface 101, and a first type doping region 110 is formed in the substrate 100 under the light trapping grooves 220.
As an example, the present embodiment will be described taking the photosensor as a CMOS image sensor as an example.
In other embodiments, the photosensor may also be a CCD (Charge Coupled Device, charge-coupled device) image sensor, a DTOF (DIRECT TIME of Flight ) sensor, or a iTOF (INDIRECT TIME of Flight, indirect time of Flight) sensor, or the like.
In this embodiment, the photoelectric sensor includes: the substrate 100 is located on a side of the pixel wafer facing away from the logic wafer, and the photosensitive surface 101 is a surface of the pixel wafer facing away from the logic wafer.
In this embodiment, the substrate 100 of the pixel wafer is a silicon substrate. In other embodiments, the substrate of the pixel wafer may be made of other materials such as germanium, silicon carbide, gallium arsenide, or indium gallium arsenide, and the substrate of the pixel wafer may be made of other types of materials such as a silicon substrate on an insulator or a germanium substrate on an insulator.
The photosensitive pixel region P is used for receiving an optical signal so as to convert the optical signal into an electrical signal.
In the pixel wafer, the number of the photosensitive pixel areas P is a plurality of, and the photosensitive pixel areas P are arranged in a matrix. The pixel cell area 100a is used to form a pixel.
In this embodiment, the pixel wafer has a light receiving surface 101. The light receiving surface 101 is a surface for receiving light.
In this embodiment, the light receiving surface 101 is a first surface; the pixel wafer 100 also includes a second surface 102 opposite the first surface.
In this embodiment, the photosensor is a backside illuminated (Backside Illumination, BSI) photosensor.
Accordingly, in this embodiment, the pixel wafer is a back-illuminated pixel wafer, the light-receiving surface 101 is a back surface, and the second surface 102 is a front surface.
In the present embodiment, only a part of the photosensitive pixel region P and the pixel unit region 100a is shown in the drawing, and the pixel unit region 100a may further include a device structure such as a photoelectric element (e.g., a photodiode). Wherein the photodiode may be a back-illuminated Single Photon Avalanche Diode (SPAD). For the sake of simplicity, the detailed structure of the above components is not shown in the embodiments of the present invention.
In this embodiment, a logic wafer is bonded to the second surface 102 of the pixel wafer.
The logic wafer is used for analyzing and processing the electric signals provided by the pixel wafer.
The photosensitive pixel areas P and the logic areas are respectively arranged on the two wafers, and the pixel wafers and the logic wafers are bonded together, so that a larger pixel area can be obtained, the paths of light reaching the photoelectric element can be shortened, the scattering of the light can be reduced, the light can be more focused, the photosensitive capacity of the photoelectric sensor in a weak light environment can be improved, and the system noise and crosstalk can be reduced.
In this embodiment, the substrate 100 of the pixel wafer is used as a first substrate, and the logic wafer has a second substrate 160. The second substrate 160 of the logic wafer may be a silicon substrate. In other embodiments, the second substrate of the logic wafer may be made of other materials such as germanium, silicon carbide, gallium arsenide, or indium gallium arsenide, and the second substrate of the logic wafer may be made of other types of materials such as a silicon substrate on an insulator or a germanium substrate on an insulator.
Accordingly, in this embodiment, a logic transistor (not shown) is further formed in the logic wafer, and the logic transistor is used for performing logic processing on the electrical signal provided by the pixel wafer. Specifically, the logic transistor may include a logic gate structure on a logic wafer, and a logic drain region and a logic source region respectively located in the logic wafer at both sides of the logic gate structure.
As an embodiment, the bonding between the second surface 102 of the pixel wafer and the logic wafer is achieved by Hybrid bonding.
Specifically, in the present embodiment, the second surface 102 of the pixel wafer is formed with the first interconnect structure 180, the second substrate 160 of the logic wafer is formed with the second interconnect structure 170, and the pixel wafer and the logic wafer may be bonded together by using a dielectric bonding method, and then an electrical connection between the first interconnect structure 180 and the second interconnect structure 170 is performed.
Wherein the first interconnect structure 180 may be a first metal line, or the first interconnect structure 180 is a first through silicon via interconnect structure (TSV), or the first interconnect structure 180 includes a first via interconnect structure and a first metal line on the first via interconnect structure; the second interconnect structure 170 may be a second metal line, or the second interconnect structure 170 is a second via interconnect structure (TSV), or the second interconnect structure 170 includes a second via interconnect structure and a second metal line on the second via interconnect structure.
It should be noted that the above manner of bonding between the pixel wafer and the logic wafer is merely an example, and the bonding manner between the pixel wafer and the logic wafer is not limited thereto. For example: in other embodiments, the bonding of the pixel wafer and the logic wafer may also be direct bonding (e.g., fusion bonding and anodic bonding) or indirect bonding techniques (e.g., metal eutectic, thermocompression bonding and adhesive bonding), etc.
The light trapping groove 220 is beneficial to improving the optical transmittance of the photosensitive pixel region P and the photoelectric conversion efficiency, so as to improve the optical sensitivity performance of the photoelectric sensor.
Specifically, the light trapping groove 220 is disposed above the optoelectronic element, so as to slow down the refractive index change between the air and the light receiving surface 101, reduce the high reflectivity caused by the refractive index mutation at the interface, so that more light enters the optoelectronic element, and improve the transmittance of the incident light.
As an example, the shape of the light trapping groove 220 is the shape of an inverted pyramid Structure (INVERTED PYRAMID structures).
By making the shape of the light trapping groove 220 be an inverted pyramid structure, a gradual change in refractive index between air and the light receiving surface 101 can be formed, so that the high reflectivity originally caused by abrupt change in refractive index at the interface is greatly reduced, more light enters the photoelectric element, the transmittance of incident light is improved, and an anti-reflection effect is achieved. Meanwhile, when the incident light passes through the inverted pyramid structure of the light receiving surface 101, the incident light is dispersed to various angles by reflection, scattering, refraction and other modes, so that the effective optical path of the light is increased, the light trapping effect is realized, and the absorption efficiency of the light in the photoelectric element is improved.
The shape of the light trapping groove 220 is not limited to this. In a practical process, the shape of the light trapping groove 220 may be other shapes, for example: the light source may have a rectangular shape, an eight-square shape, or a zigzag shape, and accordingly, the light transmittance of the pixel region P may be improved.
In this embodiment, the number of the light trapping grooves 220 in each pixel unit area 100a is plural, and the light trapping grooves 220 in the pixel unit area 100a are distributed in a matrix.
The number of the light trapping grooves 220 is plural, so that the density of the light trapping grooves 220 on each pixel unit area 100a is increased, thereby being beneficial to further improving the effect of increasing the optical transmittance. The plurality of light trapping grooves 220 are arranged in an array in the pixel unit area 100a, which is advantageous not only for the design and layout of the layout, but also for maximizing the number of the light trapping grooves 220 of the single pixel unit area 100a, thereby further increasing the density of the light trapping grooves 220.
In other embodiments, the light trapping grooves may not be arranged in an array in the pixel unit area, and the light trapping grooves may be arranged in other ways in the pixel unit area, for example: can be arranged in a stray shape, staggered or connected in a grid shape, etc.
During operation of the photosensor, electrons generated move to the first type doping region 110, and the first type doping region 110 is used for accumulating electrons during photoelectric conversion.
Specifically, in the present embodiment, the doping type of the first type doped region 110 is N type, the doping ions of the N type doped region are N type ions, and the N type ions include P ions, as ions or Sb ions.
The N-type doped region receives high potential in the working process of the photoelectric sensor, carriers in the N-type doped region are electrons, and the free electron concentration is far greater than the hole concentration, so that the N-type doped region is a region for accumulating electrons.
The N-doped region is used as a main photo-generated carrier generation and storage region and is located below the light trapping groove 220, so that the light trapping groove 220 can effectively increase the photo-generated carrier generation efficiency above the N-doped region, thereby being beneficial to improving the performance of the photoelectric sensor.
In this embodiment, the photoelectric sensor further includes: the third type doped region 130 is located in the substrate 100 between adjacent first type doped regions 110 and contacts the first type doped region 110, and the doping type of the third type doped region 130 is different from that of the first type doped region 110.
The doping type of the third type doped region 130 is different from the doping type of the first type doped region 110, and accordingly, the doping type of the third type doped region 130 is P-type, the doping ions of the P-type doped region are P-type ions, and the P-type ions include B ions, ga ions, or In ions.
The third type doped region 130 is used for isolating the adjacent first type doped region 110, and the third type doped region 130 is in contact with the first type doped region 110 and can also form a PN junction with the first type doped region 110 to realize the normal function of the photoelectric sensor.
Specifically, in the present embodiment, the step of forming the light trapping groove 220 includes: referring to fig. 6, a mask layer 200 is formed on the light receiving surface 101, and a mask opening (not shown) is formed in the mask layer 200 in the pixel unit area 100a and exposes the light receiving surface 101.
Mask layer 200 serves as an etch mask for forming light trapping trenches 220.
Referring to fig. 7, the substrate 100 is etched along the mask opening, forming a plurality of discrete grooves 210 in the pixel cell region 100 a.
The grooves 210 expose the vertical and horizontal surfaces of the substrate 100 in preparation for further etching to form light trapping grooves 220 of inverted pyramidal structure.
In this embodiment, a dry etching process is used to etch the substrate 100 along the mask opening.
The dry etching process has the characteristic of anisotropic etching, so that the etching is more directional by selecting the dry etching process, which is beneficial to improving the accuracy of the opening size of the partition groove 210
Referring to fig. 8, the substrate 100 exposed to the recess 210 is etched using a wet etching process to form a light trapping groove 220.
In this embodiment, the light trapping groove 220 has an inverted pyramid structure.
In this embodiment, the substrate 100 exposed in the recess 210 is etched by using an anisotropic wet etching process.
Specifically, in this embodiment, TMAH solution having anisotropic etching characteristics for each crystal orientation of the silicon substrate is used to etch the substrate 100 exposed to the recess 210, and the anisotropic characteristics are used to obtain the light trapping groove 220 with the shape of an inverted pyramid structure at different crystal orientations with corresponding etching rates.
In this embodiment, after forming the light trapping groove 220, the method further includes: the mask layer 200 is removed to expose the light receiving surface 101.
Referring to fig. 9, the first type doped region 110 is ion-implanted along the light trapping groove 220, and the second type doped region 120 is formed in the first type doped region 110 directly under the light trapping groove 220, the second type doped region 120 being different from the first type doped region 110 in doping type.
In the present embodiment, the second type doped region 120 is located in the first type doped region 110 directly below the light trapping groove 220, and the doping type of the second type doped region is different from that of the first type doped region 110.
Wherein the doping type of the second type doped region 120 is different from that of the first type doped region 110 means that the conductivity type of the doping ions in the second type doped region 120 is different from that of the first type doped region 110.
In this embodiment, the doping type of the first type doped region 110 is N-type, and correspondingly, the doping type of the second type doped region 120 is P-type, and the second type doped region 120 contacts the first type doped region 110 to form a PN junction.
Specifically, in the present embodiment, the doping type of the second type doped region 120 is P-type, and the doping ions of the P-type doped region are P-type ions, wherein the P-type ions include B ions, ga ions or In ions.
In this embodiment, the second type doped region 120 is located in the first type doped region 110 directly below the light trapping groove 220, and the doping types of the second type doped region 120 and the first type doped region 110 are different, so that the second type doped region 120 located in the first type doped region 110 and the first type doped region 110 can form a PN junction, and in the photoelectric sensor, by adding the second type doped region 120 in the first type doped region 110, the contact area between the first type doped region 110 and the second type doped region 120 is increased, which is beneficial to increasing the area of the PN junction, thereby being beneficial to increasing the rate of electrons generated by the PN junction, further being beneficial to improving the full well capacity of the photoelectric sensor, improving the signal-to-noise ratio and the dynamic range of the image sensor, and improving the imaging quality.
In this embodiment, the second type doped region 120 is obtained by performing ion implantation on the first type doped region 110 through the light trapping groove 220, so that the shape of the second type doped region 120 is the same as that of the light trapping groove 220, and the second type doped regions 120 are in one-to-one correspondence with the light trapping grooves 220.
In this embodiment, the light trapping groove 220 has an inverted pyramid structure, and correspondingly, the second type doped region 120 has an inverted pyramid structure.
The second type doped region 120 is in an inverted pyramid structure, so that the contact area between the second doped region 120 and the first type doped region 110 is larger, the effect of increasing the PN junction area is better achieved, the rate of generating electrons by the PN junction is increased, the full-well capacity of the photoelectric sensor is improved, the signal-to-noise ratio and the dynamic range of the image sensor are improved, and the imaging quality is improved.
In the embodiment, in the step of implanting ions into the first type doped region 110 along the light trapping groove 220, the implantation concentration of the ions is not too high or too low. If the implantation concentration of the ion implantation is too large, the second type doped region 120 is easy to diffuse too much into the first type doped region 110, so that the second type doped region 120 occupies too much area of the first type doped region 110, and accordingly the occupied area of the first type doped region 110 is reduced, which affects the accumulation capacity of the first type doped region 110 on electrons, and thus affects the full well capacity of the photoelectric sensor; if the implantation concentration of the ion implantation is too small, the effect of forming the PN junction between the second doped region 120 and the first doped region 110 is easily affected, thereby affecting the effect of increasing the PN junction area, and thus it is difficult to increase the full well capacity of the photosensor. For this reason, in the step of ion-implanting the first type doped region 110 along the light trapping groove 220 in this embodiment, the implantation concentration of the ion implantation is 1e12 atom/cm 3 to 1e14atom/cm 3.
In this embodiment, the implantation energy of the ion implantation along the light trapping groove 220 in the step of implanting ions into the first type doped region 110 is not too large or too small. If the implantation energy of the ion implantation is too large, the doping depth of the second type doped region 120 is easily too large, so that the second type doped region 120 is easily too much to occupy the area of the first type doped region 110, and accordingly the occupied area of the first type doped region 110 is reduced, which affects the accumulation capacity of the first type doped region 110 on electrons, thereby affecting the full well capacity of the photoelectric sensor; if the implantation energy of the ion implantation is too small, the doping depth of the second type doped region 120 is too small, the contact area between the second type doped region 120 and the first type doped region 110 is too small, and the effect of increasing the PN junction area is difficult to achieve, so that the rate of electrons generated by the PN junction is difficult to increase, and the full well capacity of the photoelectric sensor is difficult to increase. For this reason, in the step of implanting ions into the first type doped region 110 along the light trapping groove 220, the implantation energy of the ion implantation is 10KeV to 200KeV.
Accordingly, in the present embodiment, the doping type of the third type doped region 130 is the same as the doping type of the second type doped region 120.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (19)

1. A photoelectric sensor, comprising:
The substrate is provided with a light receiving surface, and comprises a photosensitive pixel area, wherein the photosensitive pixel area comprises a plurality of pixel unit areas distributed in a matrix, and a plurality of light trapping grooves are formed in the substrate of the pixel unit area at one side of the light receiving surface;
the first type doping region is positioned in the substrate below the light trapping groove;
The second type doped region is positioned in the first type doped region right below the light trapping groove, and the doping types of the second type doped region and the first type doped region are different.
2. The photosensor of claim 1, wherein the second-type doped region has a morphology identical to the morphology of the light trapping trench and the second-type doped region corresponds to the light trapping trench one-to-one.
3. The photosensor according to claim 1 or 2, wherein the light trapping groove is in the shape of an inverted pyramid structure; the second type doped region is in the shape of an inverted pyramid structure.
4. The photosensor of claim 1, wherein the doping concentration of the second type doped region is 1e12atom/cm 3 to 1e14atom/cm 3.
5. The photosensor of claim 1, wherein the doped region of the second type has a doping depth of 50nm to 200nm.
6. The photosensor of claim 1, wherein the doping type of the first-type doped region is N-type; the doping type of the second type doping region is P type.
7. The photosensor according to claim 1, wherein the photosensor further comprises: and the third type doped region is positioned in the substrate between the adjacent first type doped regions and is in contact with the first type doped region, and the doping type of the third type doped region is the same as that of the second type doped region.
8. The photosensor according to claim 1, wherein in the pixel unit area, the light trapping grooves are distributed in a matrix or connected in a grid.
9. The photosensor according to claim 1, wherein the photosensor comprises: the substrate is positioned on one side of the pixel wafer, which is opposite to the logic wafer, and the light sensitive surface is the surface of the pixel wafer, which is opposite to the logic wafer.
10. The photosensor according to claim 1 or 9, wherein the photosensor is a back-illuminated photosensor.
11. A method of forming a photoelectric sensor, comprising:
Providing a substrate, wherein the substrate is provided with a light receiving surface, the substrate comprises a photosensitive pixel area, the photosensitive pixel area comprises a plurality of pixel unit areas distributed in a matrix, a plurality of light trapping grooves are formed in the substrate of the pixel unit area at one side of the light receiving surface, and a first type doping area is formed in the substrate below the light trapping grooves;
and carrying out ion implantation on the first type doped region along the light trapping groove, and forming a second type doped region in the first type doped region right below the light trapping groove, wherein the doping types of the second type doped region and the first type doped region are different.
12. The method of forming a photosensor of claim 11, where the step of forming the second type doped region includes: the second type doped region has the same shape as the light trapping groove, and the second type doped region corresponds to the light trapping groove one by one.
13. The method of forming a photosensor according to claim 11 or 12, wherein in the step of providing the substrate, the light trapping groove is in the shape of an inverted pyramid structure; in the step of forming the second type doped region, the second type doped region is in the shape of an inverted pyramid structure.
14. The method of claim 11, wherein in the step of implanting ions into the first type doped region along the light trapping groove, the ion implantation is performed at an implantation concentration of 1e12atom/cm 3 to 1e14atom/cm 3, and the ion implantation is performed at an implantation energy of 10KeV to 200KeV.
15. The method of claim 11, wherein in the step of providing the substrate, the doping type of the first type doping region is N-type; in the step of forming the second type doped region, the doping type of the second type doped region is P-type.
16. The method of claim 11, wherein in the step of providing the substrate, a third type doped region is formed in the substrate between adjacent first type doped regions, the third type doped region having a doping type identical to a doping type of the second type doped region, the third type doped region being in contact with the first type doped region.
17. The method of claim 11, wherein in the step of providing the substrate, the light trapping grooves are distributed in a matrix or connected in a grid.
18. The method of claim 11, wherein in the step of providing the substrate, the substrate is located in a pixel wafer, the pixel wafer is bonded to a logic wafer, the substrate is located on a side of the pixel wafer facing away from the logic wafer, and the light-sensitive surface is a surface of the pixel wafer facing away from the logic wafer.
19. The method of forming a photosensor of claim 11 where the photosensor is a back-illuminated photosensor.
CN202211407977.6A 2022-11-10 2022-11-10 Photoelectric sensor and forming method thereof Pending CN118016679A (en)

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