CN115020504B - Method for manufacturing silicon detector - Google Patents

Method for manufacturing silicon detector Download PDF

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CN115020504B
CN115020504B CN202210470072.7A CN202210470072A CN115020504B CN 115020504 B CN115020504 B CN 115020504B CN 202210470072 A CN202210470072 A CN 202210470072A CN 115020504 B CN115020504 B CN 115020504B
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oxide layer
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ion implantation
silicon
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CN115020504A (en
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宗立超
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
    • H01L31/02164—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors for shielding light, e.g. light blocking layers, cold shields for infrared detectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/115—Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864—Annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a manufacturing method of a silicon detector, which comprises the following steps: step one, providing a silicon substrate, forming a first conductive type doped region in a photosensitive region, forming field oxygen and isolating an active region by the field oxygen. And step two, forming a first oxide layer on the surface of the silicon substrate. And thirdly, performing first ion implantation penetrating through the first oxide layer to form a first electrode region in the selected region. And fourthly, performing second ion implantation penetrating through the first oxide layer to form a second electrode region in the selected region, wherein the first electrode region, the first conductive type doped region positioned between the first electrode region and the second electrode region form the light-sensitive diode. And fifthly, removing the first oxide layer, and then forming a second oxide layer on the surface of the silicon substrate, wherein the second oxide layer is used as a protective film in the photosensitive region. The invention can reduce the fixed charge of the protective film of the photosensitive region, thereby reducing dark current.

Description

Method for manufacturing silicon detector
Technical Field
The present invention relates to a semiconductor integrated circuit manufacturing process, and more particularly, to a silicon detector manufacturing method.
Background
Domestic X-ray silicon detector products are mainly divided into two categories: i.e. amorphous flat-plate X-ray detectors, and high-end silicon-based X-ray detectors, i.e. X-ray silicon detectors. The amorphous flat-plate type X-ray detector has relatively mature domestic technology at present, has certain international market competitiveness, and is not compatible with a semiconductor integrated circuit manufacturing (FAB) process in process manufacturing. Silicon-based X-ray detectors have been developed for two generations, the first generation of products being front-side illuminated (FSI) processes, which are compatible with FAB processes, and do not require silicon wafer backside processes, which are relatively low in process complexity. The second generation product is a back-illuminated (BSI) process, and the back-side process of the silicon wafer is added on the basis of the first generation process, so that the precision is higher than that of the first generation product, and the application is more flexible.
FIG. 1 is a schematic diagram of a conventional FSI-type X-ray silicon detector; x-rays are converted into light by the scintillator 105 and then incident on the silicon detector from the front side. The silicon detector includes a diode region 102, light enters an active region 103 of the diode region 102, and a diode in the active region 103 absorbs the light and performs photoelectric conversion to form photo-generated electrons, i.e., photoelectrons, which are connected to an electrode 104b on the PCB board 101 through an electrode 104a and a bonding wire 106 provided on the silicon detector. In the structure shown in fig. 1, the diode is usually in a PIN structure, and a silicon PIN or PIN array is required to be soldered to the PCB 101 through a side surface. Thus, such a silicon detector module can only be made one-dimensional.
FIG. 2 is a schematic diagram of a conventional BSI type X-ray silicon detector; the X-rays are converted into light by the scintillator 205, then incident on the silicon detector from the back side and generate photoelectrons in the diode of the diode region 202; the generated photoelectrons need to diffuse to the front active region 203 before being collected as an electrical signal. In fig. 2, the silicon diodes or diode arrays are Flip-Chip bonded directly to the PCB 201 by bump technology (Flip-Chip), and as can be seen in fig. 2, the front side electrodes 204 are bonded directly to the PCB 201. In this way a two-dimensional detection system can be realized.
FIG. 1 is a schematic view of a device structure formed by a method for fabricating a silicon detector according to an embodiment of the present invention; the manufacturing method of the silicon detector comprises the following steps:
step one, providing a silicon substrate 301, wherein an N-type doped region 302 is formed on the silicon substrate 301 in a photosensitive region; a field oxide 303 is formed on the silicon substrate 301 and an active region is isolated by the field oxide 303, and the junction depth of the N-type doped region 302 is greater than the depth of the field oxide 303.
Typically, the N-doped region 302 is composed of an N-doped silicon epitaxial layer formed on the surface of the silicon substrate 301.
The semiconductor substrate has an N-type heavy doping.
Step two, a first screen oxide layer (not shown) is formed on the surface of the silicon substrate 301.
Typically, the first shielding oxide layer has a thickness ofThe first shielding oxide layer is formed by adopting a thermal oxidation process.
And thirdly, performing first ion implantation penetrating through the first shielding oxide layer to form an N+ electrode region 305 in the selected region, wherein the first ion implantation is N-type heavily doped ion implantation.
Typically, after step three, a first rapid thermal anneal is also included. The first rapid thermal anneal is used to activate the n+ electrode region 305.
And step four, removing the first shielding oxide layer by adopting a wet process.
And fifthly, forming a second shielding oxide layer 306 on the surface of the silicon substrate 301.
Typically, the second shielding oxide layer 306 has a thickness ofThe second shielding oxide layer 306 is formed by a thermal oxidation process.
Step six, performing a second ion implantation through the second shielding oxide layer 306 to form a p+ electrode region 304 in the selected region, wherein the second ion implantation is a P-type heavily doped ion implantation; the p+ electrode region 304 is located in a selected region of the N-type doped region 302 of the photosensitive region, and a photodiode is formed by the n+ electrode region 305, the N-type doped region 302 located between the n+ electrode region 305 and the p+ electrode region 304, and the p+ electrode region 304.
Typically, the field oxide 303 is spaced between the p+ electrode region 304 and the n+ electrode region 305. The n+ electrode region 305 surrounds the p+ electrode region 304 on a top surface.
Thereafter, the second shielding oxide layer 306 remains, and the second shielding oxide layer 306 is used as a protective film in the photosensitive region.
And step five, performing a second thermal annealing. The second thermal anneal is used to further anneal the n+ electrode region 305 and the p+ electrode region 304. The process conditions of the second thermal annealing include: the temperature was 900℃and the time was 30 minutes.
The subsequent process further includes performing a metal interconnection process including a step of forming the interlayer film 307, the contact hole 308, and the metal wiring 309.
Since the second shielding oxide layer 306 is subjected to the second ion implantation, the second shielding oxide layer 306 traps (traps) a small amount of non-moving positive ions, i.e., has a fixed positive charge 310, and forms an induced electron layer 311 on the P-type Si surface by electrostatic induction, which has the same conductivity type as N-type Si, resulting in the P-type Si being connected to N-type Si, thereby forming a leakage current, which is a dark current. Under an applied bias, the dark current contains the reverse current of the PN junction and the leakage current generated by the induced electron layer. Therefore, how to make the silicon dioxide protective film of the photosensitive region have better quality is a key factor.
Disclosure of Invention
The invention aims to provide a manufacturing method of a silicon detector, which can reduce dark current.
In order to solve the technical problems, the manufacturing method of the silicon detector provided by the invention comprises the following steps:
step one, providing a silicon substrate, wherein a first conductive type doped region is formed on the silicon substrate in a photosensitive region; and forming field oxide on the silicon substrate and isolating an active region by the field oxide, wherein the junction depth of the first conductive type doped region is larger than the depth of the field oxide.
And step two, forming a first oxide layer on the surface of the silicon substrate.
Step three, performing first ion implantation to form a first electrode region in a selected region, wherein the first ion implantation is first conductive type heavily doped ion implantation, and a shielding oxide layer of the first ion implantation adopts the first oxide layer; the first electrode region is located in a selected region of the first conductivity type doped region of the photosensitive region.
Step four, performing second ion implantation to form a second electrode region in the selected region, wherein the second ion implantation is second conductive type heavily doped ion implantation, and the first oxide layer is still adopted as a shielding oxide layer of the second ion implantation; the second electrode region is located in a selected region of the first conductivity type doped region of the photosensitive region, and a photodiode is formed by the first electrode region, the first conductivity type doped region located between the first electrode region and the second electrode region, and the second electrode region.
And fifthly, removing the first oxide layer, then forming a second oxide layer on the surface of the silicon substrate, wherein the second oxide layer is used as a protective film in the photosensitive region, and the fixed charges in the second oxide layer are reduced and dark current is reduced by utilizing the characteristic that the second oxide layer is not subjected to ion implantation.
A further improvement is that the first conductivity type doped region is comprised of a silicon epitaxial layer having a first conductivity type doping formed on the surface of the silicon substrate.
A further improvement is that the semiconductor substrate has a heavy doping of the first conductivity type.
A further improvement is that the field oxide is spaced between the second electrode region and the first electrode region.
In a further development, the first electrode region surrounds the second electrode region on the peripheral side in a plan view.
A further improvement is that the first conductivity type is N-type; the second conductivity type is P-type.
A further improvement is that after step three, a first rapid thermal anneal is performed.
Further improvements are that the process conditions of the first rapid thermal annealing include: the temperature was 950℃and the time was 30 seconds.
A further improvement is that after step five, a second thermal anneal is performed.
Further improvement is that the process conditions of the second thermal annealing include: the temperature was 900℃and the time was 30 minutes.
In a further improvement, in the third step, the process conditions of the first ion implantation include:
the injected impurity is P;
the injection voltage is 50 keV-100 keV;
the injection dose is 3E15cm -2 ～5E15cm -2 。
In a further improvement, in the fourth step, the process conditions of the second ion implantation include:
b is injected with impurities;
the injection voltage is 10 keV-30 keV;
implant doseIs 2E14cm -2 ～5E14cm -2 。
In a further improvement, in the second step, the thickness of the first oxide layer isThe first oxide layer is formed by adopting a thermal oxidation process.
In a further improvement, in the fifth step, the thickness of the second oxide layer isThe second oxide layer is deposited by an LPCVD process and the deposition temperature is less than 700 ℃.
A further improvement is that the first conductivity type is P-type; the second conductivity type is N-type.
According to the invention, the shielding oxide layers adopted by the ion implantation of the first electrode region and the second electrode region of the light-sensitive diode in the photosensitive region are all set as the same first oxide layer, after the second electrode region is formed, the first oxide layer is removed, and the newly formed second oxide layer is adopted as the protection film of the photosensitive region.
The second oxide layer can be formed by adopting a low-temperature deposition process at the temperature of less than 700 ℃, so that adverse effects of the second oxide layer forming process on the first electrode region and the second electrode region can be eliminated, and other performances of the device can be kept.
Drawings
The invention is described in further detail below with reference to the attached drawings and detailed description:
FIG. 1 is a schematic diagram of a prior art FSI-type X-ray silicon detector;
FIG. 2 is a schematic diagram of a prior art BSI type X-ray silicon detector;
FIG. 3 is a schematic diagram of a device structure formed by a prior art method of fabricating a silicon detector;
FIG. 4 is a flow chart of a method of fabricating a silicon detector according to an embodiment of the present invention;
fig. 5 is a schematic view of a device structure formed by a method for manufacturing a silicon detector according to an embodiment of the present invention.
Detailed Description
FIG. 4 is a flow chart of a method of fabricating a silicon detector according to an embodiment of the present invention; FIG. 5 is a schematic view of a device structure formed by the method for manufacturing a silicon detector according to an embodiment of the present invention; the manufacturing method of the silicon detector comprises the following steps:
step one, providing a silicon substrate 401, wherein a first conductive type doped region 402 is formed on the silicon substrate 401 in a photosensitive region; a field oxide 403 is formed on the silicon substrate 401 and an active region is isolated by the field oxide 403, and a junction depth of the first conductive type doped region 402 is greater than a depth of the field oxide 403.
In the embodiment of the present invention, the first conductivity type doped region 402 is formed by a silicon epitaxial layer having first conductivity type doping formed on the surface of the silicon substrate 401.
The semiconductor substrate has a first conductivity type heavy doping.
In the embodiment of the invention, the first conductive type is N type; the second conductivity type is P-type. In other embodiments can also be: the first conductivity type is P-type; the second conductivity type is N-type. The first conductivity type is N-type only; the structural member of the second conductivity type is P-type is described in detail.
Step two, a first oxide layer (not shown) is formed on the surface of the silicon substrate 401.
In an embodiment of the present invention, the thickness of the first oxide layer isThe first oxide layer is formed by adopting a thermal oxidation process.
Step three, performing a first ion implantation to form a first electrode region 405 in the selected region, wherein the first ion implantation is a first conductive type heavily doped ion implantation, and a shielding oxide layer of the first ion implantation adopts the first oxide layer; the first electrode region 405 is located in a selected region of the first conductivity-type doped region 402 of the photosensitive region.
In the embodiment of the present invention, since the first conductive type is N-type, the first electrode region 405 is an N-type region. In some preferred embodiments, the process conditions for the first ion implantation include:
the injected impurity is P;
the injection voltage is 50 keV-100 keV;
the injection dose is 3E15cm -2 ～5E15cm -2 。
In the embodiment of the invention, after the third step, the method further comprises the step of performing a first rapid thermal annealing. The first rapid thermal anneal is used to activate the first electrode region 405. In some preferred embodiments, the process conditions of the first rapid thermal anneal include: the temperature was 950℃and the time was 30 seconds.
Step four, performing a second ion implantation to form a second electrode region 404 in the selected region, wherein the second ion implantation is a second conductive type heavily doped ion implantation, and the shielding oxide layer of the second ion implantation still adopts the first oxide layer; the second electrode region 404 is located in a selected region of the first conductive type doped region 402 of the photosensitive region, and a light-sensing diode is composed of the first electrode region 405, the first conductive type doped region 402 located between the first electrode region 405 and the second electrode region 404, and the second electrode region 404.
In the embodiment of the present invention, the field oxygen 403 is spaced between the second electrode region 404 and the first electrode region 405. In some preferred embodiments, the first electrode region 405 surrounds the second electrode region 404 on a peripheral side in a top view.
In the embodiment of the present invention, since the second conductive type is P-type, the second electrode region 404 is a P-type region. In some preferred embodiments, the process conditions for the second ion implantation include:
b is injected with impurities;
the injection voltage is 10 keV-30 keV;
the implantation dose is 2E14cm -2 ～5E14cm -2 。
And fifthly, removing the first oxide layer, and then forming a second oxide layer 406 on the surface of the silicon substrate 401, wherein the second oxide layer 406 is used as a protective film in the photosensitive region, and the fixed charges in the second oxide layer 406 are reduced and thus dark current is reduced by utilizing the characteristic that the second oxide layer 406 is not subjected to ion implantation.
In the embodiment of the present invention, the thickness of the second oxide layer 406 isThe second oxide layer 406 is deposited using an LPCVD process and a deposition temperature less than 700 ℃.
In the embodiment of the invention, the first oxide layer is removed by adopting a wet process.
And step five, performing a second thermal annealing. The second thermal anneal is used to further anneal the first electrode region 405 and the second electrode region 404. In some preferred embodiments, the process conditions of the second thermal anneal include: the temperature was 900℃and the time was 30 minutes.
The subsequent process further includes performing a metal interconnection process including a step of forming the interlayer film 407, the contact hole 408, and the metal wiring 409.
The silicon probes are also subsequently bonded to the PCB board. When it is desired to implement an X-ray silicon detector, a scintillator is also required. When the X-ray silicon detector is of an FSI structure, the scintillator is disposed over the front side of the silicon detector, i.e., the front side of the silicon substrate 401, wherein the first conductivity type doped region 402 is formed in the front side of the silicon substrate 401. When the X-ray silicon detector is of BSI structure, the scintillator is disposed on the back of the silicon detector, i.e., the back of the silicon substrate 401.
In the embodiment of the invention, the shielding oxide layers adopted by the ion implantation of the first electrode region 405 and the second electrode region 404, which are two electrode regions of the light-sensitive diode of the light-sensitive region, are all set to be the same first oxide layer, after the second electrode region 404 is formed, the first oxide layer is removed, and the newly formed second oxide layer 406 is adopted as the protection film of the light-sensitive region, compared with the protection film in the prior art, which directly adopts the shielding oxide layer as the light-sensitive region, because the second oxide layer 406 is not subjected to the ion implantation, the second oxide layer 406 can ensure good quality, and the fixed charges in the second oxide layer 406 can be reduced, which can greatly reduce the dark current of the device.
The second oxide layer 406 in the embodiment of the present invention can be formed by using a low-temperature deposition process at a temperature less than 700 ℃, so that adverse effects of the formation process of the second oxide layer 406 on the first electrode region 405 and the second electrode region 404 can be eliminated, and other performances of the device can be maintained.
The present invention has been described in detail by way of specific examples, but these should not be construed as limiting the invention. Many variations and modifications may be made by one skilled in the art without departing from the principles of the invention, which is also considered to be within the scope of the invention.

Claims (15)

1. A method of manufacturing a silicon detector, comprising the steps of:
step one, providing a silicon substrate, wherein a first conductive type doped region is formed on the silicon substrate in a photosensitive region; forming field oxide on the silicon substrate and isolating an active region by the field oxide, wherein the junction depth of the first conductive type doped region is larger than the depth of the field oxide;
step two, forming a first oxide layer on the surface of the silicon substrate;
step three, performing first ion implantation to form a first electrode region in a selected region, wherein the first ion implantation is first conductive type heavily doped ion implantation, and a shielding oxide layer of the first ion implantation adopts the first oxide layer; the first electrode region is located in a selected region of the first conductivity type doped region of the photosensitive region;
step four, performing second ion implantation to form a second electrode region in the selected region, wherein the second ion implantation is second conductive type heavily doped ion implantation, and the first oxide layer is still adopted as a shielding oxide layer of the second ion implantation; the second electrode region is located in a selected region of the first conductivity type doped region of the photosensitive region, and a light-sensing diode is formed by the first electrode region, the first conductivity type doped region located between the first electrode region and the second electrode region, and the second electrode region;
and fifthly, removing the first oxide layer, then forming a second oxide layer on the surface of the silicon substrate, wherein the second oxide layer is used as a protective film in the photosensitive region, and the fixed charges in the second oxide layer are reduced and dark current is reduced by utilizing the characteristic that the second oxide layer is not subjected to ion implantation.
2. A method of manufacturing a silicon detector as defined in claim 1, wherein: the first conductivity type doped region is composed of a silicon epitaxial layer having first conductivity type doping formed on a surface of the silicon substrate.
3. A method of manufacturing a silicon detector as claimed in claim 2, wherein: the semiconductor substrate has a first conductivity type heavy doping.
4. A method of manufacturing a silicon detector as claimed in claim 3, wherein: the field oxygen is arranged between the second electrode area and the first electrode area.
5. A method of manufacturing a silicon detector as claimed in claim 3, wherein: the first electrode region surrounds the second electrode region on a peripheral side in a plan view.
6. A method of manufacturing a silicon detector as claimed in claim 3, wherein: the first conductivity type is N type; the second conductivity type is P-type.
7. The method of manufacturing a silicon detector as defined in claim 6, wherein: after step three, a first rapid thermal anneal is also included.
8. The method of manufacturing a silicon detector as defined in claim 7, wherein: the process conditions of the first rapid thermal annealing include: the temperature was 950℃and the time was 30 seconds.
9. The method of manufacturing a silicon detector as defined in claim 7, wherein: and step five, performing a second thermal annealing.
10. The method of manufacturing a silicon detector as defined in claim 9, wherein: the process conditions of the second thermal annealing include: the temperature was 900℃and the time was 30 minutes.
11. The method of manufacturing a silicon detector as defined in claim 6, wherein: in the third step, the process conditions of the first ion implantation include:
the injected impurity is P;
the injection voltage is 50 keV-100 keV;
the injection dose is 3E15cm -2 ～5E15cm -2 。
12. The method of manufacturing a silicon detector as defined in claim 6, wherein: in the fourth step, the process conditions of the second ion implantation include:
b is injected with impurities;
the injection voltage is 10 keV-30 keV;
the implantation dose is 2E14cm -2 ～5E14cm -2 。
13. A method of manufacturing a silicon detector as defined in claim 1, wherein: in the second step, the thickness of the first oxide layer isThe first oxide layer is formed by adopting a thermal oxidation process.
14. A method of manufacturing a silicon detector as defined in claim 1, wherein: in the fifth step, the thickness of the second oxide layer isThe second oxide layer is deposited by an LPCVD process and the deposition temperature is less than 700 ℃.
15. A method of manufacturing a silicon detector as claimed in claim 3, wherein: the first conductivity type is P-type; the second conductivity type is N-type.
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