CN115020504A - Method for manufacturing silicon detector - Google Patents

Method for manufacturing silicon detector Download PDF

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CN115020504A
CN115020504A CN202210470072.7A CN202210470072A CN115020504A CN 115020504 A CN115020504 A CN 115020504A CN 202210470072 A CN202210470072 A CN 202210470072A CN 115020504 A CN115020504 A CN 115020504A
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CN115020504B (en
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宗立超
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
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    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
    • H01L31/02164—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors for shielding light, e.g. light blocking layers, cold shields for infrared detectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/115—Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864—Annealing
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    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract

The invention discloses a manufacturing method of a silicon detector, which comprises the following steps: step one, providing a silicon substrate, forming a first conductive type doping area in a photosensitive area, forming field oxygen and isolating an active area by the field oxygen. And step two, forming a first oxidation layer on the surface of the silicon substrate. And step three, performing first ion implantation penetrating through the first oxide layer to form a first electrode region in the selected region. And step four, performing second ion implantation penetrating through the first oxide layer to form a second electrode region in the selected region, wherein the first electrode region, the first conductive type doping region positioned between the first electrode region and the second electrode region form a photosensitive diode. And fifthly, removing the first oxide layer, and then forming a second oxide layer on the surface of the silicon substrate, wherein the second oxide layer is used as a protective film in the photosensitive region. The invention can reduce the fixed charge of the protective film of the photosensitive area, thereby reducing the dark current.

Description

Method for manufacturing silicon detector
Technical Field
The present invention relates to a semiconductor integrated circuit manufacturing process, and more particularly, to a method for manufacturing a silicon detector.
Background
Domestic X-ray silicon detector products mainly fall into two categories: namely an amorphous flat-panel X-ray detector and a high-end silicon-based X-ray detector, namely an X-ray silicon detector. The amorphous flat-plate X-ray detector is relatively mature in technology at present in China, has certain international market competitiveness, and is incompatible with a semiconductor integrated circuit manufacturing (FAB) process in process manufacturing. Silicon-based X-ray detectors have been developed for two generations, the first generation products being front-illuminated (FSI) processes, processes compatible with FAB processes, and processes that do not require silicon wafer backside processes, have relatively low process complexity. The second generation product is a backside illuminated (BSI) process, and a silicon wafer back process is added on the basis of the first generation process, so that the precision is higher and the application is more flexible than that of the first generation product.
FIG. 1 is a schematic diagram of a conventional FSI type X-ray silicon detector; the X-rays are converted into light by the scintillator 105 and then incident on the silicon detector from the front surface. The silicon detector comprises a diode region 102, light enters an active region 103 of the diode region 102, the diode in the active region 103 absorbs the light and then performs photoelectric conversion to form photo-generated electrons, i.e. photoelectrons, and the photoelectrons are connected with an electrode 104b on the PCB 101 through an electrode 104a arranged on the silicon detector and a bonding wire 106. In the structure shown in fig. 1, the diode is usually in a PIN structure, and a silicon PIN or a PIN array needs to be bonded to the PCB 101 through the side surface. Thus, such silicon detector modules can only be made in one dimension.
Fig. 2 is a schematic structural diagram of a conventional BSI type X-ray silicon detector; the X-rays are converted into light by the scintillator 205 and then incident on the silicon detector from the back surface and generate photoelectrons in the diodes of the diode region 202; the generated photoelectrons are diffused to the active region 203 of the front surface before being collected as an electrical signal. In fig. 2, a silicon diode or diode array is Flip-Chip bonded directly to PCB board 201 by bump-on-Chip technology (Flip-Chip), and as can be seen from fig. 2, front electrode 204 is directly bonded to PCB board 201. In this way, a two-dimensional detection system can be realized.
FIG. 1 is a schematic diagram of a device structure formed by the method for manufacturing a silicon detector according to an embodiment of the present invention; the manufacturing method of the silicon detector comprises the following steps:
step one, providing a silicon substrate 301, wherein an N-type doped region 302 is formed on the silicon substrate 301 in a photosensitive region; forming field oxygen 303 on the silicon substrate 301 and isolating an active region by the field oxygen 303, wherein the junction depth of the N-type doped region 302 is greater than the depth of the field oxygen 303.
Typically, the N-type doped region 302 is composed of a silicon epitaxial layer with N-type doping formed on the surface of the silicon substrate 301.
The semiconductor substrate has N-type heavy doping.
Step two, a first screen oxide (not shown) is formed on the surface of the silicon substrate 301.
Typically, the first shield oxide layer has a thickness of
Figure BDA0003621561350000021
The first shielding oxide layer is formed by adopting a thermal oxidation process.
And step three, performing a first ion implantation through the first shielding oxide layer to form an N + electrode region 305 in the selected region, wherein the first ion implantation is an N-type heavily doped ion implantation.
Generally, after the third step, a first rapid thermal annealing is also performed. The first rapid thermal anneal is used to activate the N + electrode regions 305.
And step four, removing the first shielding oxide layer by adopting a wet process.
And step five, forming a second shielding oxide layer 306 on the surface of the silicon substrate 301.
Typically, the thickness of the second screen oxide layer 306 is
Figure BDA0003621561350000022
The second screen oxide layer 306 is formed by a thermal oxidation process.
Sixthly, performing second ion implantation penetrating through the second shielding oxide layer 306 to form a P + electrode region 304 in the selected region, wherein the second ion implantation is P-type heavily doped ion implantation; the P + electrode region 304 is located in a selected region of the N-doped region 302 of the photosensitive region, and a photodiode is formed by the N + electrode region 305, the N-doped region 302 located between the N + electrode region 305 and the P + electrode region 304, and the P + electrode region 304.
Typically, the field oxygen 303 is spaced between the P + electrode region 304 and the N + electrode region 305. The N + electrode regions 305 are surrounded on the periphery side of the P + electrode regions 304 in a plan view.
Then, the second shielding oxide layer 306 remains, and the second shielding oxide layer 306 is used as a protection film in the photosensitive region.
And after the fifth step, performing second thermal annealing. The second thermal anneal is used to further anneal activate the N + electrode regions 305 and the P + electrode regions 304. The process conditions of the second thermal annealing comprise: the temperature was 900 ℃ and the time was 30 minutes.
The subsequent processes further include performing a metal interconnection process including the step of forming an interlayer film 307, a contact hole 308, and a metal wiring 309.
Since the second shielding oxide layer 306 is subjected to the second ion implantation, the second shielding oxide layer 306 will trap (trap) a small amount of immobile positive ions, i.e. the ions have fixed positive charges 310, and form an induced electron layer 311 on the surface of the P-type Si through electrostatic induction, where the conductivity type is the same as that of the N-type Si, so that the P-type Si is communicated with the N-type Si, thereby forming a leakage current, which is a dark current. Under an applied bias, the dark current includes the reverse current of the PN junction and the leakage current generated by this induced electron shell. Therefore, how to make the silicon dioxide protective film of the photosensitive region have better quality is a key factor.
Disclosure of Invention
The invention aims to provide a manufacturing method of a silicon detector, which can reduce dark current.
In order to solve the above technical problem, the manufacturing method of the silicon detector provided by the invention comprises the following steps:
providing a silicon substrate, wherein a first conductive type doped region is formed in the silicon substrate in a photosensitive region; and forming field oxygen on the silicon substrate and isolating an active region by the field oxygen, wherein the junction depth of the first conductive type doped region is greater than the depth of the field oxygen.
And step two, forming a first oxidation layer on the surface of the silicon substrate.
Performing first ion implantation to form a first electrode area in the selected area, wherein the first ion implantation is first conductive type heavy doping ion implantation, and the shielding oxide layer of the first ion implantation adopts the first oxide layer; the first electrode region is located in a selected region of the first conductivity type doped region of the photosensitive region.
Performing second ion implantation to form a second electrode region in the selected region, wherein the second ion implantation is second conductive type heavily doped ion implantation, and the shielding oxide layer of the second ion implantation still adopts the first oxide layer; the second electrode region is positioned in a selected region of the first conductive type doping region of the photosensitive region, and a photosensitive diode is formed by the first electrode region, the first conductive type doping region positioned between the first electrode region and the second electrode region.
And fifthly, removing the first oxide layer, and then forming a second oxide layer on the surface of the silicon substrate, wherein the second oxide layer is adopted as a protective film in the photosensitive region, and the fixed charges in the second oxide layer are reduced by utilizing the characteristic that the second oxide layer is not subjected to ion implantation, so that the dark current is reduced.
In a further improvement, the first-conductivity-type-doped region is composed of a silicon epitaxial layer with first-conductivity-type doping formed on the surface of the silicon substrate.
In a further refinement, the semiconductor substrate has a heavy doping of the first conductivity type.
In a further improvement, the second electrode region and the first electrode region are spaced apart from each other by the field oxygen.
In a further improvement, the first electrode regions surround the second electrode regions in a plane of plan view.
In a further improvement, the first conductivity type is N-type; the second conductivity type is P-type.
The further improvement is that after the third step, the method also comprises the step of carrying out first rapid thermal annealing.
In a further improvement, the process conditions of the first rapid thermal annealing include: the temperature was 950 ℃ and the time was 30 seconds.
In a further improvement, after the fifth step, a second thermal annealing is further performed.
In a further improvement, the process conditions of the second thermal annealing include: the temperature was 900 ℃ and the time was 30 minutes.
In a further improvement, in step three, the process conditions of the first ion implantation include:
injecting impurity P;
the injection voltage is 50 keV-100 keV;
the implantation dose is 3E15cm -2 ～5E15cm -2 。
In a further improvement, in step four, the process conditions of the second ion implantation include:
injecting impurity B;
the injection voltage is 10 keV-30 keV;
the implantation dose is 2E14cm -2 ～5E14cm -2 。
In a further improvement, in the second step, the thickness of the first oxide layer is
Figure BDA0003621561350000041
The first oxidation layer is formed by adopting a thermal oxidation process.
In a further improvement, in the fifth step, the thickness of the second oxide layer is
Figure BDA0003621561350000042
The second oxide layer is deposited by an LPCVD process and the deposition temperature is less than 700 ℃.
In a further improvement, the first conductivity type is P-type; the second conductivity type is N-type.
According to the invention, the shielding oxide layers adopted by the ion implantation of the two electrode regions of the photosensitive diode of the photosensitive region, namely the first electrode region and the second electrode region are set as the same first oxide layer, after the second electrode region is formed, the first oxide layer is removed, and the newly formed second oxide layer is adopted as the protective film of the photosensitive region.
The second oxide layer can be formed by adopting a low-temperature deposition process at the temperature of less than 700 ℃, so that the adverse effect of the formation process of the second oxide layer on the first electrode area and the second electrode area can be eliminated, and other performances of the device can be kept.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a schematic diagram of a prior art FSI type X-ray silicon detector;
FIG. 2 is a schematic diagram of a prior art BSI type X-ray silicon detector;
FIG. 3 is a schematic diagram of a device structure formed by a conventional method for manufacturing a silicon detector;
FIG. 4 is a flow chart of a method of fabricating a silicon detector in accordance with an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a device formed by the method for manufacturing a silicon detector according to the embodiment of the invention.
Detailed Description
FIG. 4 is a flow chart of a method for manufacturing a silicon detector according to an embodiment of the present invention; FIG. 5 is a schematic structural diagram of a device formed by the method for manufacturing a silicon detector according to an embodiment of the present invention; the manufacturing method of the silicon detector comprises the following steps:
step one, providing a silicon substrate 401, wherein a first conductive type doped region 402 is formed on the silicon substrate 401 in a photosensitive region; forming field oxygen 403 on the silicon substrate 401 and isolating an active region by the field oxygen 403, wherein the junction depth of the first conductive type doped region 402 is greater than the depth of the field oxygen 403.
In the embodiment of the present invention, the first-conductivity-type-doped region 402 is formed by a silicon epitaxial layer with first-conductivity-type doping formed on the surface of the silicon substrate 401.
The semiconductor substrate has a first conductivity type heavy doping.
In the embodiment of the invention, the first conductive type is an N type; the second conductivity type is P-type. In other embodiments can also be: the first conductive type is P type; the second conductivity type is N-type. Below only N-type for the first conductivity type; the structural member of which the second conductivity type is P-type is described in detail.
Step two, forming a first oxide layer (not shown) on the surface of the silicon substrate 401.
In the embodiment of the invention, the thickness of the first oxide layer is
Figure BDA0003621561350000051
The first oxide layer is formed by a thermal oxidation process.
Performing first ion implantation to form a first electrode region 405 in the selected region, wherein the first ion implantation is first conductive type heavily doped ion implantation, and the first oxide layer is adopted as a shielding oxide layer of the first ion implantation; the first electrode region 405 is located in a selected region of the first conductivity type doped region 402 of the photosensitive region.
In the embodiment of the invention, since the first conductive type is N-type, the first electrode region 405 is an N-type region. In some preferred embodiments, the process conditions of the first ion implantation include:
injecting impurity P;
the injection voltage is 50 keV-100 keV;
the implantation dose is 3E15cm -2 ～5E15cm -2 。
In the embodiment of the invention, after the third step, a first rapid thermal annealing is further performed. The first rapid thermal anneal is used to activate the first electrode regions 405. In some preferred embodiments, the process conditions of the first rapid thermal annealing include: the temperature was 950 ℃ and the time was 30 seconds.
Performing second ion implantation to form a second electrode region 404 in the selected region, wherein the second ion implantation is second conductive type heavily doped ion implantation, and the shielding oxide layer of the second ion implantation still adopts the first oxide layer; the second electrode region 404 is located in a selected region of the first conductivity type doped region 402 of the photosensitive region, and a photodiode is composed of the first electrode region 405, the first conductivity type doped region 402 and the second electrode region 404 located between the first electrode region 405 and the second electrode region 404.
In the embodiment of the present invention, the field oxygen 403 is spaced between the second electrode region 404 and the first electrode region 405. In some preferred embodiments, the first electrode regions 405 surround the periphery of the second electrode regions 404 in a top view.
In the embodiment of the invention, since the second conductive type is P-type, the second electrode region 404 is a P-type region. In some preferred embodiments, the process conditions of the second ion implantation include:
injecting impurity B;
the injection voltage is 10 keV-30 keV;
the implantation dose is 2E14cm -2 ～5E14cm -2 。
And step five, removing the first oxide layer, and then forming a second oxide layer 406 on the surface of the silicon substrate 401, wherein the second oxide layer 406 is used as a protective film in the photosensitive region, and fixed charges in the second oxide layer 406 are reduced by utilizing the characteristic that the second oxide layer 406 is not subjected to ion implantation, so that dark current is reduced.
In the embodiment of the invention, the thickness of the second oxide layer 406 is
Figure BDA0003621561350000061
The second oxide layer 406 is deposited by LPCVD process and deposited at a temperature less than 700 ℃.
In the embodiment of the invention, the first oxide layer is removed by adopting a wet process.
And after the fifth step, performing second thermal annealing. The second thermal anneal is used to further anneal activate the first electrode regions 405 and the second electrode regions 404. In some preferred embodiments, the process conditions of the second thermal annealing include: the temperature was 900 ℃ and the time was 30 minutes.
The subsequent process further includes performing a metal interconnection process including the step of forming an interlayer film 407, a contact hole 408 and a metal wiring 409.
The silicon probe is subsequently bonded to the PCB board. When an X-ray silicon detector needs to be implemented, a scintillator needs to be provided. When the X-ray silicon detector is in an FSI structure, the scintillator is disposed over the front side of the silicon detector, i.e., the front side of the silicon substrate 401, wherein the first conductive-type doped region 402 is formed on the front side of the silicon substrate 401. When the X-ray silicon detector is of a BSI structure, the scintillator is disposed on the back side of the silicon detector, i.e., the back side of the silicon substrate 401.
In the embodiment of the present invention, the shielding oxide layers used for ion implantation of the first electrode region 405 and the second electrode region 404 of the photodiode in the photosensitive region are all set to be the same first oxide layer, after the second electrode region 404 is formed, the first oxide layer is removed, and the newly formed second oxide layer 406 is used as the protective film of the photosensitive region, compared with the prior art that the shielding oxide layer is directly used as the protective film of the photosensitive region, because the second oxide layer 406 is not subjected to ion implantation, the second oxide layer 406 can ensure good quality, the fixed charges in the second oxide layer 406 can be reduced, and the dark current of the device can be greatly reduced.
The second oxide layer 406 of the embodiment of the invention can be formed by adopting a low-temperature deposition process at the temperature of less than 700 ℃, so that the adverse effect of the forming process of the second oxide layer 406 on the first electrode region 405 and the second electrode region 404 can be eliminated, and other properties of the device can be maintained.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims (15)

1. A method of manufacturing a silicon detector, comprising the steps of:
providing a silicon substrate, wherein a first conductive type doped region is formed in the silicon substrate in a photosensitive region; forming field oxygen on the silicon substrate and isolating an active region by the field oxygen, wherein the junction depth of the first conductive type doped region is greater than the depth of the field oxygen;
step two, forming a first oxidation layer on the surface of the silicon substrate;
performing first ion implantation to form a first electrode area in the selected area, wherein the first ion implantation is first conductive type heavy doping ion implantation, and the shielding oxide layer of the first ion implantation adopts the first oxide layer; the first electrode region is located in a selected region of the first conductivity type doped region of the photosensitive region;
performing second ion implantation to form a second electrode region in the selected region, wherein the second ion implantation is second conductive type heavily doped ion implantation, and the shielding oxide layer of the second ion implantation still adopts the first oxide layer; the second electrode region is positioned in a selected region of the first conductive type doping region of the photosensitive region, and a photosensitive diode is formed by the first electrode region, the first conductive type doping region positioned between the first electrode region and the second electrode region;
and fifthly, removing the first oxide layer, and then forming a second oxide layer on the surface of the silicon substrate, wherein the second oxide layer is adopted as a protective film in the photosensitive region, and the fixed charges in the second oxide layer are reduced by utilizing the characteristic that the second oxide layer is not subjected to ion implantation, so that the dark current is reduced.
2. The method of manufacturing a silicon detector as claimed in claim 1, wherein: the first conductive type doping area is composed of a silicon epitaxial layer with first conductive type doping formed on the surface of the silicon substrate.
3. The method of manufacturing a silicon detector as claimed in claim 2, wherein: the semiconductor substrate has a first conductivity type heavy doping.
4. A method of manufacturing a silicon detector as claimed in claim 3, characterized in that: the second electrode region and the first electrode region are spaced by the field oxygen.
5. A method of manufacturing a silicon detector as claimed in claim 3, characterized in that: the first electrode regions surround the second electrode regions in a plane of plan view.
6. A method of manufacturing a silicon detector as claimed in claim 3, characterized in that: the first conductivity type is N type; the second conductivity type is P-type.
7. The method of manufacturing a silicon detector as claimed in claim 6, wherein: after the third step, the method also comprises the step of carrying out first rapid thermal annealing.
8. The method of manufacturing a silicon detector as claimed in claim 7, wherein: the process conditions of the first rapid thermal annealing comprise: the temperature was 950 ℃ and the time was 30 seconds.
9. The method of manufacturing a silicon detector as claimed in claim 7, wherein: and after the fifth step, performing second thermal annealing.
10. The method of manufacturing a silicon detector as claimed in claim 9, wherein: the process conditions of the second thermal annealing comprise: the temperature was 900 ℃ and the time was 30 minutes.
11. The method of manufacturing a silicon detector as claimed in claim 6, wherein: in step three, the process conditions of the first ion implantation include:
injecting impurity P;
the injection voltage is 50 keV-100 keV;
the implantation dose is 3E15cm -2 ～5E15cm -2 。
12. The method of manufacturing a silicon detector as claimed in claim 6, wherein: in the fourth step, the process conditions of the second ion implantation include:
injecting impurity B;
the injection voltage is 10 keV-30 keV;
the implantation dose is 2E14cm -2 ～5E14cm -2 。
13. The method of manufacturing a silicon detector as claimed in claim 1, wherein: in the second step, the thickness of the first oxide layer is
Figure FDA0003621561340000021
The first oxide layer is formed by a thermal oxidation process.
14. The method of manufacturing a silicon detector as claimed in claim 1, wherein: in step five, the thickness of the second oxide layer is
Figure FDA0003621561340000022
The second oxide layer is deposited by an LPCVD process and the deposition temperature is less than 700 ℃.
15. A method of manufacturing a silicon detector as claimed in claim 3, characterized in that: the first conductive type is P type; the second conductivity type is N-type.
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