CN118010181A - Temperature test structure, temperature test chip and temperature test method - Google Patents

Temperature test structure, temperature test chip and temperature test method Download PDF

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Publication number
CN118010181A
CN118010181A CN202211392752.8A CN202211392752A CN118010181A CN 118010181 A CN118010181 A CN 118010181A CN 202211392752 A CN202211392752 A CN 202211392752A CN 118010181 A CN118010181 A CN 118010181A
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temperature test
test structure
temperature
metal layer
mos
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张敏杰
胡梅丽
朱辰东
何敏
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Priority to CN202211392752.8A priority Critical patent/CN118010181A/en
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Abstract

A temperature test structure, a temperature test chip and a temperature test method are provided. The temperature test structure includes: more than two MOS pipes, the MOS pipe includes: a gate electrode, a source electrode and a second drain electrode; the first preset electrode and the second preset electrode are electrically connected through the corresponding first metal layer; the first metal layers connected with the first preset electrode of the MOS tube are connected in series through resistors, and the first metal layers connected with the second preset electrode of the MOS tube are connected in parallel; and taking the total resistance value of each first metal layer and the resistor connected with the first preset electrode of the MOS tube as the temperature variation of the temperature test structure. By adopting the scheme, the accuracy of temperature detection can be improved.

Description

Temperature test structure, temperature test chip and temperature test method
Technical Field
The invention relates to the technical field of semiconductors, in particular to a temperature test structure, a temperature test chip and a temperature test method.
Background
The self-heating effect (SELF HEATING EFFECT, SHE) refers to the phenomenon that the temperature inside the device is increased due to heat generated by channel current when the device is operated. Self-heating of semiconductor devices can lead to performance degradation, time-dependent variations, and reliability problems.
The temperature measurement of the semiconductor device is realized by detecting the internal resistance of the semiconductor device based on the increase of the resistance value of the metal conductor with the increase of the temperature and based on the relationship between the resistance and the temperature. And the thermal resistance required by the establishment of the device thermal model is extracted through the relative relation between the power of the input device and the corresponding temperature rise.
However, existing solutions for temperature testing of semiconductor devices have poor accuracy.
Disclosure of Invention
The invention aims to solve the problems that: how to improve the accuracy of temperature detection.
To solve the above problems, an embodiment of the present invention provides a temperature test structure, including:
more than two MOS pipes, the MOS pipe includes: a gate, a source and a drain; the source electrode and the drain electrode are electrically connected through the corresponding first metal layer;
The first metal layers connected with the source electrode of the MOS tube are connected in series through resistors, and the first metal layers connected with the drain electrode of the MOS tube are connected in parallel; and obtaining the temperature variation of the test structure based on the total resistance variation of each first metal layer and the resistor connected with the MOS tube source electrode.
Optionally, the first preset is a drain electrode, and the second preset is a source electrode.
Optionally, the first preset is a source and the second preset is a drain.
Optionally, resistors are arranged between the first preset poles of any adjacent MOS tubes.
Optionally, the resistance values of the resistors are equal.
Optionally, the material of the resistor is the same as the material of the first metal layer.
Optionally, the method further comprises: a first ammeter, a voltmeter and a plurality of second ammeters; the first ammeter is used for detecting input current of the temperature test structure; the second ammeter is used for detecting the current of a second preset electrode of the MOS tube; the voltmeter is used for detecting the voltage difference of the resistor.
Optionally, the number of the MOS transistors is 4.
The embodiment of the invention also provides a temperature test chip which is manufactured by adopting any one of the temperature test structures.
The embodiment of the invention also provides a temperature testing method, which comprises the following steps:
providing a temperature test structure as described in any one of the above;
Applying a voltage to an input of the temperature test structure;
when each MOS tube in the temperature test structure is disconnected, measuring a first voltage difference between an input voltage and an output voltage of the temperature test structure, and calculating to obtain a first resistance value of the temperature test structure before temperature change;
when each MOS tube in the temperature test structure is conducted, measuring the input current of the temperature test structure and the current of a second preset electrode of the other MOS tubes except the MOS tube connected with the input end; a second voltage difference between the input voltage and the output voltage of the temperature test structure is calculated to obtain a second resistance value of the temperature test structure before temperature change;
And obtaining the temperature variation of the temperature test structure based on the first resistance value and the second resistance value.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:
By applying the scheme of the invention, the first metal layers connected with the first preset electrode of the MOS tube are connected in series through resistors, and the first metal layers connected with the second preset electrode of the MOS tube are connected in parallel; and obtaining the temperature variation of the temperature test structure based on the total resistance value variation of each first metal layer and the resistor connected with the first preset electrode of the MOS tube. Compared with the total resistance change value of the grid metal, the temperature change quantity of the temperature test structure is obtained, and as the number of MOS (metal oxide semiconductor) tubes is increased, the resistance of the Enduo test structure is also increased due to the fact that the first metal layers are connected in series, so that the temperature test structure is more sensitive to temperature change, and the temperature measurement is more accurate. And, because of the direct connection between the first preset electrode and the first metal layer, the temperature change of the active region is more sensitive to the indirect connection between the grid electrode and the active region, so that the accuracy of temperature measurement can be further improved.
Drawings
FIG. 1 is a schematic illustration of a temperature testing configuration;
FIG. 2 is a schematic diagram of a temperature testing structure according to an embodiment of the present invention;
FIG. 3 is a flow chart of a temperature testing method in an embodiment of the invention;
Fig. 4 is an equivalent circuit diagram of the MOS transistor in fig. 2 when it is turned off;
Fig. 5 is an equivalent circuit diagram of the MOS transistor in fig. 2 when turned on.
Detailed Description
As process nodes evolve, from planar processes to fin field effect transistor (FinFET) processes, the temperature of the semiconductor device at the same power is higher and higher, resulting in a semiconductor device with greater thermal resistance and poorer thermal conductivity.
In general, the thermal resistance of a semiconductor device can be detected, thereby obtaining the temperature values of the semiconductor device at different powers. The thermal resistance R TH of a semiconductor device can be generally calculated according to the following formula:
Trise＝RTH·P (1)
Wherein T rise represents the temperature variation of the semiconductor device, T rise＝ΔRratio/TCR,P＝I*V,ΔRratio represents the rate of change of the resistance value of the semiconductor device before and after the temperature variation, TCR is the temperature coefficient of resistance, P represents the power, I represents the value of the current flowing through the semiconductor device, and V represents the value of the voltage flowing through the semiconductor device.
Therefore, in order to calculate the thermal resistance R TH of the semiconductor device, Δr ratio, that is, the rate of change of the resistance value of the semiconductor device before and after the temperature change, needs to be calculated first.
In the prior art, when Δr ratio is calculated, the variation Δr of the gate resistance of the transistor before and after the temperature change in the semiconductor device is calculated by dividing the resistance before the gate resistance change. Taking the temperature test structure shown in fig. 1 as an example, in fig. 1, the semiconductor device includes a plurality of transistors connected in parallel. The current I Force1 flows from the metal layer M2 at one end of the semiconductor device, flows to the gates G1 to GN after passing through the contact hole and the metal layer M1, and the current flowing through the last transistor is I Force2, and the specific current direction is shown by the arrow direction in fig. 1. The gates G1 to GN are electrically connected through the metal layer M1, and the metal layer M1 is the upper layer of the gate.
At this time, the total resistance through which current flows is R g, the resistance of the metal layer M0 is R metal, and the resistance of the contact hole is R V0G,(Rg-Rmetal-RV0G), which represents the total resistance of the N gates through which current flows. Therefore, the variation Δr g,total of each gate resistance before and after the temperature change can be obtained by using the formula (2):
ΔRg,total＝[(1/N)*(Rg-Rmetal-RV0G)]after heat-[(1/N)*(Rg-Rmetal-RV0G)]before heat (2)
Wherein [ (1/N) ((R g-Rmetal-RV0G)]after heat) represents the total resistance of N gates after temperature change) [ (1/N) ((R g-Rmetal-RV0G)]before heat) represents the total resistance of N gates before temperature change).
As can be seen from equation (2), as N increases, the N gates connected in parallel will have a smaller total resistance, thereby resulting in a decrease in Δr g,total due to temperature change. Because of the limit problem of the testing instrument, the general minimum potential testing precision can be only 0.1V, the resistance change generally reaches more than one thousandth ohm, the resistance change can be tested, the length of a single grid electrode in the chip is nano-scale, the resistance is small, the general resistance is smaller, the accuracy is worse, and the temperature measuring precision is affected.
In addition, by adopting the above scheme, the plurality of gates are connected in parallel through the metal layer M1, and T rise is obtained by testing the resistance change of the gate metal. Because the metal layer M1 is an upper metal layer and is far away from the heating area of the device, and the resistance change of the metal layer M1 can not reflect the temperature change of the device through indirect contact between a High dielectric (High K) material and the grid, the resistance change finally tested comprises the change of the grid resistance and the change of the resistance of the metal layer M1, and the change of the resistance of a contact hole between the metal layer M1 and the grid. Wherein the metal layer M1 and the contact hole resistance affect the accuracy of the temperature test. Further affecting the accuracy of the temperature measurement.
Aiming at the problem, the invention provides a temperature test structure, in the temperature test structure, first metal layers connected with a first preset electrode of an MOS tube are connected in series through a resistor, and first metal layers connected with a second preset electrode of the MOS tube are connected in parallel; and obtaining the temperature variation of the temperature test structure based on the total resistance variation of each first metal layer and the resistor of the first preset electrode of the MOS tube. Compared with the total resistance based on the grid resistance as the temperature variation of the temperature test structure, as the number of the MOS tubes is increased due to the serial connection between the first metal layers, the resistance of the temperature test structure is also increased, so that the temperature test structure is more sensitive to temperature variation, and the temperature measurement is more accurate. And, because of the direct connection between the first preset electrode and the first metal layer, the temperature change of the active region is more sensitive to the indirect connection between the grid electrode and the active region, so that the accuracy of temperature measurement can be further improved.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
The embodiment of the invention provides a temperature test structure, which comprises the following components: more than two MOS pipes, the MOS pipe includes: a gate, a source and a drain; the source electrode and the drain electrode are electrically connected through the corresponding first metal layer;
The first metal layers connected with the first preset electrode of the MOS tube are connected in series through resistors, and the first metal layers connected with the second preset electrode of the MOS tube are connected in parallel; and obtaining the temperature variation of the temperature test structure based on the total resistance variation of each first metal layer and the resistor connected with the first preset electrode of the MOS tube.
In a specific implementation, the MOS transistor further includes: and the active area is a heating area of the MOS tube. The grid electrode of the MOS tube is formed above the active region and plays a role of a switch. The source electrode and the drain electrode of the MOS tube are positioned at the left side and the right side of the gate electrode and are formed by beating corresponding ions on the active region. The first metal layer is positioned on the left side and the right side of the grid electrode and is metal contacted with the source electrode and the drain electrode, and the main function is to connect the source electrode and the drain electrode. In general, the first metal layer is connected to the second metal layer, the second metal layer is connected to the third metal layer, the third metal layer is connected to the fourth metal layer, … …, and the third metal layer is connected to an external pad (pad), and then a power supply is connected to the pad to supply power to the source and the drain of the MOS transistor. The grid electrode and the first metal layer belong to the same layer, and the second metal layer is a metal layer above the grid electrode.
By testing the resistance change of the first metal layer, the first metal layer and the grid electrode are of the same metal layer and are in direct contact with the device heating area, and compared with the situation that the grid electrode is in contact with the device heating area through a High K material, the resistance change of the first metal layer can more reflect the temperature change of the device heating area.
In a specific implementation, the number of the MOS transistors in the temperature test structure is not limited, and may include only two MOS transistors, or may include three or more MOS transistors. The MOS tube can be a PMOS tube or an NMOS tube.
In an embodiment of the present invention, the first preset electrode may be a drain electrode of the MOS transistor, and correspondingly, the second active region is a source electrode of the MOS transistor. At this time, the drains of the MOS transistors are connected in series through resistors, and the sources of the MOS transistors are connected in parallel.
In another embodiment of the present invention, the first preset electrode may be a source electrode of the MOS transistor, and correspondingly, the second active region is a drain electrode of the MOS transistor. At this time, the sources of the MOS transistors are connected in series through resistors, and the drains of the MOS transistors are connected in parallel.
In a specific implementation, resistors may be disposed between the first preset poles of any adjacent MOS transistors, that is, the resistors are connected to the first metal layer connected to the first preset pole of the adjacent MOS transistor, so that the first preset poles of the adjacent MOS transistors are connected in series.
In a specific implementation, in the temperature test structure, the resistances of the resistors used for connecting adjacent MOS transistors in series may be equal or unequal, which is not limited herein.
In the prior art, referring to fig. 1, since the gates are connected in parallel by the metal layer M1, the change of the measured resistance caused by the temperature change of the device includes the parallel gate metal, and the metal layer M1 connected in parallel with the gate metal and the contact hole have a resistance change that is far away from the heating area of the device, and the resistance change cannot feed back the change of the device temperature like the gate, so the calculation result of Δr g,total needs to exclude the influence of the resistance R metal of the metal layer M1 and the resistance R V0G of the contact hole, but cannot practically exclude the influence, and the measurement accuracy is further affected.
Therefore, in the embodiment of the invention, the material of the resistor is the same as that of the first metal layer, namely, the resistor and the first metal layer are made of the same metal, so that the resistor and the first metal layer can be in direct contact with the device heating area, the change of the resistor can also feed back the change of the temperature of the device, the resistor and the first metal layer are in direct contact without connecting with a contact hole, the influence of the resistance of the contact hole is eliminated, the change of the resistor and the resistance of the first metal layer can more reflect the change of the temperature of the device, and the accuracy of temperature test is further improved.
In a specific implementation, the temperature test structure may further include: a first ammeter, a voltmeter and a plurality of second ammeters; the first ammeter is used for detecting input current of the temperature test structure; the second ammeter is used for detecting the current of a second preset electrode of the MOS tube; the voltmeter is used for detecting the voltage difference of the resistor.
Fig. 2 is a schematic diagram of a layout structure of a temperature test structure in an embodiment of the present invention. Referring to fig. 2, the temperature test structure may include 4 MOS transistors, which are a first MOS transistor P1, a second MOS transistor P2, a third MOS transistor P3, and a fourth MOS transistor P4, respectively.
The first metal layer and the grid electrode of each MOS tube are positioned in the same image layer. The grid electrode of each MOS tube is positioned above the active region. The source electrode and the drain electrode are respectively and electrically connected through the first metal layer. A plurality of second metal layers are located over the first metal layer and the gate.
The second metal layers K1 to K5 are arranged in parallel along the first direction; the first metal layer 211 to the first metal layer 242, and the gate metal layer G1 to the gate metal layer G4 are arranged in parallel along the second direction; the first direction is perpendicular to the second direction. The first metal layer is spaced apart from the gate metal layer.
Specifically, in the first MOS transistor P1, the drain electrode on one side of the first gate metal layer G1 is electrically connected through the first metal layer 211, and the source electrode on the other side is electrically connected through the first metal layer 212. In the second MOS transistor P2, the drain electrode on one side of the first gate metal layer G2 is electrically connected through the first metal layer 221, and the source electrode on the other side is electrically connected through the first metal layer 222. In the third MOS transistor P3, the drain electrode on one side of the first gate metal layer G3 is electrically connected to the drain electrode through the first metal layer 231, and the source electrode on the other side is electrically connected to the source electrode through the first metal layer 232. In the fourth MOS transistor P4, the drain electrode on one side of the first gate metal layer G4 is electrically connected to the drain electrode through the first metal layer 241, and the source electrode on the other side is electrically connected to the source electrode through the first metal layer 242.
The first metal layer 211 connected to the drain of the first MOS transistor P1 is an input end of the temperature test structure. The second metal layer K1 is electrically connected to the first metal layer 211 through the first contact hole. The second metal layer K2 is electrically connected with the grid metal layer of each MOS tube through the first contact hole and is connected to the power supply VDD. The second metal layer K3 is electrically connected with the first metal layer connected with the source electrode of each MOS tube through the second contact hole and is connected to the ground line VSS. The second metal layer K4 is electrically connected with the first metal layer connected with the source electrodes of the second MOS tube P2 to the fourth MOS tube P4 through the second contact hole. The first metal layer 241 connected to the drain of the fourth MOS transistor P4 is used as the output end of the temperature test structure. The second metal layer K5 is connected with the output end of the temperature test structure. The second metal layer K4 is cut by the metal cutting layer.
The drains of adjacent MOS tubes are connected in series through resistors. Specifically, referring to fig. 2, one end of the first resistor R1 is connected to the first metal layer 211 connected to the drain of the first MOS transistor P1, and the other end is connected to the first metal layer 221 connected to the drain of the second MOS transistor P2, so that the drain of the first MOS transistor P1 is connected in series with the drain of the second MOS transistor P2. One end of the second resistor R2 is connected to the first metal layer 221 of the drain electrode of the second MOS transistor P2, and the other end is connected to the first metal layer 231 of the drain electrode of the third MOS transistor, so that the drain electrode of the second MOS transistor P2 is connected in series with the drain electrode of the third MOS transistor. One end of the third resistor R3 is connected to the first metal layer 231 of the drain electrode of the third MOS transistor P3, and the other end is connected to the first metal layer 241 of the drain electrode of the fourth MOS transistor, so that the drain electrode of the third MOS transistor P3 is connected in series with the drain electrode of the fourth MOS transistor. One end of the fourth resistor R4 is connected with the first metal layer 241 of the fourth MOS transistor drain electrode, and the other end is connected with the output end of the temperature test structure.
In a specific implementation, the materials of the first resistor R1 to the fourth resistor R4 may be the same as the materials of the first metal layer, that is, implemented using the same metal.
In a specific implementation, the external voltage V Force is applied to the input terminal of the temperature test structure through the third contact hole. The first ammeter detects an input current I Sense of the temperature test structure. The second ammeter detects the current I Sense_1 of the source electrode of the second MOS tube P2, the current I Sense_2 of the source electrode of the third MOS tube P3 and the current I Sense_3 of the source electrode of the fourth MOS tube P4. The voltmeter detects the voltage difference of the resistors, i.e., V Sense＝VSense_2-VSense_1. The output voltage of the temperature test structure is V com.
Referring to fig. 3, the embodiment of the invention further provides a temperature testing method, which may include the following steps:
step 31, providing a temperature test structure; the temperature test structure is as described in the above embodiments.
Step 32, applying a voltage to the input of the temperature test structure.
Step 33, when each MOS tube in the temperature test structure is disconnected, measuring a first voltage difference between an input voltage and an output voltage of the temperature test structure, and calculating to obtain a first resistance value R M0_1 of the temperature test structure before temperature change.
Step 34, when each MOS tube in the temperature test structure is conducted, measuring the input current of the temperature test structure and the current of the sources of other MOS tubes except the MOS tube connected with the input end; and a second voltage difference between the input voltage and the output voltage of the temperature test structure is calculated to obtain a second resistance value R M0_2 of the temperature test structure before temperature change.
And step 35, obtaining the resistance change delta R M0 of the temperature test structure based on the first resistance value and the second resistance value.
Taking the temperature test structure in fig. 2 as an example, the layout structure including each MOS transistor shown in fig. 2 may be equivalent to the circuit diagram shown in fig. 4 when each MOS transistor is turned off. When each MOS transistor is turned on, the circuit diagram shown in fig. 5 may be equivalent. In fig. 4 and 5, R M1＝R1+R1_single,RM2＝R2+R2_single,RM3 =r3+r3_single, where r1_single represents the resistance of the first metal layer 211, r2_single represents the resistance of the first metal layer 221, and r3_single represents the resistance of the first metal layer 231.
A voltage V Force is applied to the input of the temperature test structure. The voltmeter detects the voltage difference of the resistors, i.e., V Sense＝VSense_2-VSense_1.
When the MOS transistors are all turned off, that is, before the temperature change, referring to fig. 4, the equivalent resistors R M1 to R M2 are connected in series, and at this time, the detection result of the voltmeter is the first voltage difference V1, so that it can be obtained:
RM0_1＝RM0_1_total/3＝(RM1+RM2+RM2)/3＝V1/ISense/3 (2)
Wherein, R M0_1_total represents the total resistance of the equivalent resistors R M1 to R M2, and R M0_1 represents the sum of the resistance of the first metal layer and a series resistor (i.e., R1, R2 or R3) before the temperature change.
When the MOS transistors are all turned on, i.e. after the temperature change, referring to fig. 5, the detection result of the voltmeter is the second voltage difference V2, and assuming that R M0_2 represents the sum of the resistance values of a first metal layer and a series resistor (i.e. R1, R2 or R3) after the temperature change, it can be obtained:
V2＝ISense_3*(3*RM0_2)+ISense_2*(2*RM0_2)+ISense_1*RM0_2 (3)
this can be achieved by:
RM0_2＝V2/(3*ISense_3+2*ISense_2+ISense_1) (4)
From the formula (2) and the formula (4), it can be obtained:
ΔRM0＝RM0_2＝RM0_1＝V2/(3*ISense_3+2*ISense_2+ISense_1)-V1/ISense/3 (5)
In specific implementation, delta R ratio can be obtained based on the resistance variation obtained by the temperature test structure, and then T rise＝ΔRratio/TCR is utilized to calculate the temperature variation T rise of each MOS tube. Finally, the thermal resistance of the semiconductor device can be measured by using the temperature variation T rise and the power.
The power of each equivalent resistor can be calculated by adopting the following formula in sequence:
P1＝(VForce-(R1+R1_single/2)*(ISense_3+ISense_2+ISense_1))*ISense_1 (6)
P2＝(VForce-(R2+R2_single/2)*(2*ISense_3+2*ISense_2+ISense_1))*ISense_2 (7)
P3＝(VForce-(R3+R3_single/2)**(3*ISense_3+2*ISense_2+ISense_1))*ISense_2 (8)
Wherein, P 1 represents the power of the equivalent resistor R M1, P 2 represents the power of the equivalent resistor R M2, and P 3 represents the power of the equivalent resistor R M3.
According to the calculated thermal resistance R TH of the MOS tube, a corresponding temperature measurement model can be generated, so that temperature measurement can be carried out on other semiconductor devices.
The embodiment of the invention also provides a temperature test chip which is manufactured by adopting the temperature test structure.
As can be seen from the above description, in the temperature test structure according to the embodiment of the present invention, the first metal layer that can directly contact with the active region and absorb heat is used as the test metal, and the active regions of the MOS transistors are connected in series through the resistor, so that the test metal can be converted from the gate metal layer that is originally connected in parallel to the first metal layer that is connected in series, thereby greatly improving the test accuracy of the thermal resistance variation. In addition, the series resistor is made of metal with the same material as the first metal layer, so that the interference on the test precision can be reduced.
Connecting the first metal layers connected with the first preset electrode of the MOS tube in series through resistors, and connecting the first metal layers connected with the second preset electrode of the MOS tube in parallel; and obtaining the temperature variation of the temperature test structure based on the total resistance value of each first metal layer and the resistor connected with the first preset electrode of the MOS tube.
As the first metal layers are connected in series, the resistance of the temperature test structure can be increased along with the increase of the number of the MOS transistors, so that the temperature test structure is more sensitive to temperature change, and the temperature measurement is more accurate. In addition, due to the fact that the first preset electrode is directly connected with the first metal layer, the temperature change of the active area can be more sensitive, and therefore accuracy of thermal resistance measurement can be further improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (10)

1. A temperature testing structure, comprising:
more than two MOS pipes, the MOS pipe includes: a gate, a source and a drain; the source electrode and the drain electrode are electrically connected through the corresponding first metal layer;
The first metal layers connected with the first preset electrode of the MOS tube are connected in series through resistors, and the first metal layers connected with the second preset electrode of the MOS tube are connected in parallel; and obtaining the temperature variation of the temperature test structure based on the total resistance variation of each first metal layer and the resistor connected with the first preset electrode of the MOS tube.
2. The temperature test structure of claim 1, wherein the first preset is a drain and the second preset is a source.
3. The temperature test structure of claim 1, wherein the first preset is a source and the second preset is a drain.
4. The temperature test structure of claim 1, wherein resistors are disposed between the first predetermined poles of any adjacent MOS transistors.
5. The temperature test structure of claim 4, wherein each of said resistors has an equal resistance.
6. The temperature test structure of claim 4, wherein a material of said resistor is the same as a material of said first metal layer.
7. The temperature testing structure of claim 1, further comprising: a first ammeter, a voltmeter and a plurality of second ammeters; the first ammeter is used for detecting input current of the temperature test structure; the second ammeter is used for detecting the current of a second preset electrode of the MOS tube; the voltmeter is used for detecting the voltage difference of the resistor.
8. The temperature test structure of claim 1, wherein the number of MOS transistors is 4.
9. A temperature test chip, characterized in that it is manufactured by using the temperature test structure according to any one of claims 1 to 8.
10. A method of temperature testing comprising:
Providing a temperature test structure according to any one of claims 1 to 8;
Applying a voltage to an input of the temperature test structure;
when each MOS tube in the temperature test structure is disconnected, measuring a first voltage difference between an input voltage and an output voltage of the temperature test structure, and calculating to obtain a first resistance value of the temperature test structure before temperature change;
When each MOS tube in the temperature test structure is conducted, measuring the input current of the temperature test structure and the current of a second preset pole of the other MOS tubes except the MOS tube connected with the input end; a second voltage difference between the input voltage and the output voltage of the temperature test structure is calculated to obtain a second resistance value of the temperature test structure before temperature change;
And obtaining the temperature variation of the temperature test structure based on the first resistance value and the second resistance value.
CN202211392752.8A 2022-11-08 2022-11-08 Temperature test structure, temperature test chip and temperature test method Pending CN118010181A (en)

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Application Number Priority Date Filing Date Title
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