CN117995892A - High-reliability power transistor structure capable of eliminating hot spots and preparation method - Google Patents
High-reliability power transistor structure capable of eliminating hot spots and preparation method Download PDFInfo
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- CN117995892A CN117995892A CN202410398437.9A CN202410398437A CN117995892A CN 117995892 A CN117995892 A CN 117995892A CN 202410398437 A CN202410398437 A CN 202410398437A CN 117995892 A CN117995892 A CN 117995892A
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- 238000002360 preparation method Methods 0.000 title abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 22
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 claims description 18
- 238000001259 photo etching Methods 0.000 claims description 18
- 229910002113 barium titanate Inorganic materials 0.000 claims description 16
- 238000002955 isolation Methods 0.000 claims description 16
- 230000008569 process Effects 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 claims description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 12
- 238000009792 diffusion process Methods 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 9
- 238000005260 corrosion Methods 0.000 claims description 8
- 230000007797 corrosion Effects 0.000 claims description 8
- 238000002347 injection Methods 0.000 claims description 7
- 239000007924 injection Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000012535 impurity Substances 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 4
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- 229910052761 rare earth metal Inorganic materials 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 229910052718 tin Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 2
- 239000007943 implant Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 239000002210 silicon-based material Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- Bipolar Transistors (AREA)
Abstract
The invention relates to the technical field of power semiconductor devices, in particular to a high-reliability power transistor structure capable of eliminating hot spots and a preparation method thereof. Comprising the following steps: an n+ substrate to form an n+ collector region; the N-epitaxial layer is arranged on the top of the N+ substrate to form an N-epitaxial region; the P-type base region is arranged at the top of the N-epitaxial layer; the N+ emitter region is arranged at the top of the inside of the P-type base region; the metal electrode comprises a base region electrode, an emitter region electrode and a collector region electrode; the two base region electrodes are symmetrically arranged on two sides of the top of the P-type base region respectively, the emitter region electrode is arranged on the top of the N+ emitter region, and the collector region electrode is arranged on the back surface of the N+ substrate; the ballast resistor of the invention increases rapidly along with the temperature rise, can effectively limit the output current of the device, and achieves the effect of eliminating the hot spots of the high-power device.
Description
Technical Field
The invention relates to the technical field of power semiconductor devices, in particular to a high-reliability power transistor structure capable of eliminating hot spots and a preparation method thereof.
Background
The high-power radio frequency power transistor consists of a plurality of transistor cells so as to achieve high power capacity, meanwhile, the silicon power bipolar transistor has the characteristic of positive feedback of temperature current, namely when the temperature rises, collector output current rises along with temperature index, power consumption is increased due to current rise, junction temperature is further increased due to power dissipation, and the phenomenon is that the power device has potential thermal instability and is easy to thermally collapse, device parameter disintegration is caused, even secondary breakdown is induced, the device is permanently damaged, and the reliability of the power device is greatly reduced.
There are many effective methods for reducing the problem of thermal collapse of a power device, one method is to detect the collector output current through an external circuit and provide feedback to control the stability of the output current as the temperature rises, and one method is to integrate a ballast resistor structure at the output stage of the device, usually using polysilicon as the ballast resistor, and reducing the transistor voltage division to suppress the current when the output current increases. However, the complexity and the circuit cost are increased by the first method, the high-frequency gain of the device is directly affected by the size of the polycrystalline resistor in the second method, the radio-frequency power gain is not good, the resistivity of the polycrystalline resistor has a negative temperature coefficient, and potential hazards exist as a ballast resistor.
Disclosure of Invention
The invention aims to provide a high-reliability power transistor structure capable of eliminating hot spots and a preparation method thereof, so as to solve the problem that the conventional high-power transistor is easy to generate hot spots and has reliability risks.
In order to solve the above technical problems, the present invention provides a high-reliability power transistor structure capable of eliminating hot spots, comprising:
an n+ substrate to form an n+ collector region;
The N-epitaxial layer is arranged on the top of the N+ substrate to form an N-epitaxial region;
The P-type base region is arranged at the top of the N-epitaxial layer;
The N+ emitter region is arranged at the top of the inside of the P-type base region;
The metal electrode comprises a base region electrode, an emitter region electrode and a collector region electrode; the two base region electrodes are symmetrically arranged on two sides of the top of the P-type base region respectively, the emitter region electrode is arranged on the top of the N+ emitter region, and the collector region electrode is arranged on the back surface of the N+ substrate;
The ballast resistor is used for conducting the upper section electrode and the lower section electrode in the transmitting area electrode; wherein the ballast resistor adopts a barium titanate resistor with positive temperature coefficient, and the Curie temperature point of the barium titanate resistor is 150-175 ℃.
Preferably, the semiconductor device further comprises an isolation medium, wherein the isolation medium is arranged on the top of the N-epitaxial layer and is used for isolating the base region electrode and the emitter region electrode.
Preferably, the isolation medium is made of silicon dioxide material.
Preferably, the doping concentration of the N+ substrate is 1E18cm -3~5E19cm-3.
Preferably, the doping concentration of the N-epitaxial layer is 1E13cm -3~2E14cm-3, and the thickness of the N-epitaxial layer is 10 um-60 um.
Preferably, the implantation concentration of the P-type base region is 1E14cm -2~1E15cm-2.
Preferably, the injection concentration of the N+ emission region is 1E15cm -2~1E16cm-2.
Preferably, the barium titanate resistor can adjust the characteristic of the curie temperature point thereof by doping Sn, sb rare earth elements, so that the barium titanate forms an emitter ballast resistor with positive temperature coefficient from an insulating material.
The invention also provides a preparation method of the high-reliability power transistor structure capable of eliminating hot spots, which comprises the following steps:
Step 1: preparing an N-epitaxial layer on an N+ substrate;
step 2: growing a field oxide layer with the thickness of 0.5um to 1um on the N-epitaxial layer; the process temperature is 950-1150 ℃;
Step 3: photoetching and growing a base region oxide layer with the thickness of 0.01 um-0.1 um on the region of the P-type base region on the field oxide layer, wherein the process temperature is 900-1000 ℃;
Step 4: p-type impurity injection and diffusion are carried out on the region of the P-type base region, and the P-type base region is formed through high-temperature diffusion, wherein the process temperature is 1000-1200 ℃;
step 5: photoetching and etching the region of the N+ emitter region on the P-type base region, injecting and diffusing N-type impurities, and forming the N+ emitter region through high-temperature diffusion, wherein the process temperature is 950-1100 ℃;
Step 6: growing a first layer of isolation medium on the N-epitaxial layer, and then carrying out photoetching corrosion on the contact hole;
step 7: carrying out aluminum layer deposition with the thickness of 1um to 2um and aluminum layer photoetching on the contact hole;
step 8: gluing and developing to expose a deposition area of the ballast resistor, then sputtering and growing a material of the barium titanate resistor, and finally removing the glue to finish stripping;
step 9: growing a second layer of isolation medium with the thickness of 0.5-0.8 um;
step 10: photoetching and etching the through hole to expose the window on the metal surface;
Step 11: performing aluminum layer deposition with the thickness of 2um to 4um and aluminum layer photoetching corrosion on the window on the metal surface to form a base electrode and an emitter electrode;
step 12: the back side of the n+ substrate is thinned and back side metallized to form collector electrodes.
Compared with the prior art, the invention has the following beneficial effects:
In the traditional high-power transistor ballast resistor structure, the ballast resistor is formed by doping a polycrystalline silicon material, because the conduction mechanism of the polycrystalline silicon material is through thermionic emission among crystal grains, the thermionic emission probability is exponentially related to temperature, the higher the temperature is, the larger the emissivity is, the smaller the presented resistance is, therefore, the capability of the polycrystalline silicon as the ballast resistor in a high-temperature environment is obviously weakened, and the reliability risk exists.
Drawings
Fig. 1 is a longitudinal cross-sectional view of a high reliability power transistor of the present invention that eliminates hot spots.
Fig. 2 is a schematic view of a longitudinal structure of a contact hole process according to the present invention.
FIG. 3 is a schematic diagram of the glue application and material growth structure of the ballast resistor layer of the present invention.
FIG. 4 is a schematic illustration of the ballast resistor layer of the present invention after photoresist stripping.
Fig. 5 is a schematic view of a longitudinal structure of the through-hole process according to the present invention.
Fig. 6 is a longitudinal cross-sectional view of a backside metal electrode process of the present invention.
FIG. 7 is a graph showing the resistivity of barium titanate materials of the present invention as a function of temperature.
In the figure: 1-N+ substrate, 2-N-epitaxial layer, 3-P type base region, 4-N+ emitter region, 5-base region electrode, 6-emitter region electrode, 7-collector region electrode, 8-ballast resistor, 9-isolation medium, 10-contact hole, 11-photoresist and 12-through hole.
Detailed Description
The invention is described in further detail below with reference to the drawings and the specific examples. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
As shown in fig. 1, an embodiment of the present invention provides a high-reliability power transistor structure capable of eliminating hot spots, including:
An n+ substrate 1 to form an n+ collector region;
an N-epitaxial layer 2 arranged on top of the N+ substrate 1 to form an N-epitaxial region;
The P-type base region 3 is arranged on the top of the N-epitaxial layer 2;
The N+ emitter region 4 is arranged at the top of the P-type base region 3;
The metal electrode comprises a base region electrode 5, an emitter region electrode 6 and a collector region electrode 7; the two base region electrodes 5 are symmetrically arranged on two sides of the top of the P-type base region 3 respectively, the emitter region electrode 6 is arranged on the top of the N+ emitter region 4, and the collector region electrode 7 is arranged on the back of the N+ substrate 1;
The ballast resistor 8 is used for conducting the upper section electrode and the lower section electrode in the transmitting area electrode 6 through the ballast resistor 8; wherein the ballast resistor 8 is a barium titanate resistor with positive temperature coefficient, and the Curie temperature point of the barium titanate resistor is 150-175 ℃.
Also included is an isolation medium 9, the isolation medium 9 being arranged on top of the N-epitaxial layer 2 for achieving isolation between the base electrode 5 and the emitter electrode 6. The isolation medium 9 is made of silicon dioxide.
As shown in fig. 2 to 6, the embodiment of the invention further provides a method for preparing a high-reliability power transistor structure capable of eliminating hot spots, which comprises the following steps:
Step 1: preparing an N-epitaxial layer 2 on an N+ substrate 1; the doping concentration of the N+ substrate 1 is 1E18cm -3~5E19 cm-3; the doping concentration of the N-epitaxial layer 2 is 1E13cm -3~2E14cm-3, and the thickness of the N-epitaxial layer 2 is 10 um-60 um;
Step 2: growing a field oxide layer with the thickness of 0.5um to 1um on the N-epitaxial layer 2; the process temperature is 950-1150 ℃;
Step 3: photoetching and growing a base region oxide layer with the thickness of 0.01 um-0.1 um on the region oxide layer, wherein the injection concentration of the P-type base region 3 is 1E 14-1E 15 cm -2; the process temperature is 900-1000 ℃;
Step 4: p-type impurity injection and diffusion are carried out on the region of the P-type base region 3, and the P-type base region 3 is formed through high-temperature diffusion, wherein the process temperature is 1000-1200 ℃;
step 5: carrying out photoetching corrosion, N-type impurity injection and diffusion on the region of the N+ emitter region 4 on the P-type base region 3, and forming the N+ emitter region 4 through high-temperature diffusion, wherein the injection concentration of the N+ emitter region 4 is 1E 15-1E 16 cm -2, and the process temperature is 950-1100 ℃;
Step 6: growing a first layer of isolation medium 9 on the N-epitaxial layer 2, and then carrying out photoetching corrosion on the contact hole 10;
step 7: carrying out aluminum layer deposition and aluminum layer photoetching on the contact hole 10 with the thickness of 1um to 2 um;
Step 8: gluing (photoresist 11), developing to expose a deposition area of the ballast resistor 8, then sputtering and growing a material of the barium titanate resistor, and finally removing the photoresist to finish stripping;
Step 9: growing a second layer of isolation medium 9 with the thickness of 0.5-0.8 um;
step 10: performing photoetching corrosion on the through hole 12 to expose a metal surface window;
step 11: performing aluminum layer deposition with the thickness of 2um to 4um and aluminum layer photoetching corrosion on the window on the metal surface to form a base electrode 5 and an emitter electrode 6;
step 12: the back surface of the n+ substrate 1 is thinned and back-side metallized to form collector electrode 7.
As shown in fig. 7, the ballast resistor of the barium titanate material has a resistivity of only 1 Ω·cm to 10 Ω·cm at normal temperature, and the resistance value rapidly increases when the curie temperature reaches tc=175 ℃. The barium titanate material can adjust the Curie temperature point characteristics by doping rare earth elements such as Sn, sb and the like, so that the barium titanate forms an emitter ballast resistor with positive temperature coefficient by an insulating material.
The invention relates to a ballast resistor structure capable of eliminating hot spots and a preparation method thereof, which are not only applicable to high-frequency power bipolar transistors, but also applicable to power semiconductor devices such as LDMOS, VDMOS, MCT, IGBT and the like which can use the ballast resistor concept, and the ballast resistor material is not limited to barium titanate material.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.
Claims (9)
1. A high reliability power transistor structure for eliminating hot spots, comprising:
an n+ substrate to form an n+ collector region;
The N-epitaxial layer is arranged on the top of the N+ substrate to form an N-epitaxial region;
The P-type base region is arranged at the top of the N-epitaxial layer;
The N+ emitter region is arranged at the top of the inside of the P-type base region;
The metal electrode comprises a base region electrode, an emitter region electrode and a collector region electrode; the two base region electrodes are symmetrically arranged on two sides of the top of the P-type base region respectively, the emitter region electrode is arranged on the top of the N+ emitter region, and the collector region electrode is arranged on the back surface of the N+ substrate;
The ballast resistor is used for conducting the upper section electrode and the lower section electrode in the transmitting area electrode; wherein the ballast resistor adopts a barium titanate resistor with positive temperature coefficient, and the Curie temperature point of the barium titanate resistor is 150-175 ℃.
2. A high reliability power transistor structure according to claim 1 further comprising an isolation medium disposed on top of said N-epi layer for isolating said base electrode from said emitter electrode.
3. A high reliability power transistor structure for eliminating hot spots according to claim 2, wherein the isolation medium is silicon dioxide.
4. A highly reliable power transistor structure for hot spot removal according to claim 3 wherein said n+ substrate has a doping concentration of 1E18cm -3~5E19cm-3.
5. The high-reliability power transistor structure of claim 4, wherein the doping concentration of said N-epi layer is 1E13cm -3~2E14cm-3, and the thickness of said N-epi layer is 10um to 60um.
6. A high reliability power transistor structure according to claim 5 wherein said P-type base region has an implant concentration of 1E14cm -2~1E15cm-2.
7. A highly reliable power transistor structure according to claim 6 wherein said n+ emitter region is implanted at a concentration of 1E15cm -2~1E16cm-2.
8. The high-reliability power transistor structure according to any one of claims 1 to 7, wherein the barium titanate resistor is capable of adjusting the curie temperature point characteristics by doping Sn and Sb rare earth elements, so that the barium titanate is formed into an emitter ballasting resistor with positive temperature coefficient by an insulating material.
9. A method for manufacturing a high-reliability power transistor structure capable of eliminating hot spots, which is used for manufacturing the high-reliability power transistor structure capable of eliminating hot spots according to any one of claims 1 to 7, and is characterized by comprising the following steps:
Step 1: preparing an N-epitaxial layer on an N+ substrate;
step 2: growing a field oxide layer with the thickness of 0.5um to 1um on the N-epitaxial layer; the process temperature is 950-1150 ℃;
Step 3: photoetching and growing a base region oxide layer with the thickness of 0.01 um-0.1 um on the region of the P-type base region on the field oxide layer, wherein the process temperature is 900-1000 ℃;
Step 4: p-type impurity injection and diffusion are carried out on the region of the P-type base region, and the P-type base region is formed through high-temperature diffusion, wherein the process temperature is 1000-1200 ℃;
step 5: photoetching and etching the region of the N+ emitter region on the P-type base region, injecting and diffusing N-type impurities, and forming the N+ emitter region through high-temperature diffusion, wherein the process temperature is 950-1100 ℃;
Step 6: growing a first layer of isolation medium on the N-epitaxial layer, and then carrying out photoetching corrosion on the contact hole;
step 7: carrying out aluminum layer deposition with the thickness of 1um to 2um and aluminum layer photoetching on the contact hole;
step 8: gluing and developing to expose a deposition area of the ballast resistor, then sputtering and growing a material of the barium titanate resistor, and finally removing the glue to finish stripping;
step 9: growing a second layer of isolation medium with the thickness of 0.5-0.8 um;
step 10: photoetching and etching the through hole to expose the window on the metal surface;
Step 11: performing aluminum layer deposition with the thickness of 2um to 4um and aluminum layer photoetching corrosion on the window on the metal surface to form a base electrode and an emitter electrode;
step 12: the back side of the n+ substrate is thinned and back side metallized to form collector electrodes.
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| CN117995892B CN117995892B (en) | 2024-06-21 |
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|---|---|---|---|---|
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| CN1639870A (en) * | 2002-08-06 | 2005-07-13 | 明科有限公司 | Bipolar transistor for avoiding thermal runaway |
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| CN103268888A (en) * | 2013-05-13 | 2013-08-28 | 电子科技大学 | IGBT device with emitter ballast resistor |
| CN105489640A (en) * | 2015-12-18 | 2016-04-13 | 中国电子科技集团公司第五十五研究所 | Structure and technique for emitter secondary ballasting and emitter crowding effect reduction |
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-
2024
- 2024-04-03 CN CN202410398437.9A patent/CN117995892B/en active Active
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