CN117995794A - Packaging structure and control method thereof - Google Patents

Packaging structure and control method thereof Download PDF

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Publication number
CN117995794A
CN117995794A CN202211335538.9A CN202211335538A CN117995794A CN 117995794 A CN117995794 A CN 117995794A CN 202211335538 A CN202211335538 A CN 202211335538A CN 117995794 A CN117995794 A CN 117995794A
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China
Prior art keywords
chip
heat
temperature
package
package structure
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CN202211335538.9A
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Chinese (zh)
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季宏凯
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Changxin Memory Technologies Inc
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Changxin Memory Technologies Inc
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Priority to CN202211335538.9A priority Critical patent/CN117995794A/en
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Abstract

The application provides a packaging structure and a control method of the packaging structure, relating to the technical field of semiconductor packaging and being used for solving the technical problem of poor heat radiation performance of the packaging structure, wherein the packaging structure comprises a first chip; the packaging unit is positioned on the first chip, and comprises a plurality of second chips which are sequentially arranged along the direction perpendicular to the first chip and are electrically connected with the first chip; a thermoelectric cooler configured to regulate a temperature difference between the first chip and the packaging unit. The application is used for improving the thermal performance of the packaging structure.

Description

Packaging structure and control method thereof
Technical Field
The present application relates to the field of semiconductor packaging technology, and in particular, to a packaging structure and a control method for the packaging structure.
Background
In the semiconductor industry, a system in package (SYSTEM IN PACKAGE, abbreviated as SIP package) integrates multiple functional chips, such as a processor and a memory, into one package, thereby forming an integral package module.
In the related art, a package structure generally includes a logic chip and a package unit disposed on the logic chip, wherein the package unit includes a plurality of chips, which are generally stacked in a direction perpendicular to the logic chip, and adjacent chips are connected through-silicon vias.
However, the heat dissipation performance of the above package structure is poor, which affects the performance of the package structure.
Disclosure of Invention
In view of the above problems, embodiments of the present application provide a packaging structure and a control method of the packaging structure, which are used for improving the heat dissipation performance of the packaging structure, so as to improve the stability of the performance of the packaging structure.
In order to achieve the above object, the embodiment of the present application provides the following technical solutions:
A first aspect of an embodiment of the present application provides a package structure, including:
A first chip; the packaging unit is positioned on the first chip, and comprises a plurality of second chips which are sequentially arranged along the direction perpendicular to the first chip and are electrically connected with the first chip; a thermoelectric cooler configured to regulate a temperature difference between the first chip and the packaging unit.
In some alternative embodiments, the thermoelectric cooler includes a first heat transfer end and a second heat transfer end, the first heat transfer end and the second heat transfer end having a temperature differential therebetween; the first heat transfer end is connected with the packaging unit, the second heat transfer end is connected with the first chip, and heat transfer can be performed between the first heat transfer end and the second heat transfer end.
In some alternative embodiments, the thermoelectric cooler is electrically connected to a power source configured to provide a forward voltage or a reverse voltage to the thermoelectric cooler; when the power supply applies forward voltage to the thermoelectric refrigerator, the first heat transfer end is a heat absorption end; the second heat transfer end is a heat release end; when the power supply applies reverse voltage to the thermoelectric refrigerator, the first heat transfer end is a heat release end, and the second heat transfer end is a heat absorption end.
In some alternative embodiments, the thermoelectric cooler comprises two heat conducting substrates arranged oppositely and a semiconductor thermoelectric element arranged between the two heat conducting substrates, an insulating layer is arranged on one side of the heat conducting substrates, which faces the semiconductor thermoelectric element, a conductive sheet is arranged between the insulating layer and the semiconductor thermoelectric element, and the conductive sheet is electrically connected with the semiconductor thermoelectric element.
In some alternative embodiments, the conductive sheet has a first power interface leading to an exterior sidewall of the thermoelectric cooler, the first power interface configured to be electrically connected to the power source.
In some alternative embodiments, the semiconductor thermoelectric element includes an N-type transistor and a P-type transistor, and the conductive sheet is electrically connected to the N-type transistor and the P-type transistor, respectively.
In some alternative embodiments, the thermoelectric cooler is disposed between the first chip and the packaging unit.
In some alternative embodiments, the thermoelectric cooler is disposed on the first chip and surrounds a sidewall of the packaging unit near an end of the first chip.
In some alternative embodiments, a processor is further included in signal connection with the first chip, the packaging unit, and the thermoelectric cooler, respectively, the processor configured to control the thermoelectric cooler to adjust a temperature difference between the first chip and the packaging unit based on a temperature of the first chip and a temperature of the packaging unit.
In some alternative embodiments, a first temperature sensor is further included in signal communication with the processor, the first temperature sensor configured to detect a temperature of the packaging unit and send the detected temperature to the processor.
In some alternative embodiments, a second temperature sensor is further included, the second temperature sensor in signal communication with the processor, the second temperature detection member configured to detect a temperature of the first chip and send the detected temperature to the processor.
In some optional embodiments, the packaging structure further includes a wireless communication module, and data is transmitted between the first chip and the packaging unit through the wireless communication module.
In some alternative embodiments, a first transceiver component is disposed in the packaging unit, and a second transceiver component is disposed on the first chip, where the first transceiver component and the second transceiver component are capable of respectively interacting with the wireless communication module.
In some alternative embodiments, the packaging unit includes a second power interface electrically connected to each of the second chips, where the second power interface is disposed on a side of the packaging unit, and the second power interface is configured to be electrically connected to a power source.
In some alternative embodiments, the first power interface and the second power interface are located on the same side of the packaging unit.
In some alternative embodiments, the package further comprises a heat dissipation structure disposed on a surface of the package unit and covering at least a portion of the exposed surface of the package unit.
In some optional embodiments, the heat dissipation structure includes a heat dissipation substrate and a plurality of heat dissipation protrusions disposed on the heat dissipation substrate, the heat dissipation protrusions are disposed on a side of the heat dissipation substrate facing away from the package unit, and the plurality of heat dissipation protrusions are disposed on the heat dissipation substrate at intervals.
A second aspect of an embodiment of the present application provides a control method of a package structure, applied to the package structure, including:
determining whether the temperature of the first chip is less than a preset temperature threshold;
If yes, transmitting the heat of the packaging unit to the first chip through a thermoelectric refrigerator;
And if not, transferring the heat of the first chip to the packaging unit through a thermoelectric cooler.
According to the packaging structure and the control method of the packaging structure, the thermoelectric refrigerator is arranged in the packaging structure, so that the temperature difference between the first chip and the packaging unit is regulated through the thermoelectric refrigerator, the temperature of the packaging unit can be reduced, and meanwhile, the temperature of the first chip can reach an ideal working temperature, so that the heat dissipation performance of the packaging structure and the stability of the performance of the packaging structure are improved.
In addition to the technical problems, technical features constituting the technical solutions, and beneficial effects caused by the technical features of the technical solutions described above, other technical problems that can be solved by the package structure and the control method of the package structure provided by the embodiment of the present application, other technical features included in the technical solutions, and beneficial effects caused by the technical features of the embodiment of the present application will be described in further detail in the detailed description.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a package structure according to an embodiment of the application;
fig. 2 is a flowchart illustrating a control method of a package structure according to an embodiment of the application.
Reference numerals:
100-packaging structure; 110-a first chip; 111-solder balls; 120-packaging units;
121-a second chip; 130-a thermoelectric refrigerator; 131-a thermally conductive substrate;
132-semiconductor thermoelectric element; 133-an insulating layer; 134-conductive sheets;
150-a heat dissipation structure; 151-a heat-dissipating substrate; 152-heat dissipating bumps.
Detailed Description
As described in the background art, the related art package structure has a technical problem of poor heat dissipation performance, and the inventor has found that the problem occurs because a plurality of chips are stacked in a direction perpendicular to a logic chip, and adjacent chips are bonded together by an adhesive layer (NCF glue) and electrical connection between the adjacent chips is achieved through-silicon vias (TSVs). In actual operation, heat generated by the chip difference is usually required to be diffused outwards by using the adhesive layer and the chip located at the uppermost layer, but the number of stacked chips of the above-mentioned package structure in the direction perpendicular to the logic chip is large, so that a large amount of heat is accumulated in the package structure due to low heat dissipation efficiency, thereby affecting the stability of the performance of the package structure.
In view of this, the embodiment of the application provides a packaging structure and a control method of the packaging structure, in which a thermoelectric cooler is arranged in the packaging structure to balance the temperature between a first chip and a packaging unit through the thermoelectric cooler, so that the temperature of the packaging unit can be reduced, and the temperature of the first chip can reach an ideal working temperature, thereby improving the heat dissipation performance of the packaging structure and the performance stability of the packaging structure.
In order to make the above objects, features and advantages of the embodiments of the present application more comprehensible, the technical solutions of the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 1 is a schematic structural diagram of a package structure according to an embodiment of the application. Referring to fig. 1, an embodiment of the present application provides a package structure 100, where the package structure 100 includes a first chip 110, a package unit 120, and a thermoelectric cooler 130. The first chip 110 may be a logic chip, and is used for transmitting signals, data, and the like.
In some embodiments, the first chip 110 may be disposed horizontally, and the first chip 110 has a wiring layer (not shown in the figure) therein, where the wiring layer is used to electrically connect the first chip 110 and an external circuit, and the wiring layer may be indirectly connected to the external circuit.
The number of wiring layers may be one or a plurality of. When the number of the wiring layers is plural, an insulating material is disposed between the different wiring layers, and the material of the wiring layers may include, but is not limited to, gold, silver, copper, aluminum, and the like.
For example, referring to fig. 1, a conductive post or a solder ball is disposed on a surface of the first chip 110 facing away from the packaging unit 120, for example, a solder ball 111 is disposed on a lower surface of the first chip 110, and the solder ball 111 is electrically connected to a wiring layer disposed in the first chip 110, so as to realize electrical connection between the wiring layer and an external circuit. The solder balls 111 may be electrically connected to the wiring layer through pads.
The solder balls 111 may include, but are not limited to, tin (Sn), indium (In), bismuth (Bi), antimony (Sb), copper (Cu), silver (Ag), zinc (Zn), lead (Pb), or any alloy thereof, for example, sn-Pb, sn-Ag, sn-Au, sn-Cu, sn-Bi, sn-Zn, sn-Ag-Cu, sn-Ag-Bi, sn-Ag-Zn, sn-Cu-Bi, sn-Cu-Zn, or Sn-Bi-Zn.
The encapsulation unit 120 is located on the first chip 110. The packaging unit 120 includes a plurality of second chips 121, and the plurality of second chips 121 are stacked in sequence along a direction perpendicular to the first chip 110 and electrically connected to the first chip 110, so that the storage information of the second chips 121 is transmitted through the first chip 110.
The second chip 121 has an inactive face and an active face disposed opposite to each other. The active face is the side of the chip on which the device layer (not shown) is formed. The inactive face is the opposite side of the active face that does not expose any semiconductor devices. In other words, the second chip 121 includes a substrate and a semiconductor device disposed on the substrate, and the inactive surface of the second chip 121 is a surface of the substrate facing away from the semiconductor device.
The plurality of second chips 121 are sequentially arranged along a direction perpendicular to the first chip 110, adjacent second chips 121 can be connected through an adhesive layer, signal and power connection between an active surface and an inactive surface of each second chip 121 is realized through a Through Silicon Via (TSV), and signals are transferred to the next layer through micro-metal bumps (micro-bumps) to realize electrical connection between the adjacent second chips 121.
Since the plurality of second chips 121 are sequentially stacked in a direction perpendicular to the first chip 110, more heat is accumulated in the package unit 120, and the heat dissipation performance of the package structure 100 is poor, affecting the stability of the package structure 100; in addition, when the first chip 110 is in operation, the temperature of the first chip 110 needs to be raised to the preset temperature threshold, and when the temperature of the first chip 110 does not reach the preset temperature threshold, the operating frequency of the first chip 110 is also low, so that the transmission efficiency of the first chip 110 is low.
In order to solve the above-mentioned problems, in the embodiment of the present application, the package structure 100 further includes the thermoelectric cooler 130, and since the thermoelectric cooler 130 is capable of generating a sufficiently large temperature difference, the thermoelectric cooler 130 may be used to adjust the temperature between the package unit 120 and the first chip 110, i.e., to balance the temperature between the package unit 120 and the first chip 110 by the thermoelectric cooler 130, for example, to increase the temperature of the first chip 110 while decreasing the temperature of the package unit 120 by the thermoelectric cooler 130, so that both the package unit 120 and the first chip 110 operate in a proper temperature, thereby improving the performance stability of the package structure 100.
The thermoelectric cooler 130 may transfer heat generated by the packaging unit 120 to the first chip 110, thereby achieving the purpose of reducing the temperature of the packaging unit 120, improving the heat dissipation performance of the packaging structure 100, and improving the stability of the performance of the packaging structure 100, and at the same time, may increase the temperature of the first chip 110, so that the temperature of the first chip 110 may reach an ideal operating temperature in a short time, and thus may increase the mobility and the operating frequency of the first chip 110.
In the above-described scheme, the thermoelectric cooler 130 is provided to balance the temperatures of the first chip 110 and the packaging unit 120, so that the packaging unit 120 and the first chip 110 can both operate at a proper temperature, thereby improving the stability of the performance of the packaging structure 100.
In some embodiments, the thermoelectric cooler 130 may be disposed between the first chip 110 and the packaging unit 120, that is, one end of the thermoelectric cooler 130 is connected to the packaging unit 120, the other end of the thermoelectric cooler 130 is connected to the first chip 110, the temperature of the packaging unit 120 is reduced by the thermoelectric cooler 130, and the temperature of the first chip 110 is increased, so that the temperature of the first chip 110 can be increased to a desired operating temperature in a short time, thereby increasing the operating frequency of the first chip 110, and improving the performance stability of the packaging structure 100.
In some embodiments, thermoelectric cooler 130 includes a first heat transfer end and a second heat transfer end, between which a large temperature differential may be created; wherein, the first heat transfer terminal may be connected with the encapsulation unit 120, the second heat transfer terminal may be connected with the first chip 110, and heat transfer may be performed between the first heat transfer terminal and the second heat transfer terminal when the thermoelectric cooler 130 is powered on.
It will be appreciated that the thermoelectric cooler 130 is electrically connected to a power source configured to provide a forward voltage or a reverse voltage to the thermoelectric cooler 130; when the power supply applies the forward voltage to the thermoelectric cooler 130, the first heat transfer end may be, for example, a heat absorption end, and the second heat transfer end may be, for example, a heat release end, that is, the heat absorption end is connected to the package unit 120, and the heat release end is connected to the first chip 110, so that the heat generated by the package unit 120 may transfer the heat to the heat release end through the heat absorption end and transfer the heat to the first chip 110 through the heat release end, so that the temperatures of the package unit 120 and the first chip 110 may be balanced, thereby improving the thermal performance of the package structure 100 and the performance stability of the package structure 100.
In some embodiments, the thermoelectric cooler 130 includes two heat conductive substrates 131 disposed opposite to each other, and for convenience of description and understanding, the two heat conductive substrates 131 disposed opposite to each other may be used for the first heat conductive substrate and the second heat conductive substrate representation, for example, the heat conductive substrate 131 near one side of the package unit 120 is a first heat conductive substrate, and the heat conductive substrate 131 near the first chip 110 is a second heat conductive substrate.
Wherein the two heat conducting substrates 131 are arranged in parallel, or are arranged in substantially parallel; in addition, the heat conductive substrate 131 may be made of a material having good heat conductive properties, and for example, the heat conductive substrate 131 may include, but is not limited to, a monocrystalline silicon heat conductive substrate, a ceramic heat conductive substrate, an aluminum nitride ceramic heat conductive substrate, and the like.
A plurality of semiconductor thermoelectric elements 132 may be disposed between two heat conductive substrates 131 disposed opposite to each other, and the plurality of semiconductor thermoelectric elements 132 may be disposed between the two heat conductive substrates 131 at intervals.
It is understood that the semiconductor thermoelectric element 132 has a thermoelectric effect, and the semiconductor thermoelectric element 132 can perform a cooling or heating function after being energized. The material of the semiconductor thermoelectric element 132 may include, but is not limited to, bismuth telluride (BiTe) material.
In some embodiments, the two opposite heat-conducting substrates 131 are each provided with an insulating layer 133 on a side facing the semiconductor thermoelectric element 132, i.e. the first heat-conducting substrate is provided with an insulating layer 133 on a side facing the semiconductor thermoelectric element 132, and the second heat-conducting substrate is also provided with an insulating layer 133 on a side facing the semiconductor thermoelectric element 132; a conductive sheet 134 is provided between the insulating layer 133 and the semiconductor thermoelectric element 132, and the conductive sheet 134 is electrically connected to the semiconductor thermoelectric element 132.
It can be appreciated that by disposing the insulating layer 133 between the thermally conductive substrate 131 and the semiconductor thermoelectric element 132, electrical isolation between the thermally conductive substrate 131 and the semiconductor thermoelectric element 132 is achieved through the insulating layer 133, so that reliable insulating connection between the thermally conductive substrate 131 and the electrically conductive sheet 134 is achieved, and current is prevented from entering the thermally conductive substrate 131, so that a power supply can be insulated, the resistance is reduced, and temperature is facilitated to be transmitted through the insulating layer 133, thereby improving the working efficiency of the thermoelectric cooler 130.
In some embodiments, the insulating layer 133 and the thermally conductive substrate 131 may be disposed in a fitting manner. The material of the insulating layer 133 may include, but is not limited to, a silicon oxide film or a silicon nitride film. In addition, since the silicon dioxide film or the silicon nitride film contains silicon, when the heat conducting substrate 131 is a monocrystalline silicon heat conducting substrate 131, the bonding force between the insulating layer 133 made of the silicon dioxide film or the silicon nitride film and the heat conducting substrate 131 is better, which is beneficial to improving the bonding reliability between the insulating layer 133 and the heat conducting substrate 131.
In some embodiments, the semiconductor thermoelectric elements 132 include N-type transistors and P-type transistors, and the conductive sheets 134 are electrically connected to the N-type transistors and the P-type transistors, respectively, so that the semiconductor thermoelectric elements 132 are electrically connected in series with each other at intervals sequentially through the plurality of conductive sheets 134, that is, one N-type transistor and one P-type transistor are disposed between two adjacent conductive sheets 134, and the plurality of semiconductor thermoelectric elements 132 are connected in series through the conductive sheets 134.
In some embodiments, the conductive sheet 134 may be a multi-layered metal structure, which may include a titanium layer, a copper layer, a nickel layer, and a gold layer sequentially disposed in a direction away from the thermally conductive substrate 131; or a copper layer, a nickel layer and a gold layer are sequentially arranged along the direction far away from the heat conducting substrate 131; or a titanium layer, a copper layer and a nickel layer which are sequentially arranged along the direction far away from the heat conducting substrate 131, and particularly, the above-mentioned layers of metals can be sequentially prepared by adopting an electroplating process.
When the thermoelectric cooler 130 is powered on, a current flows through the junction formed between the two different conductors of the N-type transistor and the P-type transistor and the conductive sheet 134, respectively, and a heat release or heat absorption phenomenon occurs at the junction, wherein the heat release and heat absorption are determined by the magnitude of the current.
In addition, the conductive sheet 134 has a first power interface led out to the outside of the thermoelectric cooler 130, the first power interface being configured to be electrically connected to a power source such that the semiconductor thermoelectric element 132 is connected into an external circuit through the conductive sheet 134.
In some embodiments, the conductive sheet 134 has a first power interface leading out to the exterior side wall of the thermoelectric cooler 130, and the first power interface is disposed at the side of the thermoelectric cooler 130 in electrical connection with the conductive sheet 134 to facilitate plugging with an external power source.
The packaging unit 120 is also provided with a second power interface electrically connected with each second chip 121, and the second power interface may also be disposed on a side surface of the packaging unit 120, so that each second chip 121 in the packaging unit 120 is plugged with an external power source through the second power interface, thereby realizing electrical connection with the external power source.
In some embodiments, the first power interface and the second power interface are located on the same side of the packaging unit 120, so as to improve space utilization and facilitate electrical connection with an external power source.
In order to further improve the heat dissipation performance of the package structure 100, in the embodiment of the present application, the package structure 100 further includes a heat dissipation structure 150, where the heat dissipation structure 150 is disposed on the surface of the package unit 120 and covers at least a part of the exposed surface of the package unit 120, and the heat accumulated in the package unit 120 is taken away by the heat dissipation structure 150 disposed on the surface of the package unit 120, so that the heat dissipation performance of the package structure 100 can be further improved.
It can be appreciated that, by disposing the heat dissipation structure 150 on the exposed surface of the packaging unit 120, a portion of the heat generated by the packaging unit 120 can be transferred to the first chip 110 through the thermoelectric cooler 130 to raise the temperature of the first chip 110, and another portion of the heat can be transferred to the heat dissipation medium (e.g. air) through the heat dissipation structure 150, so that the efficiency of taking away the heat in the packaging unit 120 can be increased, the heat dissipation performance of the packaging structure 100 can be further improved, and the stability of the performance of the heat dissipation structure 150 can be improved.
In some embodiments, the power source may apply a reverse voltage to the thermoelectric cooler 130, for example, when the temperature of the first chip 110 is greater than or equal to a set temperature threshold, the reverse voltage may be applied to the thermoelectric cooler 130 by the power source, that is, the first heat transfer end is a heat release end, and the second heat transfer end is a heat absorption end, so that the thermoelectric cooler 130 may transfer the heat of the first chip 110 to the packaging unit 120, so that the temperature of the first chip 110 is maintained at the set temperature threshold, thereby ensuring mobility and operating frequency of the first chip 110, and the heat accumulated in the packaging unit 120 may be taken away by the heat dissipation structure 150 disposed on the surface of the packaging unit 120, so as to achieve the purpose of reducing the temperature of the packaging unit 120, thereby improving the stability of the performance of the packaging structure 100.
In the above-mentioned scheme, by providing the heat dissipation structure 150 on the surface of the packaging unit 120, a part of the heat generated by the packaging unit 120 can be transferred to the first chip 110 through the thermoelectric cooler 130, and another part of the heat can be transferred to the heat dissipation medium through the heat dissipation structure 150; or the heat generated by the packaging unit 120 is entirely transferred to the heat dissipation medium by the heat dissipation structure 150, so as to avoid heat aggregation in the packaging unit 120, thereby improving the heat dissipation efficiency of the packaging structure 100, and further improving the stability of the performance of the packaging structure 100. The heat dissipation medium may be air or other heat dissipation medium.
In some embodiments, the heat dissipation structure 150 includes a heat dissipation substrate 151 and a plurality of heat dissipation protrusions 152 disposed on the heat dissipation substrate 151, the heat dissipation protrusions 152 are disposed on a side of the heat dissipation substrate 151 facing away from the package unit 120, and the plurality of heat dissipation protrusions 152 are disposed on the heat dissipation substrate 151 at intervals. It can be appreciated that, by the heat dissipation substrate 151 and the plurality of heat dissipation protrusions 152 disposed on the heat dissipation substrate 151, a heat dissipation area can be increased, so that heat generated by each second chip 121 in the package unit 120 can be rapidly dissipated to the outside of the package structure 100, thereby improving the heat dissipation efficiency of the package structure 100.
The heat dissipation substrate 151 may cover at least a portion of the outer surface of the encapsulation unit 120, and illustratively, the heat dissipation substrate 151 covers the upper surface of the encapsulation unit 120 to rapidly transfer heat accumulated in the encapsulation unit 120 to, for example, air through the heat dissipation substrate 151, thereby improving heat dissipation efficiency of the encapsulation unit 120 through the heat dissipation structure 150.
In some embodiments, the plurality of heat dissipation protrusions 152 may be arranged in a regular rectangular array, a circular array, etc. on the heat dissipation substrate 151, or the plurality of heat dissipation protrusions 152 may be arranged at irregular intervals on the heat dissipation substrate 151.
The cross-sectional shape of the heat radiation protrusion 152 may be a regular shape such as a circle, an ellipse, a rectangle, a trapezoid, or the like, or may be an irregular shape as long as the heat radiation area can be increased, which is not particularly limited.
The heat dissipation substrate 151 and the heat dissipation protrusion 152 may be formed into an integral piece through an integral molding process such as injection molding, casting, etc., and the material of the heat dissipation substrate 151 and the material of the heat dissipation protrusion 152 may be consistent, so that a difference in heat conduction performance between the heat dissipation substrate 151 and the heat dissipation protrusion 152 may be avoided, thereby improving the heat dissipation performance of the package structure 100.
For example, the heat dissipating substrate 151 and the heat dissipating bump 152 may be made of a material with good heat conductivity, such as ceramic, metal, etc.
In some embodiments, since the number of layers of the second chip 121 stacked in the direction perpendicular to the first chip 110 is greater in the packaging unit 120, the communication distances before the second chip 121 at the uppermost layer and the second chip 121 at the lowermost layer are larger, so that the communication delays between the different second chips 121 and the first chip 110 are larger, and the operation rate of the product is affected.
In order to solve the above-mentioned problem, in the embodiment of the present application, the package structure 100 further includes a wireless communication module (not shown in the figure), so that data transmission is performed between the first chip 110 and each second chip 121 in the package unit 120 through the wireless communication module, thus, the problem of transmission delay between different second chips 121 and the first chip 110 can be effectively reduced, and thus, the operation rate of the product is increased.
In some embodiments, a first transceiver component is disposed in the packaging unit 120, a second transceiver component is disposed on the first chip 110, and the first transceiver component and the second transceiver component can respectively interact with the wireless communication module, so that each second chip 121 in the packaging unit 120 can respectively perform signal transmission with the first chip 110 through the wireless communication module, where the first transceiver component and the second transceiver component can refer to related technologies, and are not described herein.
In other embodiments, in order to reduce the influence of the thermoelectric cooler 130 on the wireless communication module, in the embodiments of the present application, the thermoelectric cooler 130 is disposed on the first chip 110 and surrounds the side wall of the packaging unit 120 near one end of the first chip 110, that is, both the packaging unit 120 and the thermoelectric cooler 130 are disposed on the first chip 110, and the thermoelectric cooler 130 is disposed on the side wall of the packaging unit 120 near one end of the first chip 110, so that interference of the thermoelectric cooler 130 on wireless signals between the packaging unit 120 and the first chip 110 can be avoided, thereby improving accuracy of information transfer between the packaging unit 120 and the first chip 110.
In some embodiments, the apparatus further includes a processor (not shown) in signal connection with the first chip 110, the packaging unit 120, and the thermoelectric cooler 130, respectively, the processor being configured to control the thermoelectric cooler 130 to adjust a temperature difference between the first chip 110 and the packaging unit 120 according to a temperature of the first chip 110 and a temperature of the packaging unit 120 to balance the temperature of the first chip 110 and the packaging unit 120 such that the first chip 110 and the packaging unit 120 are both operating at a proper temperature.
In some embodiments, the package structure 100 further includes a first temperature sensor (not shown in the figure), which is in signal connection with the processor, and the first temperature sensor is configured to detect the temperature of the package unit 120, i.e., the first temperature sensor may monitor the temperature of the package unit 120 in real time and send the detected temperature to the processor.
In addition, the package structure 100 further includes a second temperature sensor (not shown in the drawing), which is in signal connection with the processor, and is configured to detect the temperature of the first chip 110 and transmit the detected temperature to the processor.
In the above-mentioned scheme, the temperature of the package unit 120 is detected and obtained in real time by setting the first temperature sensor, the temperature of the first chip 110 is detected and obtained in real time by setting the second temperature sensor, and the temperature detected by the first temperature sensor and the temperature detected by the second temperature sensor are respectively transmitted to the processor, so that the forward voltage or the reverse voltage is applied to the thermoelectric cooler 130 through the processor control, so as to balance the temperature between the package unit 120 and the first chip 110, and the package unit 120 and the first chip 110 can operate at proper temperatures, thereby improving the stability of the performance of the package structure 100.
Fig. 2 is a schematic flow chart of a control method of a package structure according to an embodiment of the application.
The embodiment of the application also provides a control method of the packaging structure, which is applied to the packaging structure provided by the above embodiment, and is shown with reference to fig. 2, and the control method includes:
step S101: it is determined whether the temperature of the first chip is less than a preset temperature threshold.
Specifically, the temperature value of the first chip can be detected and obtained through the second temperature sensor so as to determine whether the temperature of the first chip is smaller than a preset temperature threshold, wherein the preset temperature threshold can be an ideal temperature of the first chip when the first chip works, and the first chip has higher mobility and high working frequency when the first chip works at the temperature.
Step S102: if yes, heat of the packaging unit is transferred to the first chip through the thermoelectric cooler.
It can be understood that if it is determined that the temperature of the first chip is less than the preset temperature threshold, at this time, the mobility and the working frequency of the first chip are both relatively low, so, in order to improve the mobility and the working frequency of the first chip, the heat generated by the packaging unit can be transferred to the first chip through the thermoelectric refrigerator, so that the temperature of the packaging unit is reduced, and meanwhile, the temperature of the first chip can be improved, so that the temperature of the first chip can reach the ideal working temperature, thereby improving the mobility and the working frequency of the first chip, and in addition, the heat dissipation performance of the packaging structure is improved, thereby improving the performance stability of the packaging structure.
Step S103, if not, the heat of the first chip is transferred to the packaging unit through the thermoelectric cooler.
Specifically, when the heat of the first chip is detected to be greater than or equal to the preset temperature threshold, the heat of the first chip is transferred to the packaging unit through the thermoelectric refrigerator, and the heat of the packaging unit is radiated through the radiating structure arranged on the surface of the packaging unit, so that the temperature of the packaging unit is reduced, and the performance stability of the packaging structure is improved.
When the temperature of the first chip is smaller than a preset temperature threshold, forward voltage is applied to the thermoelectric refrigerator, so that heat generated by the packaging unit is transferred to the first chip, the temperature of the packaging unit is reduced, the performance stability of the packaging structure is improved, meanwhile, the temperature of the first chip can be improved, and the mobility and the working frequency of the first chip are higher due to the fact that the temperature of the first chip is higher; when the temperature of the first chip reaches or is higher than a preset temperature threshold, reverse voltage is applied to the thermoelectric cooler so as to transfer heat of the first chip to the packaging unit, and the heat of the packaging unit is dissipated through a heat dissipation structure arranged on the surface of the packaging unit so as to take away heat accumulated in the packaging unit.
Therefore, in the embodiment of the application, the thermoelectric cooler is arranged between the first chip and the packaging unit, so that the temperature between the packaging unit and the first chip can be balanced, and the packaging unit and the first chip can work at proper temperatures, thereby solving the problem that the working frequency of the first chip is reduced due to too low or too high temperature, and the heat dissipation performance of the packaging structure and the stability of the performance of the packaging structure can be improved through the thermoelectric cooler.
In this specification, each embodiment or implementation is described in a progressive manner, and each embodiment focuses on a difference from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
In the description of the present specification, reference to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.

Claims (18)

1. A package structure, comprising:
A first chip;
The packaging unit is positioned on the first chip, and comprises a plurality of second chips which are sequentially arranged along the direction perpendicular to the first chip and are electrically connected with the first chip;
A thermoelectric cooler configured to regulate a temperature difference between the first chip and the packaging unit.
2. The package structure of claim 1, wherein the thermoelectric cooler comprises a first heat transfer end and a second heat transfer end, the first heat transfer end and the second heat transfer end having a temperature difference therebetween;
The first heat transfer end is connected with the packaging unit, the second heat transfer end is connected with the first chip, and heat transfer can be performed between the first heat transfer end and the second heat transfer end.
3. The package structure of claim 2, wherein the thermoelectric cooler is electrically connected to a power source configured to provide a forward voltage or a reverse voltage to the thermoelectric cooler;
When the power supply applies forward voltage to the thermoelectric refrigerator, the first heat transfer end is a heat absorption end; the second heat transfer end is a heat release end;
when the power supply applies reverse voltage to the thermoelectric refrigerator, the first heat transfer end is a heat release end, and the second heat transfer end is a heat absorption end.
4. A package structure according to any one of claims 1-3, characterized in that the thermoelectric cooler comprises two oppositely arranged heat conducting substrates and a semiconductor thermoelectric element located between the two heat conducting substrates, the side of the heat conducting substrates facing the semiconductor thermoelectric element being provided with an insulating layer, an electrically conductive sheet being provided between the insulating layer and the semiconductor thermoelectric element, the electrically conductive sheet being electrically connected to the semiconductor thermoelectric element.
5. The package structure of claim 4, wherein the conductive sheet has a first power interface led out onto an outer sidewall of the thermoelectric cooler, the first power interface configured to be electrically connected to the power source.
6. The package structure of claim 4, wherein the semiconductor thermoelectric element comprises an N-type transistor and a P-type transistor, and the conductive sheet is electrically connected to the N-type transistor and the P-type transistor, respectively.
7. The package structure of any of claims 1-3, wherein the thermoelectric cooler is disposed between the first chip and the packaging unit.
8. The package structure according to any one of claims 1 to 3, wherein the thermoelectric cooler is disposed on the first chip and surrounds a side wall of the package unit near an end of the first chip.
9. The package structure of any of claims 1-3, further comprising a processor in signal connection with the first chip, the package unit, and the thermoelectric cooler, respectively, the processor configured to control the thermoelectric cooler to adjust a temperature difference between the first chip and the package unit based on a temperature of the first chip and a temperature of the package unit.
10. The package structure of claim 9, further comprising a first temperature sensor in signal connection with the processor, the first temperature sensor configured to detect a temperature of the package unit and send the detected temperature to the processor.
11. The package structure of claim 9, further comprising a second temperature sensor in signal connection with the processor, the second temperature detector configured to detect a temperature of the first chip and send the detected temperature to the processor.
12. The package structure according to any one of claims 1 to 3, further comprising a wireless communication module through which data is transmitted between the first chip and the package unit.
13. The package structure according to claim 12, wherein a first transceiver component is disposed in the package unit, and a second transceiver component is disposed on the first chip, and the first transceiver component and the second transceiver component are respectively capable of signal interaction with the wireless communication module.
14. The package structure of claim 5, wherein the package unit includes a second power interface electrically connected to each of the second chips, the second power interface being disposed on a side of the package unit, the second power interface being configured to be electrically connected to a power source.
15. The package structure of claim 14, wherein the first power interface and the second power interface are located on a same side of the package unit.
16. A package structure according to any one of claims 1-3, further comprising a heat-dissipating structure disposed on a surface of the package unit and covering at least a portion of the exposed surface of the package unit.
17. The package structure of claim 16, wherein the heat dissipation structure comprises a heat dissipation substrate and a plurality of heat dissipation protrusions disposed on the heat dissipation substrate, the heat dissipation protrusions are disposed on a side of the heat dissipation substrate facing away from the package unit, and the plurality of heat dissipation protrusions are disposed on the heat dissipation substrate at intervals.
18. A control method of a package structure, characterized in that it is applied to the package structure according to any one of claims 1 to 17, the control method comprising:
determining whether the temperature of the first chip is less than a preset temperature threshold;
If yes, transmitting the heat of the packaging unit to the first chip through a thermoelectric refrigerator;
And if not, transferring the heat of the first chip to the packaging unit through a thermoelectric cooler.
CN202211335538.9A 2022-10-28 2022-10-28 Packaging structure and control method thereof Pending CN117995794A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211335538.9A CN117995794A (en) 2022-10-28 2022-10-28 Packaging structure and control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211335538.9A CN117995794A (en) 2022-10-28 2022-10-28 Packaging structure and control method thereof

Publications (1)

Publication Number Publication Date
CN117995794A true CN117995794A (en) 2024-05-07

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Family Applications (1)

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CN202211335538.9A Pending CN117995794A (en) 2022-10-28 2022-10-28 Packaging structure and control method thereof

Country Status (1)

Country Link
CN (1) CN117995794A (en)

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