CN117970711A - Color film substrate, display panel and display device - Google Patents

Abstract

The application belongs to the technical field of display, and particularly relates to a color film substrate, a display panel and a display device, wherein the color film substrate and an array substrate are arranged in a box-to-box manner, and the color film substrate comprises: a substrate; the common electrode area is arranged on the substrate and comprises a plurality of common electrode units extending in the column direction, and the common electrode units are sequentially arranged in the row direction; wherein adjacent public electrode units are connected through transistors. According to the scheme, the adjacent public electrode units are connected through the transistor, the public voltage transmission is carried out between the adjacent public electrode units through the transistor, the public voltage transmission path between the public electrode units is prolonged, the public voltage transmitted between the public electrode units can be stabilized, the influence of the data line on the array substrate on the public electrode units can be reduced, the horizontal crosstalk phenomenon can be improved, and the picture display quality of the display panel is improved.

Description

Color film substrate, display panel and display device

Technical Field

The application belongs to the technical field of display, and particularly relates to a color film substrate, a display panel and a display device.

Background

The conventional structure of the display panel is mainly composed of an array substrate, a liquid crystal layer and a color film substrate. The color film substrate consists of a black matrix shading layer, an RGB color resistance layer and a common electrode wire; the array substrate is formed by sub-pixel arrays, a storage capacitor is formed between a common electrode wire on the array substrate and a pixel electrode on the array substrate, the pixel electrode and the color film substrate form a pixel liquid crystal capacitor, and a liquid crystal layer between the array substrate and the color film substrate is driven to deflect.

The driving mode of the existing liquid crystal display panel is Line-by-Line (Line-by-Line), when the gate signal is high, the transistor corresponding to the Line is turned on, and the signal of the data Line in the column direction can be written into the pixel. When the display panel displays one or more lines, the data lines easily interfere the common electrode lines on the color film substrate, so that the common electrode lines on the color film substrate are easy to generate common voltage jitter, and the jitter phenomenon can cause crosstalk abnormality of pictures.

Disclosure of Invention

The application aims to provide a color film substrate, a display panel and a display device, which can improve the horizontal crosstalk problem.

The first aspect of the present application provides a color film substrate, where the color film substrate and the array substrate are arranged in a box-to-box manner, and the color film substrate includes:

A substrate;

The common electrode area is arranged on the substrate and comprises a plurality of common electrode units extending in the column direction, and the common electrode units are sequentially arranged in the row direction;

wherein adjacent public electrode units are connected through transistors.

In an exemplary embodiment of the present application, the color film substrate is provided with a display area and a non-display area, and the non-display area is disposed around the display area;

The common electrode region and the non-display region have an overlap region, and the transistor is located in the overlap region.

In an exemplary embodiment of the present application, at least one end of the common electrode unit in the column direction is connected to the common electrode unit adjacent thereto through the transistor.

In an exemplary embodiment of the present application, opposite ends of the common electrode unit in the column direction are connected to the common electrode unit adjacent thereto through the transistors;

the transistor includes a first pole connected to one end of one of the common electrode units on the adjacent columns, and a second pole connected to one end of the other of the common electrode units on the adjacent columns.

In an exemplary embodiment of the present application, the transistor further includes a gate, and the gates of the plurality of transistors are all connected to the same control switch board.

In an exemplary embodiment of the application, the first pole and the second pole are arranged in the same layer;

The gate electrode and the first electrode are arranged at intervals in the thickness direction of the substrate.

In an exemplary embodiment of the present application, a data line is disposed on the array substrate, the data line corresponds to a gap between two adjacent columns of the common electrode units, and a distance between two adjacent columns of the common electrode units is smaller than or equal to a width of the data line in the row direction.

In an exemplary embodiment of the present application, a plurality of pixel units arranged in an array are disposed on the array substrate;

The common electrode unit corresponds to at least one column of the pixel units.

The second aspect of the present application provides a display panel, including an array substrate and any one of the color film substrates described above, where the array substrate and the color film substrate are arranged in a box-to-box manner.

The third aspect of the present application provides a display device, including a backlight module and the display panel, where the display panel is disposed on a light emitting side of the backlight module.

The scheme of the application has the following beneficial effects:

the scheme of the application comprises a color film substrate, a display panel and a display device; the color film substrate comprises a substrate and a public electrode area, wherein the public electrode area is arranged on the substrate and is provided with a plurality of public electrode units extending in the column direction, the public electrode units are sequentially arranged in the row direction, and adjacent public electrode units are connected through transistors; through the connection of the adjacent public electrode units through the transistor, the public voltage transmission is carried out between the adjacent public electrode units through the transistor, the public voltage transmission path between the public electrode units is prolonged, the public voltage transmitted between the public electrode units can be stabilized, and then the influence of the data line on the array substrate on the public electrode units can be reduced. That is, adjacent common electrode units are connected through transistors, so that the common voltage can be stabilized, the horizontal crosstalk phenomenon is improved, the picture display quality of the display panel is improved, and the picture display quality of the display device is further improved.

Other features and advantages of the application will be apparent from the following detailed description, or may be learned by the practice of the application.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application as claimed.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.

Fig. 1 shows a schematic structural diagram of a common electrode unit provided in the first, second or third embodiments of the present application on a substrate;

fig. 2 is a schematic structural diagram showing a connection between adjacent common electrode units through transistors according to the first, second or third embodiments of the present application;

Fig. 3 is a schematic structural diagram showing a display area and a non-display area provided in the first, second or third embodiment of the present application;

Fig. 4 shows a schematic flow path structure of a common voltage provided by the first, second or third embodiments of the present application;

fig. 5 shows a schematic structural diagram of a gap between a data line and an adjacent common electrode unit according to the first, second or third embodiments of the present application;

Fig. 6 is a schematic structural diagram of a display panel according to a second or third embodiment of the present application;

Fig. 7 is a schematic structural view showing a structure of forming scan lines, data lines and display electrodes on a glass substrate according to the first, second or third embodiments of the present application;

fig. 8 is a schematic structural diagram of a backlight module and a display panel according to a third embodiment of the application.

Reference numerals illustrate:

10. a color film substrate; 110. a substrate; 120. a common electrode region; 121. a common electrode unit; 130. a transistor; 131. a first pole; 132. a second pole; 133. a gate; 140. a display area; 150. a non-display area; 160. an overlap region;

20. An array substrate; 210. a data line; 220. a glass substrate; 230. a scanning line; 240. a thin film transistor; 250. a pixel electrode;

30. A liquid crystal layer;

100. A display panel;

1000. a display device; 200. and a backlight module.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art.

In the present disclosure, the terms "first," "second," and "second" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implying a number of technical features being indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and the like are to be construed broadly, and may be fixedly attached, detachably attached, or integrally formed, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.

Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the application. One skilled in the relevant art will recognize, however, that the application may be practiced without one or more of the specific details, or with other methods, components, devices, steps, etc. In other instances, well-known methods, devices, implementations, or operations are not shown or described in detail to avoid obscuring aspects of the application.

It can be understood that the common voltage of the common electrode unit on the color film substrate is disturbed, mainly because the common voltage of the common electrode unit is affected and overlapped by the data line with positive and negative polarities in one row when the display panel displays in one row or multiple rows, so that the common voltage of the common electrode unit can shake upwards or downwards, and the shake can cause the display of the display panel screen to be brighter or darker, thereby affecting the actual display of the picture and causing poor quality.

In addition, since the common electrode unit on the color film substrate can be regarded as a whole, when the scanning line of a certain row is charged, the data line affects the whole common electrode unit. When the thin film transistor on the array substrate is turned on, the voltage on the pixel electrode is equal to the voltage on the data line, if the positive polarity data line in one row is more, the common voltage of the common electrode unit is affected to be larger, the voltage difference between the positive polarity pixel electrode and the common electrode unit is smaller, and thus the pixel electrode is blackened, and the voltage difference between the negative polarity pixel electrode and the common electrode unit is larger, and thus the pixel electrode is lightened. Conversely, if the negative polarity data lines in a row are too many, the common voltage of the common electrode unit is affected to be small, the voltage difference between the positive polarity pixel electrode and the common electrode unit becomes large, and the pixel electrode becomes bright, and the voltage difference between the negative polarity pixel electrode and the common electrode unit becomes small, so that the pixel electrode becomes black.

Therefore, in order to reduce the above-described horizontal crosstalk problem, the following embodiments are proposed.

Example 1

In the first embodiment of the present application, a color film substrate 10 is arranged opposite to an array substrate 20, a liquid crystal layer 30 is disposed between the color film substrate 10 and the array substrate 20, the liquid crystal layer 30 includes a plurality of liquid crystal molecules, and the rotation of the liquid crystal molecules can be controlled under the combined action of the common voltage of the color film substrate 10 and the voltage of the pixel electrode 250 of the array substrate 20, so as to realize display.

As shown in fig. 1, the color film substrate 10 includes:

the substrate 110 may be a glass substrate 220, but not limited thereto, and may be a substrate made of other materials, such as PI material, etc.

A common electrode region 120, where the common electrode region 120 is disposed on the substrate 110, and the common electrode region 120 includes a plurality of common electrode units 121 extending in a column direction, and the common electrode units 121 are integral in the column direction, that is: the common electrode unit 121 may have a long stripe structure. Further, the adjacent common electrode units 121 are disposed at intervals from each other, and the plurality of common electrode units 121 are sequentially arranged in the row direction, that is: there is a gap between adjacent common electrode units 121.

As shown in fig. 2, adjacent common electrode units 121 may be connected through a transistor 130, and through this transistor 130, a common voltage may be transferred between adjacent common electrode units 121, which prolongs a common voltage transfer path between the common electrode units 121, and may stabilize a common voltage on the transfer path, so that the common voltage of the common electrode units 121 is affected by the interference of the data line 210 on the array substrate 20, thereby improving the horizontal crosstalk problem, and improving the display quality and display effect of the display panel 100.

It should be noted that the common electrode unit 121 in the embodiment of the application may be a transparent electrode, for example, it may be made of ITO (indium tin oxide) material to improve light transmittance, but not limited thereto, and may be made of other transparent conductive materials.

It should be noted that, referring to fig. 3, the color film substrate 10 is provided with a display area 140 and a non-display area 150, wherein the non-display area 150 is disposed around the display area 140, namely: the non-display area 150 is disposed outside the display area 140 and surrounds the display area 140. The common electrode region 120 and the non-display region 150 have an overlap region 160 therebetween, and the transistor 130 is disposed in the non-display region 150 to avoid the transistor 130 from affecting the aperture ratio of the display panel 100. That is, the transistor 130 is disposed in the overlapping region 160 between the common electrode region 120 and the non-display region 150 to ensure the display aperture ratio.

It can be understood that at least one end of the common electrode unit 121 in the column direction is connected to its neighboring common electrode unit 121 through the transistor 130; that is, at least one end between adjacent common electrode units 121 is connected through a transistor 130.

For example, the upper end of one common electrode unit 121 is connected to the upper end of another common electrode unit 121 adjacent thereto through a transistor 130.

Second, the lower end of one common electrode unit 121 is connected to the lower end of another common electrode unit 121 adjacent thereto through a transistor 130.

Third, referring to fig. 2, both upper and lower ends of the common electrode unit 121 are connected through a transistor 130, that is: the upper ends of two adjacent common electrode units 121 are connected through one transistor 130, and the lower ends thereof are connected through the other transistor 130; that is, two transistors 130 are corresponding between two adjacent common electrode units 121.

The influence of the data line 210 on the common voltage can be reduced by the above three methods, so that the horizontal crosstalk is reduced.

In the embodiment of the present application, the transistors 130 are disposed at the upper and lower ends of the common electrode unit 121, so as to ensure the transmission effect of the common voltage of the common electrode unit 121, and to stabilize the common voltage, so as to better reduce the influence of the data line 210 on the common voltage, reduce the formation of horizontal crosstalk, and ensure the display effect.

In the embodiment of the present application, referring to fig. 2, the transistor 130 includes a first pole 131 and a second pole 132, and the first pole 131 and the second pole 132 may be disposed in the same layer and may be made of metal or alloy materials, such as molybdenum, aluminum, titanium, etc., to ensure good electrical conductivity, but not limited thereto, and may be made of other materials with good electrical conductivity.

In the present application, "same layer setting" refers to a layer structure in which a film layer for forming a specific pattern is formed by the same film forming process and then formed by one patterning process using the same mask plate. I.e., one patterning process corresponds to one mask, also known as a reticle. Depending on the particular pattern, a patterning process may include multiple exposure, development, or etching processes, and the particular patterns in the formed layer structure may be continuous or discontinuous, and may be at different heights or have different thicknesses. Therefore, the manufacturing process is simplified, the manufacturing cost is saved, and the production efficiency is improved.

In the embodiment of the present application, the first electrode 131 is connected to one end of one common electrode unit 121 on the adjacent column, and the second electrode 132 is connected to one end of the other common electrode unit 121 on the adjacent column; namely: the transistor 130 is disposed between adjacent common electrode units 121. The first electrode 131 may be a source electrode, and the second electrode 132 may be a drain electrode; alternatively, the first electrode 131 may be a drain electrode and the second electrode 132 may be a source electrode, which may be designed according to different embodiments.

It should be noted that, in order to control the on and off of the transistor 130, the transistor 130 further includes a gate 133 and an active layer, and a gate insulating layer may be disposed between the gate 133 and the active layer to insulate the gate 133 and the active layer from each other. The first pole 131 and the second pole 132 can be respectively connected with the source and drain doped regions of the active layer, and the corresponding connection relationship between the first pole 131 and the second pole 132 and the source and drain doped regions of the active layer can be determined according to whether the transistor 130 is of N type or P type, which is not described in detail herein.

For example, the transistor 130 of the embodiment of the present application may be a bottom gate, i.e.: the gate electrode 133 may be formed on the substrate 110 first; then, a gate insulating layer is formed on the substrate 110, the gate insulating layer covering the gate electrode 133; an active layer is then formed on the side of the gate insulating layer facing away from the substrate 110, namely: the active layer is located on a side of the gate 133 away from the substrate 110, which overlaps with the orthographic projection of the gate 133 onto the substrate 110. By way of example, the orthographic projection of the active layer onto the substrate 110 may be located within the orthographic projection of the gate 133 onto the substrate 110; the first electrode 131 and the second electrode 132 may be formed after the active layer is formed, and at least a portion of the first electrode 131 may overlap a doped region of the source and drain doped regions of the active layer; at least a portion of the second pole 132 may overlap another doped region of the source and drain doped regions of the active layer.

It should be noted that the transistor 130 according to the embodiment of the disclosure is not limited to the bottom gate type, and may be a top gate type. In addition, it should be noted that the gate 133 of the transistor 130 may be understood as a control terminal thereof, the first pole 131 may be understood as a first terminal, and the second pole 132 may be understood as a second terminal.

In the embodiment of the present application, the gate electrode 133 may be made of a metal or alloy material, such as molybdenum, aluminum, titanium, etc., to ensure good electrical conductivity, but is not limited thereto, and may be made of other materials having good electrical conductivity.

That is, the transistor 130 is connected between the adjacent common electrode units 121, so that a transmission path of the common voltage between the adjacent common electrode units 121 is extended, and the common voltage can be stabilized, so that the influence of the common electrode units 121 is reduced.

For example, referring to fig. 4, if the transistor 130 is not disposed between the adjacent common electrode units 121, the transmission between the adjacent common electrode units 121 is as shown in the paths a to B in the figure, the straight line transmission is shorter, the interference of the data line 210 on the common electrode unit 121 is directly transmitted to the next common electrode unit 121, and the common voltage jitter is larger. The transistor 130 is added between the adjacent common electrode units 121, the linear transmission path is cancelled, the transmission path of the common voltage between the adjacent common electrode units 121 is changed into a-C-B as the path from a to B in the figure, the paths of a-C and C-B in the figure are increased, the transmission path of the common voltage between the adjacent common electrode units 121 is prolonged, the transmission path is prolonged, the common voltage can be stabilized better, the jitter of the common voltage is reduced, and the influence of the data line 210 on the common electrode units 121 is further reduced.

It should be noted that, parasitic capacitances exist between the gate electrode 133 and the first electrode 131, and between the gate electrode 133 and the second electrode 132, and the common electrode unit 121 can be stabilized due to the parasitic capacitances, so that the crosstalk problem caused by the data line 210 can be further reduced.

In some embodiments, because parasitic capacitance exists between the gate 133 and the first pole 131 and between the gate 133 and the second pole 132 in the transistor 130, the parasitic capacitance can also stabilize the common voltage, so that crosstalk of the data line 210 can be further reduced; therefore, the transistor 130 may also be disposed in the display area 140, for example, the transistor 130 is disposed in the middle of the common electrode unit 121.

Further, referring to fig. 2 and 4, the gates 133 of the transistors 130 between the respective common electrode units 121 are connected, that is: the gates 133 of all the transistors 130 connected to the common electrode unit 121 are shorted, and the gates 133 of the plurality of transistors 130 are connected to the same signal control board, i.e., all the transistors 130 are turned on or all the transistors 130 are turned off by controlling the switch board through the signal.

It will be appreciated that cross-talk problems can also be reduced by uniformly turning off transistors 130; when the crosstalk is serious, the problem cannot be solved by the above method, all the transistors 130 may be turned off by intermittently pulling down the common voltage on the control switch board, and then the crosstalk between the adjacent common electrode units 121 may be disconnected.

In addition, as shown in fig. 5, the array substrate 20 is provided with data lines 210, gaps between two adjacent columns of common electrode units 121 correspond to the data lines 210 on the array substrate 20, and the distance between the adjacent common electrode units 121 is smaller than or equal to the width of the data lines 210 in the row direction, so as to ensure the display aperture ratio.

It should be noted that the array substrate 20 is further provided with a plurality of pixel units arranged in an array, and one common electrode unit 121 corresponds to at least one row of pixel units, that is: one common electrode unit 121 may correspond to one column of pixel units; one common electrode unit 121 may correspond to two or more columns of pixel units. The rotation of the liquid crystal molecules between the counter substrate and the array substrate 20 may be controlled by controlling the voltage of the common electrode unit 121.

Example two

In a second embodiment of the present application, a display panel 100 is provided, and the display panel 100 may be a liquid crystal display panel 100. The display panel 100 includes the color film substrate 10 described in the first embodiment, and the description thereof is omitted herein. Referring to fig. 6, the display panel 100 may further include an array substrate 20 disposed opposite to the color film substrate 10 and a liquid crystal layer 30 between the array substrate 20 and the opposite substrate.

Referring to fig. 7, the array substrate 20 may include a glass substrate 220, and scan lines 230, data lines 210, thin film transistors 240, pixel electrodes 250, etc. formed on the glass substrate 220, which are not described in detail herein.

Example III

The third embodiment provides a display device 1000, as shown in fig. 8, which includes the display panel 100 described in the second embodiment, and may further include a backlight module 200, where the display panel 100 is located on the light emitting side of the backlight module 200.

According to the embodiment of the present application, the specific type of the display device 1000 is not particularly limited, and the type of the display device 1000 commonly used in the art may be any type, such as a liquid crystal display, a mobile device such as a mobile phone, a notebook computer, a wearable device such as a watch, a VR device, etc., and a person skilled in the art may select the display device accordingly according to the specific application of the display device, which is not described herein.

It should be noted that, the display device 1000 includes other necessary components and components besides the display panel 100, for example, a display, a housing, a main circuit board, a power cord, etc., and those skilled in the art can correspondingly supplement the components and components according to the specific usage requirements of the display device 1000, which is not described herein.

In the description of the present specification, reference to the terms "some embodiments," "exemplary," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

While embodiments of the present application have been shown and described, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives and variations may be made in the above embodiments by those skilled in the art within the scope of the application, which is therefore intended to be covered by the appended claims and their equivalents.

Claims (10)

1. The utility model provides a various membrane base plate, various membrane base plate sets up with array substrate to the box, its characterized in that, various membrane base plate includes:

A substrate;

The common electrode area is arranged on the substrate and comprises a plurality of common electrode units extending in the column direction, and the common electrode units are sequentially arranged in the row direction;

wherein adjacent public electrode units are connected through transistors.

2. The color film substrate according to claim 1, wherein the color film substrate is provided with a display area and a non-display area, and the non-display area is arranged around the display area;

The common electrode region and the non-display region have an overlap region, and the transistor is located in the overlap region.

3. The color film substrate according to claim 1, wherein at least one end of the common electrode unit in the column direction is connected to the common electrode unit adjacent thereto through the transistor.

4. A color film substrate according to claim 3, wherein opposite ends of the common electrode unit in the column direction are connected to the common electrode unit adjacent thereto through the transistor;

the transistor includes a first pole connected to one end of one of the common electrode units on the adjacent columns, and a second pole connected to one end of the other of the common electrode units on the adjacent columns.

5. The color filter substrate according to claim 4, wherein the transistor further comprises a gate, and the gates of the plurality of transistors are all connected to the same control switch board.

6. The color film substrate of claim 5, wherein the first pole and the second pole are disposed on the same layer;

The gate electrode and the first electrode are arranged at intervals in the thickness direction of the substrate.

7. The color filter substrate according to any one of claims 1 to 6, wherein a data line is disposed on the array substrate, the data line corresponds to a gap between two adjacent columns of the common electrode units, and a distance between two adjacent columns of the common electrode units is smaller than or equal to a width of the data line in the row direction.

8. The color film substrate according to claim 1, wherein a plurality of pixel units arranged in an array are arranged on the array substrate;

The common electrode unit corresponds to at least one column of the pixel units.

9. A display panel, comprising an array substrate and the color film substrate of any one of claims 1 to 8, wherein the array substrate and the color film substrate are arranged in a box-to-box manner.

10. A display device comprising a backlight module and the display panel of claim 9, wherein the display panel is disposed on a light emitting side of the backlight module.