CN117914297A - MOSFET isolation driving circuit based on capacitive coupling and control method - Google Patents
MOSFET isolation driving circuit based on capacitive coupling and control method Download PDFInfo
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- H—ELECTRICITY
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- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/689—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
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Abstract
The invention discloses a MOSFET isolation driving circuit based on capacitive coupling, which comprises a driving power supply, wherein a first end of the driving power supply is connected with one end of a first capacitive resistor parallel branch through a primary switch, and the other end of the first capacitive resistor parallel branch is connected with a grid electrode of an MOS tube; the second end of the driving power supply is connected with one end of a second capacitor resistor parallel branch through a primary switch, and the other end of the second capacitor parallel resistor branch is connected with the source electrode of the MOS tube; a control method of the isolation driving circuit is also disclosed. According to the invention, through a capacitive isolation mode, two capacitive resistor parallel branches are arranged to be respectively connected with the grid electrode and the source electrode of the MOS tube and the two ends of the driving power supply, the isolation control of the MOS tube is carried out, and the components are simple, low in cost and small in occupied PCB area.
Description
Technical Field
The invention relates to the technical field of driving circuits, in particular to a MOSFET isolation driving circuit based on capacitive coupling and a control method.
Background
Under the IO channel of a large industrial control system or other application scenes, sometimes the source S level of the MOSFET cannot be determined or floated, and the control of the grid G by using a conventional mode cannot obtain a stable and reliable source-grid voltage difference Vgs, so that the on and off of the MOSFET cannot be accurately and effectively controlled. To solve this problem, a driving circuit is required to isolate the control side (primary side) from the MOSFET side (secondary side) to solve the problem of the voltage difference between the source S and the control side reference ground. The prior technical schemes are generally two. Firstly, use isolated chip and the isolated power supply of special bars, the isolated chip receives the control signal of primary side and produces an isolated control signal in the secondary side, and the isolated power supply supplies energy for the secondary side, and the control signal of secondary side and isolated power supply and MOSFET use the same reference ground to solve pressure difference and float ground problem. Secondly, a transformer is used, after a primary side inputs PWM or other continuously-changing signals, the signals can be obtained on a secondary side, and after the signals are further processed, vgs signals for driving the MOSFET can be obtained. However, when the isolation chip and the isolation power supply are adopted in the prior art, because the reference ground among different MOSFETs may be different, theoretically, each MOSFET needs one isolation chip and one power supply, and the cost is high; when the transformer is adopted for isolation driving, a special circuit is needed on the secondary side to convert an alternating current signal into a direct current signal, the peripheral circuit is complex, and the occupied PCB area is large.
The single-path isolation type MOSFET driving circuit disclosed in the Chinese patent literature has the publication number of CN103199677B and the publication date of 2015-08-19 and comprises a level conversion and pulse driving circuit, a pulse transformer, a magnetic reset circuit and an acceleration turn-off circuit; the level conversion and pulse driving circuit is used for carrying out level conversion and power amplification on an input pulse signal so as to drive the pulse transformer to work; the magnetic reset circuit is used for enabling the pulse transformer to be reliably magnetically reset; the accelerating turn-off circuit is used for accelerating turn-on and turn-off of the MOSFET and comprises a capacitor, a second resistor, a third resistor and a PNP triode; one end of the capacitor is connected with the same-name end of the secondary side of the pulse transformer, the other end of the capacitor is connected with the second resistor, and the other end of the second resistor is connected with the grid electrode of the MOSFET; the third resistor is connected with the capacitor in parallel; the collector of the PNP triode is connected with the non-homonymous end of the secondary side of the pulse transformer, the base is connected with one end of the capacitor connected with the second resistor, and the emitter is connected with the grid electrode of the MOSFET. The technology adopts a transformer for isolation driving, and also has the problems of complex peripheral circuit and large occupied PCB area.
Disclosure of Invention
The invention provides a MOSFET isolation driving circuit and a control method based on capacitive coupling, which are used for solving the problems that when an isolation chip and an isolation power supply or a transformer are adopted for isolation driving in the prior art, the cost of a circuit is high or the occupied PCB area is large because a peripheral circuit is complex.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
The MOSFET isolation driving circuit based on capacitive coupling comprises a driving power supply, wherein a first end of the driving power supply is connected with one end of a first capacitive resistor parallel branch through a primary switch, and the other end of the first capacitive resistor parallel branch is connected with a grid electrode of an MOS tube; the second end of the driving power supply is connected with one end of a second capacitor resistor parallel branch through a primary switch, and the other end of the second capacitor parallel resistor branch is connected with the source electrode of the MOS tube.
In the invention, control signals are led out from two ends of a driving power supply of a primary side, respectively connected to a grid electrode and a source electrode of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) after passing through a primary side switch (which can be a double-pole switch or two independent switches) and a capacitor resistor parallel branch, when the MOSFET needs to be conducted, the primary side switch is closed to charge a coupling capacitor and a parasitic capacitor Cgs of the MOSFET, and because the capacitance value of the coupling capacitor is far greater than that of the parasitic capacitor, the voltage of the parasitic capacitor is basically the same as that of the primary side power supply, then the primary side switch is disconnected, and the coupling capacitor discharges through a resistor in parallel to prepare for charging the parasitic capacitor through the capacitor next time.
Preferably, the first capacitive-resistive parallel branch comprises a capacitor C1 and a resistor R1 connected in parallel, and the second capacitive-resistive parallel branch comprises a capacitor C2 and a resistor R2 connected in parallel; the capacitance of the capacitor C1 is the same as that of the capacitor C2, and the resistance of the resistor R1 is the same as that of the resistor R2.
In order to facilitate the subsequent calculation of the interval time between the closing and opening of the primary switch, the parameters of electric quantity and current in the driving control process, the voltage difference Vgs between the grid electrode and the source electrode of the MOS tube and the like, the first capacitor resistor parallel branch circuit and the second capacitor resistor parallel branch circuit are symmetrically arranged.
Preferably, the ratio of the capacitance value of the capacitor C1 to the capacitance value of the parasitic capacitance Cgs of the MOS transistor is greater than a preset proportional threshold.
In the invention, the capacitance in the whole driving circuit is connected in series, so that the charging effect on the parasitic capacitance Cgs is as good as possible and the voltage transmission efficiency is as high as possible, therefore, the capacitance of the capacitor C1 and the capacitance of the capacitor C2 are required to be ensured to be far larger than the capacitance of the parasitic capacitance Cgs.
Preferably, when the first end of the driving power supply is a positive electrode and the second end of the driving power supply is a negative electrode, the enhancement MOS tube is driven;
And when the first end of the driving power supply is a negative electrode and the second end of the driving power supply is a positive electrode, the depletion type MOS tube is driven.
The driving circuit has symmetry, so that the positive electrode and the negative electrode of the driving power supply are reversed, and the reverse direction of Vgs voltage can be realized, thereby being used for switching off/driving of a depletion MOSFET or driving/switching off of an enhancement MOSFET.
A control method of a MOSFET isolation driving circuit based on capacitive coupling, comprising:
Closing a primary switch to charge a capacitor, and charging electric quantity of equal charge in a capacitor C1, a capacitor C2 and a parasitic capacitor Cgs; after the charging is finished, the primary side switch is disconnected, and the capacitor C1, the capacitor C2 and the capacitor Cgs are respectively discharged through the resistors which are connected in parallel until the discharging speeds of the three capacitors are the same and enter a stable state, so that the MOS transistor grid electrode and source electrode voltage Vgs in the stable state is obtained.
The on-off state of the MOSFET is determined by the voltage difference Vgs between the grid G and the source S, the control method of the invention utilizes the characteristics that the leakage current between the grid G and the source S of the MOSFET is extremely small and parasitic capacitance Cgs exists, and charges are injected or extracted between the grid G and the source S of the MOSFET in a capacitive coupling mode, so that the MOSFET is controlled to be turned on or turned off, and the charges stored by the parasitic capacitance Cgs are utilized to keep the MOSFET turned on or turned off; in this case, whether the MOS transistor is in an on or off state is determined according to comparison between the voltage difference Vgs between the gate and the source and the threshold voltage of the MOS transistor.
Preferably, when the primary switch is continuously closed before the primary switch is opened after the charging is completed, the charge is moved according to the voltage division ratio of the resistors connected in parallel to each of the capacitor C1, the capacitor C2 and the capacitor Cgs on the premise that v1+v2+vgs=vin is satisfied; v1 represents the voltage across the capacitor C1 and V2 represents the voltage across the capacitor C2.
The charge transfer process is an intermediate process between capacitor charging and capacitor discharging, and the time interval between the closing of the primary side switch for capacitor charging and the opening of the primary side switch for capacitor discharging in the actual operation process is determined after the time required for the capacitor to finish charging is calculated in advance according to the data of the capacitor and the resistor; the charge transfer process time is therefore short or considered to be nonexistent.
Preferably, the primary side switch is turned off after charging is completed,
When the product of the capacitor C1 and the resistor connected in parallel with the capacitor C1 is smaller than the product of the parasitic capacitor Cgs and the grid leakage resistor, the discharge speed of Cgs is gradually increased to be the same as the discharge speed of C1, and the circuit enters a stable state;
When the product of the capacitance C1 and the resistance connected in parallel therewith is larger than the product of the parasitic capacitance Cgs and the gate leakage resistance, the discharge rate of Cgs gradually decreases to be the same as the discharge rate of C1, and the circuit enters a stable state.
The process of charging the capacitor in the invention is a process of gradually entering a stable state, and the discharge speed of the capacitor C1 and the capacitor C2 in the initial stage of disconnecting the primary side switch is different from the discharge speed of the parasitic capacitor Cgs, and gradually changes until the discharge speeds of the three capacitors are the same, so that the stable state of the circuit is achieved.
Preferably, the circuit enters a stable state and then circulates the processes of capacitor charging and capacitor discharging, or circulates the processes of capacitor charging, charge transferring and capacitor discharging; obtaining a Vgs voltage change curve;
when the threshold voltage of the MOS tube is smaller than the lowest point of the Vgs voltage change curve, normally-open and normally-closed control of the MOS tube is carried out;
and when the threshold voltage of the MOS tube is between the lowest point and the highest point of the Vgs voltage change curve, performing cyclic opening and closing control of the MOS tube.
After the circuit enters a stable state, vgs gradually rises in the capacitor charging process, the Vgs slightly rises or falls in the charge transferring process according to the transferring direction, the Vgs falls to a certain degree in the capacitor discharging process, and then a new cycle is repeated, so that a Vgs voltage change curve with periodical up-and-down fluctuation is obtained, and the opening and closing control of the MOS tube is determined by comparing the threshold voltage with the Vgs voltage change curve.
The invention has the following beneficial effects: two capacitance-resistance parallel branches are arranged to be respectively connected with the grid electrode and the source electrode of the MOS tube and the two ends of the driving power supply in a capacitance isolation mode, isolation control of the MOS tube is carried out, and the components are simple, low in cost and small in occupied PCB area; the values of the capacitor and the resistor can be set according to the requirements to obtain different voltage change curves of the voltage difference Vgs of the grid electrode and the source electrode of the MOS tube, and the cyclic opening and closing control or the normally-open and normally-closed control is realized according to the relation between the threshold voltage of the MOS tube and the voltage change curve of the Vgs.
Drawings
FIG. 1 is a circuit diagram of an isolated drive circuit of the present invention;
FIG. 2 is an equivalent circuit diagram of a driving isolation circuit in an embodiment of the present invention;
FIG. 3 is a schematic diagram of a capacitive discharge process in an embodiment of the invention;
FIG. 4 is a schematic diagram of a charge-discharge process of a circulating capacitor in a steady state according to an embodiment of the invention;
fig. 5 is a voltage waveform diagram of a charge-discharge process in a steady state cycle in an embodiment of the invention.
Detailed Description
The invention is further described below with reference to the drawings and detailed description.
As shown in fig. 1, a MOSFET isolation driving circuit based on capacitive coupling includes a driving power supply, wherein a first end of the driving power supply is connected with one end of a first capacitive resistor parallel branch through a primary switch, and the other end of the first capacitive resistor parallel branch is connected with a gate of a MOS tube; the second end of the driving power supply is connected with one end of a second capacitor resistor parallel branch through a primary switch, and the other end of the second capacitor parallel resistor branch is connected with the source electrode of the MOS tube.
The first capacitive-resistive parallel branch comprises a capacitor C1 and a resistor R1 which are connected in parallel, and the second capacitive-resistive parallel branch comprises a capacitor C2 and a resistor R2 which are connected in parallel; the capacitance of the capacitor C1 is the same as that of the capacitor C2, and the resistance of the resistor R1 is the same as that of the resistor R2.
The ratio of the capacitance value of the capacitor C1 to the capacitance value of the parasitic capacitance Cgs of the MOS transistor is greater than a preset proportional threshold, and a specific proportional threshold may be a value greater than ten, so that the capacitance value of the capacitor C1 is greater than the capacitance value of the parasitic capacitance Cgs by more than an order of magnitude.
Specifically, when the first end of the driving power supply is a positive electrode and the second end of the driving power supply is a negative electrode, the positive electrode is connected with one end of a capacitor C1 and one end of a resistor R1 through a primary switch, and the other end of the capacitor C1 and the other end of the resistor R1 are connected with the grid electrode of the MOS tube; the negative electrode is connected with one end of a capacitor C2 and one end of a resistor R2 through a primary switch, and the other end of the capacitor C2 and the other end of the resistor R2 are connected with the source electrode of the MOS tube; at this time, the driving circuit can drive the enhanced MOS tube.
Conversely, when the first end of the driving power supply is a negative electrode and the second end of the driving power supply is a positive electrode, the negative electrode is connected with one end of the capacitor C1 and one end of the resistor R1 through the primary switch, and the other end of the capacitor C1 and the other end of the resistor R1 are connected with the grid electrode of the MOS tube; the positive electrode is connected with one end of a capacitor C2 and one end of a resistor R2 through a primary switch, and the other end of the capacitor C2 and the other end of the resistor R2 are connected with the source electrode of the MOS tube; at this time, the driving circuit can rapidly turn off the enhancement type MOS tube or drive the depletion type MOS tube.
In the invention, control signals are led out from two ends of a driving power supply of a primary side, respectively connected to a grid electrode and a source electrode of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) after passing through a primary side switch (which can be a double-pole switch or two independent switches) and a capacitor resistor parallel branch, when the MOSFET needs to be conducted, the primary side switch is closed to charge a coupling capacitor and a parasitic capacitor Cgs of the MOSFET, and because the capacitance value of the coupling capacitor is far greater than that of the parasitic capacitor, the voltage of the parasitic capacitor is basically the same as that of the primary side power supply, then the primary side switch is disconnected, and the coupling capacitor discharges through a resistor in parallel to prepare for charging the parasitic capacitor through the capacitor next time.
In order to facilitate the subsequent calculation of the interval time between the closing and opening of the primary switch, the parameters of electric quantity and current in the driving control process, the voltage difference Vgs between the grid electrode and the source electrode of the MOS tube and the like, the first capacitor resistor parallel branch circuit and the second capacitor resistor parallel branch circuit are symmetrically arranged.
In the invention, the capacitance in the whole driving circuit is connected in series, so that the charging effect on the parasitic capacitance Cgs is as good as possible and the voltage transmission efficiency is as high as possible, therefore, the capacitance of the capacitor C1 and the capacitance of the capacitor C2 are required to be ensured to be far larger than the capacitance of the parasitic capacitance Cgs.
The driving circuit has symmetry, so that the positive electrode and the negative electrode of the driving power supply are reversed, and the reverse direction of Vgs voltage can be realized, thereby being used for switching off/driving of a depletion MOSFET or driving/switching off of an enhancement MOSFET.
A control method of a MOSFET isolation driving circuit based on capacitive coupling, comprising:
The capacitor charging process comprises the following steps: closing a primary switch to charge a capacitor, and charging electric quantity of equal charge in a capacitor C1, a capacitor C2 and a parasitic capacitor Cgs;
the capacitor discharging process comprises the following steps: after the charging is finished, the primary side switch is disconnected, and the capacitor C1, the capacitor C2 and the capacitor Cgs are respectively discharged through the resistors which are connected in parallel until the discharging speeds of the three capacitors are the same and enter a stable state, so that the MOS transistor grid electrode and source electrode voltage Vgs in the stable state is obtained.
When the primary switch is continuously closed before the primary switch is opened after the charging is completed, in the charge transfer process, the charge is moved according to the voltage division ratio of the resistor R1 connected in parallel with the capacitor C1, the resistor R2 connected in parallel with the capacitor C2 and the grid leakage resistor Rgs of the MOS tube on the premise that the sum of the partial voltages of the capacitor C1, the capacitor C2 and the parasitic capacitor Cgs is equal to the driving power supply voltage.
The primary side switch is turned off after the charging is completed,
When the product of the capacitor C1 and the resistor connected in parallel with the capacitor C1 is smaller than the product of the parasitic capacitor Cgs and the grid leakage resistor, the discharge speed of Cgs is gradually increased to be the same as the discharge speed of C1, and the circuit enters a stable state;
When the product of the capacitance C1 and the resistance connected in parallel therewith is larger than the product of the parasitic capacitance Cgs and the gate leakage resistance, the discharge rate of Cgs gradually decreases to be the same as the discharge rate of C1, and the circuit enters a stable state.
After the circuit enters a stable state, the process of charging and discharging the capacitor is circulated, or the process of charging, transferring charges and discharging the capacitor is circulated; obtaining a Vgs voltage change curve;
when the threshold voltage of the MOS tube is smaller than the lowest point of the Vgs voltage change curve, normally-open and normally-closed control of the MOS tube is carried out;
and when the threshold voltage of the MOS tube is between the lowest point and the highest point of the Vgs voltage change curve, performing cyclic opening and closing control of the MOS tube.
The on-off state of the MOSFET is determined by the voltage difference Vgs between the grid G and the source S, the control method of the invention utilizes the characteristics that the leakage current between the grid G and the source S of the MOSFET is extremely small and parasitic capacitance Cgs exists, and charges are injected or extracted between the grid G and the source S of the MOSFET in a capacitive coupling mode, so that the MOSFET is controlled to be turned on or turned off, and the charges stored by the parasitic capacitance Cgs are utilized to keep the MOSFET turned on or turned off; in this case, whether the MOS transistor is in an on or off state is determined according to comparison between the voltage difference Vgs between the gate and the source and the threshold voltage of the MOS transistor.
The charge transfer process is an intermediate process between capacitor charging and capacitor discharging, and the time interval between the closing of the primary side switch for capacitor charging and the opening of the primary side switch for capacitor discharging in the actual operation process is determined after the time required for the capacitor to finish charging is calculated in advance according to the data of the capacitor and the resistor; the charge transfer process time is therefore short or considered to be nonexistent.
The process of charging the capacitor in the invention is a process of gradually entering a stable state, and the discharge speed of the capacitor C1 and the capacitor C2 in the initial stage of disconnecting the primary side switch is different from the discharge speed of the parasitic capacitor Cgs, and gradually changes until the discharge speeds of the three capacitors are the same, so that the stable state of the circuit is achieved.
After the circuit enters a stable state, vgs gradually rises in the capacitor charging process, the Vgs slightly rises or falls in the charge transferring process according to the transferring direction, the Vgs falls to a certain degree in the capacitor discharging process, and then a new cycle is repeated, so that a Vgs voltage change curve with periodical up-and-down fluctuation is obtained, and the opening and closing control of the MOS tube is determined by comparing the threshold voltage with the Vgs voltage change curve.
In the embodiment of the present invention, for the sake of convenience in calculation, the isolation driving circuit is simplified into the circuit shown in fig. 2, and since the voltage and current states of the drain D of the MOSFET have little influence on the gate G, and the voltage difference between the gate and the source is known to determine the on and off condition between the drain and the source, the MOSFET in the circuit shown in fig. 1 can be simplified into a circuit in which the resistor Rgs and the parasitic capacitor Cgs are connected in parallel, where the resistor Rgs is the gate leakage resistor, and the capacitor Cgs is the parasitic capacitor between the gate and the source. The coupling capacitance between the primary side and the secondary side is marked as C1 and C2, and the corresponding parallel discharge resistance is R1 and R2. And the driving power supply voltage of the primary side is Vin, the partial pressure at two ends of the capacitor C1 is V1, the partial pressure at two ends of the capacitor C2 is V2, and the voltage between the grid electrode and the source electrode of the MOS tube is Vgs.
When the primary side switch is closed for the first time, a capacitor charging process is carried out, the capacitor C1, the capacitor C2 and the parasitic capacitor Cgs are charged, and as the capacitors are connected in series, the charging time is very short, and a resistor bypass is not considered, so that the charging charges on the three capacitors are equal; from v=q/C, analysis shows that the larger the capacitance value, the smaller the voltage across the capacitor, with the charge unchanged. Thus Vgs will be very close to the driving supply voltage Vin when the capacitance of the capacitor C1 and the capacitor C2 is more than an order of magnitude higher than the capacitance of the parasitic capacitor Cgs. The larger the capacitance-to-capacitance ratio is, the better the effect of charging through the capacitor is, and the higher the voltage transmission efficiency is.
After the charging is completed, if the primary side switch is continuously closed, the charge transfer process is carried out; the charge in the capacitor will move between the capacitor C1, the capacitor C2 and the parasitic capacitor Cgs according to the voltage division ratio of the resistor R1, the resistor R2 and the resistor Rgs on the premise that v1+v2+vgs=vin is satisfied. The speed of movement (slope of voltage) is positively correlated with the product of resistance and capacitance (r×c), the direction of movement being dependent on the ratio of resistance R1, resistance R2 and resistance Rgs.
When the resistance R1 and the resistance R2 are much smaller than the resistance Rgs and the ratio R1/Rgs is smaller than Cgs/C1, charges flow from the capacitor C1 and the capacitor C2 to the parasitic capacitance Cgs, so that Vgs rises; when the relation of the resistance R1, the resistance R2, and the resistance Rgs is R1/Rgs > Cgs/C1, electric charges flow from the parasitic capacitance Cgs to the capacitance C1 and the capacitance C2, so that Vgs decreases. In the actual operation process, the discharge resistor R1 and the resistor R2 selected for the safety of the circuit cannot be small, and the charging efficiency of the parasitic capacitance Cgs is poor at this stage, so that the time of this stage should be short or non-existent in actual use, and the influence of this time can be optionally not considered in the subsequent analysis.
As shown in fig. 3, after the primary switch is turned off, a capacitor discharging process is performed, the capacitor C1 is discharged through the resistor R1, the capacitor C2 is discharged through the resistor R2, the parasitic capacitor Cgs is discharged through the resistor Rgs, and the discharging speed, that is, the discharging current, is: from ohm's law, i=v/R, the charge on each capacitor during the previous capacitor charging process is the same v=q/C; the discharge rate i=q/(RC) can be obtained by combining the two equations.
Since the electric quantity charged on the three capacitors in each period is the same, when C1×r1< cgs×rgs, V1/(C1×r1) > Vgs/(cgs×rgs) can be obtained, that is, the discharging speed of the capacitor C1 and the capacitor C2 is greater than the discharging speed of the parasitic capacitor Cgs at the same time, so that the decreasing speed of Vgs is smaller than the decreasing speed of V1 and V2, vgs increases relative to V1 and V2, and further, the discharging speed of Cgs gradually increases relative to the discharging speed of C1 and C2 until the discharging speeds of Cgs, C1 and C2 are the same, and the whole circuit enters a stable state.
Similarly, when C1×r1> cgs×rgs, V1/(C1×r1) < Vgs/(cgs×rgs) can be obtained, that is, the discharge speed of the capacitor C1 and the capacitor C2 is smaller than the discharge speed of the parasitic capacitor Cgs at the same time, so that the falling speed of Vgs is greater than the falling speeds of V1 and V2, vgs is reduced relative to V1 and V2, and further, the discharge speed of Cgs is gradually reduced relative to the discharge speeds of C1 and C2 until the discharge speeds of Cgs, C1 and C2 are the same, and the whole circuit enters a stable state.
After the system enters a steady state, as shown in fig. 4, the cyclic capacitor is charged, the charge is transferred (optional), and the capacitor is discharged. After the primary side switch is closed, the capacitor charging stage is carried out, and equal charges are charged into the capacitor C1, the capacitor C2 and the parasitic capacitor Cgs; after the capacitor is charged, the capacitor enters a charge transfer stage, the charge in the capacitor is transferred between the capacitors under the influence of the voltage division ratio of the resistor, and the condition of V1+V2+Vgs=vin is always satisfied in the period; after the primary side switch is disconnected, the capacitor discharging stage is carried out, and three capacitors are respectively discharged through resistors connected in parallel; alternatively, the capacitor discharge phase may be entered directly from the capacitor charge phase, at which point the cycling process will not have a charge transfer phase.
In steady state, V1, V2 and Vgs rise during each capacitor charging phase, charging each capacitor with the same charge in a short period of time, Δq= Δvgs/cgs= Δv1/c1= Δv2/C2. The capacitance charge transfer stage has small charge transfer amount and short time, and can ignore the voltage charge change of the stage in rough calculation.
In the capacitor discharge phase, since the discharge time t < < τ=r·c, the discharge current can be calculated approximately as a constant discharge current. Discharge current i=v/R, charge amount Δq=i×Δt= (V/R) ×Δt. Since Δq is equal already in the steady state, the charge and discharge times of the capacitor C1, the capacitor C2 and the parasitic capacitor Cgs are completely identical, so that the capacitor is easy to obtain: vgs/rgs=v1/r1=v2/R2;
also v1+v2+cgs=vin, and r1=r2, vgs=vin×rgs/(rgs+2×r1) can be obtained.
The voltage waveforms during the charge and discharge cycle in the steady state are shown in fig. 5, and it is found that in the isolated driving circuit of the present invention, the steady state output voltage is mainly determined by the ratio of resistors, and the dynamic performance of the voltage variation is determined by the capacitance. When the threshold voltage of the MOS tube is lower than the lowest point of the Vgs voltage change curve in FIG. 5, as a broken line a in the figure, normally-open and normally-closed control of the MOS tube can be performed; when the threshold voltage of the MOS tube is between the lowest point and the highest point of the Vgs voltage change curve, as shown by a dotted line b in the figure, the cyclic opening and closing control of the MOS tube can be performed, and the specific opening and closing time is determined according to the position of the threshold voltage on the voltage change curve.
The foregoing embodiments are further illustrative and explanatory of the invention, as is not restrictive of the invention, and any modifications, equivalents, and improvements made within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (8)
1. The MOSFET isolation driving circuit based on capacitive coupling is characterized by comprising a driving power supply, wherein a first end of the driving power supply is connected with one end of a first capacitive resistor parallel branch through a primary switch, and the other end of the first capacitive resistor parallel branch is connected with a grid electrode of an MOS tube; the second end of the driving power supply is connected with one end of a second capacitor resistor parallel branch through a primary switch, and the other end of the second capacitor parallel resistor branch is connected with the source electrode of the MOS tube.
2. The MOSFET isolation driving circuit of claim 1, wherein said first capacitive-resistive parallel branch comprises a capacitor C1 and a resistor R1 in parallel, and said second capacitive-resistive parallel branch comprises a capacitor C2 and a resistor R2 in parallel; the capacitance of the capacitor C1 is the same as that of the capacitor C2, and the resistance of the resistor R1 is the same as that of the resistor R2.
3. The MOSFET isolation driving circuit according to claim 2, wherein a ratio of the capacitance of the capacitor C1 to the capacitance of the parasitic capacitance Cgs of the MOS transistor is greater than a predetermined ratio threshold.
4. A MOSFET isolation driving circuit based on capacitive coupling according to claim 2 or 3, wherein the driving of the enhancement MOS transistor is performed when the first end of the driving power supply is positive and the second end of the driving power supply is negative;
And when the first end of the driving power supply is a negative electrode and the second end of the driving power supply is a positive electrode, the depletion type MOS tube is driven.
5. A control method of a MOSFET isolation driving circuit based on capacitive coupling, adapted to an isolation driving circuit according to any one of claims 1 to 4, comprising:
Closing a primary switch to charge a capacitor, and charging electric quantity of equal charge in a capacitor C1, a capacitor C2 and a parasitic capacitor Cgs; after the charging is finished, the primary side switch is disconnected, and the capacitor C1, the capacitor C2 and the capacitor Cgs are respectively discharged through the resistors which are connected in parallel until the discharging speeds of the three capacitors are the same and enter a stable state, so that the MOS transistor grid electrode and source electrode voltage Vgs in the stable state is obtained.
6. The control method of a MOSFET isolation driving circuit based on capacitive coupling according to claim 5, wherein when the primary switch is continuously closed before the primary switch is opened after the charging is completed, the charge is moved according to the voltage division ratio of the resistors connected in parallel to each of the capacitor C1, the capacitor C2 and the capacitor Cgs on the premise that v1+v2+vgs=vin is satisfied;
V1 represents the voltage across the capacitor C1 and V2 represents the voltage across the capacitor C2.
7. A control method for a capacitive coupling based MOSFET isolation driving circuit according to claim 5 or 6, wherein the primary side switch is turned off after the charging is completed,
When the product of the capacitor C1 and the resistor connected in parallel with the capacitor C1 is smaller than the product of the parasitic capacitor Cgs and the grid leakage resistor, the discharge speed of Cgs is gradually increased to be the same as the discharge speed of C1, and the circuit enters a stable state;
When the product of the capacitance C1 and the resistance connected in parallel therewith is larger than the product of the parasitic capacitance Cgs and the gate leakage resistance, the discharge rate of Cgs gradually decreases to be the same as the discharge rate of C1, and the circuit enters a stable state.
8. The method of claim 7, wherein the circuit enters a steady state and then circulates the process of capacitor charging and capacitor discharging or circulates the process of capacitor charging, charge transferring and capacitor discharging; obtaining a Vgs voltage change curve;
when the threshold voltage of the MOS tube is smaller than the lowest point of the Vgs voltage change curve, normally-open and normally-closed control of the MOS tube is carried out;
and when the threshold voltage of the MOS tube is between the lowest point and the highest point of the Vgs voltage change curve, performing cyclic opening and closing control of the MOS tube.
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CN118092858A (en) * | 2024-04-28 | 2024-05-28 | 南京信息工程大学 | Product operation circuit capable of adjusting fractional power |
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CN118092858A (en) * | 2024-04-28 | 2024-05-28 | 南京信息工程大学 | Product operation circuit capable of adjusting fractional power |
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