CN117851145A - System and method for evaluating radiation resistance of robot microprocessor - Google Patents

System and method for evaluating radiation resistance of robot microprocessor Download PDF

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Publication number
CN117851145A
CN117851145A CN202311812667.7A CN202311812667A CN117851145A CN 117851145 A CN117851145 A CN 117851145A CN 202311812667 A CN202311812667 A CN 202311812667A CN 117851145 A CN117851145 A CN 117851145A
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microprocessor
data
main control
control module
tested
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CN202311812667.7A
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张军
吴海林
倪涛
李博
王娟娟
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Research Institute of Nuclear Power Operation
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Research Institute of Nuclear Power Operation
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Priority to CN202311812667.7A priority Critical patent/CN117851145A/en
Publication of CN117851145A publication Critical patent/CN117851145A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The disclosure belongs to the technical field of nuclear power, and particularly relates to a system and a method for evaluating radiation resistance of a robot microprocessor. Aiming at the defects of the conventional microprocessor anti-radiation capability test method, the robot microprocessor anti-radiation capability evaluation method disclosed by the invention more comprehensively covers a plurality of functions of the microprocessor, effectively simulates the actual working state of the microprocessor, and has the evaluation result which is closer to the actual performance of the microprocessor in a radiation environment and higher application value.

Description

System and method for evaluating radiation resistance of robot microprocessor
Technical Field
The invention belongs to the technical field of nuclear power, and particularly relates to a system and a method for evaluating the radiation resistance of a robot microprocessor.
Background
The robot applied in the nuclear radiation environment needs to have certain radiation resistance, electronic components such as a microprocessor in the robot are key links of radiation resistance, and aiming at the radiation resistance of the microprocessor, the currently commonly used micro-processing radiation resistance test method mainly comprises a static bias method and a preload function program test method, wherein the static test can only evaluate the radiation resistance of an interface of the microprocessor and cannot accurately evaluate the radiation resistance of circuits such as a core, a timer, a DAC, an ADC and the like in the chip; the microprocessor functional module of the preload functional program test method is not fully evaluated and can not fully reflect the change of the electrical parameters of the internal structure.
Disclosure of Invention
In order to overcome the problems in the related art, a system and a method for evaluating the radiation resistance of a robot microprocessor are provided.
According to an aspect of the disclosed embodiments, there is provided a flowchart of a method for evaluating radiation resistance of a robot microprocessor, the method being applied in an irradiation environment, the method comprising the steps of:
step 1, serial port test, wherein a main control module sends data to a tested microprocessor serial port, the microprocessor returns received data to the main control module at regular time, the main control module compares the sent data with the received data, when the sent data is consistent with the received data, the function of the microprocessor serial port is judged to be normal, and if the sent data is inconsistent with the received data, the function of the microprocessor serial port is judged to be abnormal;
step 2, testing the internal RAM, wherein the main control module alternately writes fixed data 55AAH into the internal RAM of the microprocessor at regular time, and then the main control module compares the internal RAM data of the microprocessor with pre-written data at regular time, when the read data are consistent with the written data, the internal RAM of the microprocessor is judged to work normally, and when the read data are inconsistent with the written data, the internal RAM of the microprocessor is judged to work abnormally;
and 3, testing the FLASH, namely reading FLASH preset data of the microprocessor by the main control module, comparing whether the preset data are consistent with the read data or not, judging that the FLASH of the microprocessor works normally when the preset data are consistent with the read data, and judging whether the FLASH in the microprocessor works abnormally when the preset data are inconsistent with the read data or not.
In one possible implementation, the method further includes:
step 4, FPU testing, namely testing whether the FPU is normal or not by adopting an implanted Julia algorithm;
step 5, ADC test, namely outputting a step wave from 0 level to the full range of the microprocessor by using a DAC circuit controlled by the main control module, inputting the step wave to an ADC input port of the microprocessor to be tested, returning the step wave to the main control module after the microprocessor is converted into a digital signal, and comparing the digital signal with a corresponding output code by the main control module to test the ADC function and the accuracy;
and 6, DAC testing, namely configuring a DAC functional module of the tested microprocessor to output a step wave signal from 0 level to full range, acquiring a DAC output end of the tested microprocessor by using an ADC of a main board, and calculating and testing the function and the precision of the DAC by using a main control module.
In one possible implementation, the method further includes:
step 7, testing a timer or a counter, configuring the fixed time of the timer of the system to change the signal overturn of the port of the microprocessor, and judging whether the function of the timer or the counter is normal or not by the main control module by calculating the overturn time of the port of the microprocessor;
step 8, MMC interface test, in the MMC external access SRAM chip of the microprocessor tested, regularly write the external SRAM data of MMC and regularly use MMC interface to read the data in the external SRAM, compare and judge MMC interface function through reading the data and writing in the data;
step 9, SPI interface test, namely establishing an SPI interface communication protocol on the main control module and enabling the tested microprocessor to communicate with each other through SPI, and comparing the written data with the looping data of the microprocessor to test whether the SPI interface function is normal or not;
step 10, IIC interface test, which is to establish an IIC interface communication protocol on a main control module and communicate with a microprocessor to be tested through IIC, and compare the written data with the looped data of the microprocessor to test whether the IIC interface function is normal or not;
and step 11, testing the CAN interface, namely establishing a CAN interface communication protocol on the main control module, carrying out CAN communication on the main control module and the tested microprocessor, and comparing the written data with the microprocessor loop-back data to test whether the CAN interface function is normal or not.
According to another aspect of the disclosed embodiments, there is provided a robot microprocessor radiation resistance evaluation system, the system further comprising: the upper computer system and the lower computer system which are in communication connection with each other, wherein the lower computer system comprises: the device comprises a main control module, a digital-to-analog conversion module, a current monitoring module, a power supply module and a communication module;
in the lower computer system, the main control module is respectively in communication connection with the tested microprocessor, the digital-to-analog conversion module, the current monitoring module and the communication module, the digital-to-analog conversion module and the current monitoring module are respectively in communication connection with the tested microprocessor, the lower computer system is used for realizing the method according to any one of claims 1 to 8, and the power supply module is used for supplying power to the lower computer system.
The beneficial effects of the present disclosure are: aiming at the defects of the conventional microprocessor anti-radiation capability test method, the robot microprocessor anti-radiation capability evaluation method disclosed by the invention more comprehensively covers a plurality of functions of the microprocessor, effectively simulates the actual working state of the microprocessor, and has the evaluation result which is closer to the actual performance of the microprocessor in a radiation environment and higher application value.
Drawings
Fig. 1 is a flow chart illustrating a method of evaluating the radiation resistance of a robotic microprocessor according to an exemplary embodiment.
FIG. 2 is a block diagram illustrating a robotic microprocessor radiation resistance evaluation system according to an example embodiment.
Detailed Description
The invention will be described in further detail with reference to the accompanying drawings and specific examples.
FIG. 1 is a flowchart illustrating a method for evaluating the radiation resistance of a robotic microprocessor, according to one exemplary embodiment, the method including the steps of:
step 1, serial port test, wherein a main control module (the main control module can be an FPGA or an MCU for example) sends data to a tested microprocessor serial port, the microprocessor returns the received data to the main control module at regular time, the main control module compares the sent data with the received data, when the sent data is consistent with the received data, the function of the microprocessor serial port is judged to be normal, and if the sent data is inconsistent with the received data, the function of the microprocessor serial port is judged to be abnormal.
And 2, testing the internal RAM, wherein the main control module alternately writes the fixed data 55AAH into the internal RAM of the microprocessor at regular time, then the main control module compares the internal RAM data of the microprocessor with the pre-written data at regular time, when the read data are consistent with the written data, the internal RAM of the microprocessor is judged to work normally, and when the read data are inconsistent with the written data, the internal RAM of the microprocessor is judged to work abnormally.
And 3, testing the FLASH, namely reading FLASH preset data of the microprocessor by the main control module, comparing whether the preset data are consistent with the read data or not, judging that the FLASH of the microprocessor works normally when the preset data are consistent with the read data, and judging whether the FLASH in the microprocessor works abnormally when the preset data are inconsistent with the read data or not.
And 4, testing the FPU, and testing whether the FPU is normal or not by adopting an implanted Julia algorithm.
And 5, ADC test, namely outputting a step wave from 0 level to the full range of the microprocessor by using a DAC circuit controlled by the main control module, inputting the step wave to an ADC input port of the microprocessor to be tested, returning the step wave to the main control module after the microprocessor is converted into a digital signal, and comparing the digital signal with a corresponding output code by the main control module to test the ADC function and the accuracy.
And 6, DAC testing, namely configuring a DAC functional module of the tested microprocessor to output a step wave signal from 0 level to full range, acquiring a DAC output end of the tested microprocessor by using an ADC of a main board, and calculating and testing the function and the precision of the DAC by using a main control module.
And 7, testing a timer or a counter, configuring the fixed time of the timer of the system to change the signal overturn of the port of the microprocessor, and judging whether the function of the timer or the counter is normal or not by calculating the overturn time of the port of the microprocessor by the main control module.
And 8, testing the MMC interface, namely accessing an SRAM chip outside the MMC of the tested microprocessor, writing the SRAM data outside the MMC alternately with 55AAH data at regular time, reading the data in the external SRAM by using the MMC interface at regular time, and comparing the read data with the written data to judge the function of the MMC interface.
And 9, SPI interface test, namely establishing an SPI interface communication protocol on the main control module and enabling the tested microprocessor to communicate with each other through SPI, and comparing the written data with the looped data of the microprocessor to test whether the SPI interface function is normal or not.
And 10, IIC interface testing, namely establishing an IIC interface communication protocol on the main control module, communicating with the tested microprocessor through IIC, and comparing the written data with the looped data of the microprocessor to test whether the IIC interface function is normal or not.
And step 11, testing the CAN interface, namely establishing a CAN interface communication protocol on the main control module, carrying out CAN communication on the main control module and the tested microprocessor, and comparing the written data with the microprocessor loop-back data to test whether the CAN interface function is normal or not.
FIG. 2 is a block diagram illustrating a robotic microprocessor radiation resistance evaluation system, as shown in FIG. 1, according to one exemplary embodiment, the system further comprising: the upper computer system and the lower computer system which are in communication connection with each other, wherein the lower computer system comprises: the device comprises a main control module, a digital-to-analog conversion module, a current monitoring module, a power supply module and a communication module.
In the lower computer system, the main control module is respectively in communication connection with the microprocessor to be tested, the digital-to-analog conversion module, the current monitoring module and the communication module, the digital-to-analog conversion module and the current monitoring module are respectively in communication connection with the microprocessor to be tested, the lower computer system is used for realizing the method, and the power supply module is used for supplying power to the lower computer system.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the improvement of technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (4)

1. A method for evaluating radiation resistance of a robot microprocessor, wherein the method is applied in an irradiation environment, the method comprising the steps of:
step 1, serial port test, wherein a main control module sends data to a tested microprocessor serial port, the microprocessor returns received data to the main control module at regular time, the main control module compares the sent data with the received data, when the sent data is consistent with the received data, the function of the microprocessor serial port is judged to be normal, and if the sent data is inconsistent with the received data, the function of the microprocessor serial port is judged to be abnormal;
step 2, testing the internal RAM, wherein the main control module alternately writes fixed data 55AAH into the internal RAM of the microprocessor at regular time, and then the main control module compares the internal RAM data of the microprocessor with pre-written data at regular time, when the read data are consistent with the written data, the internal RAM of the microprocessor is judged to work normally, and when the read data are inconsistent with the written data, the internal RAM of the microprocessor is judged to work abnormally;
and 3, testing the FLASH, namely reading FLASH preset data of the microprocessor by the main control module, comparing whether the preset data are consistent with the read data or not, judging that the FLASH of the microprocessor works normally when the preset data are consistent with the read data, and judging whether the FLASH in the microprocessor works abnormally when the preset data are inconsistent with the read data or not.
2. The method according to claim 1, wherein the method further comprises:
step 4, FPU testing, namely testing whether the FPU is normal or not by adopting an implanted Julia algorithm;
step 5, ADC test, namely outputting a step wave from 0 level to the full range of the microprocessor by using a DAC circuit controlled by the main control module, inputting the step wave to an ADC input port of the microprocessor to be tested, returning the step wave to the main control module after the microprocessor is converted into a digital signal, and comparing the digital signal with a corresponding output code by the main control module to test the ADC function and the accuracy;
and 6, DAC testing, namely configuring a DAC functional module of the tested microprocessor to output a step wave signal from 0 level to full range, acquiring a DAC output end of the tested microprocessor by using an ADC of a main board, and calculating and testing the function and the precision of the DAC by using a main control module.
3. The method according to claim 1, wherein the method further comprises:
step 7, testing a timer or a counter, configuring the fixed time of the timer of the system to change the signal overturn of the port of the microprocessor, and judging whether the function of the timer or the counter is normal or not by the main control module by calculating the overturn time of the port of the microprocessor;
step 8, MMC interface test, in the MMC external access SRAM chip of the microprocessor tested, regularly write the external SRAM data of MMC and regularly use MMC interface to read the data in the external SRAM, compare and judge MMC interface function through reading the data and writing in the data;
step 9, SPI interface test, namely establishing an SPI interface communication protocol on the main control module and enabling the tested microprocessor to communicate with each other through SPI, and comparing the written data with the looping data of the microprocessor to test whether the SPI interface function is normal or not;
step 10, IIC interface test, which is to establish an IIC interface communication protocol on a main control module and communicate with a microprocessor to be tested through IIC, and compare the written data with the looped data of the microprocessor to test whether the IIC interface function is normal or not;
and step 11, testing the CAN interface, namely establishing a CAN interface communication protocol on the main control module, carrying out CAN communication on the main control module and the tested microprocessor, and comparing the written data with the microprocessor loop-back data to test whether the CAN interface function is normal or not.
4. A robotic microprocessor radiation resistance evaluation system, the system comprising: the upper computer system and the lower computer system which are in communication connection with each other, wherein the lower computer system comprises: the device comprises a main control module, a digital-to-analog conversion module, a current monitoring module, a power supply module and a communication module;
in the lower computer system, the main control module is respectively in communication connection with the tested microprocessor, the digital-to-analog conversion module, the current monitoring module and the communication module, the digital-to-analog conversion module and the current monitoring module are respectively in communication connection with the tested microprocessor, the lower computer system is used for realizing the method according to any one of claims 1 to 3, and the power supply module is used for supplying power to the lower computer system.
CN202311812667.7A 2023-12-26 2023-12-26 System and method for evaluating radiation resistance of robot microprocessor Pending CN117851145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311812667.7A CN117851145A (en) 2023-12-26 2023-12-26 System and method for evaluating radiation resistance of robot microprocessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311812667.7A CN117851145A (en) 2023-12-26 2023-12-26 System and method for evaluating radiation resistance of robot microprocessor

Publications (1)

Publication Number Publication Date
CN117851145A true CN117851145A (en) 2024-04-09

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Country Status (1)

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