CN117827558A - Electronic equipment - Google Patents

Abstract

The application provides electronic equipment, and relates to the technical field of electronic products. An electronic device includes: a circuit board, a peripheral device, and a connector; the connector comprises a first plug connector and a second plug connector which are mutually plug-in matched, the first plug connector comprises a first pin and a second pin, the first pin is connected with a detection pin of the processor, and the second pin is connected with a grounding point; the second plug connector comprises a third pin which is in butt joint with the first pin and a fourth pin which is in butt joint with the second pin, and the third pin is in short circuit with the fourth pin to form a detection circuit from the detection pin to the grounding point; the processor determines whether the connection between the peripheral device and the circuit board is abnormal or not through a detection result of the detection by the detection circuit. The processor can detect the detection circuit through the detection pin to determine whether the connection between the peripheral device and the circuit board is abnormal, so that whether the connection between the peripheral device and the circuit board is normal can be detected under the condition that the hardware state of the electronic device is not damaged.

Description

Electronic equipment

The application is a divisional application of China patent application with the application name of 'an electronic device' which is filed on 18 th 08 th 2022 and is provided with the application number of 202210992324.2.

Technical Field

The application relates to the technical field of electronic products, in particular to electronic equipment.

Background

Currently, there are more and more peripheral devices in electronic devices, which are electrically connected to a circuit board in the electronic device. During the use of the electronic device, when the peripheral device fails, the related functions of the electronic device cannot be used. When the connection between the peripheral equipment and the circuit board is abnormal, the peripheral equipment can be caused to be faulty; peripheral failure may also result when an abnormality occurs in the peripheral itself. When the peripheral device is in fault, whether the connection between the peripheral device and the circuit board is normal or not needs to be detected, so that the reason for the fault of the peripheral device is caused by abnormal connection between the peripheral device and the circuit board or caused by the abnormality of the peripheral device.

However, in the electronic device after the completion of the installation, the connection between the peripheral device and the circuit board cannot be checked without damaging the hardware state of the electronic device, so that whether the connection between the peripheral device and the circuit board is normal cannot be determined, and therefore, when the peripheral device fails, the failure cause cannot be checked. Therefore, a detection method is needed to detect whether the connection between the peripheral device and the circuit board is normal without destroying the hardware state of the electronic device.

Disclosure of Invention

The application provides an electronic device, two pins through the short circuit in the connector constitute the detection circuitry between the detection pin to the ground point of follow treater, through the detection to detection circuitry, can detect whether connect unusual between peripheral equipment and the circuit board under the condition that does not destroy electronic device's hardware state.

In a first aspect, an electronic device is provided that includes a circuit board, a peripheral device, and a connector; the connector comprises a first plug connector and a second plug connector which are mutually matched in a plug manner, the first plug connector is arranged on the circuit board, and the second plug connector is connected with the peripheral equipment; the circuit board is provided with a processor, the first plug connector comprises a first pin and a second pin, the first pin is connected with a detection pin of the processor, and the second pin is connected with a grounding point on the circuit board; the second plug connector comprises a third pin which is in butt joint with the first pin and a fourth pin which is in butt joint with the second pin, and the third pin is in short circuit with the fourth pin.

According to the embodiment of the application, the first pin and the second pin are arranged in the first plug connector of the connector, the third pin of the first pin and the fourth pin of the second pin are in butt joint in the second plug connector, the first pin is connected with the detection pin of the processor, and the second pin is connected with the grounding point on the circuit board so as to form a detection circuit from the detection pin to the grounding point. The processor can detect the detection circuit through the detection pin, and determine whether the connection between the peripheral equipment and the circuit board is abnormal according to the detection result, so that whether the connection between the peripheral equipment and the circuit board is normal can be detected under the condition that the hardware state of the electronic equipment is not damaged.

Optionally, the electronic device includes a plurality of peripheral devices, and the connector corresponds to each peripheral device; the first pins and the second pins in the connectors are sequentially connected in series between the detection pins and the grounding point.

According to the embodiment of the application, the connectors respectively corresponding to the plurality of peripheral devices are connected in series through the first pins and the second pins, so that a detection circuit corresponding to the plurality of peripheral devices can be formed, and the processor can detect the connection between the plurality of peripheral devices and the circuit board through the detection pin. When the electronic device comprises a large number of peripheral devices and each peripheral device is required to be failed, a plurality of peripheral devices can share the same detection pin, and each peripheral device is not required to be provided with a separate detection pin, so that the pin usage of the processor can be reduced.

Optionally, the electronic device includes a plurality of peripheral devices, and the connector corresponds to each peripheral device; the detection pin is an analog pin, and the analog pin is connected with a power supply on the circuit board through a pull-up resistor element; the first pins of the connectors are connected in parallel with the analog pins, and the second pins of the connectors are connected with the grounding point through corresponding pull-down resistor elements.

In this embodiment of the present application, a first pin in a connector corresponding to each of a plurality of peripheral devices is connected in parallel to the same detection pin, and a second pin in each connector is connected to a ground point through a pull-down resistor element, so as to form a detection circuit corresponding to each peripheral device, so that a processor can detect connection between each of the plurality of peripheral devices and a circuit board through one detection pin. When the electronic device comprises a large number of peripheral devices and each peripheral device is required to be failed, a plurality of peripheral devices can share the same detection pin, and each peripheral device is not required to be provided with a separate detection pin, so that the pin usage of the processor can be reduced.

Optionally, the second pins in the connectors are respectively connected to the ground point through the pull-down resistor elements with different resistance values; when the actual voltage is higher than the voltage threshold, the processor determines a target reference voltage matched with the actual voltage from a plurality of reference voltages, and determines that the connection between a target peripheral device corresponding to the target reference voltage and the circuit board is abnormal; the target reference voltage comprises the voltage of the analog pin when the connection between the target peripheral equipment and the circuit board is abnormal and the connection between other peripheral equipment and the circuit board is normal.

In this embodiment of the present application, when the detection pin is an analog pin, the second pin in the plurality of connectors is connected to the ground point through pull-down resistors with different resistance values, the processor may determine, according to an actual voltage of the analog pin, a target peripheral device connected abnormally between the plurality of peripheral devices and the processor, and while reducing a pin usage amount of the processor, may determine, from the plurality of peripheral devices, a peripheral device connected abnormally between the peripheral device and the circuit board, so as to accurately eliminate a failure cause of the peripheral device.

Optionally, the detection pin is an analog pin, the analog pin is connected with a power supply on the circuit board through a pull-up resistor element, and the second pin is connected with the grounding point through a pull-down resistor element.

Optionally, the first pin and the third pin are disposed at one end of the connector, and the second pin and the fourth pin are disposed at the other end of the connector.

Optionally, the first pin and the third pin are disposed diagonally to the second pin and the fourth pin.

In this embodiment of the application, a pair of pins that constitutes first pin and third pin sets up the one end at the connector, and another pair of pin that constitutes second pin and fourth pin sets up oblique diagonal angle, in the testing process, if detect and confirm that detection circuit switches on, then can confirm that both ends and control both ends all contact normally about the connector. When the fault cause is checked, the contact condition of the left end and the right end of the connector and the contact condition of the upper end and the lower end of the connector can be detected simultaneously. When the peripheral equipment is in fault and the detection circuit is conducted, fault reasons of abnormal contact of the left end and the right end of the connector and abnormal contact of the upper end and the lower end of the connector can be eliminated.

Optionally, the peripheral device is connected with the second plug connector through a flexible circuit board, and a plurality of leads are arranged on the flexible circuit board; the third pin and the fourth pin are in short circuit through a short circuit wire, the short circuit wire surrounds the plurality of leads, and the short circuit wire is arranged on the flexible circuit board.

In this embodiment, when the peripheral device fails, if the detection circuit is determined to be turned on, the connection between the peripheral device and the circuit board is normal, so that not only can the contact between the left and right ends of the connector be determined to be normal, but also the left side and the right side of the flexible circuit board can be determined to be not torn. The fault reasons of left tearing and right tearing of the flexible circuit board can be eliminated while the fault reasons of abnormal contact between the upper end and the lower end and the abnormal contact between the left end and the right end of the peripheral equipment are eliminated.

Optionally, the peripheral device is connected with the second plug connector through a flexible circuit board, and a plurality of leads are arranged on the flexible circuit board;

the third pin and the fourth pin are in short circuit through a short circuit wire, and the short circuit wire is arranged on the flexible circuit board and extends from one side of the plurality of leads to the peripheral equipment.

Optionally, the third pin and the fourth pin are shorted by a shorting wire, and the shorting wire is disposed on the second plug connector.

Optionally, the detection pin is a general purpose input output pin or an analog pin.

Optionally, a plurality of the peripheral devices are functionally identical peripheral devices.

Optionally, the detection pin is connected with a power supply on the circuit board through a pull-up resistor element.

Optionally, the connector is a board-to-board connector or a zero insertion force connector.

Optionally, the circuit board is a motherboard, a sub-board or a small board.

Drawings

Fig. 1 is a schematic block diagram of the inside of an electronic device in the related art.

Fig. 2 is an exploded view of the inside of an electronic device in the related art.

Fig. 3 is a schematic overall structure of an electronic device according to an embodiment of the present application.

Fig. 4 is a schematic block diagram of an electronic device according to an embodiment of the present application.

Fig. 5 is an exploded view of an electronic device according to an embodiment of the present application.

Fig. 6 is a schematic diagram of a detection flow provided in an embodiment of the present application.

Fig. 7 is an exploded view of the interior of yet another electronic device provided in an embodiment of the present application.

Fig. 8 is an exploded view of the interior of yet another electronic device provided in an embodiment of the present application.

Fig. 9 is an exploded view of the interior of yet another electronic device provided in an embodiment of the present application.

Fig. 10 is an exploded view of the interior of yet another electronic device provided in an embodiment of the present application.

Fig. 11 is an exploded view of the interior of yet another electronic device provided in an embodiment of the present application.

Fig. 12 is a schematic block diagram of the interior of yet another electronic device provided by an embodiment of the present application.

Fig. 13 is a schematic block diagram of the interior of yet another electronic device provided by an embodiment of the present application.

Fig. 14 is a schematic block diagram of the interior of yet another electronic device provided by an embodiment of the present application.

Fig. 15 is a schematic circuit diagram provided in an embodiment of the present application.

Fig. 16 is a schematic diagram of another detection flow provided in an embodiment of the present application.

Reference numerals:

1. a circuit board; 11. a grounding point; 12. a power supply; 13. pull up the resistive element; 14. pull down the resistive element; 2. a peripheral device; 3. a connector; 31. a first plug member; 311. a first pin, 312, a second pin; 32. a second plug member; 321. a third pin; 322. a fourth pin; 323. a shorting bar; 4. a processor; 5. a flexible circuit board; 51. and (5) a lead wire.

Detailed Description

Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.

In the description of the present application, it should be understood that the terms "first," "second," and "second" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or an implicit indication of the number of technical features being indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

In the description of the present application, it should be understood that the terms "upper," "lower," "side," "front," "rear," and the like indicate an orientation or positional relationship based on installation, and are merely for convenience of description of the present application and to simplify the description, rather than to indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.

In the description of the present application, it should be noted that the term "and/or" is merely an association relationship describing an association object, and indicates that three relationships may exist, for example, a and/or B may indicate: a exists alone, A and B exist together, and B exists alone.

It should be further noted that, in the embodiments of the present application, the same reference numerals denote the same components or the same parts, and for the same parts in the embodiments of the present application, reference numerals may be given to only one of the parts or the parts in the drawings by way of example, and it is understood that, the reference numerals are equally applicable to other same parts or parts.

With the development of science and technology and the progress of economy, electronic devices such as mobile phones, tablet computers, notebook computers, handheld computers, wearable devices, virtual reality devices and the like are rapidly popularized, so that the development of society is greatly promoted, and the life of people is facilitated. Electronic devices typically include a housing, and various electronic components located within the housing, such as, but not limited to, a circuit board (PCB), a processor, a battery, a camera, a flash, a microphone, a speaker, and the like, disposed on the circuit board.

Among the various electronic components in the electronic device, electronic components disposed on a circuit board, and peripheral devices (peripheral) disposed on the periphery of the circuit board are included. The peripheral devices are typically connected to the circuit board by a connector comprising two mating connectors, one being a plug and the other being a socket, each connector comprising a plurality of pins. One of the connectors is mounted on the circuit board, the other connector is connected with the peripheral device, the connector arranged on the circuit board can be called a first connector, and the connector connected with the peripheral device can be called a second connector.

Fig. 1 is a schematic block diagram of the inside of an electronic device in the related art, and fig. 2 is an exploded schematic diagram of the inside of an electronic device in the related art, including a circuit board 1, a peripheral device 2, and a connector 3, on which the processor 4 is provided on the circuit board 1. The connector 3 includes a first connector 31 and a second connector 32, the first connector 31 being mounted on the circuit board 1, the second connector 32 being connected to the peripheral device 2 through the flexible circuit board 5. The flexible circuit board 5 is printed with a plurality of leads, one end of each of which is connected to one pin of the second connector 32 and the other end is connected to the peripheral device 2. The rectangular box 310 in the first connector 31 represents the pins in the first connector 31, the rectangular box 320 in the second connector 32 represents the pins in the second connector 32, the two pins connected by the dashed line 61 represent the two pins butted in the first connector 31 and the second connector 32, and when the first connector 31 and the second connector 32 are mutually plugged and matched to form the connector 3, the two pins butted in the first connector 31 and the second connector 32 are in contact connection so as to realize the electrical connection between the peripheral device 2 and the circuit board 3.

In the installation process of electronic equipment, two connectors of the connector are buckled manually, and the situation that the connectors are not buckled in place possibly exists during manual buckling, so that the two connectors are in abnormal contact, namely the connector is in abnormal contact. In addition, during the use of the electronic device, when the electronic device is subjected to vibration or other external forces, the two connectors may be loosened, so that the connector is in abnormal contact. When the contact of the connector is abnormal, two pins which are butted in the two plug connectors cannot be in contact connection, so that the peripheral equipment cannot be normally connected with the circuit board, and the peripheral equipment can be damaged. In practical applications, peripheral equipment also causes faults when the peripheral equipment is abnormal due to its own quality factors or other factors.

After the installation of the electronic device is completed, when the peripheral device fails, the peripheral device and the connector cannot be checked without destroying the hardware state of the electronic device, so that whether the failure cause is caused by the abnormality of the peripheral device itself or the connection abnormality between the peripheral device and the circuit board cannot be determined. Therefore, in the event of a peripheral device failure, it is necessary to detect whether or not the connection between the peripheral device and the circuit board is abnormal, and when the detection determines that the connection between the peripheral device and the circuit board is abnormal, it can be determined with a high probability that the failure of the peripheral device is caused by the connection between the peripheral device and the circuit board. In contrast, when the detection determines that the connection between the peripheral device and the circuit board is normal, the cause of the failure of the connection between the peripheral device and the circuit board can be eliminated, and the failure of the peripheral device is determined to be caused by the occurrence of the abnormality of the peripheral device itself. Therefore, there is a need for a detection method that can detect whether a connection between a peripheral device and a circuit board is normal without destroying the hardware state of the electronic device, so as to check the cause of the failure when the peripheral device fails.

In view of this, an embodiment of the present application provides an electronic device, including a circuit board, a peripheral device, and a connector, where the circuit board is provided with a processor. The pins in the connector form a detection circuit from the detection pin of the processor to the grounding point, one end of the detection circuit is connected with the detection pin, and the other end of the detection circuit is connected with the grounding point. The processor can detect the on-off of the detection circuit through the detection pin, and judge whether the connection between the peripheral equipment and the circuit board is abnormal according to the on-off of the detection circuit, so that the processor can detect whether the connection between the peripheral equipment and the circuit board is abnormal under the condition that the hardware state of the electronic equipment is not damaged.

Optionally, the electronic device provided in the embodiment of the present application may be an electronic device such as a mobile phone, a tablet computer, a notebook computer, a handheld computer, a wearable device, a virtual reality device, but is not limited thereto.

Fig. 3 is a schematic diagram of the overall structure of an electronic device according to an embodiment of the present application, where the electronic device includes a housing 7 and a display screen 8, and the display screen 8 is mounted on the housing 7. The housing 7 configures the outer shape of the electronic device, and the housing 7 may be a metal housing such as a metal of magnesium alloy, aluminum alloy, stainless steel, or the like. In addition, a plastic case, a glass case, a ceramic case, etc. may be used, but is not limited thereto.

As shown in fig. 3, the housing 7 includes a frame 71 and a rear cover 72, the rear cover 72 is fixedly connected to a rear end surface of the frame 71, and the display screen 8 is fixedly connected to a front end surface of the frame 71. A middle frame (not shown in the figure) is further arranged in the shell 7, the middle frame is connected with the frame 71, the display screen 8 is fixedly attached to the front side surface of the middle frame, an installation cavity is formed between the rear side surface of the middle frame and the rear cover 72, and a circuit board, a processor arranged on the circuit board, a storage battery, a camera, a flash lamp, a microphone, a loudspeaker and other various electronic elements are installed in the installation cavity, but the invention is not limited thereto.

The circuit board is also called a circuit board, a printed circuit board or a printed circuit board, and the like, is a basic carrier for electrically connecting electronic components, and has the main functions of supporting the electronic components and interconnecting the electronic components. The circuit boards are generally composed of single-panel, double-panel and multi-layer boards, divided by the number of layers. The wiring boards are further classified into flexible circuit boards (flexible printed circuit, FPC), rigid circuit boards (hard boards) and rigid-flex boards according to whether or not they can be bent and deformed. A flexible circuit board is a printed circuit board made of a flexible insulating substrate (e.g., polyimide or mylar), also commonly referred to as a flexible circuit board or flex. The flexible circuit board can be freely bent, rolled and folded and can be arranged randomly according to the space layout requirement, so that the integration of component assembly and wire connection is achieved.

Taking a mobile phone as an example, the circuit board includes a main board and a small board, and the main board and the small board are disposed between the middle frame and the rear cover 72. A System on Chip (SoC) and a power management Chip are disposed on the motherboard, and a processor may be disposed in the System on Chip. The small board can be provided with an LED lamp, a loudspeaker, a microphone, a universal serial bus (universal serial bus, USB) interface and the like, and can be electrically connected with the main board through an FPC. When the mobile phone is a folding mobile phone, the circuit board further comprises an auxiliary board, the main board is arranged between the middle frame and the rear cover corresponding to one display screen, the auxiliary board is arranged between the middle frame and the rear cover corresponding to the other display screen, and the main board is connected with the auxiliary board through a connector.

Processors may include, but are not limited to, central processing units (Central Processing Unit, CPU), application processing units (application processor, AP), modem processing units, graphics processing units (graphics processingunit, GPU), image signal processing units (image signal processor, ISP), controllers, video codecs, digital signal processing units (digital signal processor, DSP), baseband processing units, and/or neural network processing units (neural-network processing unit, NPU).

The peripheral devices such as the display 8 shown in fig. 3, the fingerprint module 721 and the camera 722 are disposed on the rear cover 72, but not limited thereto. Peripheral devices are typically connected To the circuit Board by connectors such as zero insertion force (zero insertion force, ZIF) connectors and Board To Board (BTB) connectors.

Illustratively, fig. 4 is a schematic block diagram of an electronic device provided in an embodiment of the present application, and fig. 5 is an exploded schematic view of an electronic device provided in an embodiment of the present application, where the electronic device includes a circuit board 1, a peripheral device 2, and a connector 3; the connector 3 comprises a first plug connector 31 and a second plug connector 32 which are matched with each other in a plug manner, the first plug connector 31 is arranged on the circuit board 1, and the second plug connector 32 is connected with the peripheral equipment 2; the circuit board 1 is provided with a processor 4, the first plug connector 31 comprises a first pin 311 and a second pin 312, the first pin 311 is connected with a detection pin of the processor 4, and the second pin 312 is connected with a grounding point 11 on the circuit board 1; the second connector 32 includes a third pin 321 abutting the first pin 311, and a fourth pin 322 abutting the second pin 312, the third pin 321 being shorted to the fourth pin 322.

Wherein, since the first pin 311 is connected with the detection pin, the second pin 312 is connected with the grounding point, and the third pin 321 is short-circuited with the fourth pin 322, a detection circuit from the detection pin to the grounding point 11 can be formed; the processor 4 may determine whether the connection between the peripheral device and the circuit board is abnormal by detecting the detection circuit and based on the detection result.

Optionally, the circuit board provided in the embodiments of the present application may be a motherboard or a small board, and when the electronic device is a foldable electronic device (such as a mobile phone), the circuit board may also be a secondary board. The circuit board may include, but is not limited to, the motherboard, the small board, and the sub-board in the examples described above.

Alternatively, the connector provided in the embodiments of the present application may be a BTB connector or a ZIF connector, but is not limited thereto.

Optionally, the peripheral device provided in the embodiment of the present application may be a display screen, a camera, a fingerprint module, a motherboard, a small board, or a sub-board of an electronic device, and so on.

Illustratively, the third pin 321 and the fourth pin 322 may be shorted by a shorting wire 323, and the shorting wire 323 may be disposed on the second connector 32. The first connector 31 further includes other pins except for the first pin 311 and the second pin 312, and the other pins are the same as the pin 310 shown in fig. 2; the second connector 32 further includes other pins except for the third pin 321 and the fourth pin 322, and the other pins are the same as the pins 320 shown in fig. 2.

In this embodiment, the first pin 311 is abutted against the third pin 321, the second pin 312 is abutted against the fourth pin 322, and since the third pin 321 and the fourth pin 322 are shorted, a detection circuit can be formed from the detection pin of the processor 4, which passes through the abutted first pin 311 and the third pin 321, then passes through the abutted second pin 312 and the fourth pin 322, and finally reaches the grounding point 11. One end of the detection circuit is a detection pin, the other end is a grounding point, and the middle is connected with the first pin 311 and the third pin 321 in series, and is connected with the second pin 312 and the fourth pin 322 in series.

When the contact of the connector 3 is normal, the first pin 311 is in contact connection with the third pin 321, the second pin 312 is in contact connection with the fourth pin 322, and the other pins except the first pin 311 and the second pin 312 in the first socket 31 are respectively in contact connection with the corresponding one of the second socket 32. At this time, normal connection between the peripheral device 2 and the circuit board 1 can be achieved, and the detection circuit is in a conductive state. In fig. 5, a broken line 62 indicates that the first pin 311 is in contact with the third pin 321, and a broken line 63 indicates that the second pin 312 is in contact with the fourth pin 322.

In contrast, when the contact of the connector 3 is abnormal, the contact connection between the first pin 311 and the third pin 321 is broken, the contact connection between the second pin 312 and the fourth pin 322 is broken, the detection circuit is in the broken state, and the contact connection between the other corresponding two pins in the first connector 31 and the second connector 32 is also broken, and the connection between the peripheral device 2 and the circuit board 1 is abnormal.

Alternatively, the detection pin may be one of a plurality of General-purpose input/output (GPIO) pins of the processor. When the connector 3 contacts normally, the detection circuit is turned on, so that the detection pin is in short circuit connection with the grounding point 11, and the grounding point 11 can pull down the voltage of the detection pin to a low level. When the contact of the connector 3 is abnormal, the contact connection between the first pin 311 and the third pin 321 is disconnected, the contact connection between the second pin 312 and the fourth pin 322 is disconnected, or the connection between the first pin 311 and the third pin 321 is disconnected, and the contact connection between the second pin 312 and the fourth pin 322 is disconnected, at this time, the detection circuit is in a disconnected state, the connection between the detection pin and the ground point 11 is disconnected, the detection pin is in a suspended state, and the voltage of the detection pin is at a high level or no voltage.

Therefore, the processor can judge that the detection circuit is in a conducting state or a disconnecting state according to the voltage of the detection pin, and when the detection circuit is in the conducting state, the connector 3 can be determined to be normally contacted, and then the connection between the peripheral equipment 2 and the circuit board 1 can be determined to be normal. In contrast, when the detection circuit is in the off state, it is possible to determine that the connector 3 is in contact with an abnormality, and thus it is possible to determine that the connection between the peripheral device 2 and the circuit board 1 is abnormal. Specifically, when the processor 4 detects that the voltage of the detection pin is at a low level, it can be determined that the detection circuit is turned on, and the peripheral device 2 is normally connected with the circuit board 1; when the processor 4 detects that the voltage of the detection pin is high level, it can be determined that the detection circuit is open, and the connection between the peripheral device 2 and the circuit board 1 is abnormal.

When the detection circuit is turned on, a current flows from the detection pin to the ground point 11, and when the detection circuit is turned off, no current flows from the detection pin to the ground point 11. Therefore, the processor 4 can acquire the current of the detection pin, and when the current of the detection pin is output or input, the conduction of the detection circuit can be determined, and the connection between the peripheral equipment 2 and the circuit board 1 is normal; when the detection pin has no current output or input, the detection circuit is determined to be disconnected, and the connection between the peripheral device 2 and the circuit board 1 is abnormal.

As shown in fig. 6, fig. 6 is a schematic diagram of a detection flow provided in the embodiment of the present application, after the detection is started, the processor first executes step 601 to control the detection pin to output a high voltage, and pulls up the voltage of the detection pin to a high level. At this time, if the detection circuit is turned on, the grounding point 11 is shorted with the detection pin, and the grounding point 11 will pull down the voltage of the detection pin to a low level; if the detection circuit is disconnected, the voltage of the detection pin is kept at a high level. The processor 601 performs step 602 after pulling the voltage of the sense pin high.

In step 602, the processor 4 reads the voltage of the detection pin and determines the voltage of the detection pin. If the voltage of the detection pin is at the low level, it is determined that the detection circuit is turned on, step 604 is performed, and if the voltage of the detection pin is at the high level, step 603 is performed.

In step 603, the processor determines that the connection between the peripheral device 2 and the circuit board 1 is abnormal, obtains a detection result of the connection abnormality between the peripheral device 2 and the circuit board 1 once, and then performs step 605.

In step 605, it is determined whether the number of times is greater than N. When the detection circuit is detected to be open N times, a detection result of the abnormality of the connection between the peripheral device 2 and the circuit board 1 is obtained, step 606 is executed. Conversely, when the number of times is smaller than N, the processor 1 returns to step 602, and loops through steps 602 to 605.

In step 606, the processor determines that the connection between the peripheral device 2 and the circuit board 1 is abnormal N times, and obtains a detection result of the connection between the peripheral device 2 and the circuit board 1.

In step 604, the processor determines that the detection circuit is turned on, and obtains a detection result that the connection between the peripheral device 2 and the circuit board 1 is normal.

After executing step 606 or step 604, the processor 4 executes step 607, ending the detection.

After the detection is finished, the processor 4 executes step 608 to report the detection result. For example, the processor 4 may report the detection result to an Application (APP) installed in the electronic device, and the application controls the electronic device to output the detection result to notify the user of the detection result. Specific ways of reporting the test results may include, but are not limited to, the examples described above.

When the detection circuit is turned on, the voltage of the detection pin may temporarily generate a high level due to jitter, and when the connection between the peripheral device and the circuit board is determined to be abnormal N times in steps 602 to 605, a result of the connection abnormality between the peripheral device 5 and the circuit board 1 is obtained, so that erroneous judgment can be avoided, and erroneous detection results can be avoided. N is a positive integer, for example, 3, and the specific value of N can be determined according to the requirement, which is not limited in this embodiment.

In practical applications, the processor may implement the detection flow shown in fig. 6 when determining the peripheral device fault, to determine whether the connection between the peripheral device and the circuit board is abnormal, or may implement the detection flow shown in fig. 6 when starting the electronic device, to determine whether the connection between the peripheral device and the circuit board is abnormal. When the peripheral device fails, if it is determined that the connection between the peripheral device and the circuit board is abnormal, it can be determined that the cause of the failure of the peripheral device is most likely caused by the connection between the peripheral device and the circuit board. On the contrary, when the peripheral equipment fails, if the connection between the peripheral equipment and the circuit board is determined to be normal, the connector can be determined to be in normal contact, the failure cause of abnormal connection between the peripheral equipment and the circuit board can be eliminated, and the failure cause of the peripheral equipment is determined to be possible to be abnormal.

It should be noted that, the processor may also implement the detection flow shown in fig. 6 in other scenarios to determine whether the connection between the peripheral device and the circuit board is abnormal, which is not limited in this embodiment.

Alternatively, the detection pin may be connected to the power supply 12 on the circuit board 1 through the pull-up resistor element 13, and the voltage of the detection pin may be pulled up to a high level through the pull-up resistor element 13, so that the processor 4 is not required to pull up the voltage of the detection pin when detecting the detection circuit.

Fig. 7 is an exploded schematic view of still another electronic device according to an embodiment of the present application, where the pull-up resistor 13 may be a resistor or an electronic device with a resistive characteristic. Taking a resistor as an example, one end of the pull-up resistor element 13 is connected to the detection pin, and the other end is connected to the power supply 12 on the circuit board 1. After the electronic device is powered up, the pull-up resistor element 13 may pull the voltage of the sense pin high. If the connector 3 contacts normally, the detection circuit is conducted, and the voltage of the detection pin is pulled down to be low level by the grounding point 11; if the contact of the connector 3 is abnormal, the detection circuit is disconnected, and the voltage of the detection pin is pulled up to a high level by the pull-up resistor element 13. As shown in fig. 6, since the pull-up resistor 13 can pull up the voltage of the detection pin to a high level, the processor 4 may directly perform step 602 without performing step 601 during detection.

In one embodiment, when the pull-up resistor 13 is set to pull up the voltage of the detection pin, the processor 4 may continuously monitor the voltage of the detection pin, and if it is monitored that the detection pin has a rising edge from a low level to a high level, the detection circuit is switched from a conducting state to a disconnecting state, it may be determined that the detection circuit is disconnected, the connector is normally changed from contact to abnormal contact, and the connection between the peripheral device and the circuit board is abnormal.

Alternatively, the first pin 311 and the third pin 321 are disposed at one end of the connector 3, and the second pin 312 and the fourth pin 322 are disposed at the other end of the connector 3.

In one embodiment, the first pin 311 and the third pin 321 may be disposed at one end of the connector 3, and the second pin 312 and the fourth pin 322 may be disposed at the other end of the connector 3. For example, the first pin 311 and the third pin 321 may be disposed at the left end of the connector 3, and the second pin 312 and the fourth pin 322 may be disposed at the right end of the connector 3. Alternatively, the first pin 311 and the third pin 321 may be provided at the upper end of the connector 3, and the second pin 312 and the fourth pin 322 may be provided at the lower end of the connector 3.

As shown in fig. 8, fig. 8 is an exploded schematic view of the inside of another electronic device provided in the embodiment of the present application, where the first connector 31 includes two rows of pins disposed opposite to each other from top to bottom, the first pin 311 is located at the left end of the upper row of pins, and the second pin 312 is located at the right end of the upper row of pins. The second plug connector 32 includes two rows of pins that are disposed up and down oppositely, the third pin 321 is disposed at the left end of the upper row of pins, and the fourth pin 322 is disposed at the right end of the upper row of pins, so that the first pin 311 and the third pin 321 are disposed at the left end of the connector 3, and the second pin 312 and the fourth pin 322 are disposed at the right end of the connector 3. The first pin 311 and the third pin 321 may be located at the left end of the lower row pins, and the second pin 312 and the fourth pin 322 may be located at the right end of the lower row pins.

As shown in fig. 8, when the left end contact of the connector 3 is abnormal, a part of pins at the left ends of the first connector 31 and the second connector 32 cannot be connected in a contact manner; when the right end contact of the connector 3 is abnormal, part of pins at the right ends of the first plug connector 31 and the second plug connector 32 cannot be in contact connection; either the contact abnormality of the left end or the contact abnormality of the right end of the connector 3 causes the connection abnormality between the peripheral device 2 and the circuit board 1.

Fig. 9 is an exploded schematic view of the inside of another electronic device according to the embodiment of the present application, where the first connector 31 includes two rows of pins disposed opposite to each other, the first pin 311 is located in the upper row of pins, and the second pin 312 is located in the lower row of pins. The second plug connector 32 includes two rows of pins arranged vertically opposite to each other, the third pin 321 is located in the upper row of pins, and the fourth pin 322 is located in the lower row of pins, so that the first pin 311 and the third pin 321 are arranged at the upper end of the connector 3, and the second pin 312 and the fourth pin 322 are arranged at the lower end of the connector 3. The first pin 311 and the third pin 321 may be located at the lower end of the connector 3, and the second pin 312 and the fourth pin 322 may be located at the upper end of the connector 3.

It should be noted that, the first connector 31 may include one or more rows of pins, the second connector 32 may also include one or more rows of pins, each row of pins includes a plurality of pins disposed in sequence, and each row of pins may be arranged laterally as shown in fig. 8 and 9, or may be arranged longitudinally. The first pins 311 and the second pins 312 may be disposed in the same row of pins, may be disposed in different rows of pins, or may be disposed at different positions with other pins in the first connector 31, and only need to be disposed at two ends of the connector 3. Similarly, the third pin 321 and the fourth pin 322 may be disposed in the same row of pins, or may be disposed in different rows of pins, or may be disposed in different positions with other pins in the second connector 32, and only need to be disposed at two ends of the connector 3.

As shown in fig. 9, when the upper end of the connector 3 is in contact with an abnormal state, a part of the pins at the upper ends of the first connector 31 and the second connector 32 cannot be in contact with each other, and when the lower end of the connector 3 is in contact with an abnormal state, a part of the pins at the lower ends of the first connector 31 and the second connector 32 cannot be in contact with each other, and the upper end of the connector 3 is in contact with an abnormal state or the lower end of the connector is in contact with the circuit board 1, which causes an abnormal connection between the peripheral device 2 and the circuit board 1.

In the connector 3 shown in fig. 8, the first pin 311 and the third pin 321 are disposed at the left end of the connector 3, the second pin 312 and the fourth pin 322 are disposed at the right end of the connector 3, and when the connector 3 contacts normally, the first pin 311 is in contact connection with the third pin 321, the second pin 312 is in contact connection with the fourth pin 322, and the detection circuit is turned on. Since the first pin 311 and the third pin 321 are located at the left end of the connector 3, when the left end contact of the connector 3 is abnormal, the first pin 311 and the third pin 321 are disconnected, and the detection circuit is disconnected; since the second pin 312 and the fourth pin 322 are located at the right end of the connector 3, when the right end contact of the connector 3 is abnormal, the second pin 312 and the fourth pin 322 are disconnected, and the detection circuit is disconnected.

Accordingly, when the peripheral device 2 fails, it is explained that the contact connection is maintained between the first pin 311 and the third pin 321 and the contact connection is maintained between the second pin 312 and the fourth pin 322 upon detection of the detection circuit conduction, and thus it can be determined that the left end contact of the connector 3 is normal and that the right end contact of the connector 3 is normal.

When one of the left end and the right end of the connector 3 is in abnormal contact, abnormal connection between the peripheral device 2 and the circuit board 1 is caused. When it is determined that the contact of the left end of the connector 3 is normal and the contact of the right end of the connector 3 is normal, it is explained that the connection between the peripheral device and the circuit board is normal with a high probability. When the peripheral device 2 fails, if the detection circuit is turned on, the failure causes of the contact abnormality at the left end and the contact abnormality at the right end of the connector 3 can be eliminated, and it is determined that the failure cause of the peripheral device 2 may be an abnormality of the peripheral device 2 itself or other causes. On the contrary, when the peripheral device 2 fails, if the disconnection of the detection circuit is detected, it is determined that the connection between the peripheral device 2 and the circuit board 1 is abnormal, and it may be determined that the failure cause of the peripheral device 2 is most likely that the contact of the left end and/or the contact of the right end of the connector 3 is abnormal.

In the connector 3 shown in fig. 9, the first pin 311 and the third pin 321 are disposed at the upper end of the connector 3, the second pin 312 and the fourth pin 322 are disposed at the lower end of the connector 3, and when the connector 3 contacts normally, the first pin 311 is in contact connection with the third pin 321, the second pin 312 is in contact connection with the fourth pin 322, and the detection circuit is turned on. Since the first pin 311 and the third pin 321 are located at the upper end of the connector 3, when the upper end of the connector 3 is abnormally contacted, the first pin 311 and the third pin 321 are disconnected, and the detection circuit may be disconnected. Since the second pin 312 and the fourth pin 322 are located at the lower end of the connector 3, when the contact of the lower end of the connector 3 is abnormal, the second pin 312 and the fourth pin 322 are disconnected, and the detection circuit is disconnected.

Accordingly, when the peripheral device 2 fails, it is explained that the contact connection is maintained between the first pin 311 and the third pin 321 and the contact connection is maintained between the second pin 312 and the fourth pin 322 upon detection of the detection circuit conduction, and thus it can be determined that the upper end contact of the connector 3 is normal and that the lower end contact of the connector 3 is normal.

When one end of the upper end or the lower end of the connector 3 is in abnormal contact, abnormal connection between the peripheral device 2 and the circuit board 1 is caused. When it is determined that the upper end contact of the connector 3 is normal and the lower end contact of the connector 3 is normal, it is explained that the connection between the peripheral device and the circuit board is normal with a high probability. When the peripheral device 2 fails, if the detection circuit is turned on, the failure causes of the contact abnormality at the left end and the contact abnormality at the right end of the connector 3 can be eliminated, and it is determined that the failure cause of the peripheral device 2 may be an abnormality of the peripheral device 2 itself or other causes. Conversely, when the peripheral device 2 fails, if the detection circuit is detected to be open, it may be determined that the connection between the peripheral device 2 and the circuit board 1 is abnormal, and it may be determined that the cause of the failure of the peripheral device 2 is a high probability that the upper end contact of the connector 3 is abnormal and/or the lower end contact is abnormal.

In this embodiment of the present application, a pair of pins including the first pin 311 and the third pin 321 is disposed at one end of the connector 3, and a pair of pins including the second pin 321 and the fourth pin 322 is disposed at the other end of the connector 3, in the detection process, if the detection circuit is determined to be turned on during the detection, both ends of the connector 3 may be determined to be in normal contact. When the fault reasons are checked, the contact conditions of the two ends of the connector 3 can be detected simultaneously, and when the peripheral equipment 2 is in fault and the detection circuit is conducted, the fault reasons of abnormal contact of the two ends of the connector 3 can be eliminated.

Optionally, the first pin 311 and the third pin 321 are disposed diagonally to the second pin 312 and the fourth pin 322.

In one embodiment, the first pin 311 and the third pin 321 may be disposed at diagonal angles of the second pin 321 and the fourth pin 322, and during the detection, whether the left and right ends of the connector 3 are in contact with each other or not and whether the upper and lower ends of the connector 3 are in contact with each other or not may be detected.

Illustratively, fig. 10 is an exploded schematic view of the interior of still another electronic device provided in an embodiment of the present application, where the peripheral device 2 is connected to the second connector 32 by the flexible circuit board 5, and a plurality of leads 51 are disposed on the flexible circuit board 5; the third pin 321 and the fourth pin 322 are shorted by a shorting stub 323, and the shorting stub 323 is disposed on the flexible circuit board 5 and extends from one side of the plurality of leads 51 to the peripheral device 2.

The first plug 31 includes two rows of pins disposed in a vertically opposite manner, the first pin 311 is disposed in the lower row of pins, the second pin 312 is disposed in the upper row of pins, and the first pin 311 is disposed diagonally to the second pin 312. Similarly, the second connector 32 includes two rows of pins arranged vertically opposite to each other, the third pin 321 is located in the lower row of pins, the fourth pin 322 is located in the upper row of pins, and the third pin 321 is disposed diagonally to the fourth pin 322. The position of the first pin 311 in the first connector 31 is the same as the position of the third pin 321 in the second connector 32, so that the first pin 311 and the third pin 321 correspond. The position of the second pin 312 in the first connector 31 is the same as the position of the fourth pin 322 in the second connector 32, such that the second pin 312 and the fourth pin 322 correspond. The pair of pins consisting of the first pin 311 and the third pin 321 is provided at the lower left corner of the connector 3, and the pair of pins consisting of the second pin 312 and the fourth pin 322 is provided at the upper right corner of the connector 3. In practical application, a pair of pins may be disposed at the upper left corner of the connector 3, and another pair of pins may be disposed at the lower right corner of the connector 3, and only one pair of pins may be disposed at the diagonal corner of the other pair of pins.

In the connector 3 shown in fig. 10, the first pin 311 and the third pin 321 are located at the lower left corner of the connector 3, the second pin 312 and the fourth pin 322 are located at the upper right corner of the connector 3, and when the connector 3 contacts normally, the first pin 311 is in contact connection with the third pin 321, the second pin 312 is in contact connection with the fourth pin 322, and the detection circuit is turned on. Since the first pin 311 and the third pin 321 are positioned at the lower left corner of the connector 3, when the lower end or the left end of the connector 3 is abnormally contacted, the first pin 311 and the third pin 321 are disconnected, and the detection circuit may be disconnected. Also, since the second pin 312 and the fourth pin 322 are positioned at the upper right corner of the connector 3, when the upper end or the right end of the connector 3 is abnormally contacted, the second pin 312 and the fourth pin 322 are disconnected, and the detection circuit is disconnected.

Therefore, when the peripheral device 2 fails, if the detection circuit is detected to be turned on, it is indicated that the contact connection between the first pin 311 and the third pin 321 is maintained, and the contact connection between the second pin 312 and the fourth pin 322 is maintained, so that it can be determined that the lower end of the connector 3 is normally contacted and the left end is normally contacted, and the upper end of the connector 3 is normally contacted and the right end is normally contacted.

When one end of the upper end, the lower end, the left end or the right end of the connector 3 is in abnormal contact, abnormal connection between the peripheral device 2 and the circuit board 1 is caused. When it is determined that the upper and lower ends of the connector 3 are in contact with normal, and the left and right ends of the connector 3 are in contact with normal, it is explained that the connection between the peripheral device and the circuit board is normal with a high probability. When the peripheral device 2 fails, if the detection circuit is turned on, the failure causes of the contact abnormality of the upper and lower ends and the contact abnormality of the left and right ends of the connector 3 can be eliminated, and it is determined that the failure cause of the peripheral device 2 may be an abnormality of the peripheral device 2 itself or other causes. Conversely, if the detection circuit is detected to be open, it is determined that the connection between the peripheral device 2 and the circuit board 1 is abnormal, it may be determined that the cause of the failure of the peripheral device 2 is one or more of an upper contact abnormality, a lower contact abnormality, a left contact abnormality, and a right contact abnormality of the connector 3 with a high probability.

In this embodiment of the present application, a pair of pins including the first pin 311 and the third pin 321 is disposed at one end of the connector 3, and another pair of pins including the second pin 312 and the fourth pin 322 is disposed diagonally, and in the detection process, if the detection circuit is determined to be turned on during the detection, it may be determined that the upper and lower ends and the left and right ends of the connector 3 are both in normal contact. In troubleshooting, the contact condition of the left and right ends and the contact condition of the upper and lower ends of the connector 3 can be detected simultaneously. When the peripheral equipment is in fault and the detection circuit is conducted, fault reasons of abnormal contact of the left end and the right end of the connector and abnormal contact of the upper end and the lower end of the connector can be eliminated.

As shown in fig. 10, the shorting stub 323 may be provided on the flexible circuit board 5, and the shorting stub 323 extends from the left side of the plurality of leads 51 to the peripheral device 2 and extends to the peripheral device 2, with a portion of the shorting stub 323 provided on the peripheral device 2. Wherein, a plurality of parallel leads 51 are printed on the flexible circuit board 5, the peripheral device 2 is connected with the second connector 32 through the leads 51, and then is connected with the circuit board 1, when the left side of the flexible circuit board 5 is torn, the leads 51 on the left side of the flexible circuit board 5 are broken, and thus abnormal connection between the peripheral device 2 and the circuit board 1 is caused.

In this embodiment, since the shorting stub 323 extends from the left side of the plurality of leads 51 to the peripheral device 2, when the left side of the flexible circuit board 5 tears, the shorting stub 323 breaks, and the connection between the third pin 321 and the fourth pin 322 breaks, which breaks the detection circuit. Conversely, if the left side of the flexible circuit board 5 is not torn, the third pin 321 and the fourth pin 322 remain shorted, and the detection circuit is turned on.

In the connector 3 shown in fig. 10, when the peripheral device 2 fails, if the detection is determined that the detection circuit is turned on, the connection between the peripheral device 2 and the circuit board 1 is normal, and it is possible to determine not only that the left and right ends of the connector 3 are in contact and the upper and lower ends are in contact, but also that the left side of the flexible circuit board 5 is not torn. The failure cause of tearing of the left side of the flexible circuit board 5 can be eliminated while the failure cause of the contact abnormality of the upper and lower ends and the contact abnormality of the left and right ends of the peripheral device 2 is eliminated.

It should be noted that the shorting stub may also extend from the right side of the plurality of leads to the peripheral device. The principle of the short contact extending from the right side of the plurality of leads to the peripheral device is the same as that of the left side, and the embodiment is not described herein.

As shown in connection with fig. 5, in the connector 3 shown in fig. 5, the shorting wire 323 may also extend from the left or right side of the plurality of leads 51 to the peripheral device 2. When the peripheral device 2 fails, if the detection determines that the connection between the peripheral device 2 and the circuit board 1 is normal, it can be determined that not only the connector 3 is in contact normally, but also that the left side of the flexible circuit board 5 is not torn or the right side is not torn. The failure cause of the left side or the tear of the flexible circuit board 5 can be eliminated while the failure cause of the contact abnormality of the connector 3 is eliminated.

As shown in connection with fig. 8, in the connector 3 shown in fig. 8, the shorting wire 323 may also extend from the left or right side of the plurality of leads 51 to the peripheral device 2. When the peripheral device 2 fails, if the detection determines that the connection between the peripheral device 2 and the circuit board 1 is normal, it can be determined that not only the left and right ends of the connector 3 are in contact normally, but also the left side or the right side of the flexible circuit board 5 is not torn. The failure cause of the left side tear or the right side tear of the flexible circuit board 5 can be eliminated while the failure cause of the contact abnormality of the left and right ends of the connector 3 is eliminated.

As shown in connection with fig. 9, in the connector 3 shown in fig. 9, the shorting wire 323 may also extend from the left or right side of the plurality of leads 51 to the peripheral device 2. When the peripheral device 2 fails, if the detection determines that the connection between the peripheral device 2 and the circuit board 1 is normal, it can be determined that not only the upper and lower ends of the connector 3 are in contact normally, but also the left side or the right side of the flexible circuit board 5 is not torn. The failure cause of tearing or tearing of the left side of the flexible circuit board 5 can be eliminated while the failure cause of abnormal contact of the upper and lower ends of the connector 3 is eliminated.

Alternatively, shorting stub 323 is routed around plurality of leads 51 on flexible circuit board 5.

In one embodiment, shorting stub 323 may be routed around plurality of leads 51 on flexible circuit board 5. Fig. 11 is an exploded view of the inside of still another electronic device provided in the embodiment of the present application, where the first pin 311 and the third pin 321 are disposed at the lower left corner of the connector 3, and the second pin 312 and the fourth pin 322 are disposed at the upper right corner of the connector 3. Meanwhile, the shorting stub 323 is printed on the flexible circuit board 5 and wound around the plurality of leads 51, and a portion of the shorting stub 323 is disposed in the peripheral device 2.

In this embodiment, since the shorting bars surround the plurality of leads 51, the shorting bars are formed on both sides of the plurality of leads 51, and when any one of the left and right sides of the flexible circuit board 2 is torn, the shorting bars 323 are broken, and the connection between the third pin 312 and the fourth pin 322 is broken, so that the detection circuit is disconnected. Conversely, if the left and right sides of the flexible circuit board 5 are not torn, the third pin 312 and the fourth pin 322 remain shorted and the detection circuit is turned on.

In the connector 3 shown in fig. 11, when the peripheral device 2 fails, if the detection determines that the detection circuit is turned on, the connection between the peripheral device 2 and the circuit board 1 is normal, it can be determined that not only the left and right ends of the connector 3 are in contact with each other and the upper and lower ends are in contact with each other, but also the left side and right side of the flexible circuit board 5 are not torn. The failure causes of the left side tear and the right side tear of the flexible circuit board 5 can be eliminated while the failure causes of the contact abnormality of the upper and lower ends and the contact abnormality of the left and right ends of the peripheral device 2 are eliminated.

As shown in fig. 5 in combination with the connector 3 shown in fig. 5, the shorting stub 323 may also be provided on the flexible circuit board 5 around the plurality of leads 51. When the peripheral device 2 fails, if the detection determines that the connection between the peripheral device 2 and the circuit board 1 is normal, it can be determined that not only the connector 3 is in contact normally, but also the flexible circuit board 5 is not torn on the left side and not torn on the right side. The failure causes of the left-side tear and the right-side tear of the flexible circuit board 5 can be eliminated while the failure causes of the contact abnormality of the connector 3 are eliminated.

As shown in fig. 8 in combination with the connector 3 shown in fig. 8, the shorting stub 323 may also be provided on the flexible circuit board 5 around the plurality of leads 51. When the peripheral device 2 fails, if the detection determines that the connection between the peripheral device 2 and the circuit board 1 is normal, it can be determined that not only the left and right ends of the connector 3 are in contact normally, but also the left side of the flexible circuit board 5 is not torn and the right side is not torn. The failure causes of the left side tear and the right side tear of the flexible circuit board 5 can be eliminated while the failure causes of the contact abnormality of the left and right ends of the connector 3 are eliminated.

As shown in fig. 9 in combination with the connector 3 shown in fig. 9, the shorting stub 323 may also be provided on the flexible circuit board 5 around the plurality of leads 51. When the peripheral device 2 fails, if the detection determines that the connection between the peripheral device 2 and the circuit board 1 is normal, it is possible to determine not only that the upper and lower ends of the connector 3 are in contact normally, but also that the left side of the flexible circuit board 5 is not torn and the right side is not torn. The failure causes of the left side tear and the right side tear of the flexible circuit board 5 can be eliminated while the failure causes of the contact abnormality of the upper and lower ends of the connector 3 are eliminated.

Optionally, the electronic device includes a plurality of peripheral devices 2, and a connector 3 corresponding to each peripheral device 2; the first pins 311 and the second pins 312 of the plurality of connectors 3 are serially connected in sequence between the detection pins and the ground point 11.

Wherein, when the first pins 311 and the second pins 312 of the plurality of connectors 3 are sequentially connected in series between the detection pins and the ground point 11, the processor 4 determines that the connection between the at least one peripheral device 2 and the circuit board 1 is abnormal when determining that the detection circuit is disconnected according to the detection result.

In one embodiment, the plurality of peripheral devices 2 in the electronic device may form a device group, the plurality of peripheral devices 2 are respectively connected to the circuit board 1 through the corresponding connectors 3, the plurality of connectors 3 may be sequentially connected in series through the first pins 311 and the second pins 312, and the first pins 311 and the second pins 312 in the plurality of connectors 3 are connected in series between the detection pins and the ground point.

Fig. 12 is a schematic block diagram of the inside of still another electronic device provided in the embodiment of the present application, where the electronic device includes 4 peripheral devices 2, namely, a peripheral device 201, a peripheral device 202, a peripheral device 203, and a peripheral device 204, and a connector 301, a connector 302, a connector 303, and a connector 304 are disposed on the circuit board 1. Peripheral 201 is connected to second plug 32 in connector 301, peripheral 202 is connected to second plug 32 in connector 302, peripheral 203 is connected to second plug 32 in connector 303, and peripheral 204 is connected to second plug 32 in connector 304. The 4 peripheral devices 2 form a device group, and the 4 connectors 3 corresponding to the 4 peripheral devices 2 are connected in series through the first pin 311 and the second pin 312.

As shown in fig. 12, the connector 3 in fig. 12 is identical to the connector 3 in fig. 11, and the first socket connector 31 in the 4 connectors 3 is serially connected in sequence by the first pin 311 and the second pin 312 provided therein. Between two adjacent first connectors 31, the first pin 311 of one first connector 31 is connected with the second pin 312 of the other connector 31, and the 4 first connectors 31 are connected in series into one connector string. The first pin 311 at one end of the mating string is connected to the test pin and the second pin 312 at the other end of the mating string is connected to the ground point 11, thereby connecting the first pin 311 and the second pin 312 of the plurality of connectors 3 in series between the test pin and the ground point 11.

As shown in fig. 12, the first pin 311 of the first connector 31 located at the left end is directly connected to the detection pin, and the first pins 311 of the other first connectors 31 are indirectly connected to the detection pin through the pins. The second pin 312 of the first connector 31 at the right end is directly connected to the ground point 11, and the other second pins 312 are indirectly connected to the ground point 11 through the pins.

As shown in fig. 12, the first pins 311 and the second pins 312 in the plurality of connectors 3 are serially connected in turn, and since the third pin 321 and the fourth pin 322 in each second connector 32 are shorted by the shorting line 323, a detection circuit is constituted so as to serially connect the first pin 311 and the second pin 312 in each connector 3, and the third pin 321 and the fourth pin 322 in each connector 3, the detection circuit corresponding to the entire device group. When the contact of each of the 4 connectors 3 is normal and no tearing occurs in each of the flexible circuit boards 5, a detection circuit from the detection pin to the ground point 11 is conducted. When any one connector 3 of the 4 connectors 3 is abnormally contacted or any one flexible circuit board 5 is torn, a detection circuit from the detection pin to the ground point 11 is disconnected.

When any peripheral device 2 in the device group fails, the detection method shown in fig. 6 may be adopted to detect, the processor 4 first pulls the detection pin high, then reads the voltage of the detection pin, if the voltage is low, determines that the detection circuit is turned on, and can determine that the connector 3 corresponding to each peripheral device 2 is in normal contact, and the flexible circuit board 5 connected to each peripheral device 2 is not torn. For example, when the peripheral device 201 fails, if it is determined that the detection circuit is turned on, it may be determined that the connection between each peripheral device 2 in the device group and the circuit board 1 is normal, and connector contact abnormality and flexible circuit board tearing are not included in the cause of failure of the peripheral device 201.

In the detection process, if the voltage of the detection pin is read to be high level for N times, it can be determined that the connection between one or more peripheral devices 2 in the device group and the circuit board 1 is abnormal, that is, the contact of the connector 3 corresponding to at least one peripheral device 2 is abnormal and/or the flexible circuit board 5 is torn.

In the electronic device shown in fig. 12, the detection pin may be connected to the power supply 12 on the circuit board 1 through the pull-up resistor element 13. When the detection pin is connected with the power supply 12 on the circuit board 1 through the pull-up resistor element 13, the processor 4 does not need to pull up the voltage of the detection pin in the detection process, and can directly read the voltage of the detection pin. The connector 3 in fig. 12 may be the connector shown in fig. 5, 8, 9 and 10.

In practical applications, all peripheral devices 2 in the electronic device may be divided into one or more device groups, each device group may include one or more peripheral devices 2, and the number of peripheral devices 2 included in the device group may be set according to requirements, which is not limited in this embodiment. For each device group, one pin of the processor 4 may be selected as a detection pin, and the connectors 3 corresponding to the plurality of peripheral devices 2 in the device group may be connected in series between the ground point 11 and the corresponding detection pin in a manner shown in fig. 12.

In this embodiment of the present application, the first pins 311 and the second pins 312 of the plurality of connectors 3 may be sequentially connected in series between the corresponding same detection pin and the ground point 11, and a plurality of peripheral devices may share one detection pin. During the detection, a plurality of connectors 3 can be detected at the same time. When the electronic device includes a large number of peripheral devices 2 and the fault cause needs to be checked when each peripheral device fails, the plurality of peripheral devices 2 can share the same detection pin, and a separate detection pin is not required to be provided for each peripheral device 2, so that the pin usage of the processor 4 can be reduced.

Optionally, the detection pin is an analog pin, the analog pin is connected with a power supply on the circuit board through a pull-up resistor element, and the second pin is connected with a grounding point through a pull-down resistor element.

Illustratively, fig. 13 is a schematic block diagram of the inside of still another electronic device provided in the embodiment of the present application, and the connector 3 in fig. 13 is the same as the connector 3 in fig. 11, and the pull-up resistor element 13 and the pull-down resistor element 14 may be resistors or electronic elements having a resistor characteristic. Taking a resistor as an example, one end of the pull-up resistor element 13 is connected to a detection pin of the processor 4, and the other end is connected to the power supply 12 on the circuit board 1. The second pin 312 of the first connector 31 is connected to one end of the pull-down resistor 14, and the other end of the pull-down resistor 14 is connected to the ground 11, so that the first pin 311 and the third pin 321 are connected in series from the detection pin, the second pin 312 and the fourth pin 322 are connected in series, and the detection circuit of the pull-down resistor 14 is connected in series.

In fig. 13, when the connector contacts are normal and the flexible circuit board 5 is not torn, the detection circuit is turned on, so that the first pin 311 is in contact with the third pin 321, the second pin 312 is in contact with the fourth pin 322, the pull-up resistor element 13 and the pull-down resistor element 14 are connected in series, and the voltage of the analog pin is the voltage of the voltage division node between the pull-up resistor element 13 and the pull-down resistor element 14. For example, with the symbol V ₀ Representing the voltage of the power supply 12, denoted by the symbol V ₁ Representing the voltage of the analog pin, denoted by the symbol R ₀ The resistance value of the pull-up resistor 13 is represented by the symbol R ₁ Representing the resistance of the pull-down resistive element 14, the voltage V at the analog pin is detected when the detection circuit is turned on ₁ The method can be calculated by the following formula:

when the first plug connector 31 and the second plug connector 32 are abnormally contacted and/or the flexible circuit board 5 is torn, the detection circuit is disconnected, the voltage of the analog pin is pulled up by the pull-up resistor element 13, and the voltage of the detection pin is V ₀ . In the presence of peripheral devices 2When the voltage is not high, the processor 4 can read the voltage of the analog pin continuously for multiple times, and when the voltage of the analog pin and the voltage V are continuously read for multiple times ₀ And when the detection circuit is determined to be conducted, the peripheral equipment 2 and the circuit board 1 are connected normally. At this time, the failure cause of the contact abnormality of the connector 3 and the tearing of the flexible circuit board 5 can be eliminated.

In contrast, when the voltages of the analog pins which are read continuously for a plurality of times are all V ₀ When it is determined that the detection circuit is disconnected, the connection between the peripheral device 2 and the circuit board 1 is abnormal. At this time, it can be determined with a high probability that the cause of the failure of the peripheral device 2 is a contact abnormality of the connector 3 and/or a tear of the flexible circuit board 5, and it may be that any one of the left, right, upper and lower ends of the connector 3 is a contact abnormality, or that the left or right side of the flexible circuit board 5 is torn, or that both the cause of the failure of the contact abnormality and the cause of the failure of the flexible circuit board tear are present.

Optionally, the electronic device includes a plurality of peripheral devices 2, and a connector 3 corresponding to each peripheral device 2; the detection pin is an analog pin, and the analog pin is connected with a power supply 12 on the circuit board 1 through a pull-up resistor element 13; the first pins 311 of the plurality of connectors 3 are connected in parallel to the analog pins, and the second pins 312 of the plurality of connectors 3 are connected to the ground point 11 through the corresponding pull-down resistor elements 14, respectively.

When the detection pin is an analog pin, the first pins 311 of the plurality of connectors 3 are connected in parallel to the analog pin, and the plurality of second pins 312 are respectively connected to the ground point through the corresponding pull-down resistor elements 14, the processor 4 may determine that the connection between the at least one peripheral device 2 and the circuit board 1 is abnormal when the actual voltage of the analog pin is higher than the voltage threshold.

Fig. 14 is a schematic block diagram of the inside of still another electronic device provided in an embodiment of the present application, where fig. 14 includes 3 peripheral devices 2, namely, peripheral device 201, peripheral device 202, and peripheral device 203. Peripheral 201 corresponds to connector 301, peripheral 202 corresponds to connector 302, peripheral 203 corresponds to connector 303, and each connector 3 is identical to connector 3 shown in fig. 11. The 3 peripheral devices form a device group corresponding to the same analog pin of the processor 4, and in each connector 3, the first pins 311 of the first connectors 31 are connected to the detection pins, so that the 3 first pins 311 of the 3 first connectors 31 are connected in parallel to the same detection pin. The circuit board 1 is provided with a pull-up resistor element 13 corresponding to the device group, the pull-up resistor element 13 is, for example, a resistor, one end of the pull-up resistor element 13 is connected with the power supply 12, and the other end is connected with an analog pin of the processor 4.

The circuit board 1 is further provided with a pull-down resistor 14 corresponding to each peripheral device 2, that is, the peripheral device 201 corresponds to the pull-down resistor 141, the peripheral device 202 corresponds to the pull-down resistor 142, and the peripheral device 203 corresponds to the pull-down resistor 143, which may be a resistor. One end of the pull-down resistor 141 is connected to the second pin 312 of the connector 301, and the other end is connected to the ground point 11. One end of the pull-down resistor 142 is connected to the second pin 312 of the connector 302 and the other end is connected to the ground point 11. One end of the pull-down resistor 143 is connected to the second pin 312 in the connector 303 and the other end is connected to the ground point 11.

In fig. 14, the first pin 311, the second pin 312, the third pin 321, and the fourth pin 322 in each connector 3 constitute one detection circuit of the corresponding peripheral device 2. Taking the peripheral device 202 as an example, the detection circuit serially connects the first pin 311 and the third pin 321, the second pin 312 and the fourth pin 322, and the pull-down resistor 142 in the connector 302 in order from the detection pin. Similarly, one detection circuit corresponding to the peripheral device 201 and one detection circuit corresponding to the peripheral device 203 are configured.

Fig. 15 is a schematic circuit diagram provided in the embodiment of the present application, in the circuit board 1 shown in fig. 14, the pull-down resistor element 141, the pull-down resistor element 142 and the pull-down resistor element 143 are connected in parallel, and then connected in series with the pull-up resistor element 13, and the detection pin is connected between the pull-up resistor element 13 and 3 pull-down resistors. By symbol V ₀ Representing the voltage of the power supply 12, denoted by the symbol V ₁ Representing the voltage of the analog pin, denoted by the symbol R ₀ The resistance value of the pull-up resistor 13 is represented by the symbol R ₁₁ Representing the resistance value of pull-down resistive element 141By the symbol R ₁₂ The resistance value of pull-down resistor 142 is represented by the symbol R ₁₃ The resistance value of the pull-down resistor 143 is represented by the symbol R _X Representing the resistance value obtained by connecting a plurality of pull-down resistor elements in parallel, simulating the voltage V of the pin ₁ The method can be calculated by the following formula:

wherein, simulate voltage V of pin ₁ And resistance value R ₀ And a resistance value R _X Correlation, resistance value R _X And a resistance value R ₁₁ Resistance value R ₁₂ And a resistance value R ₁₃ And (5) correlation. During the use of the electronic device, the resistance value R is the same as the pull-up resistor element 13 ₀ No change occurs. As can be seen from the above examples, in the connector 3 shown in fig. 14, when each detection circuit is turned on, R _X The resistance values obtained by connecting the pull-down resistor 141, the pull-down resistor 142, and the pull-down resistor 143 in parallel are obtained. When any one of the detection circuits is disconnected, the pull-down resistor element in the detection circuit cannot be connected in parallel with other pull-down resistor elements, R _X Will change, resulting in a voltage V at the analog pin ₁ A change occurs. For example, when the connection between the peripheral device 202 and the circuit board 1 is abnormal, the detection circuit corresponding to the peripheral device 202 is disconnected, the pull-down resistor 142 is removed from the plurality of pull-down resistors connected in parallel, the pull-down resistor 142 cannot be connected in parallel with the pull-down resistor 141 and the pull-down resistor 143, and R _X The resistance value obtained by connecting the pull-down resistor 141 and the pull-down resistor 143 in parallel.

As can be seen from fig. 14 and 15, when all the peripheral devices 2 are abnormally connected with the circuit board 1, all the detection circuits are disconnected, the detection pins are suspended, and at this time, R _X At infinity, the voltage of the analog pin is pulled up by the pull-up resistor element 13 to be the voltage V of the power supply 12 ₀ 。

Wherein when a plurality of resistors are connected in parallel, the number of the parallel resistors is larger, and the resistance value R _X The smaller the resistance amountWhen the number of the resistors is small, the resistance value R after parallel connection _X The larger. As can be seen from the above formula, the parallel resistance value R _X The larger the voltage at the sense pin is. When the 3 detection circuits in fig. 14 are all on, the number of resistors connected in parallel in fig. 15 is the largest, and the resistance value R _X And when the voltage of the detection pin is higher than the voltage threshold, the existence of one or more pull-down resistor elements which are not connected in parallel is indicated, one or more detection circuits can be determined to be disconnected, and one or more peripheral devices or a plurality of peripheral devices are abnormally connected with the circuit board.

In summary, for the device group consisting of peripheral 201, peripheral 202, and peripheral 203, the processor may record the voltage of the analog pin when all 3 detection circuits are on, and take the voltage as the voltage threshold. When a peripheral device in the device group fails or the electronic device is started, the processor reads the actual voltage of the detection pin, if the actual voltage is equal to the voltage V ₀ It is determined that all the detection circuits are disconnected and that all the peripheral devices 2 are abnormally connected with the circuit board 1. When the actual voltage is higher than the voltage threshold and is not equal to the voltage V ₀ At this time, it is determined that one or more of the plurality of detection circuits is disconnected, and connection between the peripheral device 2 or the peripheral devices 2 in the device group and the circuit board 1 is abnormal. When the actual voltage is matched with the voltage threshold, all detection circuits can be determined to be conducted, each peripheral device is normally connected with the circuit board, and all connectors are determined to be normally contacted.

When it is determined that all peripheral devices are normally connected with the circuit board, the fault cause of abnormal connection between the peripheral devices and the circuit board can be eliminated, and the fault cause of the peripheral device is determined to be abnormal.

The actual voltage of the analog pin is the voltage of the analog pin detected in real time. Because the analog pin has certain detection precision, when the difference between the actual voltage and the reference voltage is smaller than a preset difference, the actual voltage and the reference voltage can be determined to be matched.

In this embodiment of the present application, when the detection pin is an analog pin, and the detection pin is connected to the power supply through the pull-up resistor element, the first pins in the plurality of connectors may be connected in parallel to the same detection pin, and the second pins in each connector are connected to the ground point sequentially through the corresponding pull-down resistor element, and connection between the plurality of peripheral devices and the circuit board may be detected through one detection pin of the processor. When the electronic device comprises a large number of peripheral devices and each peripheral device is required to be failed, a plurality of peripheral devices can share the same analog pin, and each peripheral device is not required to be provided with a separate analog pin, so that the pin usage of the processor can be reduced.

As shown in connection with fig. 14 and 15, when the detection pin is an analog pin, one or more peripheral devices may be included in the device group, and the number of peripheral devices included in the device group may be set according to the need, which is not limited in this embodiment.

Optionally, the second pins 312 of the connectors 3 are respectively connected to the ground point 11 through pull-down resistor elements 14 with different resistance values; when the actual voltage is higher than the voltage threshold value, the processor 4 determines a target reference voltage matched with the actual voltage from a plurality of reference voltages, and determines that the connection between the target peripheral equipment corresponding to the target reference voltage and the circuit board is abnormal; the target reference voltage includes a voltage of the analog pin when the connection between the target peripheral device 2 and the circuit board 1 is abnormal and the connection between the other peripheral devices 2 and the circuit board 1 is normal.

In connection with the above example, the voltage threshold is the voltage of the analog pin when the plurality of peripheral devices 2 in the device group are all connected normally to the circuit board 1. As can be seen from fig. 14, when the connection between the 3 peripheral devices 2 and the circuit board 1 is normal, the pull-down resistor 141, the pull-down resistor 142 and the pull-down resistor 143 are connected in parallel, and the resistance R is _X At a minimum, the voltage at the analog pin reaches a minimum value, which can be taken as a voltage threshold.

In one embodiment, when the first pins 311 of the plurality of connectors 3 are connected in parallel to the same analog pin, the second pin 312 of each connector 3 may be connected to the ground point 11 through pull-down resistor elements 14 with different resistance values. As shown in fig. 14, the pull-down resistance element 141, the pull-down resistance element 142, and the pull-down resistance element 143 may be provided as resistances of different resistance values.

Referring to FIG. 15, when 3 pull-down resistors 14 have different resistances, and any one of the detection paths is disconnected, the pull-down resistors 14 removed from the plurality of pull-down resistors 14 connected in parallel have different resistances, and different resistances R can be obtained _X So that the analog pins can have different voltages. In FIG. 15, there are cases where 1,3 peripheral devices are normally connected to the circuit board 1, and the resistance R is _X Is obtained by connecting a pull-down resistor element 141, a pull-down resistor element 142 and a pull-down resistor element 143 in parallel; case 2, abnormal connection of peripheral device 201 to circuit board 1, normal connection of peripheral device 202 and peripheral device 203 to circuit board 1, resistance value R _X Is obtained by connecting a pull-down resistor element 142 and a pull-down resistor element 143 in parallel; case 3, abnormal connection of peripheral device 202 to circuit board 1, normal connection of peripheral device 201 and peripheral device 203 to circuit board 1, resistance value R _X Is obtained by connecting a pull-down resistor element 141 and a pull-down resistor element 143 in parallel; case 4, abnormal connection of peripheral device 203 to circuit board 1, normal connection of peripheral device 201 and peripheral device 202 to circuit board, resistance value R _X Is obtained by connecting a pull-down resistor element 141 and a pull-down resistor element 142 in parallel; case 5, peripheral 201 is connected abnormally to circuit board 1, peripheral 202 is connected abnormally to circuit board 1, peripheral 203 is connected normally to circuit board 1, and resistance value R _X A resistance value of the pull-down resistance element 143; case 6, connection between peripheral device 201 and circuit board 1 is abnormal, connection between peripheral device 203 and circuit board 1 is abnormal, connection between peripheral device 202 and circuit board is normal, and resistance value R _X A resistance value of the pull-down resistance element 142; case 7, connection between peripheral device 202 and circuit board 1 is abnormal, connection between peripheral device 203 and circuit board 1 is abnormal, connection between peripheral device 201 and circuit board 1 is normal, and resistance value R _X A resistance value of the pull-down resistance element 141; case 8, peripheral 201 and Abnormal connection of circuit board 1, abnormal connection between peripheral device 202 and circuit board 1, abnormal connection between peripheral device 203 and circuit board 1, and resistance value R _X Is infinite.

Referring to FIG. 14, if V ₀ Equal to 1.8 volts (V), pull-up resistor element 13 has a resistance of 15kΩ (kiloohm, kohm), pull-down resistor element 141 has a resistance of 20kΩ, pull-down resistor element 142 has a resistance of 15kΩ, and pull-down resistor element 143 has a resistance of 10kΩ, table 1 shows the resistance R in each case _X And the voltage of the analog pin.

TABLE 1

	Case 1	Case 2	Case 3	Case 4	Case 5	Case 6	Case 7	Case 8
									R X (kΩ)	4.62	6.00	6.67	8.57	10	15	20	Infinity of infinity
Voltage (V)	0.42	0.51	0.55	0.65	0.72	0.90	1.03	1.8

As can be seen from table 1, when the second pins 312 in each connector 3 are respectively connected to the ground point 11 through the pull-down resistor elements 14 with different resistances, the analog pins can be made to have different voltages in each case. Each voltage shown in table 1 may be used as a reference voltage, and a plurality of reference voltages may be stored. In the detection process, when the actual voltage of the analog pin is matched with a certain reference voltage (the reference voltage is a target reference voltage), a target peripheral device with abnormal connection with the circuit board can be determined according to the target reference voltage.

For example, if it is detected that the actual voltage of the analog pin matches the reference voltage corresponding to the case 3, it may be determined that the connection between the peripheral device 2 and the circuit board 1 is abnormal, the connection between the other peripheral devices and the circuit board is normal, and the peripheral device 2 is the target peripheral device. If the actual voltage of the analog pin is detected to be matched with the reference voltage corresponding to the condition 5, it can be determined that the connection between the peripheral device 201 and the circuit board 1 is abnormal, the connection between the peripheral device 202 and the circuit board 1 is abnormal, the connection between the peripheral device 203 and the circuit board is normal, and the peripheral device 201 and the peripheral device 202 are target peripheral devices.

In each case, the voltage of the analog pin varies within a certain voltage range, for example, in case 1, the maximum value of the voltage of the analog pin is 0.48V, and the minimum value is 0, and the voltage range corresponding to case 1 may be set to be 0-0.48V; in case 2, the maximum value of the voltage of the analog pin is 0.53V, and the minimum value is 0.49V, and the voltage range corresponding to case 2 can be set to be 0.49-0.53V; in case 3, the maximum value of the voltage of the analog pin is 0.6V, and the minimum value is 0.53V, and the voltage range corresponding to case 3 can be set to be 0.53-0.6V; in case 4, the maximum value of the voltage of the analog pin is 0.61V and the minimum value is 0.68V, and the voltage range corresponding to case 4 can be set to be 0.61-0.68V. The case 5, the case 6, the case 7 and the case 8 can be summarized as one case, and when the case 5, the case 6, the case 7 and the case 8 are adopted, the maximum value of the voltage of the analog pin is 0.8V, and the minimum value is 0.69V, the voltage ranges corresponding to the case 5, the case 6, the case 7 and the case 8 can be set to be 0.69-1.8V.

When the reference voltage matched with the actual voltage is determined, a target voltage range in which the actual voltage is located can be determined, and the reference voltage corresponding to the target voltage range is used as the reference voltage matched with the actual voltage. For example, case 4 has a reference voltage of 0.65V, case 4 corresponds to a voltage range of 0.61-0.68V, and the reference voltage 0.65V is within the voltage range of 0.61-0.68V. When the actual voltage is in the voltage range of 0.61-0.68V, the target reference voltage for determining the actual voltage match is 0.65V.

Meanwhile, the voltage threshold is the reference voltage corresponding to the case 1, and when the actual voltage is in the voltage range corresponding to the case 1, it can be determined that the actual voltage is matched with the voltage threshold, that is, is lower than the voltage threshold. Alternatively, the maximum value in the voltage range corresponding to the case may be set as the voltage threshold value, for example, 0.48V may be set as the voltage threshold value.

In practical application, the resistance value of each pull-down resistor element can be set according to the precision of the analog pin, so that different voltage ranges can be respectively corresponding to each case.

Fig. 16 is a schematic diagram of another detection flow provided in the embodiment of the present application, in the detection process, the processor first executes step 161 to initialize the analog pin and clear the history voltage read by the analog pin. Next, the processor performs step 162 of reading the actual voltage of the analog pin, and after reading the actual voltage of the analog pin, performs step 163,

In step 163, the processor determines a target voltage range in which the actual voltage is located from among the plurality of voltage ranges in the above example, that is, determines a target reference voltage that matches the actual voltage, and performs step 164 after determining the target reference voltage.

In step 164, it is determined whether or not there is a peripheral device 2 abnormally connected with the circuit board 1. Specifically, when the target voltage range is the voltage range corresponding to the case 1, that is, the actual voltage is lower than the voltage threshold, step 165 is executed to determine that all the peripheral devices 2 in the device group are connected normally with the circuit board. In contrast, if it is determined that the target voltage range is not the voltage range corresponding to the voltage threshold, that is, the actual voltage is higher than the voltage threshold, it is determined that the connection between the target peripheral device corresponding to the target voltage range and the circuit board is abnormal, that is, the connection between the target peripheral device corresponding to the target reference voltage and the circuit board is abnormal, and then step 166 is performed.

In step 166, the processor determines the number of times that the connection abnormality between the target peripheral device and the circuit board is detected, and when the number of times reaches N, step 167 is performed. When N is less than N, the process returns to step 162, the actual voltage of the analog pin is again read, and steps 162, 163 and 164 are repeatedly performed.

In step 167, the processor may obtain a detection result of the abnormal connection between the target peripheral device and the circuit board.

After step 165 or step 167 is executed, step 168 is executed, the detection flow is ended, step 169 is executed, and the detection result is reported.

In this embodiment of the present application, when the detection pin is an analog pin, the second pin in the plurality of connectors is connected to the ground point through pull-down resistors with different resistance values, the processor may determine, according to an actual voltage of the analog pin, a target peripheral device connected abnormally between the plurality of peripheral devices and the processor, and while reducing a pin usage amount of the processor, may determine, from the plurality of peripheral devices, a peripheral device connected abnormally between the peripheral device and the circuit board, so as to accurately eliminate a failure cause of the peripheral device.

As shown in fig. 14, when the peripheral device 201 fails, the processor executes the detection flow of fig. 16, and if the detection result is that all the peripheral devices 2 are connected normally with the circuit board 1, it can be determined that the failure cause of the peripheral device 201 is not the abnormal connection cause between the peripheral device 201 and the circuit board 1. If the detection result is that the connection between the peripheral device 201 and the circuit board 1 is abnormal, it is determined that the cause of the failure of the peripheral device 201 is, with a high probability, that the connection between the peripheral device 201 and the circuit board 1 is abnormal. If the detection result is that the peripheral device 202 and/or the peripheral device 203 is abnormally connected to the circuit board 1, it is also possible to determine that the cause of the failure of the peripheral device 201 is not caused by the abnormal connection between the peripheral device 201 and the circuit board 1.

Optionally, the plurality of peripheral devices are functionally identical peripheral devices. In connection with the above example, the peripheral 201, the peripheral 202, and the peripheral 203 may be the same as the camera. When the plurality of peripheral devices are peripheral devices with the same function, the electronic device can be convenient to manage the detection result.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (18)

1. An electronic device characterized by comprising a circuit board (1), a peripheral device (2) and a connector (3);

the connector (3) comprises a first plug connector (31) and a second plug connector (32) which are mutually matched in a plug manner, the first plug connector (31) is arranged on the circuit board (1), and the second plug connector (32) is connected with the peripheral equipment (2);

the circuit board (1) is provided with a processor (4), the first plug connector (31) comprises a first pin (311) and a second pin (312), the first pin (311) is connected with a detection pin of the processor (4), and the second pin (312) is connected with a grounding point (11) on the circuit board (1);

The second plug connector (32) comprises a third pin (321) which is in butt joint with the first pin (311), and a fourth pin (322) which is in butt joint with the second pin (312), and the third pin (321) is in short circuit with the fourth pin (322);

the detection pin, the first pin (311), the second pin (312), the third pin (321), the fourth pin (322) and the grounding point (11) are connected to form a detection circuit;

the processor (4) is configured to:

detecting the detection circuit and determining the connection state between the peripheral equipment (2) and the circuit board (1).

2. The electronic device according to claim 1, wherein said detecting the detection circuit to determine the connection state between the peripheral device (2) and the circuit board (1) comprises:

detecting the voltage of the detection pin;

if the voltage of the detection pin is detected to be low level, indicating that the connection between the peripheral equipment (2) and the circuit board (1) is normal;

and if the voltage of the detection pin is detected to be high level, indicating abnormal connection between the peripheral equipment (2) and the circuit board (1).

3. The electronic device according to claim 1, wherein said detecting the detection circuit to determine the connection state between the peripheral device (2) and the circuit board (1) comprises:

Detecting the voltage of the detection pin;

if the voltage of the detection pin is detected to be in a first target voltage range, indicating that the connection between the peripheral equipment (2) and the circuit board (1) is normal;

and if the voltage of the detection pin is detected to be in a second target voltage range, indicating abnormal connection between the peripheral equipment (2) and the circuit board (1), wherein the minimum value of the second target voltage range is larger than the maximum value of the first target range.

4. An electronic device according to claim 3, characterized in that a plurality of said peripheral devices (2) are included in said electronic device, said indicating an abnormal connection between said peripheral devices (2) and said circuit board (1) if the voltage of said detection pins is detected to be in a second target voltage range, comprising:

and if the voltage of the detection pin is detected to be in a target reference voltage range in the second target voltage range, indicating abnormal connection between a target peripheral device and the circuit board (1), wherein the target peripheral device is one or more of a plurality of peripheral devices (2).

5. The electronic device according to claim 1, characterized in that it comprises a plurality of said peripheral devices (2), and said connector (3) respectively corresponding to each of said peripheral devices (2);

The first pins (311) and the second pins (312) in the plurality of connectors (3) are sequentially connected in series between the detection pins and the ground point.

6. The electronic device according to claim 1, characterized in that it comprises a plurality of said peripheral devices (2), and said connector (3) respectively corresponding to each of said peripheral devices (2);

the detection pin is connected with a power supply (12) on the circuit board (1) through a pull-up resistor element (13);

the first pins (311) of the connectors (3) are connected in parallel with the detection pins, and the second pins (312) of the connectors (3) are respectively connected with the grounding point (11) through corresponding pull-down resistor elements (14).

7. The electronic device according to claim 6, wherein the second pins (312) in the plurality of connectors (3) are connected to the ground point (11) through the pull-down resistance elements (14) of different resistance values, respectively.

8. The electronic device according to claim 1, wherein the detection pin is connected to a power supply (12) on the circuit board (1) through a pull-up resistor element (13), and the second pin (312) is connected to the ground point (11) through a pull-down resistor element (14).

9. The electronic device according to claim 1, wherein the first pin (311) and the third pin (321) are provided at one end of the connector (3), and the second pin (312) and the fourth pin (322) are provided at the other end of the connector (3).

10. The electronic device of claim 9, wherein the first pin (311) and the third pin (321) are disposed diagonally to the second pin (312) and the fourth pin (322).

11. The electronic device according to any of the claims 1-10, characterized in that the peripheral device (2) is connected to the second plug connector (32) by means of a flexible circuit board (5), the flexible circuit board (5) being provided with a plurality of leads (51);

the third pin (321) and the fourth pin (322) are in short circuit through a short circuit wire (323), the short circuit wire (323) surrounds the plurality of leads, and the short circuit wire is arranged on the flexible circuit board (5).

12. The electronic device according to any of the claims 1-10, characterized in that the peripheral device (2) is connected to the second plug connector (32) by means of a flexible circuit board (5), the flexible circuit board (5) being provided with a plurality of leads (51);

the third pin (321) and the fourth pin (322) are in short circuit through a shorting wire (323), and the shorting wire (323) is arranged on the flexible circuit board (5) and extends from one side of the plurality of leads (51) to the peripheral device (2).

13. The electronic device according to any of the claims 1-10, wherein the third pin (321) and the fourth pin (322) are shorted by a shorting line (323), the shorting line (323) being arranged at the second plug (32).

14. The electronic device of any one of claims 1-10, wherein the detection pin is a general purpose input output pin or an analog pin.

15. An electronic device according to any of claims 4-7, characterized in that a plurality of said peripheral devices (2) are functionally identical peripheral devices.

16. An electronic device as claimed in claim 5, characterized in that the detection pin is connected to a power supply (12) on the circuit board (1) via a pull-up resistor element (13).

17. The electronic device of any of claims 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 and 16, wherein the connector (3) is a board-to-board connector or a zero insertion force connector.

18. An electronic device as claimed in any one of claims 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 and 16, characterized in that the circuit board (1) is a motherboard, a sub-board or a platelet.