CN117810266A - Anti-radiation lateral diffusion metal oxide semiconductor based on standard process - Google Patents
Anti-radiation lateral diffusion metal oxide semiconductor based on standard process Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000000034 method Methods 0.000 title claims abstract description 11
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 10
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 10
- 238000009792 diffusion process Methods 0.000 title abstract description 6
- 230000003471 anti-radiation Effects 0.000 title description 3
- 230000005855 radiation Effects 0.000 claims abstract description 24
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 19
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 229920005591 polysilicon Polymers 0.000 claims description 8
- 230000002787 reinforcement Effects 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 5
- 230000003071 parasitic effect Effects 0.000 abstract description 14
- 230000000694 effects Effects 0.000 abstract description 13
- 238000002955 isolation Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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Abstract
The invention provides a radiation-resistant lateral diffusion metal oxide semiconductor based on a standard process, and belongs to the technical field of power devices. The semiconductor is provided with an active area, and the active area is surrounded by the field oxide layer; the active region is internally provided with a gate end, a drain end, a source end, a drift region and a Pbody region; two ends of a channel formed in the Pbody region are isolated from the field oxide layer through active reinforcing ends; the active reinforcing end is a Pbody region or a drift region; according to the method, the field oxide layer and the device channel are isolated through the active region, so that parasitic charges generated by the field oxide layer are prevented from being contacted with the channel to form a parasitic channel, the total dose effect resistance of the LDMOS tube is effectively improved, and the radiation resistance purpose is achieved; the error of calculating the equivalent width-to-length ratio of the traditional gate-all-around device is avoided, the equivalent width-to-length ratio is consistent with the width-to-length ratio of the gate end of the conventional LDMOS tube, and the width-to-length ratio can be flexibly adjusted; simple structure and is completely compatible with commercial technology.
Description
Technical Field
The invention relates to the technical field of power devices, in particular to a radiation-resistant lateral diffusion metal oxide semiconductor based on a standard process.
Background
In the aerospace field, various electronic devices are subject to the effects of high energy particles and radiation rays in the universe. Radiation-induced effects can cause varying degrees of damage to integrated circuits in such devices, leading to failure and failure of the devices. Wherein the total dose effect is a common radiation damage effect caused by radiation. Lateral diffusion metal oxide semiconductor (Laterally diffused metal oxide semicond)A riser, LDMOS) device is a common voltage-resistant power device in integrated circuits. For LDMOS devices, siO is needed by pressure resistance 2 The oxide layer has a thicker thickness and the total dose effect is obvious. The total dose effect can cause the problems of off-state leakage current and the like of the LDMOS device.
The ring gate layout structure is a traditional layout anti-radiation reinforcing structure. The gate-surrounding layout structure adopts a gate closing structure for the MOS tube. The thickness of the gate oxide layer is far smaller than that of the field oxide layer, and the generated parasitic current is negligible, so that the device can be free of edges in a mode that a source electrode or a drain electrode surrounds a channel, the parasitic channel is avoided, and radiation-resistant reinforcement is realized. However, the ring gate device requires calculation of its equivalent aspect ratio for practical large scale integrated circuit applications due to its special closed geometry. The gate-all-around device usually involves calculation of equivalent width-to-length ratio at corners or chamfers, which requires approximation, and theoretical calculation and actual test usually have certain errors. In addition, the aspect ratio is limited to a certain range because of its special geometry.
Disclosure of Invention
Aiming at the problems that the LDMOS tube is influenced by the total dose effect to generate parasitic channel and leakage current under the irradiation condition and the problems that the equivalent width-to-length ratio of the traditional ring gate has errors and limitations, the invention provides the radiation-resistant transverse diffusion metal oxide semiconductor based on the standard process.
The technical scheme of the invention is as follows:
a radiation-resistant laterally diffused metal oxide semiconductor based on standard processes, the structure of the semiconductor comprising: a gate terminal 1, a drain terminal 2, a source terminal 3, a field oxide layer 6, an active region 4, an active reinforcing terminal 5, a Pbody region 10, a drift region 11 and a gate oxide layer 14;
the field oxide layer 6 is of a rectangular frame-shaped structure, so that all areas in the frame of the field oxide layer 6 are active areas 4; the gate terminal 1 is two polysilicon gates arranged in parallel, and a gate oxide layer 14 is arranged on the lower surface of the polysilicon gates; the gate oxide layer 14 is leveled with the upper surface of the field oxide layer 6, and the gate oxide layer 14 is positioned at the superposition part of the lower surface of the gate terminal 1 and the upper surface of the active region 4; the thickness of the field oxide layer 6 is larger than that of the active region, and a substrate is arranged below the active region 4 and the field oxide layer 6;
the left end and the right end in the frame of the field oxide layer 6 are respectively provided with a drain end 2 and are contacted with the field oxide layer 6, and the upper end and the lower end of the drain end 2 are not contacted with the field oxide layer 6; a source end 3 is arranged at the center in the frame of the field oxide layer 6; two polysilicon gates of the gate terminal 1 are positioned at the left and right sides of the source terminal 3, are parallel to and not overlapped with the left and right sides of the source terminal 3, and extend out of the active region 4 at the upper and lower ends of the gate terminal 1; the Pbody region 10 is positioned below the gate end and surrounds the source end 3; the region between the Pbody region 10 and the upper and lower ends of the field oxide layer 6 is an active reinforcement end 5; the other areas except the drain end 2, the source end 3, the Pbody area 10 and the active reinforcing end 5 in the active area 4 are drift areas 11;
the Pbody region 10 is made of a P-type semiconductor, and the drift region 11 is made of a low-concentration N-type semiconductor; the active reinforcing end 5 is made of a P-type semiconductor or a low-concentration N-type semiconductor;
the working principle of the invention is as follows: during operation, gate voltage is applied to the gate end through the gate contact hole, the Pbody region is inverted under the influence of the gate voltage to form a channel, current passes through the drift region from the drain end to the source end through the inverted channel, and the LDMOS tube is conducted. Meanwhile, because the source end is in the Pbody area, current cannot reach the source end through the upper end and the lower end of the active area, and the active reinforcing end is prevented from forming a channel under the influence of gate voltage. Because of the existence of the active reinforcing end, parasitic charges formed by the field oxide layer can not influence the channel under the irradiation condition, thereby achieving the purpose of resisting the total dose radiation.
The beneficial effects of the invention are as follows: for the LDMOS device in the irradiation environment, the method isolates the field oxide layer and the device channel through the active region, so that parasitic charges generated by the field oxide layer are prevented from contacting the channel to form a parasitic channel, the total dose effect resistance of the LDMOS tube is effectively improved, and the radiation resistance purpose is achieved; the error of calculating the equivalent width-to-length ratio of the traditional gate-all-around device is avoided, the equivalent width-to-length ratio is consistent with the width-to-length ratio of the gate end of the conventional LDMOS tube, and the width-to-length ratio can be flexibly adjusted; simple structure and is completely compatible with commercial technology.
Drawings
Fig. 1 shows a radiation-resistant LDMOS based on a standard process according to the present invention.
Fig. 2 is a schematic diagram of a Pbody active region reinforced LDMOS tube structure based on an active region isolation method according to the present invention.
Fig. 3 is a cross-sectional view of the structure of fig. 2 taken along the direction A-A'.
Fig. 4 is a schematic diagram of a structure of a drift region active region reinforced LDMOS tube based on an active region isolation method according to the present invention.
Fig. 5 is a cross-sectional view of the structure of fig. 4 taken along the direction A-A'.
Reference numerals illustrate: 1-gate terminal, 2-drain terminal, 3-source terminal, 4-active region, 5-active reinforcing terminal, 6-field oxide layer, 7-gate contact hole, 8-channel, 9-source terminal contact hole, 10-Pbody region, 11-drift region, 12-drain terminal contact hole, 13-parasitic charge, 14-gate oxide layer.
Detailed Description
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
Aiming at the leakage current problem caused by the total dose effect, the invention isolates the LDMOS field oxide layer from the device channel by an active region isolation method, thereby realizing radiation-resistant reinforcement. As shown in fig. 1, the structure of the radiation-resistant LDMOS based on the standard process provided by the invention comprises: a gate terminal 1, a drain terminal 2, a source terminal 3, a field oxide layer 6, an active region 4, an active reinforcing terminal 5, a Pbody region 10, a drift region 11 and a gate oxide layer 14;
the field oxide layer 6 is of a rectangular frame-shaped structure, so that all areas in the frame of the field oxide layer 6 are active areas 4; the gate terminal 1 is two polysilicon gates arranged in parallel, and a gate oxide layer 14 is arranged on the lower surface of the polysilicon gates; the gate oxide layer 14 is leveled with the upper surface of the field oxide layer 6, and the gate oxide layer 14 is positioned at the superposition part of the lower surface of the gate terminal 1 and the upper surface of the active region 4; the thickness of the field oxide layer 6 is larger than that of the active region, and a substrate is arranged below the active region 4 and the field oxide layer 6;
the left end and the right end in the frame of the field oxide layer 6 are respectively provided with a drain end 2 and are contacted with the field oxide layer 6, and the upper end and the lower end of the drain end 2 are not contacted with the field oxide layer 6; a source end 3 is arranged at the center in the frame of the field oxide layer 6; two polysilicon gates of the gate terminal 1 are positioned at the left and right sides of the source terminal 3, are parallel to and not overlapped with the left and right sides of the source terminal 3, and extend out of the active region 4 at the upper and lower ends of the gate terminal 1; the Pbody region 10 is positioned below the gate end and surrounds the source end 3; the region between the Pbody region 10 and the upper and lower ends of the field oxide layer 6 is an active reinforcement end 5; the other areas except the drain end 2, the source end 3, the Pbody area 10 and the active reinforcing end 5 in the active area 4 are drift areas 11.
Example 1
Fig. 2 is a schematic diagram of a Pbody active region reinforcing LDMOS structure based on an active region isolation method according to the present invention.
The field oxide layer 6 of the LDMOS is of a rectangular frame-shaped structure, and an active region 4 is arranged in the frame of the field oxide layer 6; the left end and the right end of the rectangular inner part are respectively provided with a drain end 2 along the plane direction of the rectangle, the upper end and the lower end of the drain end 2 are isolated from the field oxide layer 6 through the active area 4, one end of the left end and one end of the right end are contacted with the field oxide layer 6, and one end of the left end and the right end is positioned in the active area 4; the drain terminal 2 is connected with a drain potential through a drain terminal contact hole 12, and the drain terminal contact hole is positioned on the drain terminal 2; an active end 3 is arranged at the center of the active area 4 and is isolated from the field oxide layer 6; the source end 3 is connected with a source potential through a source end contact hole 9, and the source end contact hole 9 is positioned on the source end 3; the gate terminal 1 extends out of the active region 4 along two lines at the left and right sides of the source terminal and is connected with potential through a gate contact hole 7, and the gate contact hole 7 is positioned on the extension line extending out of the active region 4, so that the potential of the gate terminal 1 can be controlled;
the Pbody region 10 is a P-type semiconductor, the left end and the right end of the Pbody region exceed the source end 3, the upper end and the lower end of the Pbody region are aligned with the boundaries of the upper end and the lower end of the active region 4, and the Pbody region is in direct contact with the field oxide layer 6; the other areas of the active area 4 except the drain end 2, the source end 3 and the Pbody area 10 are drift areas 11; the drift region 11 is a low-concentration N-type semiconductor, and is subjected to partial drain-source voltage difference, so that the voltage-withstanding characteristic of the LDMOS is improved, in this embodiment, the active reinforcing end 5 is a portion of the Pbody region 10 exceeding the upper and lower ends of the source end 3 to a middle portion of the upper and lower ends of the active region, and the active reinforcing end 5 is configured to avoid forming conducting channels at the upper and lower ends of the source end 3;
fig. 3 is a cross-sectional view of a Pbody region active region reinforced LDMOS tube structure along A-A' direction according to the present invention.
The gate oxide layer 14 is leveled with the upper surface of the field oxide layer 6, and the gate oxide layer 14 is positioned at the superposition part of the lower surface of the gate terminal 1 and the upper surface of the active region 4; the thickness of the field oxide layer 6 is larger than that of the active region, and a substrate is arranged below the active region 4 and the field oxide layer 6;
under the radiation condition, the field oxide layer 6 generates parasitic charges 13, and a gate oxide layer 14 is arranged below the gate terminal 1; under a certain gate voltage, a part of Pbody region 10 forms a channel 8 under the gate terminal 1 and the gate oxide layer 14, and the channel 8 is positioned at two sides of the source terminal 3; the thickness of the gate oxide layer 14 is much smaller than the thickness of the field oxide layer 6, and the effect of radiation is negligible. The upper end and the lower end of the channel 8 are isolated from the field oxide layer through the active reinforcing end 5, so that leakage current formed by the contact of the channel and parasitic charges is avoided, and the purpose of radiation resistance reinforcement is achieved.
Example 2
Fig. 4 is a schematic diagram of a structure of a drift region active region reinforced LDMOS tube based on an active region isolation method according to the present invention.
The field oxide layer 6 of the LDMOS is of a rectangular frame structure, and an active region 4 is arranged inside the field oxide layer 6; in the same plane of the field oxide layer, drain ends 2 are respectively arranged at the left end and the right end of the rectangular interior, the upper end and the lower end of the drain ends 2 are isolated from the field oxide layer 6 through an active region 4, one end of the left end and one end of the right end are contacted with the field oxide layer 6, and one end of the left end and the right end is positioned in the active region 4; the drain terminal 2 is connected with a drain potential through a drain terminal contact hole 12, and the drain terminal contact hole is positioned in the drain terminal 2; an active end 3 is arranged at the center of the active area 4 and is isolated from the field oxide layer 6; the source end 3 is connected with a source potential through a source end contact hole 9, and the source end contact hole 9 is positioned in the source end 3; the gate terminal 1 extends out of the active region 4 along the left line and the right line of the source terminal and is connected with potential through the gate contact hole 7, and the gate contact hole 7 is positioned on the extension line extending out of the active region 4, so that the potential of the gate terminal 1 can be controlled;
the Pbody region 10 is a P-type semiconductor, the left end and the right end of the Pbody region exceed the source end 3 to form a channel of the LDMOS, the boundaries of the upper end and the lower end of the Pbody region 10 exceed the source end 3, conduction channels are prevented from being formed at the upper end and the lower end of the source end 3, and the boundaries of the upper end and the lower end of the Pbody region 10 are positioned in the active region 4; the other areas of the active area 4 except the drain end 2, the source end 3 and the Pbody area 10 are drift areas 11, the drift areas 11 are low-concentration N-type semiconductors, partial drain-source voltage difference is born, and the voltage withstanding characteristic of the LDMOS is improved. The upper and lower end boundaries of the drift region 11 are aligned with the upper and lower end boundaries of the active region 4, and are in direct contact with the field oxide layer 6. In this embodiment, the active reinforcing end 5 is the middle portion of the upper and lower ends of the Pbody region 10 and the active region 4.
Fig. 5 is a cross-sectional view of a drift region active region reinforced LDMOS tube structure along A-A' direction according to an active region isolation method of the present invention.
The gate oxide layer 14 is leveled with the upper surface of the field oxide layer 6, and the gate oxide layer 14 is positioned at the superposition part of the lower surface of the gate terminal 1 and the upper surface of the active region 4; the thickness of the field oxide layer 6 is larger than that of the active region, and a substrate is arranged below the active region 4 and the field oxide layer 6;
under radiation conditions, the field oxide layer 6 generates parasitic charges 13, and a gate oxide layer 14 is arranged above the plane of the field oxide layer 6; at a certain gate voltage, a part of Pbody region 10 forms a channel 8 under the gate terminal 1 and the gate oxide layer 14, and the channel 8 is located on the left and right sides of the source terminal 3. Part of the Pbody region 10 is positioned at the upper end and the lower end of the channel 8, so that the drift region 11 is prevented from contacting the upper end and the lower end of the source end 3 to form the channel. The thickness of the gate oxide layer 14 is much smaller than the thickness of the field oxide layer 6, and the effect of radiation is negligible. The upper end and the lower end of the channel 8 are isolated from the field oxide layer through the active reinforcing end 5, so that leakage current formed by the contact of the channel and parasitic charges is avoided, and the purpose of radiation resistance reinforcement is achieved.
In summary, the parasitic charge generated by the field oxide layer is prevented from contacting the channel to form a parasitic channel by isolating the field oxide layer from the device channel by the active region, so that the total dose effect resistance of the LDMOS tube is effectively improved, and the radiation resistance purpose is achieved; the error of calculating the equivalent width-to-length ratio of the traditional gate-all-around device is avoided, the equivalent width-to-length ratio is consistent with the width-to-length ratio of the gate end of the conventional LDMOS tube, and the width-to-length ratio can be flexibly adjusted; simple structure and is completely compatible with commercial technology.
Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations are still within the scope of the present disclosure.
Claims (2)
1. A radiation-resistant laterally diffused metal oxide semiconductor based on standard processes, the structure of the semiconductor comprising: the device comprises a gate terminal (1), a drain terminal (2), a source terminal (3), a field oxide layer (6), an active region (4), an active reinforcing terminal (5), a Pbody region (10), a drift region (11) and a gate oxide layer (14);
the field oxide layer (6) is of a rectangular frame-shaped structure, so that all areas in the frame of the field oxide layer (6) are active areas (4); the gate terminal (1) is two polysilicon gates arranged in parallel, and a gate oxide layer (14) is arranged on the lower surface of the gate terminal; the gate oxide layer (14) is leveled with the upper surface of the field oxide layer (6), and the gate oxide layer (14) is positioned at the superposition part of the lower surface of the gate terminal (1) and the upper surface of the active region (4); the thickness of the field oxide layer (6) is larger than that of the active region (4), and the substrate is arranged below the active region (4) and the field oxide layer (6);
the left end and the right end in the frame of the field oxide layer (6) are respectively provided with a drain end (2) and are contacted with the field oxide layer (6), and the upper end and the lower end of the drain end (2) are not contacted with the field oxide layer (6); a source end (3) is arranged at the center in the frame of the field oxide layer (6); two polysilicon gates of the gate terminal (1) are positioned at the left side and the right side of the source terminal (3), are parallel to the left side and the right side of the source terminal (3) and are not overlapped, and the upper end and the lower end of the gate terminal (1) extend out of the active region (4); the Pbody region (10) is positioned below the gate end and surrounds the source end (3); the region between the Pbody region (10) and the upper and lower ends of the field oxide layer (6) is an active reinforcement end (5); the other areas except the drain end (2), the source end (3), the Pbody area (10) and the active reinforcing end (5) in the active area (4) are drift areas (11);
the Pbody region (10) is made of a P-type semiconductor, and the drift region (11) is made of a low-concentration N-type semiconductor; the active reinforcement end (5) is made of a P-type semiconductor or a low-concentration N-type semiconductor.
2. A radiation-resistant laterally diffused metal oxide semiconductor according to claim 1, characterized in that the gate terminal (1) is connected to the gate potential through a gate contact hole (7), the gate contact hole (7) being located on an extension of the gate terminal (1) extending beyond the active region (4); the drain terminal (2) is connected with a drain potential through a drain terminal contact hole (12), and the drain terminal contact hole (12) is positioned on the drain terminal (2); the source end (3) is connected with a source electrode potential through a source end contact hole (9), and the source end contact hole (9) is positioned on the source end (3).
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