CN117806887A - Airplane ground test mode control method and system based on stm32 chip - Google Patents

Airplane ground test mode control method and system based on stm32 chip Download PDF

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CN117806887A
CN117806887A CN202311838062.5A CN202311838062A CN117806887A CN 117806887 A CN117806887 A CN 117806887A CN 202311838062 A CN202311838062 A CN 202311838062A CN 117806887 A CN117806887 A CN 117806887A
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data
injection
bypass
time stamp
test
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杨振
胡顺华
丁立涛
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Shanghai Aokun Aviation Technology Co ltd
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Shanghai Aokun Aviation Technology Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract

The invention relates to an aircraft ground test mode control method and system based on an stm32 chip, and belongs to the technical field of hardware control. The method comprises the following steps: and sending a test mode switching instruction to obtain aircraft ground test service data, analyzing the test data to obtain a time stamp, carrying out mirror image copying and stringing on the data to obtain a bypass communication data packet, and storing the bypass communication data packet in a bypass data storage module. And sending an injection mode switching instruction to acquire injection data and an injection time stamp, and carrying out string adding on the data to acquire an injection communication data packet, and sending the injection communication data packet to a data analysis module. And deserializing the data packet to obtain a time stamp and data, and filtering and predicting the time stamp and the data to obtain a synchronous time stamp and time synchronous data. And carrying out exception checking according to the time stamp and the time synchronization data, and sending exception alarm information. The integration and remote control of the test mode are realized, the accuracy of signal transmission, the integrity of an original data link and the privacy of test data are enhanced, and the method is suitable for more test scenes.

Description

Airplane ground test mode control method and system based on stm32 chip
Technical Field
The invention belongs to the technical field of hardware control, and particularly relates to an aircraft ground test mode control method and system based on an stm32 chip.
Background
STM32 chips are a widely used microcontroller with a variety of features, including low power consumption, high performance, ease of programming, and a wide range of applications, which make them ideal choices for many devices.
In the ground test platform projects in the aviation industry and the automobile industry, a mode switching function is often used, and at present, most of mode switching and remote disconnection functions are finished by using a board card, so that the integration degree is poor, the space of a cabinet is wasted, and the cost is high.
Disclosure of Invention
In order to solve the above problems in the prior art, in a first aspect, the present invention provides an aircraft ground test mode control method based on stm32 chip, including the following steps:
s1: the upper computer sends a test mode switching instruction to the system control module, and the system control module calls the data acquisition module according to the test mode switching instruction to acquire aircraft ground test service data;
s2: the data acquisition module analyzes the aircraft ground test service data to obtain test service data and a test timestamp, performs mirror image copying on the test service data to obtain bypass data, performs data serialization on the bypass data and the test timestamp to obtain a bypass communication data packet, and stores the bypass communication data packet into a bypass data storage module;
s3: the upper computer sends a command of switching injection modes to the system control module, the system control module calls a data injection module according to the command of switching injection modes to acquire injection data and injection time stamps associated with the injection data, performs data serialization on the injection data and the injection time stamps to obtain injection communication data packets, and sends the injection communication data packets to a data analysis module;
s4: the data analysis module acquires the bypass communication data packet, performs data deserialization on the bypass communication data packet and the injection communication data packet to obtain the test time stamp, the injection time stamp, the bypass data and the injection data, and performs filtering prediction on the bypass data and the injection data according to the test time stamp and the injection time stamp to obtain a synchronous time stamp, time synchronous bypass data and time synchronous injection data;
s5: the data analysis module performs exception checking according to the synchronous time stamp and bypass input and injection data corresponding to the synchronous time stamp, and when an exception alarm condition is triggered, the data analysis module sends exception alarm information to the upper computer.
Specifically, the switching test mode instruction in S1 and the switching injection mode instruction in S3 are control data packets based on a communication protocol of the stm32 chip, and include: a start bit, a function code, a data bit, a check bit and an end symbol, wherein the function code comprises a test code and a simulation code, the data bit represents an activation state of a DPDT relay, and the check bit represents parity of a number of digits "1" in the data packet.
Specifically, after receiving the control data packet, the system control module processes the control data packet according to the following steps:
s101: checking whether the start bit and the end symbol of the control data packet are set values;
s102: checking whether the parity of the number of the check bits is consistent with that of the digits '1' in the data packet, re-acquiring the control data packet when the check is failed, sending a data exception signal to the upper computer, and executing S103 and S104 when the check is passed;
s103: acquiring a functional code in the control data packet, and sending a level signal to an I/O pin of the stm32 chip according to the functional code;
s104: and amplifying the level signal by the Darlington transistor to obtain an amplified signal, and executing corresponding calling operation by the DPDT relay according to the amplified signal.
Specifically, the specific implementation method of mirror image replication in S2 includes:
s201: the data acquisition module analyzes the aircraft ground test service data to obtain the test service data and the test time stamp;
s202: obtaining serial keys of the data acquisition module and the bypass data storage module, wherein the serial keys comprise N data bits, N is an integer multiple of 4, and a mirror image first initial value is calculated according to the first N/4 data bits of the serial keys and the last N/4 data bits of the serial keysAnd mirror the second initial value->Calculating a mirrored first initialization parameter based on N/2 data bits in the middle of said serial key>And mirror the second initialization parameter +.>
S203: calculating a mirror image initial value according to the mirror image first initial value and the mirror image second initial value, wherein the calculation formula is as follows:x 0 representing the mirror initial value, [ mod ]]The operation represents the remainder after the value before mod is divided by the value after mod, and the initial value of the mirror image parameter is calculated according to the first initialization parameter of the mirror image and the second initialization parameter of the mirror image, wherein the calculation formula is as follows: />p 0 Representing the mirror image initial value, wherein alpha and beta are set remainder constants;
s204: performing iterative computation on the mirror image initial value and the mirror image parameter initial value according to the number of the bypass data to obtain a pseudo-random sequence;
s205: and carrying out displacement calculation on the pseudo-random sequence and the bypass data to obtain mirror image data, and copying the mirror image data to obtain the bypass data.
Specifically, the specific method of filtering prediction in S4 includes:
s401: acquiring the bypass data, the injection data, the test time stamp and the injection time stamp;
s402: calculating an error matrix of the bypass data and the injection data at time tWherein P is t (1) 、P t (2) Error matrices representing the bypass data and the injection data, respectively, F t The state transition matrix of the system is represented, and Q is the system noise of the test system;
s403: calculating correction matrices of the bypass data and the injection data respectively according to the error matricesWherein K is t (1) And K t (2) Correction matrices, H, for the bypass data and the injection data, respectively t R is measurement noise for the observation matrix;
s404: setting an alignment time stamp, and carrying out filtering prediction on the bypass data and the injection data according to the correction matrix and the alignment time stamp to obtain the time synchronization bypass data and the time synchronization injection data.
In a second aspect, the present invention also provides an aircraft ground test mode control system based on stm32 chip, operating using a method as described above, comprising: the system comprises an upper computer, a system control module, a data acquisition module, a bypass data storage module, a data injection module and a data analysis module.
The upper computer is used for sending the test mode switching instruction and the injection mode switching instruction to the system control module and receiving the abnormal alarm information of the data analysis module;
the system control module is used for receiving a test mode switching instruction and an injection mode switching instruction sent by the upper computer and sending calling signals to the data acquisition module and the data injection module;
the data acquisition module is used for analyzing the aircraft ground test service data to obtain test service data and a test time stamp, mirror image copying the test service data to obtain bypass data, and data stringing the bypass data and the test time stamp to obtain a bypass communication data packet;
the bypass data storage module is used for storing the bypass communication data packet;
the data injection module is used for acquiring the injection data and the injection time stamp associated with the injection data, carrying out data serialization on the injection data and the injection time stamp to obtain an injection communication data packet, and sending the injection communication data packet to the data analysis module;
the data analysis module is used for obtaining the bypass communication data packet, performing data deserialization on the bypass communication data packet and the injection communication data packet to obtain the test time stamp, the injection time stamp, the bypass data and the injection data, performing filtering prediction on the bypass data and the injection data according to the test time stamp and the injection time stamp to obtain a synchronous time stamp, time synchronous bypass data and time synchronous injection data, performing exception checking on bypass input and injection data corresponding to the synchronous time stamp according to the synchronous time stamp and the synchronous time stamp, and sending exception alarm information to the upper computer when an exception alarm condition is triggered.
The beneficial effects of the invention are as follows:
(1) Integrating functions such as network communication, data acquisition, data injection, mode switching and the like through the stm32 chip, and using an upper computer for remote control, thereby providing convenience for ground test of the aircraft and reducing the cost of the test;
(2) Amplifying the data signal through the Darlington transistor, and enhancing the accuracy of signal transmission through a series of verification processes in the data transmission process;
(3) The original data is subjected to mirror image copying, and data encryption is carried out in the mirror image copying process, so that the integrity of an original data link and the privacy of test data are ensured;
(4) By means of time synchronization of the bypass data and the injection data, data analysis is supported by combining the bypass data and the injection data, and the method is suitable for more testing scenes.
Drawings
The present invention is further described below with reference to the accompanying drawings for the convenience of understanding by those skilled in the art.
FIG. 1 is a schematic flow chart of an aircraft ground test mode control method based on an stm32 chip of the present invention;
fig. 2 is a block diagram of an aircraft ground test mode control system based on stm32 chips according to the present invention.
Detailed Description
In order to further describe the technical means and effects adopted by the invention for achieving the preset aim, the following detailed description is given below of the specific implementation, structure, characteristics and effects according to the invention with reference to the attached drawings and the preferred embodiment.
Referring to fig. 1, a flow chart of an aircraft ground test mode control method based on stm32 chip is shown in fig. 1, wherein: the upper computer sends a test mode switching instruction to the system control module, and the system control module calls the data acquisition module according to the test mode switching instruction to acquire aircraft ground test service data;
s2: the data acquisition module analyzes the aircraft ground test service data to obtain test service data and a test timestamp, performs mirror image copying on the test service data to obtain bypass data, performs data serialization on the bypass data and the test timestamp to obtain a bypass communication data packet, and stores the bypass communication data packet into a bypass data storage module;
s3: the upper computer sends a command of switching injection modes to the system control module, the system control module calls a data injection module according to the command of switching injection modes to acquire injection data and injection time stamps associated with the injection data, performs data serialization on the injection data and the injection time stamps to obtain injection communication data packets, and sends the injection communication data packets to a data analysis module;
s4: the data analysis module acquires the bypass communication data packet, performs data deserialization on the bypass communication data packet and the injection communication data packet to obtain the test time stamp, the injection time stamp, the bypass data and the injection data, and performs filtering prediction on the bypass data and the injection data according to the test time stamp and the injection time stamp to obtain a synchronous time stamp, time synchronous bypass data and time synchronous injection data;
s5: the data analysis module performs exception checking according to the synchronous time stamp and bypass input and injection data corresponding to the synchronous time stamp, and when an exception alarm condition is triggered, the data analysis module sends exception alarm information to the upper computer.
Specifically, the switching test mode instruction in S1 and the switching injection mode instruction in S3 are control data packets based on a communication protocol of the stm32 chip, and include: a start bit, a function code, a data bit, a check bit and an end symbol, wherein the function code comprises a test code and a simulation code, the data bit represents an activation state of a DPDT relay, and the check bit represents parity of a number of digits "1" in the data packet.
Specifically, after receiving the control data packet, the system control module processes the control data packet according to the following steps:
s101: checking whether the start bit and the end symbol of the control data packet are set values;
s102: checking whether the parity of the number of the check bits is consistent with that of the digits '1' in the data packet, re-acquiring the control data packet when the check is failed, sending a data exception signal to the upper computer, and executing S103 and S104 when the check is passed;
s103: acquiring a functional code in the control data packet, and sending a level signal to an I/O pin of the stm32 chip according to the functional code;
s104: and amplifying the level signal by the Darlington transistor to obtain an amplified signal, and executing corresponding calling operation by the DPDT relay according to the amplified signal.
Specifically, the specific implementation method of mirror image replication in S2 includes:
s201: the data acquisition module analyzes the aircraft ground test service data to obtain the test service data and the test time stamp;
s202: acquiring serial keys of the data acquisition module and the bypass data storage module, wherein the serial keys comprise N data bits, N is an integer multiple of 4, a mirror image first initial value and a mirror image second initial value are calculated according to the first N/4 data bits of the serial keys and the last N/4 data bits of the serial keys, and a mirror image first initialization parameter and a mirror image second initialization parameter are calculated according to N/2 data bits in the middle of the serial keys;
s203: calculating a mirror image initial value according to the mirror image first initial value and the mirror image second initial value, wherein the calculation formula is as follows: x0 represents the mirror image initial value, and [ mod ] operation represents the remainder after the value before mod is divided by the value after mod, and the mirror image parameter initial value is calculated according to the mirror image first initialization parameter and the mirror image second initialization parameter, wherein the calculation formula is as follows: p0 represents the mirror initial value, wherein alpha and beta are set remainder constants;
s204: performing iterative computation on the mirror image initial value and the mirror image parameter initial value according to the number of the bypass data to obtain a pseudo-random sequence;
s205: and carrying out displacement calculation on the pseudo-random sequence and the bypass data to obtain mirror image data, and copying the mirror image data to obtain the bypass data.
Specifically, the specific method of filtering prediction in S4 includes:
s401: acquiring the bypass data, the injection data, the test time stamp and the injection time stamp;
s402: calculating error matrixes of the bypass data and the injection data at the time t, wherein the error matrixes respectively represent the bypass data and the injection data, ft represents a state transition matrix of a system, and Q represents system noise of a test system;
s403: respectively calculating correction matrixes of the bypass data and the injection data according to the error matrixes, wherein the correction matrixes are respectively the bypass data and the injection data, ht is an observation matrix, and R is measurement noise;
s404: setting an alignment time stamp, and carrying out filtering prediction on the bypass data and the injection data according to the correction matrix and the alignment time stamp to obtain the time synchronization bypass data and the time synchronization injection data.
The aircraft ground test mode control system based on stm32 chip in this embodiment is shown in fig. 2, and includes: the system comprises an upper computer, a system control module, a data acquisition module, a bypass data storage module, a data injection module and a data analysis module.
The upper computer is used for sending the test mode switching instruction and the injection mode switching instruction to the system control module and receiving the abnormal alarm information of the data analysis module;
the system control module is used for receiving a test mode switching instruction and an injection mode switching instruction sent by the upper computer and sending calling signals to the data acquisition module and the data injection module;
the data acquisition module is used for analyzing the aircraft ground test service data to obtain test service data and a test time stamp, mirror image copying the test service data to obtain bypass data, and data stringing the bypass data and the test time stamp to obtain a bypass communication data packet;
the bypass data storage module is used for storing the bypass communication data packet;
the data injection module is used for acquiring the injection data and the injection time stamp associated with the injection data, carrying out data serialization on the injection data and the injection time stamp to obtain an injection communication data packet, and sending the injection communication data packet to the data analysis module;
the data analysis module is used for obtaining the bypass communication data packet, performing data deserialization on the bypass communication data packet and the injection communication data packet to obtain the test time stamp, the injection time stamp, the bypass data and the injection data, performing filtering prediction on the bypass data and the injection data according to the test time stamp and the injection time stamp to obtain a synchronous time stamp, time synchronous bypass data and time synchronous injection data, performing exception checking on bypass input and injection data corresponding to the synchronous time stamp according to the synchronous time stamp and the synchronous time stamp, and sending exception alarm information to the upper computer when an exception alarm condition is triggered.
The present invention is not limited to the above embodiments, but is capable of modification and variation in detail, and other modifications and variations can be made by those skilled in the art without departing from the scope of the present invention.

Claims (6)

1. An aircraft ground test mode control method based on stm32 chip is characterized by comprising the following steps:
s1: the upper computer sends a test mode switching instruction to the system control module, and the system control module calls the data acquisition module according to the test mode switching instruction to acquire aircraft ground test service data;
s2: the data acquisition module analyzes the aircraft ground test service data to obtain test service data and a test timestamp, performs mirror image copying on the test service data to obtain bypass data, performs data serialization on the bypass data and the test timestamp to obtain a bypass communication data packet, and stores the bypass communication data packet into a bypass data storage module;
s3: the upper computer sends a command of switching injection modes to the system control module, the system control module calls a data injection module according to the command of switching injection modes to acquire injection data and injection time stamps associated with the injection data, performs data serialization on the injection data and the injection time stamps to obtain injection communication data packets, and sends the injection communication data packets to a data analysis module;
s4: the data analysis module acquires the bypass communication data packet, performs data deserialization on the bypass communication data packet and the injection communication data packet to obtain the test time stamp, the injection time stamp, the bypass data and the injection data, and performs filtering prediction on the bypass data and the injection data according to the test time stamp and the injection time stamp to obtain a synchronous time stamp, time synchronous bypass data and time synchronous injection data;
s5: the data analysis module performs exception checking according to the synchronous time stamp and bypass input and injection data corresponding to the synchronous time stamp, and when an exception alarm condition is triggered, the data analysis module sends exception alarm information to the upper computer.
2. The method according to claim 1, wherein the switch test mode instruction in S1 and the switch inject mode instruction in S3 are control packets of a stm32 chip based communication protocol, comprising: a start bit, a function code, a data bit, a check bit and an end symbol, wherein the function code comprises a test code and a simulation code, the data bit represents an activation state of a DPDT relay, and the check bit represents parity of a number of digits "1" in the data packet.
3. The method of claim 2, wherein after the system control module receives the control data packet, the control data packet is processed according to the following steps:
s101: checking whether the start bit and the end symbol of the control data packet are set values;
s102: checking whether the parity of the number of the check bits is consistent with that of the digits '1' in the data packet, re-acquiring the control data packet when the check is failed, sending a data exception signal to the upper computer, and executing S103 and S104 when the check is passed;
s103: acquiring a functional code in the control data packet, and sending a level signal to an I/O pin of the stm32 chip according to the functional code;
s104: and amplifying the level signal by the Darlington transistor to obtain an amplified signal, and executing corresponding calling operation by the DPDT relay according to the amplified signal.
4. The method according to claim 1, wherein the implementation method of mirror image replication in S2 includes:
s201: the data acquisition module analyzes the aircraft ground test service data to obtain the test service data and the test time stamp;
s202: obtaining serial keys of the data acquisition module and the bypass data storage module, wherein the serial keys comprise N data bits, N is an integer multiple of 4, and a mirror image first initial value is calculated according to the first N/4 data bits of the serial keys and the last N/4 data bits of the serial keysAnd mirror the second initial value->Calculating a mirrored first initialization parameter based on N/2 data bits in the middle of said serial key>And mirror the second initialization parameter +.>
S203: calculating a mirror image initial value according to the mirror image first initial value and the mirror image second initial value, wherein the calculation formula is as follows:x 0 representing the mirror initial value, [ mod ]]The operation represents the remainder after the value before mod is divided by the value after mod, and the initial value of the mirror image parameter is calculated according to the first initialization parameter of the mirror image and the second initialization parameter of the mirror image, wherein the calculation formula is as follows: />p 0 Representing the mirror image initial value, wherein alpha and beta are set remainder constants;
s204: performing iterative computation on the mirror image initial value and the mirror image parameter initial value according to the number of the bypass data to obtain a pseudo-random sequence;
s205: and carrying out displacement calculation on the pseudo-random sequence and the bypass data to obtain mirror image data, and copying the mirror image data to obtain the bypass data.
5. The method according to claim 1, wherein the specific method of filtering prediction in S4 comprises:
s401: acquiring the bypass data, the injection data, the test time stamp and the injection time stamp;
s402: calculating an error matrix of the bypass data and the injection data at time tWherein (1)>Error matrices representing the bypass data and the injection data, respectively, F t The state transition matrix of the system is represented, and Q is the system noise of the test system;
s403: respectively calculating the bypass number according to the error matrixCorrection matrix based on the sum of the injected dataWherein K is t (1) And K t (2) Correction matrices, H, for the bypass data and the injection data, respectively t R is measurement noise for the observation matrix;
s404: setting an alignment time stamp, and carrying out filtering prediction on the bypass data and the injection data according to the correction matrix and the alignment time stamp to obtain the time synchronization bypass data and the time synchronization injection data.
6. An aircraft ground test mode control system based on stm32 chip, operating using the method of any one of claims 1-5, comprising a host computer, a system control module, a data acquisition module, a bypass data storage module, a data injection module, and a data analysis module, wherein:
the upper computer is used for sending the test mode switching instruction and the injection mode switching instruction to the system control module and receiving the abnormal alarm information of the data analysis module;
the system control module is used for receiving a test mode switching instruction and an injection mode switching instruction sent by the upper computer and sending calling signals to the data acquisition module and the data injection module;
the data acquisition module is used for analyzing the aircraft ground test service data to obtain test service data and a test time stamp, mirror image copying the test service data to obtain bypass data, and data stringing the bypass data and the test time stamp to obtain a bypass communication data packet;
the bypass data storage module is used for storing the bypass communication data packet;
the data injection module is used for acquiring the injection data and an injection time stamp associated with the injection data, carrying out data serialization on the injection data and the injection time stamp to obtain an injection communication data packet, and sending the injection communication data packet to the data analysis module;
the data analysis module is used for obtaining the bypass communication data packet, performing data deserialization on the bypass communication data packet and the injection communication data packet to obtain the test time stamp, the injection time stamp, the bypass data and the injection data, performing filtering prediction on the bypass data and the injection data according to the test time stamp and the injection time stamp to obtain a synchronous time stamp, time synchronous bypass data and time synchronous injection data, performing exception checking on bypass input and injection data corresponding to the synchronous time stamp according to the synchronous time stamp and the synchronous time stamp, and sending exception alarm information to the upper computer when an exception alarm condition is triggered.
CN202311838062.5A 2023-12-28 2023-12-28 Airplane ground test mode control method and system based on stm32 chip Pending CN117806887A (en)

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