CN117792369B - Key detection circuit of electronic equipment - Google Patents

Key detection circuit of electronic equipment Download PDF

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Publication number
CN117792369B
CN117792369B CN202410209420.4A CN202410209420A CN117792369B CN 117792369 B CN117792369 B CN 117792369B CN 202410209420 A CN202410209420 A CN 202410209420A CN 117792369 B CN117792369 B CN 117792369B
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resistor
triode
operational amplifier
twenty
detection unit
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CN117792369A (en
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刘文学
陈为国
刘斌
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Shenzhen Southern Intelligent Control Technology Co ltd
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Shenzhen Southern Intelligent Control Technology Co ltd
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Abstract

The invention discloses a key detection circuit of electronic equipment, which comprises a detection unit, wherein the detection unit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a first MOS (metal oxide semiconductor) tube, a second triode, a third triode, a fourth triode, a first optocoupler module, a second optocoupler module, a third silicon controlled rectifier and a first capacitor, and one end of the first resistor is connected with the output end of the first operational amplifier.

Description

Key detection circuit of electronic equipment
Technical Field
The present invention relates to the field of key switches, and in particular, to a key detection circuit of an electronic device.
Background
The existing key detection circuit generally adopts the voltage detection to the GPIO ports of each IC, and when the number of keys is large, the voltage of each key is detected by the ADC to finish function starting, but the GPIO port detection or the ADC function of the IC chip can only detect the voltage sampling of a single composite key or a plurality of keys in the ADC, and when the touch or the click or the long press of the key is used, the keys cannot be distinguished.
Disclosure of Invention
The invention aims to provide a key detection circuit of an electronic device, which comprises a detection unit, wherein the detection unit comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first operational amplifier U1, a second operational amplifier U2, a third operational amplifier U3, a fourth operational amplifier U4, a first MOS tube Q1, a second triode Q2, a third triode Q3, a fourth triode Q4, a first optocoupler module D1, a second optocoupler module D2, a third thyristor D3 and a first capacitor C1, one end of the first resistor R1 is connected with the output end of the first operational amplifier U1, the other end of the first resistor R1 is connected with one end of the second resistor R2, the source electrode of the first MOS tube Q1, the drain electrode of the first MOS tube Q1 is connected with the anode of the first optocoupler module D1, the grid electrode of the first MOS transistor Q1 is connected with the output end of the second operational amplifier U2, the in-phase end of the second operational amplifier U2 is connected with the anode of the second optocoupler module D2, one end of the third resistor R3 and the cathode of the third silicon controlled rectifier D3, the control electrode of the third silicon controlled rectifier D3 is connected with the output end of the third operational amplifier U3, the in-phase end of the third operational amplifier U3 is connected with one end of the fourth resistor R4, one end of the fifth resistor R5 and one end of the first capacitor C1, the other end of the fourth resistor R4 is connected with the emitter of the second triode Q2, the base electrode of the second triode Q2 is connected with the output end of the fourth operational amplifier U4, the in-phase end of the fourth operational amplifier U4 is connected with the base electrode of the third triode Q3 and the collector electrode of the fourth triode Q4, one end of the fourth triode Q4 is connected with one end of the sixth resistor R6, one end of the seventh resistor R7 and one end of the eighth resistor R8, the other end of the sixth resistor R6 is connected with the third triode Q3, the inverting terminal of the first operational amplifier U1 is connected, the other end of the seventh resistor R7 and the collector electrode of the second triode Q2 are connected with a power supply, and the emitter electrode of the third triode Q3, the other end of the second resistor R2, the other end of the third resistor R3, the other end of the fifth resistor R5, the other end of the eighth resistor R8, the cathode of the first optocoupler module D1 and the cathode of the second optocoupler module D2 are connected with a grounding terminal.
Further, the detection unit further includes a ninth resistor R9, a fifth triode Q5, a sixth triode Q6, a fourth diode D4, a fifth diode D5, a first switch S1, and a second switch S2, one end of the second switch S2 is connected to the same phase end of the fourth operational amplifier U4, an emitter of the fifth triode Q5 is connected to a collector of the third triode Q3, one end of the first switch S1 is connected to a base of the fifth triode Q5, an anode of the fourth diode D4 is connected to one end of the ninth resistor R9, a cathode of the fifth diode D5 is connected to a base of the fifth diode D5, an emitter of the sixth triode Q6, another end of the first switch S1, a collector of the fifth triode Q5, another end of the second switch S2 is connected to a power supply, and another end of the ninth resistor R9 is connected to ground.
Further, the integrated circuit further comprises an integrated unit, the integrated unit comprises a twenty-first resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23 and a first connecting end P1, one end of the twenty-first resistor R20 is connected with an emitter of the first optocoupler module D1, the other end of the twenty-first resistor R20 is connected with one end of the twenty-first resistor R21, one end of the twenty-second resistor R22, one end of the twenty-third resistor R23 and the first connecting end P1, the other end of the twenty-second resistor R22 is connected with an emitter of the second optocoupler module D2, and the other end of the twenty-first resistor R21, the other end of the twenty-third resistor R23 and the grounding end are connected.
Further, the detection unit further comprises a tenth resistor R10 and an eleventh resistor R11, one end of the tenth resistor R10 is connected with the same-phase end of the first operational amplifier U1 and one end of the eleventh resistor R11, the other end of the tenth resistor R10 is connected with a power supply, and the other end of the eleventh resistor R11 is grounded.
Further, the detection unit further comprises a twelfth resistor R12 and a thirteenth resistor R13, one end of the twelfth resistor R12 is connected with the inverting end of the fourth operational amplifier U4 and one end of the thirteenth resistor R13, the other end of the twelfth resistor R12 is connected with a power supply, and the other end of the thirteenth resistor R13 is connected with the ground.
Further, the detection unit further comprises a fourteenth resistor R14 and a fifteenth resistor R15, one end of the fourteenth resistor R14 is connected with the same-phase end of the second operational amplifier U2, one end of the fifteenth resistor R15 is connected, the other end of the fourteenth resistor R14 is connected with a power supply, and the other end of the fifteenth resistor R15 is connected with the ground.
Further, the detection unit further comprises a sixteenth resistor R16, one end of the sixteenth resistor R16 is connected with the base electrode of the third triode Q3, and the other end of the sixteenth resistor R16 is connected with the ground terminal.
Further, the detection unit further comprises a seventeenth resistor R17, one end of the seventeenth resistor R17 is connected with the grid electrode of the first MOS tube Q1, and the other end of the seventeenth resistor R17 is connected with the ground.
Further, the detection unit further comprises an eighteenth resistor R18 and a nineteenth resistor R19, one end of the eighteenth resistor R18 is connected with the inverting end of the third operational amplifier U3 and one end of the nineteenth resistor R19, the other end of the eighteenth resistor R18 is connected with a power supply, and the other end of the nineteenth resistor R19 is connected with the ground.
Compared with the prior art, the invention has the beneficial effects that:
The invention can detect the voltage in two different key modes through one GPIO port of the chip, has the ADC function of adaptive use, has one-key reset, can directly combine the detected ports for use, and has wide detection voltage range interval.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following description will briefly explain the drawings needed in the prior art and the embodiments, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a circuit configuration diagram of a detection unit provided by the present invention.
Fig. 2 is a circuit configuration diagram of a merging unit provided by the present invention.
Detailed Description
In order that the objects and advantages of the invention will become more readily apparent, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings, it being understood that the following text is only intended to describe one or more specific embodiments of the invention and is not intended to limit the scope of the invention as defined in the appended claims.
Considering that the GPIO port detection or the ADC detection of the chip can only use a single composite key to close or a plurality of keys in the ADC to complete voltage sampling detection, when the touch or the click of the key or the long press is used, two key mode detection can not be completed through one GPIO port or the ADC, therefore, the first optocoupler module D1 is conducted when the key performs the click to the falling edge of the input signal of the base electrode of the third triode Q3, the second optocoupler module D2 is conducted when the key performs the touch and the long press, the first optocoupler module D1 and the second optocoupler module D2 are coupled to the GPIO port to complete acquisition, the principle is that when the base electrode of the third triode Q3 inputs the key signal, the third triode Q3 is conducted, the potential of the end of the third triode Q3 is pulled up, the first operational amplifier U1 does not output at the moment, when the touch or key is not pressed for a long time and the falling edge is disconnected, the collector signal of the fourth triode Q4 is still amplified through the base electrode of the third triode Q3, the base electrode of the fourth triode Q4 is pulled down through the collector electrode of the third triode Q3 and the grounding end loop, the potential of the end of the third triode Q3 is pulled down, the first operational amplifier U1 outputs a signal, the signal is coupled and output to GPIO through the first resistor R1, the first MOS tube Q1 and the first optocoupler module D1, when the key is pressed and pressed for a long time, the fourth operational amplifier U4 outputs to enable the second triode Q2 to be conducted when the key signal is input to the base electrode of the third triode Q3, the second triode Q2 outputs a signal to the third controllable silicon D3 through the fourth resistor R4 and the first capacitor C1, the third controllable silicon D3 conducts a signal path to enable the second optocoupler module D2 to be coupled and output to GPIO, and when the key signal is pressed for a long time, the other path of the conduction signal of the third silicon controlled rectifier D3 outputs a power supply approaching voltage signal to the first MOS tube Q1 through the second operational amplifier U2, the first MOS tube Q1 is cut off after the voltage is divided by the first resistor R1 and the second resistor R2, the first optocoupler module D1 stops coupling, signal collision is avoided, two key mode detection of the same port is completed, the anode of the third silicon controlled rectifier D3, the inverting end of the first operational amplifier U1, the inverting end of the fourth operational amplifier U4, the inverting end of the third operational amplifier U3 and the inverting end of the second operational amplifier U2 are provided with reference voltages, and the reference voltages are set according to requirements through the modes such as upper chip supply or power supply voltage division.
Considering that the voltage at the end of the first operational amplifier U1 can not be stabilized in the power-on process and enter a stable state if overvoltage occurs during power-on only through a power-off mode, so that the sixth triode Q6 supplies power to the third triode D3 after passing through the fifth diode D5 when no reset is performed, the fifth triode Q5 supplies power to the third triode Q3, when the base electrode of the fifth triode Q5 inputs signals through the first switch S1, one way enables the sixth triode Q6 to be cut off, the other way feeds back to the base electrode of the fourth triode Q4 through the fifth triode Q5, and the fourth triode Q4 is cut off after the first switch S1 is disconnected, so that reset is completed.
Considering that the signals coupled by the first optocoupler module D1 and the second optocoupler module D2 are combined and detected, the emitter of the first optocoupler module D1 is connected in series through a twenty-second resistor R20 and a twenty-first resistor R21, the emitter of the second optocoupler module D2 is connected in series through a twenty-second resistor R22 and a twenty-third resistor R23, the end points between the twenty-first resistor R20 and the twenty-first resistor R21 and the end points between the twenty-second resistor R22 and the twenty-third resistor R23 are fed back to the first connecting end P1 in parallel, the first connecting end P1 is connected with the GPIO port, and the two series resistors of the first optocoupler module D1 and the second optocoupler module D2 are respectively provided with different voltage division coefficients, so that the GPIO port of the first optocoupler module D1 and the second optocoupler module D2 can be combined and collected during coupling, and when the ADC is adopted, the power supply of all detecting units D1 and D2 is replaced with the keys of the ADC, the end points between the twenty-first resistor R20 and the twenty-first resistor R21 and the end points between the twenty-third resistor R22 and the twenty-third resistor R23 are removed, and the end points are arranged in parallel.
The sixteenth resistor R16 is used for a third triode Q3 loop to prevent backflow, the seventeenth resistor R17 is used for discharging parasitic capacitance in the first MOS transistor Q1 to prevent oscillation caused by fast switching, and the tenth resistor R10 and the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13, the fourteenth resistor R14 and the fifteenth resistor R15, the eighteenth resistor R18 and the nineteenth resistor R19 are respectively used for reference signal voltage division setting of the first operational amplifier U1, the fourth operational amplifier U4, the second operational amplifier U2 and the third operational amplifier U3.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims (4)

1. A key detection circuit of electronic equipment is characterized by comprising a detection unit, wherein the detection unit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a first MOS transistor, a second triode, a third triode, a fourth triode, a first optocoupler module, a second optocoupler module, a third thyristor and a first capacitor, one end of the first resistor is connected with the output end of the first operational amplifier, the other end of the first resistor is connected with one end of the second resistor, the source electrode of the first MOS transistor is connected with the drain electrode of the first MOS transistor, the same phase end of the second operational amplifier is connected with the anode of the second optocoupler module, one end of the third resistor, the third thyristor is connected with the cathode of the third MOS transistor, the third triode is connected with the output end of the third operational amplifier, the third triode, the fourth triode is connected with the same phase end of the third operational amplifier, the other end of the third triode is connected with the collector electrode of the fourth resistor, the other end of the third MOS transistor is connected with the drain electrode of the fourth resistor, the third resistor is connected with the drain electrode of the third resistor, the third resistor is connected with the drain electrode of the fourth resistor, the drain electrode of the third resistor is connected with the drain electrode of the third resistor, the third resistor is connected with the drain electrode of the third resistor, the other end of the third resistor, the other end of the fifth resistor, the other end of the eighth resistor, the cathode of the first optocoupler module and the cathode of the second optocoupler module are connected with the grounding end;
The detection unit further comprises a ninth resistor, a fifth triode, a sixth triode, a fourth diode, a fifth diode, a first switch and a second switch, wherein one end of the second switch is connected with the same phase end of the fourth operational amplifier, the emitter of the fifth triode is connected with the collector of the third triode, one end of the first switch is connected with the base of the fifth triode and the anode of the fourth diode, the cathode of the fourth diode is connected with one end of the ninth resistor and the cathode of the fifth diode, the anode of the fifth diode is connected with the base of the sixth triode, the emitter of the sixth triode, the other end of the first switch, the collector of the fifth triode and the other end of the second switch are connected with a power supply, the other end of the ninth resistor is connected with the ground, and the collector of the sixth triode is connected with the anode of the third controllable silicon;
The detection unit further comprises a tenth resistor and an eleventh resistor, one end of the tenth resistor is connected with the same-phase end of the first operational amplifier and one end of the eleventh resistor, the other end of the tenth resistor is connected with a power supply, and the other end of the eleventh resistor is grounded;
The detection unit further comprises a twelfth resistor and a thirteenth resistor, one end of the twelfth resistor is connected with the inverting end of the fourth operational amplifier and one end of the thirteenth resistor, the other end of the twelfth resistor is connected with a power supply, and the other end of the thirteenth resistor is connected with the ground;
the detection unit further comprises a fourteenth resistor and a fifteenth resistor, one end of the fourteenth resistor is connected with the inverting end of the second operational amplifier and one end of the fifteenth resistor, the other end of the fourteenth resistor is connected with a power supply, and the other end of the fifteenth resistor is connected with the ground;
The detection unit further comprises an eighteenth resistor and a nineteenth resistor, one end of the eighteenth resistor is connected with the inverting end of the third operational amplifier and one end of the nineteenth resistor, the other end of the eighteenth resistor is connected with a power supply, and the other end of the nineteenth resistor is connected with ground.
2. The key detection circuit of an electronic device according to claim 1, further comprising a merging unit, wherein the merging unit comprises a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, and a first connection end, one end of the twentieth resistor is connected to the emitter of the first optocoupler module, the other end of the twentieth resistor is connected to one end of the twenty-first resistor, one end of the twenty-second resistor, one end of the twenty-third resistor, the first connection end is connected to one end of the first resistor, the other end of the twenty-second resistor is connected to the emitter of the second optocoupler module, the other end of the twenty-first resistor, the other end of the twenty-third resistor is connected to the ground, and the collector of the second optocoupler module, the collector of the first optocoupler module, and a power supply are connected.
3. The key detection circuit of the electronic device according to claim 1, wherein the detection unit further comprises a sixteenth resistor, one end of the sixteenth resistor is connected to the base of the third triode, and the other end of the sixteenth resistor is connected to the ground terminal.
4. The key detection circuit of the electronic device according to claim 1, wherein the detection unit further comprises a seventeenth resistor, one end of the seventeenth resistor is connected with the gate of the first MOS transistor, and the other end of the seventeenth resistor is connected with the ground.
CN202410209420.4A 2024-02-26 2024-02-26 Key detection circuit of electronic equipment Active CN117792369B (en)

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CN113193862A (en) * 2021-04-30 2021-07-30 湘潭电道科技有限公司 Electric shock prevention multiplexed output intelligence switch
WO2023070783A1 (en) * 2021-10-27 2023-05-04 深圳市爱图仕影像器材有限公司 Power source circuit, working method for power source circuit, and illumination apparatus

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