CN117792296A - Operational amplifier circuit and hall sensor circuit - Google Patents
Operational amplifier circuit and hall sensor circuit Download PDFInfo
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Abstract
The application provides an operational amplifier circuit and a hall sensor circuit, the operational amplifier circuit includes: the input tube, the amplifying module and the chopper module of concatenating in proper order, input signal is connected to the first end of input tube, the second end of input tube is connected amplifying module's input, chopper module's output signal, and feedback connection the third end of input tube. The operational amplifier circuit has higher input impedance, reduces a noise source, and has low noise, lower power consumption and higher precision. The Hall sensor circuit uses the operational amplifier circuit as an intermediate-stage amplifying circuit, uses the double-sampling operational amplifier comparator as an output-stage amplifying circuit to form a discrete system architecture, or uses a closed-loop amplifier with low-pass filtering to form a continuous system architecture, so that the offset ripple waves can be completely eliminated, and the output of useful signals is realized.
Description
Technical Field
The application relates to the technical field of circuits, in particular to an operational amplifier circuit and a Hall sensor circuit.
Background
The Hall element has the advantages of small volume, shock resistance, impact resistance, high frequency, integration on a silicon chip and the like, and is widely applied to a sensor for detecting a magnetic field. Compared with other magnetic sensors, the Hall sensor has the characteristics of high linearity and good consistency, but has the advantages of general sensitivity, large offset voltage relative to induction signals and serious limitation on the measurement accuracy of the Hall sensor. Methods for reducing the influence of offset voltage of a Hall sensor on measurement are mainly divided into two types: static methods and dynamic methods. The static method adopts a mode that a plurality of Hall sensors are connected in parallel to counteract offset voltages of the Hall sensors, and has a general effect, and offset voltages close to the amplitude of the induction signals remain in the method. The dynamic method adopts two of four ports of the periodic rotation excitation Hall sensor, and correspondingly carries out voltage detection on the other two ports, so that offset voltage can be effectively modulated to high frequency, the frequency of the signal is unchanged, and the modulated offset voltage is filtered and eliminated by a low-pass filter, and the signal is reserved. Therefore, in the circuit of the high-precision Hall sensor, the high input impedance (in order to prevent the sensitivity deviation caused by the fact that the excitation current of the Hall element is extracted or injected by the establishment of signals), the high-precision gain and the low noise are important points of design, and the operational amplifier can be matched with the operational amplifier for dynamically eliminating the offset voltage of the Hall sensor.
The common methods are two, namely a current feedback instrument amplifier and a current feedback operational amplifier with a source degeneration resistor. For the current feedback instrument amplifier, as the offset exists between the transconductance unit of the original input and the transconductance unit of the feedback input, the offset and the temperature drift of the transconductance unit can reach 2 percent, which is far greater than the matching offset of the resistance feedback network, and has great influence on the gain. The transconductance units of the two inputs are two noise sources, so that the operational amplifier noise is remarkably increased, and in consideration of low-noise design, the currents of the transconductance units of the two inputs are large enough to reduce noise, and one path of power consumption and one path of area are additionally consumed. For a current feedback operational amplifier with a source degeneration resistor, the bias current of a differential input pair is two current sources, the offset of the two current sources can directly cause the offset of the operational amplifier, the sources of the offset are more, the offset of the operational amplifier is larger, and the ripple wave generated by the offset is larger, so that the signal processing is not facilitated. The MOS tubes can all contribute noise, and multiple paths of large currents are consumed for biasing, so that the MOS tubes are unfavorable for low noise and low power consumption. The amplitude of the input differential signal is transferred to a degradation resistor, the resistance noise is considered, the resistance value is small, under the condition that the input differential signal is large, differential currents on the degradation resistor and an output load resistor are large, the corresponding current sources can meet the maximum differential currents, the power consumption cannot be reduced, and MOS tubes for passing the differential currents also need a large enough area. Therefore, the input range of the operational amplifier is limited in consideration of power consumption, area and circuit stability.
Disclosure of Invention
Based on the foregoing background art, an object of the present application is to provide an operational amplifier circuit and a hall sensor circuit with high impedance input, low power consumption and low noise.
In order to achieve the above object, the present application provides an operational amplifier circuit including: the input tube, the amplifying module and the chopper module of concatenating in proper order, input signal is connected to the first end of input tube, the second end of input tube is connected amplifying module's input, chopper module's output signal, and feedback connection the third end of input tube.
In an embodiment, the operational amplifier circuit further includes a clamp tube, the second end of the input tube is connected to the input end of the amplifying module via the clamp tube, the first end of the clamp tube is connected to the first end of the input tube, the third end of the clamp tube is connected to the second end of the input tube, and the second end of the clamp tube is connected to the input end of the amplifying module.
In an embodiment, the operational amplifier circuit further includes a voltage division feedback network, the output end of the chopper module is connected to the third end of the input tube through the voltage division feedback network, the first end of the voltage division feedback network is connected to the output end of the chopper module, the second end of the voltage division feedback network is grounded, and the voltage division node of the voltage division feedback network is connected to the third end of the input tube.
In an embodiment, the operational amplifier circuit further includes a first current source, a second current source, a first end of the first current source being connected to the third end of the input tube or the second end of the voltage division feedback network, a first end of the second current source being connected to the second end of the clamp tube; the second end of the first current source is connected with the working voltage, the second end of the second current source is grounded, or the second end of the first current source is grounded, and the second end of the second current source is connected with the working voltage.
In an embodiment, the input tube includes a first MOS tube and a second MOS tube, the clamp tube includes a third MOS tube and a fourth MOS tube, the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are PMOS, the first ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are gate ends, the first ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are drain ends, the input ends of the amplifying module include a positive phase input end and an inverted input end, the first ends of the first MOS tube and the second MOS tube form a pair of differential signal input ends together, the first ends of the third MOS tube are connected with the first end of the first MOS tube, the first end of the third MOS tube is connected with the second end of the first MOS tube, the second ends of the chopper tube, the second end is connected with the free end of the second MOS tube, the second end is connected with the free end of the fourth MOS tube, the feedback resistor is connected with the third end of the fourth MOS tube, the free end is connected with the free end of the fourth MOS tube, the free end is connected with the fourth resistor, the free end of the free end is connected with the third resistor, the third resistor is connected with the third resistor, the two second current sources are respectively connected between the second end of the third MOS tube or the second end of the fourth MOS tube and the ground.
In an embodiment, the input tube includes a first MOS tube and a second MOS tube, the clamp tube includes a third MOS tube and a fourth MOS tube, the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all NMOS, the first ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all gate ends, the first ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all drain ends, the input ends of the amplifying module include a positive phase input end and an inverted input end, the first ends of the first MOS tube and the second MOS tube form a pair of differential signal input ends together, the first ends of the third MOS tube are connected with the first end of the first MOS tube, the first end of the third MOS tube is connected with the second end of the chopper tube, the second ends of the third MOS tube are all connected with the free ends of the chopper tube, the second end of the third MOS tube is connected with the free end of the fourth MOS tube, the fourth MOS tube is connected with the free end of the fourth MOS tube, the third end is connected with the free end of the third end of the voltage dividing resistor, the fourth resistor is connected with the free end of the fourth MOS tube, the free end of the fourth resistor is connected with the third end of the free end of the third resistor is connected with the third resistor, the third resistor is connected with the first end of the third MOS tube is connected with the first end of the first resistor is connected to the first resistor, the two second current sources are respectively connected between the second end of the third MOS tube or the second end of the fourth MOS tube and the working voltage.
In an embodiment, the amplifying module includes a first amplifier and a second amplifier, the chopping module includes a first chopper and a second chopper, the first amplifier, the first chopper, the second amplifier and the second chopper are sequentially connected in series, an input end of the first amplifier is an input end of the amplifying module, and an output end of the second chopper is an output end of the chopping module; and a miller capacitor is connected in series between the input end and the output end of the second amplifier.
In an embodiment, the voltage division feedback network is replaced by a resistive feature element, the second current source is replaced by a current source load or a resistive load, the first amplifier is a resistor unit or a voltage amplifying unit, and the second amplifier is a transconductance unit or a standard amplifying unit.
The present application also provides a hall sensor circuit, which includes: the Hall sensor, the rotary switch circuit, the intermediate-stage amplifying circuit, the output-stage amplifying circuit and the synchronous clock generator which are connected with the rotary switch circuit, the intermediate-stage amplifying circuit and the output-stage amplifying circuit in sequence are connected in series, the intermediate-stage amplifying circuit is an operational amplifier circuit as described above, and the output-stage amplifier is a double-sampling operational amplifier comparator.
In an embodiment, the output stage amplifying circuit is replaced by a closed loop amplifier with low-pass filtering, and the closed loop amplifier comprises a third amplifying circuit, a third chopper, a first capacitor, a fifth resistor and a sixth resistor, wherein a first end of the fifth resistor is connected with an output end of the intermediate stage amplifying circuit, a second end of the fifth resistor is connected with an input end of the third amplifying circuit, an output end of the third amplifying circuit is an output end of the output stage amplifying circuit and is in feedback connection with a first end of the sixth resistor, a second end of the sixth resistor is connected with an input end of the third chopper, an output end of the third chopper is connected with an input end of the third amplifying circuit, and two ends of the sixth resistor are connected with the first capacitor in parallel.
In an embodiment, the third amplifying circuit includes a third amplifier, a fourth chopper, and a fourth amplifier sequentially connected in series, an input end of the third amplifier is an input end of the third amplifying circuit, an output end of the fourth amplifier is an output end of the third amplifying circuit, the third amplifier is a standard amplifier, and the fourth amplifier is a transconductance amplifier.
The operational amplifier circuit comprises an input tube, an amplifying module and a chopping module, wherein an input signal is connected to the input tube and has higher input impedance, an output signal is fed back to the input tube to form negative feedback, an additional input stage is omitted, a noise source is reduced, noise is lower, and power consumption is low. In addition, the gain precision is higher. The Hall sensor circuit uses the operational amplifier circuit as an intermediate-stage amplifying circuit, uses the double-sampling operational amplifier comparator as an output-stage amplifying circuit to form a discrete system architecture, or uses a closed-loop amplifier with low-pass filtering to form a continuous system architecture, so that the offset ripple waves can be completely eliminated, and the output of useful signals is realized.
Drawings
The drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure in any way. In addition, the shapes, proportional sizes, and the like of the respective components in the drawings are merely illustrative for aiding the understanding of the present application, and are not particularly limited. Those skilled in the art who have the benefit of the teachings of this application may select various possible shapes and scale dimensions to practice this application as the case may be. In the drawings:
fig. 1 is a schematic structural diagram of a first embodiment of an operational amplifier circuit according to a first embodiment of the present application;
fig. 2 is a schematic structural diagram of a second embodiment of an operational amplifier circuit according to the first embodiment of the present application;
fig. 3 is a schematic structural diagram of a first specific example of a hall sensor circuit according to a second embodiment of the present application;
fig. 4 is a schematic structural diagram of a second specific example of a hall sensor circuit according to a second embodiment of the present application;
fig. 5 is a schematic structural diagram of a third amplifying circuit in a second embodiment of a hall sensor circuit according to a second embodiment of the present application.
Detailed Description
In order to better understand the technical solutions in the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
Referring to fig. 1, a first embodiment of the present application provides an operational amplifier circuit, which includes: the input tube, the amplifying module and the chopper module of concatenating in proper order, input signal is connected to the first end of input tube, the second end of input tube is connected amplifying module's input, chopper module's output signal, and feedback connection the third end of input tube. The amplified and chopped output signals are fed back to the input tube to form negative feedback, so that an additional input stage is omitted, and noise sources are reduced.
In an embodiment, the operational amplifier circuit further includes a clamp tube, the second end of the input tube is connected to the input end of the amplifying module via the clamp tube, the first end of the clamp tube is connected to the first end of the input tube, the third end of the clamp tube is connected to the second end of the input tube, and the second end of the clamp tube is connected to the input end of the amplifying module. The clamp tube can ensure that the pressure difference of the input tube is fixed, and the gain change of the input tube caused by the modulation action of voltage change is eliminated, so that the gain accuracy is further ensured.
In an embodiment, the operational amplifier circuit further includes a voltage division feedback network, the output end of the chopper module is connected to the third end of the input tube through the voltage division feedback network, the first end of the voltage division feedback network is connected to the output end of the chopper module, the second end of the voltage division feedback network is grounded, and the voltage division node of the voltage division feedback network is connected to the third end of the input tube. The voltage division feedback network feeds back the differential mode signal and also feeds back the common mode signal, so that the operational amplifier circuit does not need additional common mode feedback to stably output a common mode.
Of course, the operational amplifier circuit needs to work and also needs a working power supply, so the operational amplifier circuit further comprises a first current source I1 and a second current source I2, wherein a first end of the first current source I1 is connected with a third end of the input tube or a second end of the voltage division feedback network, and a first end of the second current source I2 is connected with a second end of the clamp tube; the second end of the first current source I1 is connected to the operating voltage VDD, the second end of the second current source is grounded to VSS (this corresponds to the case where the input tube is PMOS, described in detail later), or the second end of the first current source I1 is grounded to VSS, and the second end of the second current source I2 is connected to the operating voltage VDD (this corresponds to the case where the input tube is NMOS, described in detail later). The first end of the first current source I1 can be directly connected with the third end of the input tube so as to supply power to a circuit; or may be connected to the second end of the voltage division feedback network, which is not required to be grounded.
In a specific embodiment, the input signal is a differential signal, the input tube includes a first MOS tube M1 and a second MOS tube 2, the clamp tube includes a third MOS tube M3 and a fourth MOS tube M4, the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are PMOS, the first end of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the first end of the fourth MOS tube M4 are gate ends, the second end of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the second end of the fourth MOS tube M4 are drain ends, the third end of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the third end of the fourth MOS tube M4 are source ends, the input end of the amplifier module includes a positive phase input end and an inverting input end, the first end of the first MOS tube M1, the second MOS tube M2, the second end of the second MOS tube M2, the free end of the third MOS tube M2, the third end of the amplifier module is connected with the free end of the resistor R1, the third end of the third MOS tube R3 is connected with the third end of the amplifier network, the third end of the resistor R1, the third end of the resistor R3 is connected to the third end of the third MOS tube M3, the third end of the amplifier network is connected to the third end of the third MOS tube M3, the third end of the resistor R3, the third end of the amplifier M4 is connected to the third end of the amplifier, the free ends of the fourth resistor R4 are the first ends of the voltage division feedback network and are connected with the output end of the chopping module, the output end of the chopping module is a differential signal output end, the number of the second current sources I2 is two, the two second current sources I2 are respectively connected between the second end of the third MOS tube M3 or the second end of the fourth MOS tube M4 and the ground VSS, and the connection point of the first resistor R1 and the third resistor R3 and the connection point of the second resistor R2 and the fourth resistor R4 are the voltage division nodes of the voltage division feedback network and are connected with the third end of the input tube.
According to the operational amplifier circuit, an input signal is connected to the gate end of the MOS tube, and the operational amplifier circuit has higher input impedance. The output signal is fed back to the source end of the input tube, negative feedback is formed by the output signal and the input signal at the gate end, the extra input stage is omitted, a noise source is reduced, the noise is low, and the power consumption is low. The first resistor R1, the second resistor R2 and the input tube of the voltage division feedback network form source degeneration, and the offset introduced by the MOS tube is reduced. And the differential mode feedback and the common mode feedback formed by the voltage division feedback network and the input tube do not need an additional common mode feedback circuit to stably output. Under the condition of closed loop stability, the current generated by the differential amplitude of the feedback voltage is absorbed by the virtual place of the negative end of the first current source I1, the current of the input tube is fixed, the gate-source voltage Vgs of the input tube is fixed, the influence of the input differential amplitude is avoided, a larger differential input range can be supported, and the magnetic field detection in a larger range is met. The drain end of the clamp pipe is connected with the source end of the input pipe, the gate end of the clamp pipe is also connected with the input signal, and the input signal is moved to the source end of the clamp pipe under fixed current, namely the drain end of the input pipe, so that the pressure difference of the source end and the drain end of the input pipe can be ensured to be fixed, the gain change of the input pipe caused by the modulation effect of the source-drain voltage change is eliminated, and the gain precision is further ensured. Wherein the threshold of the clamp tube (lvt) is lower than the threshold of the input tube, and the threshold of the clamp tube (nvt) is preferably zero. Of course, a clamp tube is not necessary, and in the case of a process in which the drain-source differential modulation effect is not significant (such as a FinFET) or a Bipolar Junction Transistor (BJT), the clamp tube may not be provided.
Referring to fig. 2, in another embodiment, the input tube includes a first MOS tube M1 and a second MOS tube M2, the clamp tube includes a third MOS tube M3 and a fourth MOS tube M4, the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are all NMOS, the first ends of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are all gate ends, the second ends of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are all drain ends, the third ends of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 are all source ends, the input ends of the amplifying module include a positive phase input end and an inverse phase input end, the first ends of the first MOS tube M1 and the second MOS tube M2 form a differential pair of first ends of the first MOS tube M1 and the first end of the first end M3 are connected, the third end of the third MOS tube M3 is connected with the second end of the first MOS tube M1, the first end of the fourth MOS tube M4 is connected with the first end of the second MOS tube M2, the third end of the fourth MOS tube M4 is connected with the second end of the second MOS tube M2, the second end of the third MOS tube M3 and the second end of the fourth MOS tube M4 are respectively connected with the normal-phase input end and the reverse-phase input end of the amplifying module, the voltage division feedback network is two and respectively comprises a first resistor R1 and a third resistor R3 which are connected with each other, a second resistor R2 and a fourth resistor R4 which are connected with each other, the free end of the first resistor R1 and the free end of the second resistor R2 are both the second end of the voltage division feedback network and are connected with the first end of the first current source I1, the second end of the first current source I1 is grounded to VSS, and the free end of the third resistor R3 is grounded to VSS, the free ends of the fourth resistor R4 are the first ends of the voltage division feedback network and are connected with the output end of the chopping module, the output end of the chopping module is a differential signal output end, and the two second current sources I2 are respectively connected between the second end of the third MOS tube M3 or the second end of the fourth MOS tube M4 and the working voltage VDD. It will be readily appreciated that the embodiment shown in fig. 2 also has the same technical effects as the embodiment shown in fig. 1.
As shown in fig. 1 and fig. 2 in combination, in any embodiment, the amplifying module includes a first amplifier A1 and a second amplifier A2, the chopper module includes a first chopper1 and a second chopper2, the first amplifier A1, the first chopper1, the second amplifier A2, and the second chopper2 are sequentially connected in series, an input end of the first amplifier A1 is an input end of the amplifying module, and an output end of the second chopper2 is an output end of the chopper module; and a miller capacitor is connected in series between the input end and the output end of the second amplifier A2. Thus, when the input signal is a square wave signal (useful signal) including a high frequency and a direct current signal (offset voltage) including a low frequency, the input signal is superimposed with the offset voltage of the first amplifier A1 after being input to the first amplifier A1, the superimposed offset voltage and flicker noise are modulated to a high frequency by the first chopper1, and attenuated by the low-pass filter composed of the second amplifier A2 and miller capacitance; the first chopper1 modulates offset voltage and flicker noise to high frequency, modulates a useful signal of high frequency to low frequency, amplifies the useful signal by the second amplifier A2, modulates the useful signal to high frequency by the second chopper2, modulates the residual offset voltage to low frequency, and then outputs the modulated useful signal. The output signal is fed back to the source end of the input tube through the partial pressure feedback network to form negative feedback, and the closed loop gain is (R3+R1)/R1.
In an embodiment, the voltage division feedback network may be replaced by a resistive feature element, the second current source is replaced by a current source load or a resistive load, the first amplifier is a resistor unit or a voltage amplifying unit, and the second amplifier is a transconductance unit or a standard amplifying unit.
Referring to fig. 3, a third embodiment of the present application provides a hall sensor circuit, which includes: the Hall sensor HALL, the rotary switch Circuit SPIN Circuit, the intermediate stage amplifying Circuit G10, the output stage amplifying Circuit G20 and the synchronous clock generator connected with the rotary switch Circuit SPIN Circuit, the intermediate stage amplifying Circuit G10 and the output stage amplifying Circuit G20 are sequentially connected in series, the intermediate stage amplifying Circuit G10 is an operational amplifier Circuit as described above, and the output stage amplifier G20 is a double sampling operational amplifier comparator (CDS AMP/CMP). The rotary switch Circuit SPIN Circuit periodically and rotationally excites two of the four ports of the HALL sensor HALL, and outputs the voltages (i.e., HALL signals) of the other two ports, and the rotary excitation can modulate the HALL signals of the HALL sensor HALL to a square wave signal (useful signal) at a rotary frequency, the offset voltage is modulated to a low frequency, and the offset voltage becomes a direct current signal, and the direct current signal is input to the intermediate-stage amplifier G10. As described above, the intermediate stage amplifying circuit G10 outputs the high-frequency useful signal and the low-frequency offset voltage, and the output stage amplifying circuit G20 is connected to the rear of the intermediate stage amplifying circuit, so that the offset ripple wave can be completely eliminated by the two-phase sampling, and the rectification/threshold comparison of the signals can be realized.
Referring to fig. 4, a fourth embodiment of the present application provides a hall sensor circuit, which is different from the hall sensor circuit shown in fig. 3 in that the output stage amplifying circuit is replaced by a closed loop amplifier with low-pass filtering, and includes a third amplifying circuit G30, a third chopper choper 3, a first capacitor C1, a fifth resistor R5, and a sixth resistor R6, wherein a first end of the fifth resistor R5 is connected to an output end G10 of the intermediate stage amplifying circuit, a second end of the fifth resistor R5 is connected to an input end of the third amplifying circuit G30, an output end of the third amplifying circuit G30 is an output end of the output stage amplifying circuit, and is connected in feedback to a first end of the sixth resistor R6, a second end of the sixth resistor R6 is connected to an input end of the third chopper choper 3, an output end of the third chopper choper 3 is connected to an input end of the third amplifying circuit G30, and two ends of the sixth resistor R6 are connected in parallel to the first capacitor C1. The hall signal modulated to high frequency output by the intermediate stage amplifying circuit G0 is modulated to low frequency by the third chopper3, the residual detuned ripple and flicker noise modulated to low frequency are modulated to high frequency by the third chopper3, and the ripple is further attenuated by the low-pass filter composed of the sixth resistor R6 and the first capacitor C1, thereby realizing further amplification of the signal and continuously outputting.
Referring to fig. 5, in a specific embodiment, the third amplifying circuit G30 includes a third amplifier A3, a fourth chopper4, and a fourth amplifier G4 sequentially connected in series, wherein an input end of the third amplifier A3 is an input end of the third amplifying circuit G30, an output end of the fourth amplifier G4 is an output end of the third amplifying circuit G30, the third amplifier A3 is a standard amplifier, and the fourth amplifier G4 is a transconductance amplifier. In the signal output by the intermediate-stage amplifying circuit G10, the hall signal is modulated at a high frequency, the residual ripple is modulated at a low frequency, the fourth chopper4 of the third amplifying circuit G30 modulates the hall signal back to the low frequency, the residual ripple is modulated to the high frequency, and the feedback network composed of the sixth resistor R6 and the fifth resistor R5 feeds back the hall signal to the input end of the third amplifying circuit G30 to form a closed loop.
The operational amplifier circuit comprises an input tube, an amplifying module and a chopping module which jointly form a feedback structure (therefore, the operational amplifier can be called as a chopping amplifier), an input signal is connected to the input tube and has higher input impedance, an output signal is fed back to the input tube to form negative feedback, an additional input stage is omitted, a noise source is reduced, the noise is lower, and the power consumption is also low. And the differential mode feedback and the common mode feedback formed by the voltage division feedback network and the input tube do not need an additional common mode feedback circuit to stably output. The partial pressure feedback network and the input tube form source degeneration at the same time, and the offset introduced by the input tube is reduced. Under the condition of closed loop stability, the current generated by the differential amplitude of the feedback voltage is absorbed by the virtual place of the negative end of the first current source, the current of the input tube is fixed, the gate-source voltage of the input tube is fixed and is not influenced by the input differential amplitude, and a larger differential input range can be supported, namely, the magnetic field detection in a larger range is satisfied. The clamp tube can ensure the fixed pressure difference of the source and drain ends of the input tube, eliminate the gain change of the input tube caused by the modulation action of the source and drain voltage change, and further ensure the gain precision.
The Hall sensor circuit uses the operational amplifier circuit as an intermediate-stage amplifying circuit, uses the double-sampling operational amplifier comparator as an output-stage amplifying circuit to form a discrete system architecture, or uses a closed-loop amplifier (current feedback operational amplifier) with low-pass filtering to form a continuous system architecture, so that the offset ripple waves can be completely eliminated, and the output of useful signals can be realized. Moreover, the method can be applied to scenes of single input, double input, four input, six input and the like. Further, the rotary switch circuit may employ not only two-phase timing but also four-phase timing.
It is to be understood that the above description is intended to be illustrative, and not restrictive. Many embodiments and many applications other than the examples provided will be apparent to those of skill in the art upon reading the above description. The scope of the present teachings should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. The disclosures of all articles and references, including patent applications and publications, are incorporated herein by reference for the purpose of completeness. The omission of any aspect of the subject matter disclosed herein in the preceding claims is not intended to forego such subject matter, nor should the applicant be deemed to have such subject matter not considered to be part of the subject matter of the disclosed application.
Claims (11)
1. An operational amplifier circuit, comprising: the input tube, the amplifying module and the chopper module of concatenating in proper order, input signal is connected to the first end of input tube, the second end of input tube is connected amplifying module's input, chopper module's output signal, and feedback connection the third end of input tube.
2. The operational amplifier circuit of claim 1, further comprising a clamp tube, the second end of the input tube being connected to the input of the amplification module via the clamp tube, the first end of the clamp tube being connected to the first end of the input tube, the third end of the clamp tube being connected to the second end of the input tube, the second end of the clamp tube being connected to the input of the amplification module.
3. The operational amplifier circuit of claim 2, further comprising a voltage division feedback network, wherein the output of the chopper module is connected to the third terminal of the input tube via the voltage division feedback network, wherein a first terminal of the voltage division feedback network is connected to the output of the chopper module, wherein a second terminal of the voltage division feedback network is grounded, and wherein a voltage division node of the voltage division feedback network is connected to the third terminal of the input tube.
4. The operational amplifier circuit of claim 3, further comprising a first current source having a first end connected to a third end of the input tube or a second end of the voltage dividing feedback network, and a second current source having a first end connected to a second end of the clamp tube; the second end of the first current source is connected with the working voltage, the second end of the second current source is grounded, or the second end of the first current source is grounded, and the second end of the second current source is connected with the working voltage.
5. The operational amplifier circuit of claim 4, wherein the input tube comprises a first MOS tube and a second MOS tube, the clamp tube comprises a third MOS tube and a fourth MOS tube, the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all PMOS, the first ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all grid ends, the second ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all drain ends, the third ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all source ends, the input ends of the amplifying module comprise a positive input end and an inverted input end, the first ends of the first MOS tube and the second MOS tube jointly form a first pair of differential signal input ends, the first ends of the third MOS tube are connected with the first ends of the first MOS tube, the third MOS tube are all connected with the third ends of the first MOS tube, the second ends of the third MOS tube are all free ends, the second ends of the third MOS tube are all connected with the second MOS tube, the second ends of the fourth MOS tube are all free ends, the feedback resistor is connected with the fourth MOS tube, the first ends of the fourth MOS tube are all connected with the free ends of the fourth MOS tube, the feedback resistor is connected with the fourth resistor, the first ends of the fourth MOS resistor is connected with the fourth resistor is connected with the first end of the first resistor, the first resistor is connected with the fourth resistor, the output ends of the chopper modules are differential signal output ends, and the number of the second current sources is two and the second current sources are respectively connected between the second end of the third MOS tube or the second end of the fourth MOS tube and the ground.
6. The operational amplifier circuit of claim 4, wherein the input tube comprises a first MOS tube and a second MOS tube, the clamp tube comprises a third MOS tube and a fourth MOS tube, the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all NMOS, the first ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all grid ends, the second ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all drain ends, the third ends of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all source ends, the input ends of the amplifying module comprise a positive input end and an inverted input end, the first ends of the first MOS tube and the second MOS tube jointly form a pair of differential signal input ends, the first ends of the third MOS tube are connected with the first end of the first MOS tube, the third end of the third MOS tube is connected with the first end of the first MOS tube, the second end of the third MOS tube is connected with the free end of the second MOS tube, the second end of the fourth MOS tube is connected with the free end of the fourth MOS tube, the feedback resistor is connected with the fourth MOS resistor, the free end of the fourth MOS resistor is connected with the fourth end of the free end of the fourth MOS resistor is connected with the first end, the free end of the free end is connected with the fourth resistor, the free end of the free end resistor is connected with the free end of the free end resistor, the free end resistor is connected to the free end and the free end resistor, and the free end is connected to the free end, the output ends of the chopper modules are differential signal output ends, and the two second current sources are respectively connected between the second ends of the third MOS tubes or the second ends of the fourth MOS tubes and the working voltage.
7. The operational amplifier circuit of claim 5 or 6, wherein the amplifying module comprises a first amplifier and a second amplifier, the chopping module comprises a first chopper and a second chopper, the first amplifier, the first chopper, the second amplifier and the second chopper are sequentially connected in series, the input end of the first amplifier is the input end of the amplifying module, and the output end of the second chopper is the output end of the chopping module; and a miller capacitor is connected in series between the input end and the output end of the second amplifier.
8. The operational amplifier circuit of claim 7 wherein the voltage division feedback network is replaced with a resistive feature element, the second current source is replaced with a current source load or a resistive load, the first amplifier is a resistive element or a voltage amplifying element, and the second amplifier is a transconductance element or a standard amplifying element.
9. A hall sensor circuit, comprising: the Hall sensor, the rotary switch circuit, the intermediate-stage amplifying circuit, the output-stage amplifying circuit and the synchronous clock generator which are connected with the rotary switch circuit, the intermediate-stage amplifying circuit and the output-stage amplifying circuit in sequence, wherein the intermediate-stage amplifying circuit is an operational amplifier circuit according to any one of claims 1-8, and the output-stage amplifier is a double-sampling operational amplifier comparator.
10. The hall sensor circuit of claim 9, wherein the output stage amplifying circuit is replaced by a closed loop amplifier with low-pass filtering, and the hall sensor circuit comprises a third amplifying circuit, a third chopper, a first capacitor, a fifth resistor and a sixth resistor, wherein a first end of the fifth resistor is connected with an output end of the intermediate stage amplifying circuit, a second end of the fifth resistor is connected with an input end of the third amplifying circuit, an output end of the third amplifying circuit is an output end of the output stage amplifying circuit and is connected with a first end of the sixth resistor in a feedback manner, a second end of the sixth resistor is connected with an input end of the third chopper, an output end of the third chopper is connected with an input end of the third amplifying circuit, and two ends of the sixth resistor are connected with the first capacitor in parallel.
11. The hall sensor circuit of claim 10, wherein the third amplification circuit comprises a third amplifier, a fourth chopper, and a fourth amplifier in series, wherein an input of the third amplifier is an input of the third amplification circuit, an output of the fourth amplifier is an output of the third amplification circuit, the third amplifier is a standard amplifier, and the fourth amplifier is a transconductance amplifier.
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