CN117790580A

CN117790580A - Detection substrate, manufacturing method thereof and flat panel detector

Info

Publication number: CN117790580A
Application number: CN202211150857.2A
Authority: CN
Inventors: 庞凤春; 侯学成
Original assignee: BOE Technology Group Co Ltd; Beijing BOE Sensor Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Beijing BOE Sensor Technology Co Ltd
Priority date: 2022-09-21
Filing date: 2022-09-21
Publication date: 2024-03-29

Abstract

The embodiment of the invention provides a detection substrate, a manufacturing method thereof and a flat panel detector, wherein a second insulating layer is arranged between an active layer and an active doping layer, and the orthographic projection of the second insulating layer on a substrate covers the orthographic projection of a channel region of the active layer on the substrate, so that when the active doping layer is manufactured by adopting an etching process, the second insulating layer can be used as an etching barrier layer to protect the active layer, so that the active layer at a channel of a thin film transistor can not be etched, and the switching characteristic of the thin film transistor is better; in addition, the active layer, the active doping layer, the source electrode and the drain electrode in the embodiment of the invention can adopt the same mask, compared with the prior art, one mask of the active layer can be reduced, the process complexity and the cost are reduced, and the yield is improved.

Description

Detection substrate, manufacturing method thereof and flat panel detector

Technical Field

The invention relates to the technical field of photoelectric detection, in particular to a detection substrate, a manufacturing method thereof and a flat panel detector.

Background

The X-ray Flat panel detector (Flat X-ray Panel Detector, FPXD) manufactured based on the thin film transistor (Thin Film Transistor, TFT) technology is an important element in the digital imaging technology, and is widely applied to the fields of medical imaging (such as X-ray chest radiography), industrial detection (such as metal flaw detection), security detection, air transportation and the like due to the advantages of high imaging speed, good space and density resolution, high signal to noise ratio, direct digital output and the like.

The X-ray flat panel detector mainly comprises a thin film transistor and a photoelectric conversion device. Under the irradiation of X-rays, a scintillator layer or a fluorescent layer of the indirect conversion type X-ray flat panel detector converts X-ray photons into visible light, then the visible light is converted into an electric signal under the action of a photoelectric conversion device, and finally the electric signal is read through a thin film transistor and output to obtain a display image.

Disclosure of Invention

The embodiment of the invention provides a detection substrate, a manufacturing method thereof and a flat panel detector, and the specific scheme is as follows:

the embodiment of the invention provides a detection substrate, which comprises a substrate and a plurality of detection pixel units arranged on the substrate; each detection pixel unit comprises a thin film transistor arranged on the substrate base plate; wherein,

the thin film transistor includes: the semiconductor device comprises a grid electrode arranged on a substrate, a first insulating layer arranged on one side of the grid electrode, which is away from the substrate, an active layer arranged on one side of the first insulating layer, which is away from the substrate, a second insulating layer arranged on one side of the active layer, which is away from the substrate, an active doping layer arranged on one side of the second insulating layer, which is away from the substrate, and a source electrode and a drain electrode arranged on one side of the active doping layer, which are away from the substrate; wherein,

The active layer comprises a channel region, a source electrode contact region and a drain electrode contact region, wherein the source electrode contact region and the drain electrode contact region are positioned on two sides of the channel region, orthographic projection of the second insulating layer on the substrate covers orthographic projection of the channel region on the substrate, orthographic projections of the source electrode contact region and the drain electrode contact region on the substrate, orthographic projections of the active doping layer on the substrate, and orthographic projections of the source electrode and the drain electrode on the substrate are mutually overlapped.

Optionally, in the foregoing detection substrate provided by the embodiment of the present invention, front projections of the active layer on the substrate except for the channel region, front projections of the active doped layer on the substrate, and front projections of the source electrode and the drain electrode on the substrate overlap with each other.

Optionally, in the above detection substrate provided by the embodiment of the present invention, each detection pixel unit further includes a photoelectric conversion structure electrically connected to a source electrode of the thin film transistor, where the photoelectric conversion structure includes a first electrode, a photoelectric conversion layer, and a second electrode that are sequentially stacked, and the source electrode includes the first electrode.

Optionally, in the foregoing detection substrate provided by the embodiment of the present invention, each detection pixel unit further includes: a third insulating layer positioned on one side of the photoelectric conversion structure away from the substrate, and a bias voltage line positioned on one side of the third insulating layer away from the substrate; the bias voltage line is electrically connected with the second electrode through a first via hole penetrating through the third insulating layer; wherein,

the material of the third insulating layer includes SiNO.

Optionally, in the above detection substrate provided by the embodiment of the present invention, each detection pixel unit further includes a light shielding portion disposed on the same layer as the bias voltage line, and an orthographic projection of the light shielding portion on the substrate covers an orthographic projection of the thin film transistor on the substrate.

Alternatively, in the above detection substrate provided by the embodiment of the present invention, the bias voltage line and the light shielding portion are disposed independently of each other.

Optionally, in the above detection substrate provided by the embodiment of the present invention, the detection substrate further includes a data line electrically connected to a drain electrode of the thin film transistor, where the data line and the bias voltage line are disposed in the same layer, and the light shielding portion and the data line are in an integrated structure; the extending direction of the data line is the same as the extending direction of the bias voltage line, and the data line is electrically connected with the drain electrode of the thin film transistor through a second via hole penetrating through the third insulating layer.

Optionally, in the above detection substrate provided by the embodiment of the present invention, an orthographic projection of the bias voltage line on the substrate and an orthographic projection of the photoelectric conversion structure on the substrate do not overlap.

Optionally, in the above detection substrate provided by the embodiment of the present invention, the bias voltage line has a plurality of first portions covering an edge region of the photoelectric conversion structure and a second portion connecting adjacent first portions;

the width of the first portion is greater than the width of the second portion in an extending direction perpendicular to the bias voltage line.

Alternatively, in the above detection substrate provided by the embodiment of the present invention, the bias voltage line and the light shielding portion are integrally configured.

Optionally, in the above detection substrate provided by the embodiment of the present invention, the detection substrate further includes a data line electrically connected to a drain electrode of the thin film transistor, where the data line and the drain electrode are disposed on the same layer; the extending direction of the data line is the same as the extending direction of the bias voltage line, and the orthographic projection of the bias voltage line on the substrate is positioned between the orthographic projection of the data line on the substrate and the orthographic projection of the photoelectric conversion structure on the substrate.

Optionally, in the above detection substrate provided in the embodiment of the present invention, the light shielding portion is electrically connected to the second electrode through a first via penetrating the third insulating layer, and the light shielding portion has a third portion covering an edge region of the photoelectric conversion structure;

the width of the third portion is larger than the width of the bias voltage line in the extending direction perpendicular to the bias voltage line.

Optionally, in the above detection substrate provided by the embodiment of the present invention, a material of the light shielding portion is an anti-corrosion metal material.

Optionally, in the above detection substrate provided by the embodiment of the present invention, a material of the light shielding portion includes at least one of Cr, ti, and W.

Optionally, in the foregoing detection substrate provided by the embodiment of the present invention, the method further includes: the light shielding part is arranged on one side of the substrate, which is away from the substrate, of the fourth insulating layer, and the scintillator layer is arranged on one side of the fourth insulating layer, which is away from the substrate.

Correspondingly, the embodiment of the invention also provides a flat panel detector, which comprises the detection substrate provided by the embodiment of the invention.

Correspondingly, the embodiment of the invention also provides a manufacturing method of the detection substrate, which comprises the following steps:

Forming a grid electrode in a detection pixel unit of the substrate;

forming a first insulating layer on one side of the grid electrode, which is away from the substrate;

depositing an active material film layer on one side of the first insulating layer away from the substrate base plate;

depositing a second insulating material film layer on one side of the active material film layer, which is away from the substrate, and patterning the second insulating material film layer to form a second insulating layer;

depositing an active doping material film layer on one side of the second insulating layer away from the substrate base plate;

depositing a first metal material film layer on one side of the active doping material film layer, which is away from the substrate base plate;

patterning the first metal material film layer, the active doping material film layer and the active material film layer simultaneously through a one-time patterning process to form a source electrode, a drain electrode, an active doping layer and an active layer respectively; the active layer comprises a channel region, a source electrode contact region and a drain electrode contact region, wherein the source electrode contact region and the drain electrode contact region are positioned on two sides of the channel region, orthographic projection of the second insulating layer on the substrate covers orthographic projection of the channel region of the active layer on the substrate, orthographic projections of the source electrode contact region and the drain electrode contact region on the substrate, orthographic projections of the active doping layer on the substrate and orthographic projections of the source electrode and the drain electrode on the substrate are overlapped with each other.

Optionally, in the above manufacturing method provided by the embodiment of the present invention, the method further includes:

when the source electrode is formed, the source electrode comprises a first electrode of a photoelectric conversion structure;

depositing a photoelectric conversion material film layer on one side of the first electrode away from the substrate base plate;

depositing a transparent conductive material film layer on one side of the photoelectric conversion material film layer, which is away from the substrate;

patterning the transparent conductive material film layer and the photoelectric conversion material film layer simultaneously through a one-time patterning process to form a photoelectric conversion layer and a second electrode respectively; wherein the first electrode, the photoelectric conversion layer, and the second electrode constitute a photoelectric conversion structure in the detection pixel unit.

depositing a third insulating material film layer on one side of the second electrode, which is away from the substrate, and patterning the third insulating material film layer to form a first via hole corresponding to the second electrode and form a third insulating layer; wherein the material of the third insulating layer comprises Sino.

Depositing a second metal material film layer on one side of the third insulating layer away from the substrate base plate; the second metal material film layer is made of an anti-corrosion metal material;

and patterning the second metal material film layer to form a bias voltage line electrically connected with the second electrode through the first via hole.

Optionally, in the above manufacturing method provided by the embodiment of the present invention, when patterning the third insulating material film layer to form the first via hole, the method further includes forming a second via hole corresponding to the drain electrode on the third insulating material film layer;

when the bias voltage line is formed, the method further comprises the step of forming a data line and a shading part which are arranged on the same layer with the bias voltage line; the extending direction of the data line is the same as the extending direction of the bias voltage line, the data line is electrically connected with the drain electrode through the second via hole, and the data line and the shading part are of an integrated structure.

Optionally, in the above manufacturing method provided by the embodiment of the present invention, when forming the source electrode and the drain electrode, forming a data line disposed on the same layer as the drain electrode and electrically connected to the drain electrode;

when the bias voltage line is formed, the device further comprises a shading part which is arranged on the same layer with the bias voltage line; the bias voltage line and the shading part are of an integrated structure, the extending direction of the data line is the same as that of the bias voltage line, and the orthographic projection of the bias voltage line on the substrate is positioned between the orthographic projection of the data line on the substrate and the orthographic projection of the photoelectric conversion structure on the substrate.

and forming a fourth insulating layer on one side of the bias voltage line, which is away from the substrate.

The embodiment of the invention has the following beneficial effects:

according to the detection substrate, the manufacturing method thereof and the flat panel detector provided by the embodiment of the invention, the second insulating layer is arranged between the active layer and the active doping layer, and the orthographic projection of the second insulating layer on the substrate covers the orthographic projection of the channel region of the active layer on the substrate, so that when the active doping layer is manufactured by adopting an etching process, the second insulating layer can be used as an etching barrier layer to protect the active layer, so that the active layer at the channel of the thin film transistor can not be etched, and the switching characteristic of the thin film transistor is better; in addition, the active layer, the active doping layer, the source electrode and the drain electrode in the embodiment of the invention can adopt the same mask, compared with the prior art, one mask of the active layer can be reduced, the process complexity and the cost are reduced, and the yield is improved.

Drawings

Fig. 1 is a schematic structural view of a probe substrate provided in the related art;

fig. 2 is a schematic plan view of a probe substrate according to an embodiment of the present invention;

FIG. 3 is a schematic cross-sectional view of a pixel unit of FIG. 2;

FIG. 4 is a schematic cross-sectional view of a pixel unit of FIG. 2;

FIG. 5 is a schematic plan view of a portion of the film shown in FIG. 3;

FIG. 6 is a schematic plan view of a portion of the film shown in FIG. 4;

fig. 7 is a schematic flow chart of a manufacturing method of a probe substrate according to an embodiment of the present invention;

fig. 8A to 8P are schematic cross-sectional structures of a manufacturing method of a probe substrate according to an embodiment of the invention after each step is performed;

FIG. 9 is a schematic flow chart of a method for fabricating a probe substrate according to another embodiment of the present invention;

FIG. 10 is a schematic flow chart of a method for fabricating a probe substrate according to another embodiment of the present invention;

fig. 11 is a schematic plan view of a flat panel detector according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. And embodiments of the invention and features of the embodiments may be combined with each other without conflict. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present invention fall within the protection scope of the present invention.

Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used in this specification, the word "comprising" or "comprises", and the like, means that the element or article preceding the word is meant to encompass the element or article listed thereafter and equivalents thereof without excluding other elements or articles. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "inner", "outer", "upper", "lower", etc. are used merely to denote relative positional relationships, which may also change accordingly when the absolute position of the object to be described changes.

It should be noted that the dimensions and shapes of the figures in the drawings do not reflect true proportions, and are intended to illustrate the present invention only. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

As shown in fig. 1, a schematic structural diagram of an X-ray flat panel detector in the related art includes: a substrate 1, a gate electrode 2, a first insulating layer 3, an active layer 4, an active doping layer 5, a source electrode 6 and a drain electrode 7 which are sequentially stacked on the substrate 1 to form a thin film transistor; further comprises: a second insulating layer 8 on the source electrode 6 and the drain electrode 7, and a first electrode 91, a photoelectric conversion layer 92, and a second electrode 93, which are sequentially stacked on the second insulating layer 8, constitute a photodiode 9; further comprises: a third insulating layer 11, a fourth insulating layer 12, a light shielding layer 13, and a fifth insulating layer 14 which are sequentially stacked on the photodiode 9; wherein the second insulating layer 8 is used to protect the active layer 4 from etching the active layer 4 when the photoelectric conversion layer 92 is etched; the third insulating layer 11 (resin material) is used as a flat layer, so that the subsequent film layer is manufactured on a flat surface; the fourth insulating layer 12 (SiNO) can increase the adhesiveness between the third insulating layer 11 (SiO, siNx) and the light shielding layer 13, and the light shielding layer 13 can shield the external visible light from irradiating the active layer 4 to prevent the leakage current of the thin film transistor from increasing; the fifth insulating layer 14 serves as a protective layer to prevent surface scratches; the fifth insulating layer 14 has thereon an ITO layer (not shown) which is connected to the flexible wiring board at the bonding area and also prevents metal corrosion of the light shielding layer 13.

However, in the related art process of manufacturing the X-ray flat panel detector shown in fig. 1, when the active doped layer 5 is etched by using the source/drain mask, the active layer 4 at the channel of the thin film transistor is etched, thereby affecting the switching characteristics of the thin film transistor; in addition, 11 masks (masks) are needed for manufacturing the X-ray flat panel detector shown in FIG. 1, the number of masks is large, the process is complex, the cost is high, and the yield is low.

In view of this, an embodiment of the present invention provides a detection substrate, as shown in fig. 2, including a substrate 10 and a plurality of detection pixel units P disposed on the substrate 10; as shown in fig. 3 and 4, each of the detection pixel units P includes a thin film transistor 20 disposed over the substrate base 10; wherein,

the thin film transistor 20 includes: a gate electrode 21 disposed on the substrate 10, a first insulating layer 22 disposed on a side of the gate electrode 21 facing away from the substrate 10, an active layer 23 disposed on a side of the first insulating layer 22 facing away from the substrate 10, a second insulating layer 24 disposed on a side of the active layer 23 facing away from the substrate 10, an active doped layer 25 disposed on a side of the second insulating layer 24 facing away from the substrate 10, and a source electrode 26 and a drain electrode 27 disposed on a side of the active doped layer 25 facing away from the substrate 10; the active doped layer 25 is used for reducing the contact resistance between the active layer 23 and the source electrode 26 and the drain electrode 27 and improving the electrical performance; wherein,

The active layer 23 includes a channel region 231, a source contact region 232 and a drain contact region 233 located at both sides of the channel region 231, and an orthographic projection of the second insulating layer 24 on the substrate 10 covers an orthographic projection of the channel region 231 on the substrate 10, an orthographic projection of the source contact region 232 and the drain contact region 233 on the substrate 10, an orthographic projection of the active doped layer 25 on the substrate 10, and an orthographic projection of the source 26 and the drain 27 on the substrate 10 overlap each other.

According to the detection substrate provided by the embodiment of the invention, the second insulating layer 24 is arranged between the active layer 23 and the active doping layer 25, and the orthographic projection of the second insulating layer 24 on the substrate 10 covers the orthographic projection of the channel region 231 of the active layer 23 on the substrate 10, so that when the active doping layer 25 is manufactured by adopting an etching process, the second insulating layer 24 can be used as an etching barrier layer to protect the active layer 23, so that the active layer 23 at the channel of the thin film transistor 20 can not be etched, and the switching characteristic of the thin film transistor 20 can be better; in addition, the front projection of the source contact area 232 and the drain contact area 233 on the substrate 10 and the front projection of the active doped layer 25 on the substrate 10 and the front projection of the source 26 and the drain 27 on the substrate 10 are set to coincide with each other, so that when the active layer 23, the active doped layer 25, the source 26 and the drain 27 are manufactured, the material for manufacturing the active layer 23 is deposited firstly, mask exposure and etching are not performed, the material for manufacturing the second insulating layer 24 is deposited, mask exposure and etching are performed on the material film for manufacturing the second insulating layer 24, then the material for manufacturing the active doped layer 25 and the source drain metal layer (first metal material film) for manufacturing the source and the drain are deposited, and the mask of the source drain metal layer is used, and the mask of the material film for manufacturing the active doped layer 25 and the material film for manufacturing the active layer 23 are simultaneously exposed and etched, namely, the active doped layer 23, the active doped layer 25, the source 26 and the drain 27 are not subjected to mask exposure and etching, and the mask of the material for manufacturing the second insulating layer 24 are deposited, and the mask of the material for manufacturing the source 26 and the drain 27 are manufactured, and the mask of the source 5 is required to be compared with the mask of the source 5 and the drain metal layer 1, and the mask of the source 5 is manufactured, and the mask of the mask 5 is required to be manufactured, and the mask of the mask 5.

It should be noted that, in the embodiment of the present invention, the front projections overlap with each other, which means that the front projections of the source contact region 232 and the drain contact region 233 on the substrate 10, the front projection of the active doped layer 25 on the substrate 10, and the front projections of the source 26 and the drain 27 on the substrate 10 may not completely overlap, and may have a certain deviation due to the influence of the manufacturing process.

Alternatively, the substrate may be a flexible substrate such as a plastic substrate having excellent heat resistance and durability from polyvinyl ether phthalate, polyethylene naphthalate, polycarbonate, polyarylate, polyetherimide, polyethersulfone, polyimide, or the like; but may also be a rigid substrate such as a glass substrate, without limitation.

The embodiment of the invention takes the thin film transistor as a bottom gate type structure, and can also be a top gate type structure. And, the gate, source and drain may be fabricated from molybdenum, aluminum, silver, copper, titanium, platinum, tungsten, tantalum nitride, alloys thereof, combinations thereof, or other suitable materials. In addition, the source and drain of the thin film transistor may be interchanged according to the type of the transistor (P-type or N-type) and the input signal, and the functions thereof are not specifically distinguished herein.

Alternatively, amorphous silicon thin film transistors, oxide thin film transistors, LTPS thin film transistors, and the like may be used as the thin film transistors.

In a specific implementation, in the above detection substrate provided in the embodiment of the present invention, as shown in fig. 3 and fig. 4, each detection pixel unit further includes a photoelectric conversion structure 30 electrically connected to the source electrode 26 of the thin film transistor 20, where the photoelectric conversion structure 30 includes a first electrode 31, a photoelectric conversion layer 32, and a second electrode 33 that are sequentially stacked, and the source electrode 26 includes the first electrode 31, that is, the first electrode 31 is a part of the source electrode 26, so that using source-drain metal as the first electrode 31 of the photoelectric conversion structure 30 can reduce a mask for separately manufacturing the first electrode 31, further reduce complexity and cost of the process, improve the yield, and not increase the thickness of the detection substrate.

Alternatively, the photoelectric conversion layer 32 may be a PN structure or a PIN structure. Specifically, the PIN structure comprises an N-type doped N-type semiconductor layer, an undoped intrinsic semiconductor layer I and a P-type doped P-type semiconductor layer. The intrinsic semiconductor layer I may have a thickness greater than that of the P-type semiconductor layer and the N-type semiconductor layer.

Alternatively, the first electrode 31 may be formed of molybdenum, aluminum, silver, copper, titanium, platinum, tungsten, tantalum nitride, alloys thereof, combinations thereof, or other suitable materials; and the second electrode 33 may be formed of Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO) or other suitable transparent material to improve light transmission efficiency.

In a specific implementation, in the above detection substrate provided by the embodiment of the present invention, as shown in fig. 3 and fig. 4, each detection pixel unit further includes: a third insulating layer 40 on a side of the photoelectric conversion structure 30 facing away from the substrate 10, and a bias voltage line 50 on a side of the third insulating layer 40 facing away from the substrate 10; the bias voltage line 50 is electrically connected to the second electrode 33 through the first via hole V1 penetrating the third insulating layer 40; wherein,

the materials of the third insulating layer 40 include, but are not limited to, siNO, and because the SiNO has better adhesion, the third insulating layer 40 can increase the adhesion between the third insulating layer 40 and the bias voltage line 50, so that the fourth insulating layer 12 shown in fig. 1 in the related art is not required to be arranged in the embodiment of the invention, and therefore, one mask plate can be reduced in the embodiment of the invention, the complexity and cost of the process are further reduced, and the yield is improved.

Alternatively, the bias voltage line may be made of metal, and the uniformity of bias voltage in the whole detection area can be ensured due to the smaller resistivity of the metal.

In a specific implementation, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 3 and fig. 4, each detection pixel unit further includes a light shielding portion 51 disposed in the same layer as the bias voltage line 50, and the orthographic projection of the light shielding portion 51 on the substrate 10 covers the orthographic projection of the thin film transistor 20 on the substrate 10. The light shielding portion 51 can prevent the active layer 23 of the thin film transistor 20 from being irradiated with visible light, and prevent the thin film transistor 20 from being disabled.

In a specific implementation, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 3 and 5, fig. 5 is a schematic plan view of a part of the film layer in fig. 3, the bias voltage line 50 may be disposed independently of the light shielding portion 51, the detection substrate further includes a data line D electrically connected to the drain electrode 27 of the thin film transistor 20, the data line D and the bias voltage line 50 are disposed in the same layer, and the light shielding portion 51 and the data line D are in an integral structure; the extending direction of the data line D is the same as the extending direction of the bias voltage line 50, and the data line D is electrically connected to the drain electrode 27 of the thin film transistor 20 through the second via hole V2 penetrating the third insulating layer 40. In the embodiment of the invention, the data line D and the light shielding part 51 are arranged on the same layer, so that the vertical distance between the data line D and the second electrode 33 and the vertical distance between the data line D and the first electrode 31 can be increased, and the coupling capacitance between the data line D and the second electrode 33 and the first electrode 31 can be reduced; meanwhile, a third insulating layer 40 is added between the data line D and the scan line G (electrically connected to the gate electrode 21), so that an overlap capacitance between the data line D and the scan line G can be reduced; therefore, the embodiment of the invention can greatly reduce the noise on the data line D and improve the signal transmission performance by reducing the coupling capacitance between the data line D and the second electrode 33 and the first electrode 31 and reducing the overlap capacitance between the data line D and the scanning line G. In addition, the bias voltage line shown in fig. 1 of the related art uses the metal of the light shielding layer 13, i.e., the bias voltage line in fig. 1 is covered on the thin film transistor to shield light, but this increases parasitic capacitance between the bias voltage line and the scan line and the data line. The embodiment of the invention covers the data line D above the thin film transistor 20, and can reduce parasitic capacitance between the bias voltage line 50 and the scan line G and the data line D.

In particular, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 3, since the bias voltage line 50 does not cover the thin film transistor 20, the bias voltage line 50 may be far away from the data line D and the thin film transistor 20, for example, as shown in fig. 5, the front projection of the bias voltage line 50 on the substrate 10 does not overlap with the front projection of the photoelectric conversion structure 30 on the substrate 10. This can increase the distance between the bias voltage line 50 and the data line D, thereby reducing parasitic capacitance between the bias voltage line 50 and the data line D.

Alternatively, the orthographic projection of the bias voltage lines 50 on the substrate 10 may substantially coincide with the orthographic projection of the center line L of the detection pixel unit P (the same direction as the extending direction of the bias voltage lines 50) on the substrate 10, so that each bias voltage line 50 may be larger in distance from the data line D on both sides of the column of the detection pixel unit P, thereby reducing parasitic capacitance between each bias voltage line 50 and the adjacent data line D.

In a specific implementation, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 3 and 5, when the bias voltage line 50 is routed through the photoelectric conversion structure 30, since the photoelectric conversion structure 30 has a certain thickness, particularly, the thickness of the photoelectric conversion film layer 32 is thicker, generally about 1 μm, although the third insulating layer 40 plays a role of planarization, in the actual manufacturing process, the periphery of the photoelectric conversion structure 30 is uneven due to the thicker photoelectric conversion structure 30, so that the bias voltage line 50 is easily broken at the side wall climbing position of the photoelectric conversion structure 30; as shown in fig. 5, the bias voltage line 50 has a plurality of first portions 501 covering the edge region of the photoelectric conversion structure 30 and a second portion 502 connecting the adjacent first portions 501; in the extending direction perpendicular to the bias voltage line 50, the width D1 (indicated by the double-headed arrow) of the first portion 501 is larger than the width D2 (indicated by the double-headed arrow) of the second portion 502. Thus, the embodiment of the invention can avoid the breakage of the bias voltage line 50 at the climbing position by widening the running line of the bias voltage line 50 at the climbing position of the photoelectric conversion structure 30.

In a specific implementation, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 4 and fig. 6, fig. 6 is a schematic plan structure of a part of the film layer in fig. 4, and the bias voltage line 50 and the light shielding portion 51 may be in an integrated structure, so that the original pattern is only required to be changed when the bias voltage line 50 is formed, the pattern of the light shielding portion 51 and the pattern of the bias voltage line 50 can be formed through a one-time patterning process, and a process of separately preparing the light shielding portion 51 is not required to be added, so that the preparation process flow can be simplified, the production cost can be saved, and the production efficiency can be improved; the detection substrate further includes a data line D (not shown in fig. 6) electrically connected to the drain electrode 27 of the thin film transistor 20, the data line D being disposed in the same layer as the drain electrode 27; wherein, the extending direction of the data line D is the same as the extending direction of the bias voltage line 50, and the orthographic projection of the bias voltage line 50 on the substrate 10 is located between the orthographic projection of the data line D on the substrate 10 and the orthographic projection of the photoelectric conversion structure 30 on the substrate 10. Specifically, in the structures shown in fig. 4 and fig. 6, the data line D is made of the same metal as the source electrode 26 and the drain electrode 27, so that compared with the structure shown in fig. 3, the drain electrode 27 in fig. 4 is not connected to the data line D through a via hole, and the process is simple; in addition, in the related art, when the bias voltage line 50 covers the photoelectric conversion structure 30, the photoelectric conversion structure 30 covered by the bias voltage line 50 cannot receive visible light, no photoelectrons are generated, so that the photoelectric conversion structure 30 covered by the bias voltage line 50 cannot perform photoelectric conversion, and in the embodiment of the present invention, the bias voltage line 50 is disposed between the data line D and the photoelectric conversion structure 30 in fig. 4 and 6, so that compared with the related art, on one hand, the photoelectric conversion area of the photoelectric conversion structure 30 can be increased, on the other hand, the distance between the data line D and the first electrode 31 and the second electrode 33 can be increased, and the coupling capacitance between the data line D and the first electrode 31 and the second electrode 33 can be reduced, thereby reducing noise on the data line D and improving the signal transmission performance.

In a specific implementation, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 4 and 6, the light shielding portion 51 is electrically connected to the second electrode through the first via hole penetrating the third insulating layer 40, and since the bias voltage line 50 and the light shielding portion 51 are in an integral structure, when the light shielding portion 51 passes through the photoelectric conversion structure 30, since the photoelectric conversion structure 30 has a certain thickness, particularly the thickness of the photoelectric conversion film layer 32 is generally about 1 μm, although the third insulating layer 40 plays a role of flattening, in the actual manufacturing process, the periphery of the photoelectric conversion structure 30 is uneven due to the thicker photoelectric conversion structure 30, so that the light shielding portion 51 is easily broken at the side wall climbing position of the photoelectric conversion structure 30; the light shielding portion 51 has a third portion 511 covering the edge region of the photoelectric conversion structure 30; the width D3 of the third portion 511 is larger than the width D4 of the bias voltage line 50 in the extending direction perpendicular to the bias voltage line 50. Thus, the embodiment of the invention can avoid the breakage of the bias light shielding part 51 at the climbing position by widening the wiring of the light shielding part 51 at the climbing position of the photoelectric conversion structure 30.

In a specific implementation, in the above-mentioned detection substrate provided in the embodiment of the present invention, as shown in fig. 3 and 4, the material of the light shielding portion 51 may be an anti-corrosion metal material. Thus, the ITO layer above the fifth insulating layer 14 shown in fig. 1 in the related art can be omitted, so that one mask plate can be reduced, the complexity and cost of the process are further reduced, and the yield is improved. Specifically, the material of the light shielding portion 51 may include, but is not limited to, at least one of Cr, ti, W.

In a specific implementation, in the above detection substrate provided by the embodiment of the present invention, as shown in fig. 3 and fig. 4, the method further includes: a fourth insulating layer 60 on a side of the light shielding portion 51 facing away from the substrate 10, and a scintillator layer (not shown) on a side of the fourth insulating layer 60 facing away from the substrate 10. Specifically, the fourth insulating layer 60 may block external moisture and protect the bias voltage line 50, and the fourth insulating layer 60 may be formed of silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials.

Specifically, the material of the scintillator layer is a material capable of converting X-rays into visible light, and mainly consists of a scintillator, wherein the scintillator is a material capable of emitting light after absorbing high-energy particles or rays, and is usually processed into crystals in application, which is called a scintillation crystal; the specific material of the scintillation crystal of the scintillator layer is not limited in the embodiment of the invention, and may be cesium iodide (CsI), cadmium tungstate, barium fluoride, gadolinium Oxysulfide (GOS), and the like.

The working process of the detection substrate shown in fig. 3 and fig. 4 provided by the embodiment of the invention is as follows: the scintillator layer converts kinetic energy of the high-energy particles into optical energy under the impact of the high-energy particles of the X-rays to emit a flash light (visible light signal), and the optical signal can be converted into an electrical signal by the photoelectric conversion structure 30 and read out by the thin film transistor 20, so that an X-ray image can be obtained through subsequent processing (including amplification, conversion, and the like) of the signal.

In summary, according to the detection substrate provided by the embodiment of the invention, on one hand, the second insulating layer can be used as an etching barrier layer to protect the active layer, so that the active layer at the channel of the thin film transistor can not be etched, and the switching characteristic of the thin film transistor is better; on the other hand, the number of layers of the total materials of the detection substrate and the number of masks are reduced, the cost is greatly reduced, the process difficulty is reduced, and the yield is improved.

Based on the same inventive concept, the embodiment of the present invention further provides a method for manufacturing a probe substrate, which is used for manufacturing the probe substrate provided by the embodiment of the present invention, as shown in fig. 7, the manufacturing method may include:

s701, forming a grid electrode in a detection pixel unit of a substrate;

specifically, as shown in fig. 8A, a gate electrode 21 is formed on a substrate base 10 by a first mask process; the material and specific manufacturing method of the gate electrode 21 are the same as those in the related art, and will not be described herein.

S702, forming a first insulating layer on one side of the grid electrode, which is away from the substrate;

specifically, as shown in fig. 8B, a first insulating layer 22 is formed on the side of the gate electrode 21 facing away from the substrate base plate 10; the material and specific manufacturing method of the first insulating layer 22 are the same as those in the related art, and will not be described herein.

S703, depositing an active material film layer on one side of the first insulating layer, which is away from the substrate;

specifically, as shown in fig. 8C, an active material film layer 23' is deposited on the side of the first insulating layer 22 facing away from the substrate base plate 10.

S704, depositing a second insulating material film layer on one side of the active material film layer, which is away from the substrate, and patterning the second insulating material film layer to form a second insulating layer;

specifically, as shown in fig. 8D, a second insulating material film layer 24 'is deposited on the side of the active material film layer 23' facing away from the substrate base plate 10; as shown in fig. 8E, the second insulating material film layer 24' is patterned using a second mask process to form the second insulating layer 24.

S705, depositing an active doping material film layer on one side of the second insulating layer, which is away from the substrate;

specifically, as shown in fig. 8F, an active doping material film layer 25' is deposited on the side of the second insulating layer 24 facing away from the substrate base plate 10.

S706, depositing a first metal material film layer on one side of the active doping material film layer, which is away from the substrate;

specifically, as shown in fig. 8G, a first metal material film layer 26 'is deposited on the side of the active doping material film layer 25' facing away from the base substrate 10.

S707, patterning the first metal material film layer, the active doping material film layer and the active material film layer simultaneously through a one-time patterning process to form a source electrode, a drain electrode, an active doping layer and an active layer respectively; the active layer comprises a channel region, a source electrode contact region and a drain electrode contact region which are positioned at two sides of the channel region, the orthographic projection of the second insulating layer on the substrate covers the orthographic projection of the channel region on the substrate, the orthographic projections of the source electrode contact region and the drain electrode contact region on the substrate, the orthographic projections of the active doping layer on the substrate and the orthographic projections of the source electrode and the drain electrode on the substrate are overlapped with each other;

Specifically, as shown in fig. 8H, the first metal material film layer 26', the active doping material film layer 25', and the active material film layer 23' are simultaneously patterned by using a third mask process to form the source electrode 26 and the drain electrode 27, the active doping layer 25, and the active layer 23, respectively; the material of the source 26 and the drain 27, the material of the active doped layer 25, and the material of the active layer 23 are the same as those in the related art, and will not be described herein.

According to the manufacturing method of the detection substrate, the second insulating layer is arranged between the active layer and the active doping layer, and orthographic projection of the second insulating layer on the substrate covers orthographic projection of the channel region of the active layer on the substrate, so that when the active doping layer is manufactured by adopting an etching process, the second insulating layer can serve as an etching blocking layer to protect the active layer, the active layer at the channel of the thin film transistor is not etched, and the switching characteristic of the thin film transistor is better; in addition, when the active layer, the active doping layer, the source electrode and the drain electrode are manufactured, the active material film layer is deposited firstly, mask exposure and etching are not performed, the second insulating material film layer is deposited, mask exposure and etching are performed on the second insulating material film layer, then the active doping material film layer and the first metal material film layer (the metal film layer for manufacturing the source electrode and the drain electrode) are deposited, the mask plate of the source electrode and the drain electrode metal layer is used for simultaneously performing mask exposure and etching on the first metal material film layer, the active doping material film layer and the active material film layer, namely the active layer, the active doping layer, the source electrode and the drain electrode adopt the same mask.

In a specific implementation, in the above manufacturing method provided by the embodiment of the present invention, as shown in fig. 9, the method further includes:

s901, when a source electrode is formed, the source electrode comprises a first electrode of a photoelectric conversion structure;

specifically, as shown in fig. 8H, when the source 26 is formed, the source 26 includes the first electrode 31 of the photoelectric conversion structure 30, that is, the first electrode 31 is used as a part of the source 26, so that the use of source-drain metal as the first electrode 31 of the photoelectric conversion structure 30 can reduce a mask for separately manufacturing the first electrode 31, further reduce the complexity and cost of the process, improve the yield, and not increase the thickness of the detection substrate; the material of the first electrode 31 may be referred to as a description of the material of the first electrode 31 in a probe substrate as described above.

S902, depositing a photoelectric conversion material film layer on one side of the first electrode, which is away from the substrate;

specifically, as shown in fig. 8I, a photoelectric conversion material film layer 32' is deposited on the side of the first electrode 31 facing away from the substrate base plate 10.

S903, depositing a transparent conductive material film layer on one side of the photoelectric conversion material film layer, which is away from the substrate;

specifically, as shown in fig. 8J, a transparent conductive material film layer 33 'is deposited on the side of the photoelectric conversion material film layer 32' facing away from the substrate base plate 10.

S904, patterning the transparent conductive material film layer and the photoelectric conversion material film layer simultaneously through a one-time patterning process to form a photoelectric conversion layer and a second electrode respectively; wherein the first electrode, the photoelectric conversion layer and the second electrode form a photoelectric conversion structure in the detection pixel unit;

specifically, as shown in fig. 8K, the transparent conductive material film layer 33 'and the photoelectric conversion material film layer 32' are simultaneously patterned by using a fourth mask process to form the photoelectric conversion layer 32 and the second electrode 33, respectively; the material of the photoelectric conversion layer 32 and the material of the second electrode 33 can be referred to in the foregoing description of one of the detection substrates with respect to the material of the photoelectric conversion layer 32 and the material of the second electrode 33.

In a specific implementation, in the above manufacturing method provided by the embodiment of the present invention, as shown in fig. 8L, the method further includes: depositing a third insulating material film layer 40 'on one side of the second electrode 33 away from the substrate 10, and patterning the third insulating material film layer 40' by a fifth mask process to form a first via hole V1 corresponding to the second electrode 32, so as to form a third insulating layer 4, as shown in fig. 8M; the material of the third insulating layer 40 includes, but is not limited to, siNO, and because the SiNO has good adhesion, the third insulating layer 40 can increase the adhesion between the third insulating layer 40 and the bias voltage line 50, so that the fourth insulating layer 12 shown in fig. 1 in the related art is not required to be provided in the embodiment of the present invention, and therefore, one mask plate can be reduced in the embodiment of the present invention, further, the complexity and cost of the process are reduced, and the yield is improved.

In a specific implementation, in the above manufacturing method provided by the embodiment of the present invention, as shown in fig. 10, the method further includes:

s1001, depositing a second metal material film layer on one side of the third insulating layer, which is away from the substrate; the material of the second metal material film layer is an anti-corrosion metal material;

specifically, as shown in fig. 8N, a second metal material film layer 50' of which the material is an anti-corrosion metal material is deposited on the side of the third insulating layer 40 facing away from the substrate base plate 10; the specific material of the second metal material film layer 50' may include, but is not limited to, at least one of Cr, ti, and W.

S1002, patterning the second metal material film layer to form a bias voltage line electrically connected with the second electrode through the first via hole;

specifically, as shown in fig. 8O, the second metal material film layer 50' is patterned by a sixth mask process to form a bias voltage line 50 electrically connected to the second electrode 33 through the first via hole V1; thus, the ITO layer above the fifth insulating layer 14 shown in fig. 1 in the related art can be omitted, so that one mask plate can be reduced, the complexity and cost of the process are further reduced, and the yield is improved.

In a specific implementation, in the above-mentioned manufacturing method provided by the embodiment of the present invention, as shown in fig. 8M, when patterning the third insulating material film layer 40 'to form the first via hole V1, the method further includes forming a second via hole V2 corresponding to the drain electrode 27 on the third insulating material film layer 40';

As shown in fig. 8O, when forming the bias voltage line 50, further including forming the data line D and the light shielding portion 51 provided in the same layer as the bias voltage line 50; the extending direction of the data line D is the same as the extending direction of the bias voltage line 50, the data line D is electrically connected to the drain electrode 27 through the second via hole V2, and the data line D and the light shielding portion 51 are integrally formed. In the embodiment of the invention, the data line D and the light shielding part 51 are arranged on the same layer, so that the vertical distance between the data line D and the second electrode 33 and the vertical distance between the data line D and the first electrode 31 can be increased, and the coupling capacitance between the data line D and the second electrode 33 and the first electrode 31 can be reduced; meanwhile, a third insulating layer 40 is added between the data line D and the scan line G (electrically connected to the gate electrode 21), so that an overlap capacitance between the data line D and the scan line G can be reduced; therefore, the embodiment of the invention can greatly reduce the noise on the data line D and improve the signal transmission performance by reducing the coupling capacitance between the data line D and the second electrode 33 and the first electrode 31 and reducing the overlap capacitance between the data line D and the scanning line G. In addition, the bias voltage line shown in fig. 1 of the related art uses the metal of the light shielding layer 13, i.e., the bias voltage line in fig. 1 is covered on the thin film transistor to shield light, but this increases parasitic capacitance between the bias voltage line and the scan line and the data line. The embodiment of the invention covers the data line D above the thin film transistor 20, and can reduce parasitic capacitance between the bias voltage line 50 and the scan line G and the data line D.

Specifically, in fig. 8O, when the bias voltage line 50 is formed, the width D1 of the plurality of first portions 501 of the bias voltage line 50 covering the edge region of the photoelectric conversion structure 30 is larger than the width D2 of the second portions 502 connecting the adjacent first portions 501. Thus, the embodiment of the invention can avoid the breakage of the bias voltage line 50 at the climbing position by widening the running line of the bias voltage line 50 at the climbing position of the photoelectric conversion structure 30.

In a specific implementation, in the above manufacturing method provided by the embodiment of the present invention, as shown in fig. 8P, the method further includes:

a fourth insulating layer 60 is formed on a side of the bias voltage line 50 facing away from the substrate base plate 10 through a seventh mask process. Specifically, the edge area of the fourth insulating layer 60 needs to expose the binding area for subsequent binding with the flexible circuit board.

Therefore, the structure of the probe substrate shown in fig. 3 according to the embodiment of the present invention can be manufactured through the above-described manufacturing steps of fig. 8A to 8P.

Specifically, the manufacturing steps for manufacturing the probe substrate shown in fig. 4 are substantially the same as those for manufacturing the probe substrate of fig. 3, except that: fig. 8H further includes forming a data line D (not shown) disposed in the same layer as the drain electrode 27 and electrically connected thereto when forming the source electrode 26 and the drain electrode 27; specifically, the data line D is made of the same metal as the source electrode 26 and the drain electrode 27, so that the drain electrode 27 and the data line D are not connected through holes, and the process is simple;

Fig. 8O further includes a light shielding portion 51 formed in the same layer as the bias voltage line 50 when the bias voltage line 50 is formed; wherein, the bias voltage line 50 and the light shielding portion 51 are integrated, the extending direction of the data line D is the same as the extending direction of the bias voltage line 50, and the orthographic projection of the bias voltage line 50 on the substrate 10 is located between the orthographic projection of the data line D on the substrate 10 and the orthographic projection of the photoelectric conversion structure 30 on the substrate 10. In this way, on the one hand, the photoelectric conversion area of the photoelectric conversion structure 30 can be increased, on the other hand, the distance between the data line D and the first electrode 31 and the second electrode 33 can be increased, and the coupling capacitance between the data line D and the first electrode 31 and the second electrode 33 can be reduced, so that noise on the data line D is reduced, and the signal transmission performance is improved.

Specifically, in manufacturing the light shielding portion 51 shown in fig. 4, the width of the third portion 511 of the light shielding portion 51 covering the edge region of the photoelectric conversion structure 30 (the width in the extending direction perpendicular to the bias voltage line 50) is set to be larger than the width of the bias voltage line 50. Thus, the embodiment of the invention can avoid the breakage of the bias light shielding part 51 at the climbing position by widening the wiring of the light shielding part 51 at the climbing position of the photoelectric conversion structure 30.

Specifically, the structure shown in fig. 4 provided in the embodiment of the present invention is different from the structure shown in fig. 3 in that the positions of the film layers of the data line D are different, the structure of the light shielding portion 51 is different, and the manufacturing processes of the remaining film layer structures are the same.

In summary, according to the manufacturing method of the detection substrate provided by the embodiment of the invention, only 7 mask processes are needed, and compared with 11 masks in the related art, the method provided by the embodiment of the invention reduces the number of masks, greatly reduces the cost, reduces the process difficulty and improves the yield of products.

Based on the same inventive concept, the embodiment of the invention also provides a flat panel detector, which comprises the detection substrate provided by the embodiment of the invention. Since the principle of solving the problem of the flat panel detector is similar to that of the detection substrate, the implementation of the flat panel detector can be referred to the implementation of the detection substrate, and the repetition is omitted.

Specifically, as shown in fig. 11, fig. 11 is a schematic plan view of a flat panel detector, where a scan line G and a data line D intersect to define a plurality of detection pixel units P, each detection pixel unit includes a thin film transistor and a photoelectric conversion structure, the drains of the same column of thin film transistors are electrically connected to the same data line D, and the gates of the same row of thin film transistors are electrically connected to the same scan line G. The flat panel detector also includes an FPGA (Field-Programmable Gate Array, field programmable gate array) chip; the scanning signal line SL is connected with the FPGA Chip through a COF (Chip On Flex, chip On Film, commonly called flip Chip Film); wherein the COF includes a Gate Driver IC. The read signal line RL is connected to the FPGA chip through a signal read chip (ROIC).

While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.

It will be apparent to those skilled in the art that various modifications and variations can be made to the embodiments of the present invention without departing from the spirit or scope of the embodiments of the invention. Thus, if such modifications and variations of the embodiments of the present invention fall within the scope of the claims and the equivalents thereof, the present invention is also intended to include such modifications and variations.

Claims

1. A detection substrate, characterized by comprising a substrate and a plurality of detection pixel units arranged on the substrate; each detection pixel unit comprises a thin film transistor arranged on the substrate base plate; wherein,

2. The detection substrate according to claim 1, wherein each of the detection pixel units further includes a photoelectric conversion structure electrically connected to a source of the thin film transistor, the photoelectric conversion structure including a first electrode, a photoelectric conversion layer, and a second electrode which are sequentially stacked, the source being multiplexed as the first electrode.

3. The detection substrate as claimed in claim 2, wherein each of the detection pixel units further comprises: a third insulating layer positioned on one side of the photoelectric conversion structure away from the substrate, and a bias voltage line positioned on one side of the third insulating layer away from the substrate; the bias voltage line is electrically connected with the second electrode through a first via hole penetrating through the third insulating layer; wherein,

the material of the third insulating layer includes SiNO.

4. The detection substrate as claimed in claim 3, wherein each of the detection pixel units further includes a light shielding portion provided in the same layer as the bias voltage line, and an orthographic projection of the light shielding portion on the substrate covers an orthographic projection of the thin film transistor on the substrate.

5. The detection substrate according to claim 4, wherein the bias voltage line and the light shielding portion are provided independently of each other.

6. The probe substrate according to claim 5, further comprising a data line electrically connected to a drain electrode of the thin film transistor, the data line being provided in the same layer as the bias voltage line, and the light shielding portion being integrally formed with the data line; the extending direction of the data line is the same as the extending direction of the bias voltage line, and the data line is electrically connected with the drain electrode of the thin film transistor through a second via hole penetrating through the third insulating layer.

7. The detection substrate according to claim 6, wherein an orthographic projection of the bias voltage line on the substrate does not overlap with an orthographic projection of the photoelectric conversion structure on the substrate.

8. The detection substrate according to claim 7, wherein the bias voltage line has a plurality of first portions covering an edge region of the photoelectric conversion structure and a second portion connecting adjacent ones of the first portions;

9. The detection substrate according to claim 4, wherein the bias voltage line is integrally formed with the light shielding portion.

10. The probe substrate according to claim 9, further comprising a data line electrically connected to a drain electrode of the thin film transistor, the data line being disposed in the same layer as the drain electrode; the extending direction of the data line is the same as the extending direction of the bias voltage line, and the orthographic projection of the bias voltage line on the substrate is positioned between the orthographic projection of the data line on the substrate and the orthographic projection of the photoelectric conversion structure on the substrate.

11. The probe substrate according to claim 10, wherein the light shielding portion is electrically connected to the second electrode through a first via penetrating the third insulating layer, the light shielding portion having a third portion covering an edge region of the photoelectric conversion structure;

12. The probe substrate according to any one of claims 4 to 11, wherein a material of the light shielding portion is a corrosion-resistant metal material.

13. The probe substrate according to claim 12, wherein a material of the light shielding portion includes at least one of Cr, ti, and W.

14. The probe substrate of any one of claims 4-11, further comprising: the light shielding part is arranged on one side of the substrate, which is away from the substrate, of the fourth insulating layer, and the scintillator layer is arranged on one side of the fourth insulating layer, which is away from the substrate.

15. A flat panel detector comprising a detection substrate according to any one of claims 1-14.

16. A method of manufacturing a probe substrate, comprising:

forming a grid electrode in a detection pixel unit of the substrate;

patterning the first metal material film layer, the active doping material film layer and the active material film layer simultaneously through a one-time patterning process to form a source electrode, a drain electrode, an active doping layer and an active layer respectively; the active layer comprises a channel region, a source electrode contact region and a drain electrode contact region, wherein the source electrode contact region and the drain electrode contact region are positioned on two sides of the channel region, orthographic projection of the second insulating layer on the substrate covers orthographic projection of the channel region on the substrate, orthographic projections of the source electrode contact region and the drain electrode contact region on the substrate, orthographic projections of the active doping layer on the substrate, and orthographic projections of the source electrode and the drain electrode on the substrate are mutually overlapped.

17. The method of manufacturing of claim 16, further comprising:

18. The method of manufacturing of claim 17, further comprising:

19. The method of manufacturing of claim 18, further comprising:

20. The method of manufacturing of claim 19, further comprising forming a second via corresponding to the drain electrode on the third insulating material film layer when patterning the third insulating material film layer to form the first via;

21. The method of claim 19, further comprising forming a data line disposed in the same layer as the drain electrode and electrically connected to the drain electrode when forming the source electrode and the drain electrode;

22. The method of any one of claims 19-21, further comprising: