CN113053935B - Panel structure of X-ray flat panel detector, preparation method of panel structure and flat panel detector - Google Patents
Panel structure of X-ray flat panel detector, preparation method of panel structure and flat panel detector Download PDFInfo
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14632—Wafer-level processed structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
- H01L27/14663—Indirect radiation imagers, e.g. using luminescent members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention provides an X-ray flat panel detector panel structure, a preparation method thereof and a flat panel detector. The preparation method comprises the steps of providing a substrate, sequentially forming a gate electrode, a gate insulating layer, an active layer, an etching barrier layer, a source drain electrode material layer and a first insulating layer, and performing graphical etching on the first insulating layer to form a first opening so as to expose the source drain electrode material layer; after forming a photodiode in the first opening, carrying out patterned etching on the first insulating layer and the source-drain electrode material layer which is not covered by the photodiode to form a source electrode and a drain electrode, and then forming a second insulating layer and a common electrode, wherein the common electrode is electrically connected with the photodiode and extends to the upper part of the oxide thin film transistor. The invention adopts the optimized flow design, utilizes the source-drain electrode material layer to enhance the physical isolation between the photodiode and the active layer of the oxide thin film transistor, reduces the influence of processes such as the photodiode and a subsequent insulating layer on the electrical property of the oxide thin film transistor, and is beneficial to improving the performance of the device.
Description
Technical Field
The invention relates to the technical field of detectors, in particular to a panel structure of an X-ray flat panel detector, a preparation method of the panel structure and the X-ray flat panel detector.
Background
Flat panel digital X-ray detectors are commonly used in the fields of medical radiation imaging, industrial detection, security inspection, and the like. Current flat panel digital X-ray detectors, particularly large-scale image sensors, typically have an area of several tens of square centimeters, including millions to millions of pixels. Flat panel detection techniques can be categorized into direct and indirect types. The direct type is to directly convert X-ray into electron to form signal; the indirect type is to convert the X-ray into visible light and then convert the visible light into electrons to form signals. The indirect X-ray sensor includes: a scintillator on the upper layer for converting incident X-rays into visible light; the panel array composed of the lower thin film transistor (Thin Film Transistor, abbreviated as TFT) and the visible light sensor element converts the visible light into electrons, which are read out by the driving circuit and the peripheral circuit to form digital signals.
The panel pixels include thin film transistors and visible light sensor elements, such as photodiodes, which convert visible light into electrical signals. The switching function of the thin film transistor and the large-area thin film transistor array are utilized to realize the reading of the electric signals through the control of an external circuit, and then the image is processed through software.
The current main technology of the large-area X-ray flat panel detector is to prepare a readout circuit by using an amorphous silicon thin film transistor array, because the amorphous silicon has low mobility, static imaging or small-area dynamic imaging is mainly supported, and the electron mobility of an oxide thin film transistor is one to two orders of magnitude higher than that of the amorphous silicon transistor, the smaller on-state resistance and the higher pixel aperture ratio can be realized after design optimization, the detector reading frame rate and the detection sensitivity can be improved, and the detector is easy to produce and prepare in a large area, and is very favorable for realizing high-resolution large-area dynamic imaging. However, the X-ray sensor fabricated by the oxide thin film transistor and the amorphous silicon photodiode sensor in the prior art has a process compatibility problem. The inventors have long studied that this is because the sensor panel is subjected to subsequent process steps after the thin film transistor device is manufactured, such as the manufacture of amorphous silicon photodiodes and insulating layers. In order to ensure the electrical property of the photodiode, the amorphous silicon is hydrogenated amorphous silicon and contains a large amount of hydrogen atoms, and the high-temperature film forming and high-temperature annealing processes can cause the subsequent diffusion of the hydrogen atoms of the film layer to the active layer of the oxide thin film transistor, which can lead to the increase of the off-state current and the deterioration of uniformity of the oxide thin film transistor device, and the degradation or failure of the panel performance.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a panel structure of an X-ray flat panel detector and a method for manufacturing the same, and an X-ray flat panel detector, which are used for solving the problems that in the prior art, panel pixels adopt an amorphous silicon thin film transistor array to prepare a readout circuit, only support static imaging and small area dynamic imaging, and in the existing pixel structure adopting an oxide thin film transistor, because amorphous silicon is hydrogenated amorphous silicon and contains a large amount of hydrogen atoms in the process of preparation, a high-temperature film forming and high-temperature annealing process can cause diffusion of hydrogen atoms of a subsequent film layer and the like into an active layer of the oxide thin film transistor, thereby causing increase of off-state current and uniformity deterioration of an oxide thin film transistor device, and causing degradation or failure of panel performance.
To achieve the above and other related objects, the present invention provides a method for manufacturing a panel structure of an X-ray flat panel detector, comprising the steps of:
providing a substrate, and forming a gate electrode on the substrate;
forming a gate insulating layer, wherein the gate insulating layer covers the gate electrode and the substrate;
forming an active layer on the surface of the gate insulating layer, wherein the active layer corresponds to the gate electrode vertically, and the active layer is an oxide semiconductor layer;
forming an etching barrier layer on the active layer;
forming a source-drain electrode material layer which covers the etching barrier layer and extends from the etching barrier layer to the surfaces of the active layer and the gate insulating layer;
forming a first insulating layer, wherein the first insulating layer covers the source-drain electrode material layer, patterning and etching the first insulating layer to form a first opening, the first opening is spaced from the active layer, and the first opening exposes the source-drain electrode material layer;
forming a film and patterning a photodiode on the substrate with the first opening, wherein the photodiode covers and extends to the periphery of the first opening;
carrying out graphical etching on the first insulating layer and the source-drain electrode material layer which is not covered by the photodiode to form a second opening and source electrodes and drain electrodes which are positioned on two sides of the second opening, wherein the second opening exposes the etching barrier layer;
forming a second insulating layer, wherein the second insulating layer covers the first insulating layer, the second opening and the photodiode, the gate electrode, the gate insulating layer, the active layer, the etching barrier layer, the first insulating layer, the source electrode and the drain electrode together form an oxide thin film transistor, and the oxide thin film transistor and the photodiode are electrically connected and are arranged in a non-overlapping manner on a vertical plane of incidence of X rays;
forming a common electrode electrically connected to the photodiode and extending above the oxide thin film transistor;
and forming a third insulating layer, wherein the third insulating layer covers the public electrode and the second insulating layer.
Optionally, the photodiode is a photodiode with a PIN structure, and the step of forming the photodiode includes sequentially forming an N-type semiconductor layer, an intrinsic type semiconductor layer, a P-type semiconductor layer and a top electrode layer on the substrate with the first opening, and performing patterning treatment.
More optionally, the N-type semiconductor layer comprises a phosphorus doped a-si layer, the intrinsic type semiconductor layer comprises an a-si intrinsic type semiconductor layer, the P-type semiconductor layer comprises a boron doped a-si layer, and the material of the top electrode layer comprises one or a combination of two of a transparent conductive material and/or an electrode with an opening.
Optionally, the substrate comprises one or a combination of two of glass and flexible polyimide, and the material of the active layer comprises any one or more of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, gallium zinc oxide and zinc oxide; the gate electrode and the source/drain electrode material layer are made of at least one of gold and alloy thereof, silver and alloy thereof, copper and alloy thereof, aluminum and alloy thereof, molybdenum and alloy thereof, titanium and alloy thereof, tantalum and alloy thereof, tungsten and alloy thereof, chromium and alloy thereof, indium zinc oxide, transparent conductive plastic and conductive compound.
Optionally, the materials of the gate insulating layer, the etching barrier layer, the first insulating layer, the second insulating layer and the third insulating layer include any one or more of silicon oxide, silicon nitride, silicon oxynitride and an organic material layer.
Optionally, the preparation method further includes a step of forming a fourth insulating layer on the surface of the first insulating layer after the first insulating layer is formed and before the photodiode is formed, the fourth insulating layer is subjected to two patterning etches, the first patterning etch is performed after or before the patterning etch of the first insulating layer to form an insulating island above the oxide transistor, the second patterning etch forms a second opening, and the second insulating layer covers the fourth insulating layer.
The invention also provides an X-ray flat panel detector panel structure, which comprises a substrate, an oxide thin film transistor, a photodiode, a second insulating layer, a common electrode and a third insulating layer; the oxide thin film transistor and the photodiode are electrically connected and are arranged in a non-overlapping manner on the vertical plane of the incident X-ray, the common electrode is electrically connected with the photodiode and extends to the upper side of the oxide thin film transistor, and the second insulating layer covers the oxide thin film transistor and the photodiode; the oxide thin film transistor comprises a gate electrode, a gate insulating layer, an active layer, an etching barrier layer, a first insulating layer, a source electrode and a drain electrode, wherein the active layer is an oxide semiconductor layer; the gate electrode is positioned on the surface of the substrate, the gate insulating layer covers the substrate and the gate electrode, the active layer is positioned on the gate insulating layer and is correspondingly positioned above the gate electrode, the etching barrier layer is positioned on the active layer, the source electrode and the drain electrode extend outwards from the surface of the etching barrier layer to the active layer and the gate insulating layer, a space is reserved between the source electrode and the drain electrode so as to expose the etching barrier layer, the first insulating layer is positioned on the source electrode and the drain electrode, and an opening is reserved in a region between the corresponding source electrode and the drain electrode of the first insulating layer; the second insulating layer covers the oxide thin film transistor and the photodiode, and the third insulating layer covers the common electrode and the second insulating layer.
Optionally, the X-ray flat panel detector panel structure further includes a fourth insulating layer, the fourth insulating layer being located between the first insulating layer and the second insulating layer and being located at a periphery of the photodiode.
The invention also provides an X-ray flat panel detector comprising an X-ray flat panel detector panel structure as described in any one of the above aspects.
As described above, the panel structure of the X-ray flat panel detector and the preparation method thereof, and the X-ray flat panel detector thereof have the following beneficial effects: the invention is designed by an optimized flow, and after the preparation of the photodiode is completed, the source-drain electrode material layer is subjected to graphical treatment to form the source-drain electrode of the oxide thin film transistor, so that the physical isolation between the photodiode and the active layer of the oxide thin film transistor can be enhanced by utilizing the source-drain electrode material layer, the influence of the processes such as the photodiode and the subsequent insulating layer on the electrical property of the oxide thin film transistor is reduced, the leakage current of the oxide thin film transistor is reduced, the electrical property uniformity of the device is improved, and the process window of a panel is enlarged and the reliability of the device is improved. According to the panel structure of the X-ray flat panel detector and the detector, the off-state current can be effectively reduced, the electrical uniformity can be obviously improved, and the device performance and the service life can be prolonged.
Drawings
Fig. 1 is a flowchart of a method for manufacturing an X-ray flat panel detector panel structure according to a first embodiment of the present invention.
Fig. 2 to 13 are schematic structural views of the preparation method of fig. 1 at various steps, and fig. 12 is a schematic view of a panel structure of an X-ray flat panel detector according to the third embodiment.
Fig. 14 is a schematic view showing a panel structure of an X-ray flat panel detector according to a fourth embodiment of the present invention.
Fig. 15 is a schematic structural diagram of an X-ray flat panel detector according to a fifth embodiment of the present invention.
Description of element reference numerals
11. Substrate board
12. Gate electrode
13. Gate insulating layer
14. Active layer
15. Etching barrier layer
16. Source drain electrode material layer
161. Source electrode
162. Drain electrode
17. A first insulating layer
18. Photodiode having a high-k-value transistor
181 N-type semiconductor layer
182. Intrinsic semiconductor layer
183 P-type semiconductor layer
184. Top electrode
19. Second insulating layer
20. Common electrode
21. Third insulating layer
22. Fourth insulating layer
1. Sensor array layer
2. Surface film layer
3. Scintillator layer
4. Bottom packaging film layer
5. Transparent substrate
S1 to S11 steps
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 1 to 15. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
The oxide thin film transistor has higher electron mobility, is very favorable for realizing high-resolution large-area dynamic imaging, and is usually prepared layer by layer, thereby being favorable for large-scale manufacture. However, in order to effectively absorb visible light, reduce leakage current of the diode and improve reliability of the device, a long-time high-temperature process exists in the preparation process, and atoms in the film layer, such as hydrogen atoms in the amorphous silicon layer, are diffused into the active layer of the oxide thin film transistor by adopting a traditional structure and a traditional preparation method, which can cause the leakage current of the oxide thin film transistor to increase, and the performance of the device to be reduced. The present invention proposes the following improvement scheme.
Example 1
As shown in fig. 1, the present invention provides a method for manufacturing a panel structure of an X-ray flat panel detector, comprising the steps of:
s1: providing a substrate 11, forming a gate electrode 12 on the substrate 11, and referring to fig. 2; the substrate 11 is preferably made of transparent materials, including, but not limited to, one or both of glass and flexible Polyimide (PI); the material of the gate electrode 12 includes, but is not limited to, at least one of gold and its alloys, silver and its alloys, copper and its alloys, aluminum and its alloys, molybdenum and its alloys, titanium and its alloys, tantalum and its alloys, tungsten and its alloys, chromium and its alloys, indium zinc oxide, transparent conductive plastics, and conductive compounds. The preparation method of the gate electrode 12 depends on the material thereof, including, but not limited to, physical vapor deposition and coating; preferably, the gate electrode 12 is prepared by physical vapor deposition and copper, aluminum, molybdenum and other materials; more specifically, a layer of conductive material may be deposited on the substrate 11 first, and then the gate electrode 12 is formed by etching with a mask, or the conductive material is deposited at a corresponding position directly with a mask;
s2: forming a gate insulating layer 13, wherein the gate insulating layer 13 covers the gate electrode 12 and the substrate 11, as shown in fig. 3; the gate insulating layer 13 may be made of any one or more of silicon oxide, silicon nitride, silicon oxynitride, and organic material layers, and may be made of a different material by a vapor deposition method;
s3: forming an active layer 14 on the surface of the gate insulating layer 13, where the active layer 14 corresponds to the gate electrode 12 vertically, and the active layer 14 is an oxide semiconductor layer, as shown in fig. 4; more specifically, the material of the active layer 14 includes, but is not limited to, any one or more of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, gallium zinc oxide and zinc oxide, and the active layer 14 may be formed by depositing a corresponding material layer by a vapor deposition method and performing patterned etching;
s4: forming an etching barrier layer 15 on the active layer 14, as shown in fig. 5; the material of the etching barrier layer 15 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride and an organic material layer, and may be prepared according to different materials by a vapor deposition method, for example, the corresponding material layer is formed by depositing on the surface of the structure obtained in step S3, and then the etching barrier layer 15 is formed by patterning etching; the outer edge of the etching barrier layer 15 in the direction of the subsequently formed source-drain electrode is positioned in the outer edge of the active layer 14 (i.e. the orthographic projection of the etching barrier layer 15 in the direction falls in the active layer 14), and the outer edge of the etching barrier layer 15 in the direction of the non-source-drain electrode is positioned outside the outer edge of the active layer;
s5: forming a source-drain electrode material layer 16, wherein the source-drain electrode material layer 16 covers the etching barrier layer 15, extends from the etching barrier layer 15 to the surfaces of the active layer 14 and the gate insulating layer 13, and can be partially positioned on the surface of the active layer 14, as shown in fig. 6 in particular; the source-drain electrode material layer 16 is made of at least one material selected from gold and its alloys, silver and its alloys, copper and its alloys, aluminum and its alloys, molybdenum and its alloys, titanium and its alloys, tantalum and its alloys, tungsten and its alloys, chromium and its alloys, indium zinc oxide, transparent conductive plastics and conductive compounds. The preparation method of the source-drain electrode material layer 16 depends on the material thereof, including but not limited to physical vapor deposition and coating; preferably, the source-drain electrode material layer 16 is prepared by a physical vapor deposition method and is made of copper, aluminum, molybdenum and other materials; and the step can also comprise a data line patterning process so as to facilitate the electrical extraction of the device;
s6: forming a first insulating layer 17, wherein the first insulating layer 17 covers the source-drain electrode material layer 16, and performing patterned etching on the first insulating layer 17 to form a first opening, the first opening is spaced from the active layer 14, and the first opening exposes the source-drain electrode material layer 16, as shown in fig. 7; the material of the first insulating layer 17 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride, and organic material layers, and the forming method thereof depends on the material and includes, but is not limited to, vapor deposition;
s7: forming a film and patterning a photodiode 18 on the substrate having the first opening, wherein the photodiode 18 covers and extends to the periphery 18 of the first opening, as shown in fig. 8; the photodiode 18 includes, but is not limited to, any one or more of a PIN structure, a PN junction structure, a schottky structure, and is prepared layer by layer according to different structures; the photodiode 18 is generally prepared from hydrogenated amorphous silicon material, and a high-temperature film forming and high-temperature annealing process is required in the preparation process, but due to the protection of the source-drain electrode material layer 16, impurity atoms such as hydrogen atoms cannot diffuse into the active layer 14 in the high-temperature process, so that the performance of the active layer 14 can be ensured;
s8: patterning the first insulating layer 17 and the source/drain electrode material layer 16 uncovered by the photodiode 18 to form a second opening (preferably, patterning the first insulating layer 17 once by using the same mask, and etching the first insulating layer 17 to form the second opening and the source/drain electrode material layer 16 to form the second opening respectively), and a source electrode 161 and a drain electrode 162 located at two sides of the second opening, wherein the second opening exposes the etching barrier layer 15, and the photodiode 18 is electrically connected to the source electrode 161, as can be seen in fig. 9, for example, a bottom electrode of the photodiode 18 is located on a surface of the source electrode 161, and the two electrodes are in contact with each other to realize electrical connection between the photodiode 18 and the oxide thin film transistor;
s9: forming a second insulating layer 19, wherein the second insulating layer 19 covers the first insulating layer 17, the second opening and the photodiode 18; the gate electrode 12, the gate insulating layer 13, the active layer 14, the etching barrier layer 15, the first insulating layer 17, the source electrode 161 and the drain electrode 162 together form an oxide thin film transistor, and the oxide thin film transistor and the photodiode 18 are arranged in a non-overlapping manner on a vertical plane of incidence of the X-rays, as shown in fig. 10; the oxide thin film transistors and the photodiodes 18 are generally arranged alternately in a two-dimensional array (i.e. the oxide thin film transistors and the photodiodes 18 are all plural), and the material of the second insulating layer 19 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride and an organic material layer, and can be prepared by adopting, but not limited to, vapor deposition methods according to different materials;
s10: forming a common electrode 20, wherein the common electrode 20 can be electrically connected with the photodiode 18 through a via hole, and particularly, reference is made to fig. 11; such as the common electrode 20, is electrically connected to the top electrode of the photodiode 18, and the common electrode 20 extends over the oxide thin film transistor to act as a shielding layer to block visible light from entering the oxide thin film transistor. The oxide thin film transistor is switched on to realize the same potential of the lower electrode of the photodiode 18 and the external data line, and the potential of the photodiode 18 is reversely biased by combining the potential provided by the common electrode 20, so that photo-generated electrons in the pixel structure are led out to realize the sensing function.
According to the invention, through the optimized flow design, after the preparation of the photodiode 18 is completed, the source-drain electrode material layer 16 is subjected to patterning treatment to form the source-drain electrode of the oxide thin film transistor, so that the physical isolation between the photodiode 18 and the active layer of the oxide thin film transistor can be enhanced by utilizing the source-drain electrode material layer 16, the influence of the processes such as the photodiode 18 and the subsequent insulating layer on the electrical property of the oxide thin film transistor is reduced, the leakage current of the oxide thin film transistor is reduced, the electrical uniformity of the device is improved, and the process window of the panel is enlarged and the reliability of the device is improved.
In an example, as shown in fig. 12, the preparation method further includes step S11 of forming a third insulating layer 21 after the common electrode 20 is prepared, the third insulating layer 21 covers the common electrode 20 and the second insulating layer 19 to seal and protect each structure, and an opening may be provided on the third insulating layer 21 to realize electrical conduction of the device. The material of the third insulating layer 21 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride, and organic material layer, and may be prepared by a vapor deposition method according to different materials.
In an example, as shown in fig. 13, the photodiode 18 is a photodiode with a PIN structure, and the step of forming the photodiode 18 includes sequentially forming an N-type semiconductor layer 181, an intrinsic type semiconductor layer 182, a P-type semiconductor layer 183, and a top electrode layer 184 on the substrate where the first opening is completed, and performing a patterning process. In a further example, the N-type semiconductor layer includes, but is not limited to, a phosphorus doped a-si layer, the intrinsic type semiconductor layer includes, but is not limited to, an a-si intrinsic semiconductor layer, and the P-type semiconductor layer includes, but is not limited to, a boron doped a-si layer; the top electrode is preferably a transparent electrode whose material includes one or a combination of two of a transparent conductive material (including but not limited to indium tin oxide), and/or an electrode with an opening (including but not limited to an open-cell metal electrode). The top electrode is made of transparent conductive material or perforated metal electrode, so that visible light can be irradiated to the photodiode to convert optical signals and electric signals.
Example two
The present embodiment provides another manufacturing method, which is different from the first embodiment in that, on the basis of the first embodiment, the manufacturing method further includes a step of forming a fourth insulating layer 22 on the surface of the first insulating layer 17 after forming the first insulating layer 17 and before forming the photodiode 18, the fourth insulating layer 22 is subjected to two patterning etches, the first patterning etch is performed after or before the first insulating layer patterning etch to form an insulating island above the oxide transistor, the second patterning etch is performed to form a second opening, the second insulating layer 19 covers the fourth insulating layer 22, and the device structure manufactured in this embodiment is shown in fig. 14. As can be seen from the drawing, the fourth insulating layer 22 is located between the first insulating layer 17 and the second insulating layer 19, so that when the first opening and the second opening are formed by patterning etching, the fourth insulating layer 22 needs to be correspondingly patterned and etched at the same time. The fourth insulating layer 22 covers the upper side of the oxide thin film transistor and the periphery of the photodiode 18, and can provide good protection for the oxide thin film transistor. The material of the fourth insulating layer 22 includes, but is not limited to, one or more of silicon oxide, silicon nitride, silicon oxynitride and an organic material layer (such as polyimide), and the preparation method thereof may be material-dependent, including but not limited to vapor deposition, coating or a combination of methods, and the thickness thereof is preferably 200 a-20000 a, more preferably 1000 a-5000 a, but not limited thereto.
Except for the above differences, the preparation method of this embodiment is the same as that of the first embodiment, and please refer to the description of the first embodiment for brevity.
Example III
As shown in fig. 12, the present embodiment provides an X-ray flat panel detector panel structure including a substrate 11, an oxide thin film transistor, a photodiode 18, a second insulating layer 19, a common electrode 20, and a third insulating layer 21; the oxide thin film transistor and the photodiode 18 are electrically connected and are arranged in a non-overlapping manner on a vertical plane on which the X-rays are incident, the common electrode 20 is electrically connected with the photodiode 18 and extends to the upper side of the oxide thin film transistor, and the second insulating layer 19 covers the oxide thin film transistor and the photodiode 18; the oxide thin film transistor comprises a gate electrode 12, a gate insulating layer 13, an active layer 14, an etching barrier layer 15, a first insulating layer 17, a source electrode 161 and a drain electrode 162, wherein the active layer 14 is an oxide semiconductor layer; the gate electrode 12 is located on the surface of the substrate 11, the gate insulating layer 13 covers the substrate 11 and the gate electrode 12, the active layer 14 is located on the gate insulating layer 13 and is correspondingly located above the gate electrode 12, the etching barrier layer 15 is located on the active layer 14, the source electrode 161 and the drain electrode 162 extend outwards from the surface of the etching barrier layer 15 to the active layer 14 and the gate insulating layer 13, a space is formed between the source electrode 161 and the drain electrode 162 to expose the etching barrier layer 15, the first insulating layer 17 is located on the source electrode 161 and the drain electrode 162, and the first insulating layer 17 has openings in the region between the corresponding source electrode 161 and the drain electrode 162 (or the space without the first insulating layer 17 exists between the source electrode 161 and the drain electrode 162); the second insulating layer 19 covers the oxide thin film transistor and the photodiode 18, and the third insulating layer 21 covers the common electrode 20 and the second insulating layer 19. The panel structure of the X-ray flat panel detector of the present embodiment can be manufactured based on the manufacturing method described in the first embodiment, so that the corresponding content in the first embodiment can be cited here in its entirety, and is not repeated for the sake of brevity. The off-state current of the panel structure of the X-ray flat panel detector prepared by the method can be effectively reduced, the electrical uniformity can be obviously improved, and the device performance and the service life can be prolonged.
Example IV
As shown in fig. 14, the present embodiment provides another X-ray flat panel pixel structure, which is different from the third embodiment in that the X-ray flat panel detector panel structure in this embodiment has a fourth insulating layer 22 in addition to all the features of the X-ray flat panel pixel structure in the third embodiment, the fourth insulating layer 22 is located between the first insulating layer 17 and the second insulating layer 19, that is, above the oxide thin film transistor, and is located at the periphery of the photodiode 18, and the fourth insulating layer 22 can form good protection for the oxide thin film transistor, so that the performance of the X-ray flat panel pixel structure can be further improved. Except for the above differences, other parts of the X-ray flat panel pixel structure of the present embodiment are the same as those of the third embodiment, and reference is made to the description of the third embodiment for brevity.
Example five
The present embodiment provides an X-ray flat panel detector, which includes the X-ray flat panel detector panel structure according to any one of the third or fourth embodiments, so the description of the X-ray flat panel detector panel structure is omitted for brevity. Specifically, as shown in fig. 15, in an example, the X-ray flat panel detector includes a surface film layer 2, a scintillator layer 3, a sensor array layer 1, and a bottom packaging film layer 4 in order along the incident direction of the X-rays; the sensor array layer 1 includes the aforementioned X-ray flat panel detector panel structure, the top film layer 2 includes, but is not limited to, one or more of a reflective film, a light absorbing film and an encapsulation film, the bottom encapsulation film layer 4 may be the same as or different from the structure of the top film layer, for example, may include, but is not limited to, one or more of a reflective film, a light absorbing film and an encapsulation film, and the transparent substrate 5 of the detector may be a substrate of the X-ray flat panel detector panel structure, and may be a support structure provided in addition. Of course, the X-ray flat panel detector may also have other structures, such as a bottom scintillator layer, etc., which are not further developed. Due to the adoption of the panel structure of the X-ray flat panel detector in the scheme, the off-state current of the X-ray flat panel detector can be effectively reduced, the electrical uniformity can be obviously improved, and the device performance and the service life can be prolonged.
In summary, the present invention provides a panel structure of an X-ray flat panel detector, a method for manufacturing the same, and an X-ray flat panel detector. The invention is designed by an optimized flow, and after the preparation of the photodiode is completed, the source-drain electrode material layer is subjected to graphical treatment to form the source-drain electrode of the oxide thin film transistor, so that the physical isolation between the photodiode and the active layer of the oxide thin film transistor can be enhanced by utilizing the source-drain electrode material layer, the influence of the processes such as the photodiode and the subsequent insulating layer on the electrical property of the oxide thin film transistor is reduced, the leakage current of the oxide thin film transistor is reduced, the electrical property uniformity of the device is improved, and the process window of a panel is enlarged and the reliability of the device is improved. According to the panel structure of the X-ray flat panel detector and the detector, the off-state current can be effectively reduced, the electrical uniformity can be obviously improved, and the device performance and the service life can be prolonged. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (10)
1. A method for manufacturing a panel structure of an X-ray flat panel detector, comprising the steps of:
providing a substrate, and forming a gate electrode on the substrate;
forming a gate insulating layer, wherein the gate insulating layer covers the gate electrode and the substrate;
forming an active layer on the surface of the gate insulating layer, wherein the active layer corresponds to the gate electrode vertically, and the active layer is an oxide semiconductor layer;
forming an etching barrier layer on the active layer;
forming a source-drain electrode material layer which covers the etching barrier layer and extends from the etching barrier layer to the surfaces of the active layer and the gate insulating layer;
forming a first insulating layer, wherein the first insulating layer covers the source-drain electrode material layer, patterning and etching the first insulating layer to form a first opening, the first opening is spaced from the active layer, and the first opening exposes the source-drain electrode material layer;
forming a film and patterning a photodiode on the substrate with the first opening, wherein the photodiode covers and extends to the periphery of the first opening;
carrying out graphical etching on the first insulating layer and the source-drain electrode material layer which is not covered by the photodiode to form a second opening and source electrodes and drain electrodes which are positioned on two sides of the second opening, wherein the second opening exposes the etching barrier layer;
forming a second insulating layer, wherein the second insulating layer covers the first insulating layer, the second opening and the photodiode, the gate electrode, the gate insulating layer, the active layer, the etching barrier layer, the first insulating layer, the source electrode and the drain electrode together form an oxide thin film transistor, and the oxide thin film transistor is electrically connected with the photodiode and is arranged in a non-overlapping manner on a vertical plane of incidence of X rays; forming a common electrode electrically connected to the photodiode and extending above the oxide thin film transistor;
and forming a third insulating layer, wherein the third insulating layer covers the public electrode and the second insulating layer.
2. The method of manufacturing according to claim 1, characterized in that: the photodiode includes any one or more of a PIN structure, a PN junction structure, and a schottky structure.
3. The preparation method according to claim 2, characterized in that: the photodiode is a photodiode with a PIN structure, and the step of forming the photodiode comprises the steps of sequentially forming an N-type semiconductor layer, an intrinsic type semiconductor layer, a P-type semiconductor layer and a top electrode layer on a substrate with the first opening, and performing graphical processing.
4. The method of claim 3, wherein the N-type semiconductor layer comprises a phosphorus doped a-si layer, the intrinsic type semiconductor layer comprises an a-si intrinsic type semiconductor layer, the P-type semiconductor layer comprises a boron doped a-si layer, and the material of the top electrode layer comprises one or a combination of two of a transparent conductive material and/or an electrode with an opening.
5. The method of manufacturing according to claim 1, wherein the substrate comprises a combination of one or both of glass and flexible polyimide.
6. The method according to claim 1, wherein the material of the active layer comprises any one or more of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, gallium zinc oxide, and zinc oxide.
7. The method of claim 1, wherein the gate electrode and source/drain electrode material layer comprises at least one of gold and its alloys, silver and its alloys, copper and its alloys, aluminum and its alloys, molybdenum and its alloys, titanium and its alloys, tantalum and its alloys, tungsten and its alloys, chromium and its alloys, indium zinc oxide, transparent conductive plastics, and conductive compounds.
8. The method of claim 1, wherein the gate insulating layer, the etch stop layer, the first insulating layer, the second insulating layer, and the third insulating layer are made of any one or more of silicon oxide, silicon nitride, silicon oxynitride, and an organic material layer.
9. The method of manufacturing according to claim 1, characterized in that: the step of forming the source drain electrode material layer further comprises a data line patterning process, so that the electrical property of the device is led out.
10. The method of any one of claims 1-9, further comprising the step of forming a fourth insulating layer on the surface of the first insulating layer after forming the first insulating layer and before forming the photodiode, wherein the fourth insulating layer is patterned by two times, the first patterning etching is performed after or before the first patterning etching to form an insulating island over the oxide transistor, and the second patterning etching is performed to form a second opening, and the second insulating layer covers the fourth insulating layer.
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| CN107623011A (en) * | 2017-10-12 | 2018-01-23 | 友达光电股份有限公司 | Thin-film transistor array base-plate and X-ray detector for X-ray detector |
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| CN107623011A (en) * | 2017-10-12 | 2018-01-23 | 友达光电股份有限公司 | Thin-film transistor array base-plate and X-ray detector for X-ray detector |
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