CN113053935A - X-ray flat panel detector panel structure, preparation method thereof and flat panel detector - Google Patents

X-ray flat panel detector panel structure, preparation method thereof and flat panel detector Download PDF

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CN113053935A
CN113053935A CN202110183090.2A CN202110183090A CN113053935A CN 113053935 A CN113053935 A CN 113053935A CN 202110183090 A CN202110183090 A CN 202110183090A CN 113053935 A CN113053935 A CN 113053935A
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layer
insulating layer
photodiode
electrode
forming
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CN113053935B (en
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李桂锋
金利波
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Shanghai Yirui Optoelectronics Technology Co ltd
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Shanghai Yirui Optoelectronics Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14632Wafer-level processed structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • H01L27/14658X-ray, gamma-ray or corpuscular radiation imagers
    • H01L27/14663Indirect radiation imagers, e.g. using luminescent members
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687Wafer level processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689MOS based technologies

Abstract

The invention provides a panel structure of an X-ray flat panel detector, a preparation method of the panel structure and the flat panel detector. The preparation method comprises the steps of providing a substrate, sequentially forming a gate electrode, a gate insulating layer, an active layer, an etching barrier layer, a source/drain electrode material layer and a first insulating layer, and carrying out graphical etching on the first insulating layer to form a first opening so as to expose the source/drain electrode material layer; and after forming the photodiode in the first opening, carrying out patterned etching on the first insulating layer and the source-drain electrode material layer which is not covered by the photodiode to form a source electrode and a drain electrode, and then forming a second insulating layer and a common electrode, wherein the common electrode is electrically connected with the photodiode and extends to the upper part of the oxide thin film transistor. Through optimized process design, the source-drain electrode material layer is utilized to enhance the physical isolation between the photodiode and the active layer of the oxide thin film transistor, reduce the influence of the processes of the photodiode, a subsequent insulating layer and the like on the electrical property of the oxide thin film transistor and contribute to improving the performance of a device.

Description

X-ray flat panel detector panel structure, preparation method thereof and flat panel detector
Technical Field
The invention relates to the technical field of detectors, in particular to an X-ray flat panel detector panel structure and a preparation method thereof, and an X-ray flat panel detector.
Background
Flat panel digital X-ray detectors are commonly used in the fields of medical radiation imaging, industrial inspection, security inspection, and the like. Current flat panel digital X-ray detectors, particularly large-sized image sensors, are typically tens of square centimeters in area, containing millions to tens of millions of pixels. Flat panel detection techniques can be divided into direct and indirect types. The direct type is that the X-ray is directly converted into the electron to form a signal; the indirect type converts X-rays into visible light, which is then converted into electrons to form a signal. The indirect type X-ray sensor includes: the scintillator on the upper layer converts the incident X-ray into visible light; the panel array composed of a Thin Film Transistor (TFT) and a visible light sensor element in the lower layer converts visible light into electrons, and the electrons are read out by a driving circuit and a peripheral circuit to form digital signals.
The panel pixels include thin film transistors and visible light sensor elements, such as photodiodes, that convert visible light into electrical signals. The reading of the electric signals is realized by the switch function of the thin film transistor and the large-area thin film transistor array through the control of an external circuit, and then the image is processed through software.
The mainstream technology of the current large-area X-ray flat panel detector is to prepare a reading circuit by using an amorphous silicon thin film transistor array, because the mobility of amorphous silicon is low, the static imaging or the small-area dynamic imaging is mainly supported, the electron mobility of an oxide thin film transistor is one to two orders of magnitude higher than that of the amorphous silicon transistor, the design optimization can realize smaller on-state resistance and higher pixel aperture ratio, the reading frame rate and the detection sensitivity of the detector can be improved, the large-area production and preparation are easy, and the realization of high-resolution large-area dynamic imaging is very facilitated. However, the X-ray sensor manufactured by the oxide thin film transistor and the amorphous silicon photodiode sensor in the prior art has the problem of process compatibility. The inventor finds that the reason is that the sensor panel has subsequent process procedures after the thin film transistor device is manufactured, such as manufacturing an amorphous silicon photodiode and an insulating layer. In order to ensure the electrical property of the photodiode, the amorphous silicon is hydrogenated amorphous silicon containing a large amount of hydrogen atoms, and the high-temperature film formation and high-temperature annealing process can cause the hydrogen atoms of the subsequent film layer to diffuse towards the active layer of the oxide thin film transistor, which can cause the increase of off-state current and the deterioration of uniformity of the oxide thin film transistor device, and cause the performance degradation or the failure of the panel.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a panel structure of an X-ray flat panel detector, a method for manufacturing the same, and an X-ray flat panel detector, which are used to solve the problems that in the prior art, a readout circuit is manufactured by using an amorphous silicon thin film transistor array, and only static imaging and small-area dynamic imaging exist, while in the manufacturing process of the conventional pixel structure using an oxide thin film transistor, due to the fact that amorphous silicon is hydrogenated amorphous silicon and contains a large amount of hydrogen atoms, high-temperature film formation and high-temperature annealing processes may cause subsequent film hydrogen atoms to diffuse toward an active layer of the oxide thin film transistor, which further causes increase of off-state current and deterioration of uniformity of the oxide thin film transistor device, resulting in degradation or failure of panel performance.
In order to achieve the above and other related objects, the present invention provides a method for manufacturing a panel structure of an X-ray flat panel detector, comprising the steps of:
providing a substrate, and forming a gate electrode on the substrate;
forming a gate insulating layer, wherein the gate insulating layer covers the gate electrode and the substrate;
forming an active layer on the surface of the gate insulating layer, wherein the active layer corresponds to the gate electrode up and down, and the active layer is an oxide semiconductor layer;
forming an etching barrier layer on the active layer;
forming a source drain electrode material layer, wherein the source drain electrode material layer covers the etching barrier layer and extends from the etching barrier layer to the surfaces of the active layer and the gate insulating layer;
forming a first insulating layer, wherein the first insulating layer covers the source and drain electrode material layer, and the first insulating layer is subjected to patterned etching to form a first opening, the first opening is spaced from the active layer, and the source and drain electrode material layer is exposed out of the first opening;
forming a film and patterning on the substrate with the first opening to form a photodiode, wherein the photodiode covers and extends to the periphery of the first opening;
carrying out graphical etching on the first insulating layer and the source-drain electrode material layer which is not covered by the photodiode to form a second opening and a source electrode and a drain electrode which are positioned on two sides of the second opening, wherein the etching barrier layer is exposed out of the second opening;
forming a second insulating layer, wherein the second insulating layer covers the first insulating layer, the second opening and the photodiode, the gate electrode, the gate insulating layer, the active layer, the etching blocking layer, the first insulating layer, the source electrode and the drain electrode jointly form an oxide thin film transistor, and the oxide thin film transistor and the photodiode are electrically connected and are arranged on a vertical plane on which X-rays are incident in a non-overlapping mode;
forming a common electrode electrically connected with the photodiode and extending to above the oxide thin film transistor;
and forming a third insulating layer which covers the common electrode and the second insulating layer.
Optionally, the photodiode is a PIN-structured photodiode, and the step of forming the photodiode includes sequentially forming an N-type semiconductor layer, an intrinsic type semiconductor layer, a P-type semiconductor layer, and a top electrode layer on the substrate where the first opening is completed, and performing patterning.
More optionally, the N-type semiconductor layer comprises a phosphorus doped a-si layer, the intrinsic type semiconductor layer comprises an a-si intrinsic semiconductor layer, the P-type semiconductor layer comprises a boron doped a-si layer, and the material of the top electrode layer comprises one or a combination of a transparent conductive material and/or an electrode with an opening.
Optionally, the substrate includes one or a combination of glass and flexible polyimide, and the active layer is made of any one or more of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, gallium zinc oxide, and zinc oxide; the material of the gate electrode and the source drain electrode material layer comprises at least one of gold and alloy thereof, silver and alloy thereof, copper and alloy thereof, aluminum and alloy thereof, molybdenum and alloy thereof, titanium and alloy thereof, tantalum and alloy thereof, tungsten and alloy thereof, chromium and alloy thereof, indium zinc oxide, transparent conductive plastic and conductive compound.
Optionally, the gate insulating layer, the etching blocking layer, the first insulating layer, the second insulating layer, and the third insulating layer are made of any one or more of silicon oxide, silicon nitride, silicon oxynitride, and an organic material layer.
Optionally, the manufacturing method further includes a step of forming a fourth insulating layer on the surface of the first insulating layer after the first insulating layer is formed and before the photodiode is formed, the fourth insulating layer is subjected to two patterning etches, the first patterning etch is performed after or before the first insulating layer patterning etch to form an insulating island above the oxide transistor, the second patterning etch is performed to form a second opening, and the second insulating layer covers the fourth insulating layer.
The invention also provides an X-ray flat panel detector panel structure, which comprises a substrate, an oxide thin film transistor, a photodiode, a second insulating layer, a common electrode and a third insulating layer; the oxide thin film transistor and the photodiode are electrically connected and are arranged on a vertical plane where X rays are incident in a non-overlapping mode, the common electrode is electrically connected with the photodiode and extends to the upper portion of the oxide thin film transistor, and the second insulating layer covers the oxide thin film transistor and the photodiode; the oxide thin film transistor comprises a gate electrode, a gate insulating layer, an active layer, an etching barrier layer, a first insulating layer, a source electrode and a drain electrode, wherein the active layer is an oxide semiconductor layer; the gate electrode is positioned on the surface of the substrate, the gate insulating layer covers the substrate and the gate electrode, the active layer is positioned on the gate insulating layer and is correspondingly positioned above the gate electrode, the etching barrier layer is positioned on the active layer, the source electrode and the drain electrode both extend outwards from the surface of the etching barrier layer to the active layer and the gate insulating layer, a gap is formed between the source electrode and the drain electrode to expose the etching barrier layer, the first insulating layer is positioned on the source electrode and the drain electrode, and an opening is formed in the first insulating layer corresponding to the region between the source electrode and the drain electrode; the second insulating layer covers the oxide thin film transistor and the photodiode, and the third insulating layer covers the common electrode and the second insulating layer.
Optionally, the panel structure of the X-ray flat panel detector further includes a fourth insulating layer, where the fourth insulating layer is located between the first insulating layer and the second insulating layer and located at the periphery of the photodiode.
The invention also provides an X-ray flat panel detector, which comprises the panel structure of the X-ray flat panel detector in any scheme.
As described above, the panel structure of the X-ray flat panel detector, the manufacturing method thereof, and the X-ray flat panel detector thereof of the present invention have the following beneficial effects: according to the invention, through optimized flow design, the source and drain electrode material layer is subjected to graphical processing after the preparation of the photodiode is completed to form the source and drain electrode of the oxide thin film transistor, so that the source and drain electrode material layer can be utilized to enhance the physical isolation between the photodiode and the active layer of the oxide thin film transistor, the influence of the manufacturing processes of the photodiode, a subsequent insulating layer and the like on the electrical property of the oxide thin film transistor is reduced, the reduction of the leakage current of the oxide thin film transistor is facilitated, the electrical property uniformity of a device is improved, the process window of a panel is enlarged, and the reliability of the device is improved. According to the panel structure of the X-ray flat panel detector and the detector provided by the invention, the off-state current can be effectively reduced, the electrical uniformity can be obviously improved, and the performance and the service life of a device can be prolonged.
Drawings
Fig. 1 is a flowchart illustrating a method for manufacturing a panel structure of an X-ray flat panel detector according to an embodiment of the present invention.
Fig. 2 to 13 are schematic structural diagrams of the manufacturing method shown in fig. 1 at various steps, and fig. 12 is a schematic structural diagram of a panel of an X-ray flat panel detector provided in the third embodiment.
Fig. 14 is a schematic diagram illustrating a panel structure of an X-ray flat panel detector according to a fourth embodiment of the present invention.
Fig. 15 is a schematic structural diagram of an X-ray flat panel detector according to a fifth embodiment of the present invention.
Description of the element reference numerals
11 substrate
12 gate electrode
13 Gate insulating layer
14 active layer
15 etch stop layer
16 source-drain electrode material layer
161 source electrode
162 drain electrode
17 first insulating layer
18 photodiode
181N type semiconductor layer
182 intrinsic type semiconductor layer
183P type semiconductor layer
184 top electrode
19 second insulating layer
20 common electrode
21 third insulating layer
22 fourth insulating layer
1 sensor array layer
2 surface layer film layer
3 scintillator layer
4 bottom packaging film layer
5 transparent substrate
S1-S11
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 15. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The oxide thin film transistor has high electron mobility, and is very favorable for realizing high-resolution large-area dynamic imaging, and the oxide thin film transistor and the photodiode are generally prepared layer by layer, so that the oxide thin film transistor is favorable for large-scale manufacturing. However, in order to achieve effective absorption of visible light, reduce leakage current of the diode, and improve reliability of the device, a long-time high-temperature process exists in the manufacturing process, and atoms in the film layer, such as hydrogen atoms in the amorphous silicon layer, are diffused to the active layer of the oxide thin film transistor by adopting the conventional structure and manufacturing method, which causes the leakage current of the oxide thin film transistor to increase, and causes the performance of the device to decrease. The invention therefore proposes the following improvements.
Example one
As shown in fig. 1, the present invention provides a method for preparing a panel structure of an X-ray flat panel detector, comprising the steps of:
s1: providing a substrate 11, and forming a gate electrode 12 on the substrate 11, which can be specifically referred to as fig. 2; the substrate 11 is preferably made of a transparent material, including but not limited to one or both of glass and flexible Polyimide (PI); the gate electrode 12 is made of at least one of gold and its alloy, silver and its alloy, copper and its alloy, aluminum and its alloy, molybdenum and its alloy, titanium and its alloy, tantalum and its alloy, tungsten and its alloy, chromium and its alloy, indium zinc oxide, transparent conductive plastic, and conductive compound. The preparation method of the gate electrode 12 depends on the material thereof, and includes, but is not limited to, physical vapor deposition and coating; preferably, the gate electrode 12 can be made of copper, aluminum, molybdenum, etc. by physical vapor deposition; more specifically, a conductive material layer may be deposited and formed on the substrate 11, and then the gate electrode 12 is formed by etching according to a mask, or the conductive material deposition at the corresponding position is directly performed according to the mask;
s2: forming a gate insulating layer 13, wherein the gate insulating layer 13 covers the gate electrode 12 and the substrate 11, and specifically, refer to fig. 3; the material of the gate insulating layer 13 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride and organic material layer, and the gate insulating layer may be prepared by, but is not limited to, vapor deposition method according to different materials;
s3: forming an active layer 14 on the surface of the gate insulating layer 13, wherein the active layer 14 corresponds to the gate electrode 12 vertically, and the active layer 14 is an oxide semiconductor layer, which can be specifically referred to as shown in fig. 4; more specifically, the material of the active layer 14 includes, but is not limited to, any one or more of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, gallium zinc oxide, and the active layer 14 may be formed by depositing a corresponding material layer by, but is not limited to, a vapor deposition method and performing patterned etching;
s4: forming an etching barrier layer 15 on the active layer 14, as shown in fig. 5; the material of the etching barrier layer 15 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride and organic material layers, and the etching barrier layer 15 may be formed by depositing a corresponding material layer on the surface of the structure obtained in step S3, and then performing patterned etching; the outer edge of the etching barrier layer 15 in the direction of the subsequently formed source and drain electrodes is positioned in the outer edge of the active layer 14 (i.e. the orthographic projection of the etching barrier layer 15 in the direction is in the active layer 14), and the outer edge of the etching barrier layer 15 in the direction of the non-source and drain electrodes is positioned outside the outer edge of the active layer;
s5: forming a source/drain electrode material layer 16, wherein the source/drain electrode material layer 16 covers the etching barrier layer 15, extends from the etching barrier layer 15 to the surfaces of the active layer 14 and the gate insulating layer 13, and may be partially located on the surface of the active layer 14, which is specifically shown in fig. 6; the material of the source/drain electrode material layer 16 includes, but is not limited to, at least one of gold and its alloy, silver and its alloy, copper and its alloy, aluminum and its alloy, molybdenum and its alloy, titanium and its alloy, tantalum and its alloy, tungsten and its alloy, chromium and its alloy, indium zinc oxide, transparent conductive plastic, and conductive compound. The preparation method of the source/drain electrode material layer 16 depends on the material, and includes but is not limited to physical vapor deposition and coating; preferably, the source/drain electrode material layer 16 may be prepared by a physical vapor deposition method and using copper, aluminum, molybdenum, or other materials; the step can also comprise a data line patterning process so as to facilitate the electrical leading-out of the device;
s6: forming a first insulating layer 17, wherein the first insulating layer 17 covers the source/drain electrode material layer 16, and performing patterned etching on the first insulating layer 17 to form a first opening, the first opening is spaced from the active layer 14, and the source/drain electrode material layer 16 is exposed by the first opening, which can be specifically referred to as shown in fig. 7; the material of the first insulating layer 17 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride, and organic material layer, and the forming method thereof depends on the material, including, but not limited to, vapor deposition;
s7: forming a film and patterning on the substrate with the first opening to form a photodiode 18, wherein the photodiode 18 covers and extends to the periphery 18 of the first opening, as shown in fig. 8; the photodiode 18 includes but is not limited to any one or more of a PIN structure, a PN structure and a Schottky structure, and is prepared layer by layer according to different structures; the photodiode 18 is usually made of a hydrogenated amorphous silicon material, and a high-temperature film formation and a high-temperature annealing process are required in the preparation process, but due to the protection of the source/drain electrode material layer 16, impurity atoms such as hydrogen atoms cannot diffuse into the active layer 14 in the high-temperature process, so that the performance of the active layer 14 can be ensured;
s8: the first insulating layer 17 and the source/drain electrode material layer 16 not covered by the photodiode 18 are patterned to form a second opening (preferably, the same mask is used for patterning once, and then the first insulating layer 17 is etched to form the second opening and the source/drain electrode material layer 16 is etched to form the second opening), and a source electrode 161 and a drain electrode 162 are located on two sides of the second opening, the second opening exposes the etching blocking layer 15, the photodiode 18 is electrically connected with the source electrode 161, as shown in fig. 9, for example, as can be seen from the drawing, a bottom electrode of the photodiode 18 is located on the surface of the source electrode 161, and the bottom electrode and the source electrode are in contact with each other to electrically connect the photodiode 18 and an oxide thin film transistor;
s9: forming a second insulating layer 19, the second insulating layer 19 covering the first insulating layer 17, the second opening, and the photodiode 18; the gate electrode 12, the gate insulating layer 13, the active layer 14, the etching blocking layer 15, the first insulating layer 17, the source 161 and the drain 162 together form an oxide thin film transistor, and the oxide thin film transistor and the photodiode 18 are arranged in a non-overlapping manner on a vertical plane on which X-rays are incident, as shown in fig. 10; the oxide thin film transistors and the photodiodes 18 are usually alternately arranged in a two-dimensional array (i.e., the oxide thin film transistors and the photodiodes 18 are both multiple), the material of the second insulating layer 19 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride and organic material layers, and the second insulating layer can be prepared by a vapor deposition method including, but not limited to, a vapor deposition method according to different materials;
s10: forming a common electrode 20, wherein the common electrode 20 can be electrically connected with the photodiode 18 through a via hole, as shown in fig. 11; such as the common electrode 20, is electrically connected to the top electrode of the photodiode 18 and the common electrode 20 extends over the oxide thin film transistor to act as a shielding layer to block visible light from entering the oxide thin film transistor. The lower electrode of the photodiode 18 and the external data line are at the same potential by switching on the oxide thin film transistor, and the potential of the photodiode 18 is reversely biased by combining the potential provided by the common electrode 20, so that photo-generated electrons in the pixel structure are led out, and a sensing function is realized.
According to the invention, through optimized flow design, after the preparation of the photodiode 18 is completed, the source/drain electrode material layer 16 is subjected to graphical processing to form the source/drain electrode of the oxide thin film transistor, so that the source/drain electrode material layer 16 can be utilized to enhance the physical isolation between the photodiode 18 and the active layer of the oxide thin film transistor, the influence of the process technologies such as the photodiode 18 and a subsequent insulating layer on the electrical property of the oxide thin film transistor is reduced, the reduction of the leakage current of the oxide thin film transistor is facilitated, the electrical property uniformity of a device is improved, the process window of a panel is enlarged, and the reliability of the device is improved.
In an example, as shown in fig. 12, the preparation method further includes a step S11 of forming a third insulating layer 21 after preparing the common electrode 20, where the third insulating layer 21 covers the common electrode 20 and the second insulating layer 19 to seal and protect the structures, and an opening may be formed in the third insulating layer 21 to electrically conduct out the device. The material of the third insulating layer 21 includes, but is not limited to, any one or more of silicon oxide, silicon nitride, silicon oxynitride and organic material layer, and different materials may be prepared by, but is not limited to, vapor deposition.
In one example, as shown in fig. 13, the photodiode 18 is a PIN-structured photodiode, and the step of forming the photodiode 18 includes sequentially forming an N-type semiconductor layer 181, an intrinsic-type semiconductor layer 182, a P-type semiconductor layer 183, and a top electrode layer 184 on the substrate where the first opening is completed, and performing a patterning process. In further examples, the N-type semiconductor layer includes, but is not limited to, a phosphorus doped a-si layer, the intrinsic type semiconductor layer includes, but is not limited to, an intrinsic semiconductor layer of a-si, the P-type semiconductor layer includes, but is not limited to, a boron doped a-si layer; the top electrode is preferably a transparent electrode, the material of which includes, but is not limited to, one or a combination of two of a transparent conductive material (including, but not limited to, indium tin oxide), and/or an electrode with openings (including, but not limited to, an open-ended metal electrode). The top electrode is made of transparent conductive material or metal electrode with holes, so that visible light can irradiate the photodiode to convert optical signals and electric signals.
Example two
In this embodiment, another manufacturing method is provided, which is different from the first embodiment in that, on the basis of the first embodiment, the manufacturing method in this embodiment further includes a step of forming a fourth insulating layer 22 on the surface of the first insulating layer 17 after forming the first insulating layer 17 and before forming the photodiode 18, the fourth insulating layer 22 is patterned and etched twice, the first patterning and etching is performed after or before the first patterning and etching of the first insulating layer to form an insulating island above an oxide transistor, the second patterning and etching is performed to form a second opening, and the second insulating layer 19 covers the fourth insulating layer 22, and the device structure prepared in this embodiment is as shown in fig. 14. As can be seen from the attached drawings, the fourth insulating layer 22 is located between the first insulating layer 17 and the second insulating layer 19, so when the first opening and the second opening are formed by patterning etching, the fourth insulating layer 22 needs to be formed by performing corresponding patterning etching at the same time. The fourth insulating layer 22 covers the oxide thin film transistor and the periphery of the photodiode 18, so that the oxide thin film transistor can be well protected. The material of the fourth insulating layer 22 includes, but is not limited to, one or more of silicon oxide, silicon nitride, silicon oxynitride and organic material layer (such as polyimide), and the preparation method thereof may depend on the material, including, but not limited to, vapor deposition, coating or combination of multiple methods, and the thickness thereof is preferably 200 to 20000 angstroms, more preferably 1000 to 5000 angstroms, but not limited thereto.
Except for the above differences, the preparation method of the present embodiment is the same as that of the first embodiment, and specific reference is made to the description of the first embodiment, which is not repeated for brevity.
EXAMPLE III
As shown in fig. 12, the present embodiment provides an X-ray flat panel detector panel structure, which includes a substrate 11, an oxide thin film transistor, a photodiode 18, a second insulating layer 19, a common electrode 20, and a third insulating layer 21; the oxide thin film transistor and the photodiode 18 are electrically connected and arranged in a non-overlapping manner on a vertical plane on which X-rays are incident, the common electrode 20 is electrically connected with the photodiode 18 and extends to the upper part of the oxide thin film transistor, and the second insulating layer 19 covers the oxide thin film transistor and the photodiode 18; the oxide thin film transistor comprises a gate electrode 12, a gate insulating layer 13, an active layer 14, an etching barrier layer 15, a first insulating layer 17, a source electrode 161 and a drain electrode 162, wherein the active layer 14 is an oxide semiconductor layer; the gate electrode 12 is located on the surface of the substrate 11, the gate insulating layer 13 covers the substrate 11 and the gate electrode 12, the active layer 14 is located on the gate insulating layer 13 and is correspondingly located above the gate electrode 12, the etching blocking layer 15 is located on the active layer 14, the source 161 and the drain 162 both extend outwards from the surface of the etching blocking layer 15 to the active layer 14 and the gate insulating layer 13, a space is formed between the source 161 and the drain 162 to expose the etching blocking layer 15, the first insulating layer 17 is located on the source 161 and the drain 162, and the first insulating layer 17 is opened in a region corresponding to a region between the source 161 and the drain 162 (or a space without the first insulating layer 17 is formed between the source 161 and the drain 162); the second insulating layer 19 covers the oxide thin film transistor and the photodiode 18, and the third insulating layer 21 covers the common electrode 20 and the second insulating layer 19. The panel structure of the X-ray flat panel detector in this embodiment can be prepared based on the preparation method described in the first embodiment, so that the corresponding contents in the first embodiment can be cited here in full, and are not repeated for brevity. The panel structure of the X-ray flat panel detector prepared by the method has the advantages that the off-state current can be effectively reduced, the electrical uniformity can be remarkably improved, and the performance and the service life of a device can be prolonged.
Example four
As shown in fig. 14, the present embodiment provides another X-ray flat panel pixel structure, and the difference between the X-ray flat panel pixel structure of the present embodiment and the third embodiment is that the X-ray flat panel detector panel structure in the present embodiment has a fourth insulating layer 22 besides all the features of the X-ray flat panel pixel structure of the third embodiment, the fourth insulating layer 22 is located between the first insulating layer 17 and the second insulating layer 19, that is, above the oxide thin film transistor and located at the periphery of the photodiode 18, and the fourth insulating layer 22 can well protect the oxide thin film transistor, thereby further improving the performance of the X-ray flat panel pixel structure. Except for the above differences, other parts of the X-ray flat panel pixel structure of the present embodiment are the same as those of the third embodiment, and specific reference is made to the description of the third embodiment, which is not repeated for brevity.
EXAMPLE five
This embodiment provides an X-ray flat panel detector, where the X-ray flat panel detector includes the panel structure of the X-ray flat panel detector described in any of the third or fourth embodiments, so that please refer to the third or fourth embodiment for the description of the panel structure of the X-ray flat panel detector, which is not repeated for brevity. Specifically, as shown in fig. 15, in an example, the X-ray flat panel detector sequentially includes a surface film layer 2, a scintillator layer 3, a sensor array layer 1, and a bottom encapsulation film layer 4 along an incident direction of an X-ray; the sensor array layer 1 includes the panel structure of the X-ray flat panel detector, the surface film layer 2 includes but is not limited to one or more of a reflective film, a light-absorbing film and an encapsulation film, the bottom encapsulation film layer 4 may have the same or different structure as the surface film layer, for example, it may also include but is not limited to one or more of a reflective film, a light-absorbing film and an encapsulation film, the transparent substrate 5 of the detector may be a substrate of the panel structure of the X-ray flat panel detector, and of course, may also be an additional supporting structure. Of course, the X-ray flat panel detector may also have other structures, such as a bottom scintillator layer, etc., and is not further developed. Due to the adoption of the panel structure of the X-ray flat panel detector in the scheme, the off-state current of the X-ray flat panel detector provided by the invention can be effectively reduced, the electrical uniformity can be obviously improved, and the performance and the service life of a device can be prolonged.
In summary, the present invention provides a panel structure of an X-ray flat panel detector, a method for manufacturing the panel structure, and an X-ray flat panel detector. According to the invention, through optimized flow design, the source and drain electrode material layer is subjected to graphical processing after the preparation of the photodiode is completed to form the source and drain electrode of the oxide thin film transistor, so that the source and drain electrode material layer can be utilized to enhance the physical isolation between the photodiode and the active layer of the oxide thin film transistor, the influence of the manufacturing processes of the photodiode, a subsequent insulating layer and the like on the electrical property of the oxide thin film transistor is reduced, the reduction of the leakage current of the oxide thin film transistor is facilitated, the electrical property uniformity of a device is improved, the process window of a panel is enlarged, and the reliability of the device is improved. According to the panel structure of the X-ray flat panel detector and the detector provided by the invention, the off-state current can be effectively reduced, the electrical uniformity can be obviously improved, and the performance and the service life of a device can be prolonged. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (9)

1. A preparation method of a panel structure of an X-ray flat panel detector is characterized by comprising the following steps:
providing a substrate, and forming a gate electrode on the substrate;
forming a gate insulating layer, wherein the gate insulating layer covers the gate electrode and the substrate;
forming an active layer on the surface of the gate insulating layer, wherein the active layer corresponds to the gate electrode up and down, and the active layer is an oxide semiconductor layer;
forming an etching barrier layer on the active layer;
forming a source drain electrode material layer, wherein the source drain electrode material layer covers the etching barrier layer and extends from the etching barrier layer to the surfaces of the active layer and the gate insulating layer;
forming a first insulating layer, wherein the first insulating layer covers the source and drain electrode material layer, and the first insulating layer is subjected to patterned etching to form a first opening, the first opening is spaced from the active layer, and the source and drain electrode material layer is exposed out of the first opening;
forming a film and patterning on the substrate with the first opening to form a photodiode, wherein the photodiode covers and extends to the periphery of the first opening;
carrying out graphical etching on the first insulating layer and the source-drain electrode material layer which is not covered by the photodiode to form a second opening and a source electrode and a drain electrode which are positioned on two sides of the second opening, wherein the etching barrier layer is exposed out of the second opening;
forming a second insulating layer, wherein the second insulating layer covers the first insulating layer, the second opening and the photodiode, the gate electrode, the gate insulating layer, the active layer, the etching blocking layer, the first insulating layer, the source electrode and the drain electrode jointly form an oxide thin film transistor, and the oxide thin film transistor is electrically connected with the photodiode and is arranged on a vertical plane on which X-rays are incident in a non-overlapping mode;
forming a common electrode electrically connected with the photodiode and extending to above the oxide thin film transistor;
and forming a third insulating layer which covers the common electrode and the second insulating layer.
2. The method of claim 1, wherein: the photodiode is a PIN-structured photodiode, and the step of forming the photodiode includes sequentially forming an N-type semiconductor layer, an intrinsic semiconductor layer, a P-type semiconductor layer, and a top electrode layer on the substrate on which the first opening is formed, and performing patterning.
3. The method according to claim 2, wherein the N-type semiconductor layer comprises a phosphorus doped a-si layer, the intrinsic type semiconductor layer comprises an a-si intrinsic semiconductor layer, the P-type semiconductor layer comprises a boron doped a-si layer, and the material of the top electrode layer comprises one or a combination of two of a transparent conductive material and/or an electrode with an opening.
4. The preparation method according to claim 1, wherein the substrate comprises one or a combination of glass and flexible polyimide, and the active layer is made of any one or more of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, gallium zinc oxide and zinc oxide; the material of the gate electrode and the source drain electrode material layer comprises at least one of gold and alloy thereof, silver and alloy thereof, copper and alloy thereof, aluminum and alloy thereof, molybdenum and alloy thereof, titanium and alloy thereof, tantalum and alloy thereof, tungsten and alloy thereof, chromium and alloy thereof, indium zinc oxide, transparent conductive plastic and conductive compound.
5. The method according to claim 1, wherein the gate insulating layer, the etching stopper layer, the first insulating layer, the second insulating layer, and the third insulating layer are made of one or more materials selected from silicon oxide, silicon nitride, silicon oxynitride, and organic material layers.
6. The method according to any one of claims 1 to 5, further comprising a step of forming a fourth insulating layer on the surface of the first insulating layer after forming the first insulating layer and before forming the photodiode, wherein the fourth insulating layer is subjected to two patterning etches, the first patterning etch is performed after or before the first insulating layer patterning etch to form an insulating island over the oxide transistor, and the second patterning etch forms a second opening, and the second insulating layer covers the fourth insulating layer.
7. The panel structure of the X-ray flat panel detector is characterized by comprising a substrate, an oxide thin film transistor, a photodiode, a second insulating layer, a common electrode and a third insulating layer; the oxide thin film transistor and the photodiode are electrically connected and are arranged on a vertical plane where X rays are incident in a non-overlapping mode, and the common electrode is electrically connected with the photodiode and extends to the upper portion of the oxide thin film transistor; the oxide thin film transistor comprises a gate electrode, a gate insulating layer, an active layer, an etching barrier layer, a first insulating layer, a source electrode and a drain electrode, wherein the active layer is an oxide semiconductor layer; the gate electrode is positioned on the surface of the substrate, the gate insulating layer covers the substrate and the gate electrode, the active layer is positioned on the gate insulating layer and is correspondingly positioned above the gate electrode, the etching barrier layer is positioned on the active layer, the source electrode and the drain electrode both extend outwards from the surface of the etching barrier layer to the active layer and the gate insulating layer, a gap is formed between the source electrode and the drain electrode to expose the etching barrier layer, the first insulating layer is positioned on the source electrode and the drain electrode, and an opening is formed in the first insulating layer corresponding to the region between the source electrode and the drain electrode; the second insulating layer covers the oxide thin film transistor and the photodiode, and the third insulating layer covers the common electrode and the second insulating layer.
8. The X-ray flat panel detector panel structure according to claim 7, further comprising a fourth insulating layer between the first and second insulating layers and at the periphery of the photodiode.
9. An X-ray flat panel detector characterized in that it comprises an X-ray flat panel detector panel structure according to any of claims 7 or 8.
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