CN117790289A - Bonding method for improving thermal stability of Si/InGaAs bonding interface - Google Patents
Bonding method for improving thermal stability of Si/InGaAs bonding interface Download PDFInfo
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- CN117790289A CN117790289A CN202311851710.0A CN202311851710A CN117790289A CN 117790289 A CN117790289 A CN 117790289A CN 202311851710 A CN202311851710 A CN 202311851710A CN 117790289 A CN117790289 A CN 117790289A
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 title claims abstract 20
- 239000000463 material Substances 0.000 claims abstract description 34
- 238000000137 annealing Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 239000010410 layer Substances 0.000 claims abstract description 15
- 239000011229 interlayer Substances 0.000 claims abstract description 5
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims abstract 3
- 239000011259 mixed solution Substances 0.000 claims description 21
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 16
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 16
- 239000000243 solution Substances 0.000 claims description 14
- 238000011010 flushing procedure Methods 0.000 claims description 13
- 238000002791 soaking Methods 0.000 claims description 13
- 238000009835 boiling Methods 0.000 claims description 8
- 239000008367 deionised water Substances 0.000 claims description 8
- 229910021641 deionized water Inorganic materials 0.000 claims description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 238000005498 polishing Methods 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000005416 organic matter Substances 0.000 claims description 4
- 238000009210 therapy by ultrasound Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 3
- 230000003746 surface roughness Effects 0.000 claims description 2
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 7
- 239000010408 film Substances 0.000 description 21
- 230000035882 stress Effects 0.000 description 5
- 230000008646 thermal stress Effects 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 4
- 238000005406 washing Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000000089 atomic force micrograph Methods 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
A bonding method for improving the thermal stability of Si/InGaAs bonding interface. Epitaxial single crystal In on Si substrate using MOCVD 1‑ x Ga x And finally, repairing the crystal quality and bonding interface of the film by high-temperature annealing to prepare the Si-based InGaAs film with high quality and ultrahigh thermal stability. By epitaxial growth of In on Si substrates 1‑ x Ga x As is used As a bonding interlayer to convert the bonding interface from an InGaAs and Si heterogeneous interface into InGaAs and In 1‑x Ga x As interface, relieve the huge stress that heterogeneous bonding interface produces because of the thermal mismatch between the heterogeneous materials at high temperature, therefore the stability of bonding interface is promoted. The prepared Si-based InGaAs film has higher stability at high temperature, and the epitaxial buffer layer effectively relieves stress generated by thermal mismatch between heterogeneous materials.
Description
Technical Field
The invention relates to a method for reducing Si-based In 0.53 Ga 0.47 Bonding method of As (InGaAs) film thermal stress, especially relates to growing In by using metal organic chemical vapor deposition system 1-x Ga x As is used As the bonding intermediate layer of InGaAs and Si to realize a bonding method for improving the thermal stability of the Si/InGaAs bonding interface with high quality and low thermal stress.
Background
Fabrication of III-V optoelectronic devices on Si substrates is a promising approach for the implementation of optoelectronic integrated circuits (OEICs). The InGaAs material is a direct band gap semiconductor, has high absorption coefficient at 1550nm wave band, and is an ideal absorption region material. Si material has advantages of low thermal conductivity, good temperature characteristic, low defect density, etc. Thus, integration of InGaAs with Si materials has also been one of the main directions of attack for researchers in the last two decades. However, there are high lattice mismatch and thermal mismatch between InGaAs and Si materials, and the dislocation density of Si-based InGaAs thin films prepared by epitaxial growth is as high as 10 9 cm -2 The Si-based InGaAs thin film device is a main reason that the dark current is high and the device performance is difficult to improve at present. In order to greatly reduce the dislocation density of InGaAs films, heterobonding methods have received great attention in recent years. However, the Si-based InGaAs film prepared by the common bonding method has poor high-temperature stability, the direct bonding sheet is easy to warp and crack at high temperature, and a bonding interface with low bubble density at the interface after high-temperature annealing is difficult to obtain; second, direct bonding is the direct contact of two single crystal materials, making misfit dislocations very prone to climb at high temperatures. Therefore, a method for preparing a Si-based InGaAs thin film of high quality and high thermal stability, which relieves the mismatch stress between heterogeneous materials, has yet to be studied.
Disclosure of Invention
The invention aims to provide a bonding method for improving the thermal stability of an Si/InGaAs bonding interface, and aims to solve the problems of bubbles, cracks and the like generated by thermal mismatch of the bonding interface of the InGaAs and the Si in a high-temperature annealing process and the problem of interface dislocation climbing to an InGaAs film during heating, and an epitaxial growth intermediate layer is used as a bonding stress release buffer layer, so that the problem of poor thermal stability of heterogeneous bonding is effectively solved, and the preparation of a high-quality Si-based InGaAs film is realized.
The invention comprises the following steps:
1) Sequentially ultrasonically cleaning the InP substrate by using acetone, ethanol and deionized water to remove organic pollution on the surface;
2) Soaking and flushing the InP substrate cleaned in the step 1) in a diluted HF solution to remove a surface oxide layer;
3) Growing InGaAs material on the InP substrate cleaned in the step 2) by adopting MOCVD;
4) Sequentially ultrasonically cleaning the InGaAs material subjected to epitaxial growth in the step 3) by using acetone, ethanol and deionized water to remove organic pollution on the surface;
5) Soaking and flushing the InGaAs material subjected to ultrasonic cleaning in the step 4) in a diluted HF solution to remove a surface oxide layer;
6) The 4 degree Si sheet is firstly treated with H 2 SO 4 And H 2 O 2 Boiling and rinsing the mixed solution of (2), and soaking and rinsing the mixed solution in diluted HF solution;
7) The 4 degree Si sheet washed in the step 6) is firstly treated with NH 4 OH、H 2 O 2 And H 2 Boiling and flushing the mixed solution of O, and then soaking and flushing the mixed solution in diluted HF solution;
8) The 4 degree Si sheet washed in the step 7) is firstly treated with HCl and H 2 O 2 And H 2 Boiling and flushing the mixed solution of O, and then soaking and flushing the mixed solution in diluted HF solution;
9) Growing In on the 4-degree Si sheet cleaned In the step 8) by MOCVD 1-x Ga x An As interlayer for bonding the stress release buffer layer;
10 (ii) Si/In after growth In step 9) 1-x Ga x The As material is polished by using a manual chemical mechanical polishing method until the surface roughness is lower than 0.5nm;
11 (ii) polishing step 10) Si/In 1-x Ga x Sequentially performing ultrasonic treatment on the As material by using acetone, ethanol and deionized water to remove surface organic matter pollution;
12 (ii) Si/In after rinsing In step 11) 1-x Ga x As material and step 5) rinsingThe InGaAs material is bonded at room temperature after Ar+ is adopted to activate the surface;
13 (ii) bonding the Si/In after step 12) 1-x Ga x The As/InGaAs/InP sheet is subjected to low-temperature thermal annealing by a tube furnace to increase bonding strength;
14 (ii) Si/In after annealing In step 13) 1-x Ga x Placing the As/InGaAs/InP sheet at HCl:H 2 Removing the InP substrate from the O mixed solution to obtain Si/In 1-x Ga x An As/InGaAs material, namely a Si-based InGaAs film;
15 Carrying out 500 ℃ @1h annealing on the Si-based InGaAs film stripped in the step 14) by adopting a tube furnace so as to improve the bonding density of a bonding interface;
16 And (3) carrying out high-temperature annealing at 650 ℃ on the Si-based InGaAs film repaired in the step (15) by adopting a tube furnace so as to verify the thermal stability of the bonding interface.
The invention has the advantages that: the invention creatively provides a bonding method for greatly reducing the thermal stress of a Si-based InGaAs film, which comprises the steps of epitaxially growing In on a Si substrate 1-x Ga x As is used As a bonding interlayer to convert the bonding interface from an InGaAs and Si heterogeneous interface into InGaAs and In 1-x Ga x As interface, relieve the huge stress that heterogeneous bonding interface produces because of the thermal mismatch between the heterogeneous materials at high temperature, therefore the stability of bonding interface is promoted.
Drawings
Fig. 1 is a cross-sectional SEM image of a Si-based InGaAs film obtained in an embodiment of the present invention.
FIG. 2 shows Si-based In obtained In the embodiment of the present invention 1-x Ga x AFM image of sample after As film polishing.
FIG. 3 is a comparison image of an optical microscope of a Si-based InGaAs film tube furnace annealed at 650℃for 30min, obtained in the example of the present invention.
Detailed Description
In order to make the contents of the present invention more easily understood, the technical scheme of the present invention will be further described with reference to the specific embodiments, but the present invention is not limited thereto.
The present invention relates to a method for reducing Si-basedIn 0.53 Ga 0.47 Bonding method of As (InGaAs) film thermal stress, especially relates to growing In by using metal organic chemical vapor deposition system 1-x Ga x As is used As a bonding interlayer for InGaAs, si to achieve high quality and low thermal stress. As shown In FIG. 1, single crystal In is first epitaxially grown on a Si substrate using MOCVD 1-x Ga x And finally, repairing the crystal quality and bonding interface of the film by high-temperature annealing to prepare the Si-based InGaAs film with high quality and ultrahigh thermal stability.
The apparatus used in the embodiments of the present invention is a Metal Organic Chemical Vapor Deposition (MOCVD) system. The crystal orientation of the Si substrate material is (100), the chamfer angle is 4 degrees, the impurity type is N type, and the resistivity is 5 omega cm. The crystal orientation of the InP substrate material is (100), the impurity type is N type, and the resistivity is 0.05-0.05Ω cm.
1. InP-based InGaAs material preparation
1) Sequentially performing ultrasonic treatment on the InP sheet by using acetone, ethanol and deionized water for 10min to remove surface organic matter pollution;
2) Soaking the cleaned InP sheet in diluted HF solution for 2min and flushing to remove the surface oxide layer;
3) Growing InGaAs material on the washed InP sheet by MOCVD;
2. preparation of Si-based epitaxial buffer layer
1) The Si sheet is firstly treated with H 2 SO 4 ︰H 2 O 2 The mixed solution of =4:1 is boiled and rinsed, then soaked in diluted HF solution for 4min and rinsed;
2) The washed Si sheet is firstly treated with NH 4 OH︰H 2 O 2 ︰H 2 Boiling and washing mixed solution of O=1:1:4, soaking in diluted HF solution for 2min, and washing;
3) The washed Si sheet is firstly treated with HCl/H 2 O 2 ︰H 2 Boiling and washing mixed solution of O=1:1:4, soaking in diluted HF solution for 2min, and washing;
4) Growing In on the cleaned Si sheet by MOCVD 1-x Ga x As to prepare a bonding buffer layer;
5) To grow Si/In 1-x Ga x As sheets were polished In a manual Chemical Mechanical Polishing (CMP) process 1-x Ga x Polishing the As buffer layer (As in FIG. 2);
6) Polished Si/In 1-x Ga x Sequentially performing ultrasonic treatment on the As sheet for 10min by using acetone, ethanol and deionized water to remove surface organic matter pollution;
3. wafer bonding and film peeling
1) InGaAs material and Si/In 1-x Ga x The As material is bonded at room temperature after Ar+ is adopted for surface activation;
2) Bonding Si/In 1-x Ga x The As/InGaAs/InP sheet is subjected to low-temperature thermal annealing at 300 ℃ by adopting a tube furnace, so that the bonding strength is improved;
3) Annealing Si/In 1-x Ga x Placing the As/InGaAs/InP sheet at HCl:H 2 Removing the InP substrate from the O mixed solution to obtain the completely stripped Si/In 1-x Ga x An As/InGaAs material;
4) And annealing the Si-based InGaAs film obtained by stripping for 500 ℃ at 1h by adopting a tube furnace to repair the bonding interface, thereby completing the preparation of the Si-based InGaAs film.
And (3) preserving the temperature of the prepared Si-based InGaAs film for 30min by adopting a tube furnace at 650 ℃ to verify the thermal stability of a bonding interface. Fig. 3 is a film metallographic microscope test chart before and after tube furnace annealing, and it can be seen that a small amount of bubbles appear at the bonding interface, which indicates that the Si-based InGaAs film prepared by the method has higher stability at high temperature, and the epitaxial buffer layer effectively relieves stress generated by thermal mismatch between heterogeneous materials.
The foregoing description is only of the preferred embodiments of the invention, and all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (4)
1. A bonding method for improving the thermal stability of a Si/InGaAs bonding interface is characterized by comprising the following steps:
1) Sequentially ultrasonically cleaning the InP substrate by using acetone, ethanol and deionized water to remove organic pollution on the surface;
2) Soaking and flushing the InP substrate cleaned in the step 1) in a diluted HF solution to remove a surface oxide layer;
3) Growing InGaAs material on the InP substrate cleaned in the step 2) by adopting MOCVD;
4) Sequentially ultrasonically cleaning the InGaAs material subjected to epitaxial growth in the step 3) by using acetone, ethanol and deionized water to remove organic pollution on the surface;
5) Soaking and flushing the InGaAs material subjected to ultrasonic cleaning in the step 4) in a diluted HF solution to remove a surface oxide layer;
6) The 4 degree Si sheet is firstly treated with H 2 SO 4 And H 2 O 2 Boiling and rinsing the mixed solution of (2), and soaking and rinsing the mixed solution in diluted HF solution;
7) The 4 degree Si sheet washed in the step 6) is firstly treated with NH 4 OH、H 2 O 2 And H 2 Boiling and flushing the mixed solution of O, and then soaking and flushing the mixed solution in diluted HF solution;
8) The 4 degree Si sheet washed in the step 7) is firstly treated with HCl and H 2 O 2 And H 2 Boiling and flushing the mixed solution of O, and then soaking and flushing the mixed solution in diluted HF solution;
9) Growing In on the 4-degree Si sheet cleaned In the step 8) by MOCVD 1-x Ga x An As interlayer for bonding the stress release buffer layer;
10 (ii) Si/In after growth In step 9) 1-x Ga x The As material is polished by using a manual chemical mechanical polishing method until the surface roughness is lower than 0.5nm;
11 (ii) polishing step 10) Si/In 1-x Ga x Sequentially performing ultrasonic treatment on the As material by using acetone, ethanol and deionized water to remove surface organic matter pollution;
12 (ii) Si/In after rinsing In step 11) 1-x Ga x The As material and the InGaAs material washed in the step 5) are bonded at room temperature after Ar+ is adopted to activate the surface;
13 (ii) bonding the Si/In after step 12) 1-x Ga x The As/InGaAs/InP sheet is subjected to low-temperature thermal annealing by a tube furnace to increase bonding strength;
14 (ii) Si/In after annealing In step 13) 1-x Ga x Placing the As/InGaAs/InP sheet at HCl:H 2 Removing the InP substrate from the O mixed solution to obtain Si/In 1-x Ga x An As/InGaAs material, namely a Si-based InGaAs film;
15 Carrying out 500 ℃ @1h annealing on the Si-based InGaAs film stripped in the step 14) by adopting a tube furnace so as to improve the bonding density of a bonding interface;
16 And (3) carrying out high-temperature annealing at 650 ℃ on the Si-based InGaAs film repaired in the step (15) by adopting a tube furnace so as to verify the thermal stability of the bonding interface.
2. The bonding method for improving thermal stability of Si/InGaAs bonding interface as claimed in claim 1, wherein in step 6), said H 2 SO 4 And H 2 O 2 The volume ratio of the mixed solution of (C) is H 2 SO 4 ︰H 2 O 2 ＝4︰1。
3. The bonding method for improving thermal stability of Si/InGaAs bonding interface as claimed in claim 1, wherein in step 7), said NH is 4 OH、H 2 O 2 And H 2 The volume ratio of the mixed solution of O is NH 4 OH︰H 2 O 2 ︰H 2 O＝1︰1︰4。
4. The bonding method for improving thermal stability of Si/InGaAs bonding interface as claimed in claim 1, wherein in step 8), the HCl, H 2 O 2 And H 2 The volume ratio of the mixed solution of O is HCl:H 2 O 2 ︰H 2 O＝1︰1︰4。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202311851710.0A CN117790289A (en) | 2023-12-29 | 2023-12-29 | Bonding method for improving thermal stability of Si/InGaAs bonding interface |
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| CN202311851710.0A CN117790289A (en) | 2023-12-29 | 2023-12-29 | Bonding method for improving thermal stability of Si/InGaAs bonding interface |
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| CN117790289A true CN117790289A (en) | 2024-03-29 |
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| CN202311851710.0A Pending CN117790289A (en) | 2023-12-29 | 2023-12-29 | Bonding method for improving thermal stability of Si/InGaAs bonding interface |
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