CN117735474A - Terahertz micro-nano system based on micro-mechanical silicon waveguide space integration and manufacturing method thereof - Google Patents
Terahertz micro-nano system based on micro-mechanical silicon waveguide space integration and manufacturing method thereof Download PDFInfo
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Abstract
The invention provides a terahertz micro-nano system based on micro-mechanical silicon waveguide space integration and a manufacturing method thereof, wherein the terahertz micro-nano system based on micro-mechanical silicon waveguide space integration comprises: a first layer of silicon substrate, a second layer of silicon substrate, a third layer of silicon substrate, a fourth layer of silicon substrate and a fifth layer of silicon substrate which are arranged from bottom to top; a radio frequency chip; a chip embedding groove; an input/output silicon waveguide-CPWG conversion structure; a silicon waveguide passive element; an array of TSVs. The invention realizes the stacking of a plurality of layers of silicon substrates by using the MEMS wafer level bonding process, realizes the space integration of the silicon micromechanical waveguide passive element and the microwave circuit, reduces the transmission loss and improves the space utilization rate of the terahertz micro-nano system structure; the high-precision processing of the MEMS bulk silicon process ensures the processing precision and the performance consistency of the terahertz micro-nano system.
Description
Technical Field
The invention relates to the technical field of waveguide three-dimensional integration, in particular to a terahertz micro-nano system based on micro-mechanical silicon waveguide space integration and a manufacturing method thereof.
Background
The millimeter wave, sub-millimeter wave and terahertz frequency band has rich frequency spectrum resources, wider available bandwidth and higher spatial resolution, so that electronic systems such as high-resolution radars, imaging systems, high-speed wireless communication and the like are rapidly developing to millimeter wave-sub-millimeter wave-terahertz frequency bands. Currently, millimeter wave-terahertz components and subsystems have been greatly developed, but development of a miniaturized, high-performance and easily-integrated terahertz system still faces serious challenges.
Conventional millimeter wave systems are typically built up of a plurality of separate modules with signal transmission between the modules being performed through a metallic waveguide structure. The manufacturing of the metal waveguide firstly adopts a mechanical cutting method to process a symmetrical waveguide split structure, and then the symmetrical waveguide split structure is assembled to form a metal three-dimensional cavity structure, and the machining manufacturing precision is usually 20-50 mu m. When the radio frequency chip is interconnected with the metal waveguide, the radio frequency chip is required to be installed at a specific position inside the hollow metal waveguide by adopting a manual micro-assembly process, and then corresponding leads are welded. The mounting mode has the problem of poor alignment precision, and also can cause large loss among interconnection interfaces, influence the performance of a circuit, and has the problems of high cost, large volume, low integration level and low yield.
As the system operating frequency is increased to the terahertz frequency band, the conventional millimeter wave system faces new challenges in addition to the above problems: (1) The size of the waveguide in the terahertz frequency band is greatly reduced, and the traditional machining process cannot manufacture the waveguide with the size of hundreds of micrometers. (2) The small physical dimension processing deviation of the waveguide causes larger frequency deviation to the waveguide element, and the traditional machining precision and the split assembly process are difficult to meet the application requirements of the waveguide element. (3) The terahertz frequency band, the skin effect and the low-loss requirement put severe requirements (about tens to hundreds of nanometers) on the surface roughness of the internal structure of the waveguide element, and the conventional machining surface roughness cannot meet the requirements.
Micromachining technology (MEMS) is a fine processing technology based on semiconductor technology, with processing precision on the order of 1 μm, and especially deep silicon etching (DRIE) micromachining technology for three-dimensional high aspect ratio structures, which provides a solution with great potential for low-loss interconnection and packaging for higher frequency millimeter wave and terahertz systems. Silicon waveguides based on micromechanical technology can achieve low losses similar to metal waveguides, and complex passive circuits can be integrated with active circuits. The invention provides a terahertz micro-nano system integrated in a silicon waveguide space and a manufacturing method thereof based on a silicon substrate material and adopting a micromechanical process, wherein the micro-nano system has the advantages of small volume, light weight, high performance, easy integration, high batch consistency and the like, is particularly suitable for system integration application of millimeter waves, sub-millimeter waves and terahertz frequency bands, and has wide application prospect.
Disclosure of Invention
The invention aims to provide a terahertz micro-nano system based on micro-mechanical silicon waveguide space integration and a manufacturing method thereof, and compared with the prior art, the terahertz micro-nano system has the advantages of higher processing precision, small loss, small volume, light weight, high performance and high integration level.
The technical solution for realizing the purpose of the invention is as follows: a terahertz micro-nano system based on micro-mechanical silicon waveguide space integration comprises a first layer of substrate, a second layer of substrate, a third layer of substrate, a fourth layer of substrate and a fifth layer of substrate which are arranged from bottom to top; a radio frequency chip; a chip embedding groove; an input/output micro-mechanical silicon waveguide-CPWG conversion structure; a strip line-micromechanical silicon waveguide switching structure; a silicon waveguide passive element; an array of TSVs;
the input/output micro-mechanical silicon waveguide-CPWG conversion structure is positioned on the first layer of substrate, the second layer of substrate and the third layer of substrate; the silicon waveguide in the input/output micro-mechanical silicon waveguide-CPWG conversion structure is positioned on the first layer substrate, the input/output CPWG is positioned on the lower surface of the third layer substrate, and the switching structure in the input/output micro-mechanical silicon waveguide-CPWG conversion structure is positioned on the second layer substrate and the third layer substrate; the chip embedded groove is positioned on the second layer of substrate; the radio frequency chip is placed in the chip embedding groove and is interconnected with the CPWG through a lead wire; the strip line-micro mechanical silicon waveguide conversion structure is positioned on a second layer substrate, a third layer substrate, a fourth layer substrate and a fifth layer substrate, wherein the strip line is positioned on the second layer substrate and the third layer substrate, and the micro mechanical silicon waveguide is positioned on the fourth layer substrate and the fifth layer substrate; the silicon waveguide passive element is positioned on the fourth layer substrate and the fifth layer substrate; the terahertz micro-nano system integrated with the micro-mechanical silicon waveguide space adopts an MEMS wafer-level bonding process to realize the stacking of the multi-layer substrates.
Further, the second layer substrate and the third layer substrate are high-resistance silicon with resistivity larger than 1000 Ω & cm, the first layer substrate is made of silicon or metal, and the fourth layer substrate and the fifth layer substrate are made of silicon; the second layer substrate, the third layer substrate, the fourth layer substrate and the fifth layer substrate all comprise TSV arrays, and when the first layer substrate is made of silicon materials, the first layer substrate also comprises TSV arrays.
Furthermore, the input port and the output port of the terahertz micro-nano system are both of the waveguide type.
Further, in the input/output micro-mechanical silicon waveguide-CPWG conversion structure, a cavity is formed at a position corresponding to a position on the second layer substrate above the waveguide port where the first layer substrate is located, a deep groove is formed at a position corresponding to the third layer substrate above the cavity from top to bottom, and a metal coupling line is formed at a position corresponding to the lower surface of the third layer substrate.
Further, the second layer substrate where the strip line-micro mechanical silicon waveguide conversion structure is located comprises a deep groove from bottom to top, the upper surface of the second layer substrate above the deep groove comprises a strip line, the position corresponding to the third layer substrate above the strip line comprises a cavity, the fourth layer substrate and the fifth layer substrate above the cavity comprise a silicon waveguide cavity structure, and the side wall of the silicon waveguide cavity is covered with metal.
Further, the radio frequency chip is a low noise amplifier, a mixer, an equalizer, a power amplifier or an attenuator; the silicon waveguide passive element is a filter, a directional coupler, a power divider or a magic T and is positioned on the fourth layer substrate and the fifth layer substrate.
Further, the radio frequency chip embedded groove is formed by etching the second layer of substrate; the radio frequency chip is adhered in the chip embedded groove of the second layer substrate by adopting conductive adhesive, solder or nano silver paste, and is interconnected with the peripheral circuit by adopting a bond alloy wire mode.
Further, the silicon waveguide passive element is formed by coupling silicon waveguides on a fourth layer substrate and a fifth layer substrate in the strip line-micro mechanical silicon waveguide conversion structure.
Further, the silicon micromechanical waveguide structure, the buried trench, the TSV array, the cavity and the deep trench are realized by a silicon wet etching or deep silicon reactive ion etching technology.
The invention also provides a manufacturing method of the terahertz micro-nano system based on the spatial integration of the micromechanical silicon waveguide, which comprises the following steps:
manufacturing a through hole on a silicon-based substrate, wherein the silicon-based substrate comprises a first layer of substrate, a second layer of substrate, a third layer of substrate, a fourth layer of substrate and a fifth layer of substrate from bottom to top;
manufacturing a waveguide cavity structure on a silicon-based substrate, wherein the silicon-based substrate comprises a first layer of substrate, a fourth layer of substrate and a fifth layer of substrate;
manufacturing a buried trench on the second layer substrate;
carrying out photoetching and electroplating processes on the upper and lower surfaces of a silicon-based substrate to realize metallized patterns, wherein the high-resistance silicon-based substrate comprises a first layer of substrate, a second layer of substrate, a third layer of substrate, a fourth layer of substrate and a fifth layer of substrate;
manufacturing a cavity and a deep groove on the second layer substrate and the third layer substrate;
wafer-level bonding is carried out on the first layer of substrate and the second layer of substrate, and wafer-level bonding is carried out on the third layer of substrate, the fourth layer of substrate and the fifth layer of substrate in pairwise alignment from bottom to top;
manufacturing metal micro-bumps on the lower surface of the bonded third layer substrate;
bonding a radio frequency chip on the bonded second layer of substrate, and connecting the radio frequency chip with the silicon-based interconnection circuit in a gold wire bonding mode;
and carrying out wafer-level low-temperature micro bump bonding stacking on the first layer substrate, the second layer substrate, the third layer substrate, the fourth layer substrate and the fifth layer substrate from bottom to top.
Compared with the prior art, the invention has the beneficial effects that: the manufacturing process of the terahertz micro-nano system with the spatial integration of the micromechanical silicon waveguide is based on the full-silicon-based micromachining technology and has micron-scale machining precision. The silicon waveguide is formed by adopting a high-precision DRIE technology, electroplating and wafer-level bonding process, has nanoscale metal side wall roughness, can completely meet the transmission requirement of the terahertz integrated element, enables the processing of the terahertz waveguide to be free from the stopper of the traditional mechanical processing limit, and effectively ensures and improves the performances of the terahertz waveguide and the micro-nano system. The full silicon-based wafer-level stacking manufacturing process comprehensively plays the high-precision advantage of the semiconductor process, and the terahertz micro-nano integrated system provided by the invention has the advantages of strong batch consistency, mass production and low cost.
Drawings
Fig. 1 is a side cross-sectional view of the present invention.
Fig. 2 is a flow chart of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and the detailed description, but the scope of the invention is not limited to the following.
Fig. 1 shows a basic structure of a terahertz micro-nano system based on spatial integration of micromechanical silicon waveguides. In the figure, the substrate of the terahertz micro-nano system is composed of a first layer of substrate 101, a second layer of substrate 201, a third layer of substrate 301, a fourth layer of substrate 401, a fifth layer of substrate 501 and six layers of metals M1-M6 from bottom to top, wherein the first layer of metal M1 is positioned below the first layer of substrate 101, the second layer of metal M2 is positioned between the first layer of substrate 101 and the second layer of substrate 201, the third layer of metal M3 is positioned between the second layer of substrate 201 and the third layer of substrate 301, the fourth layer of metal M4 is positioned between the third layer of substrate 301 and the fourth layer of substrate 401, the fifth layer of metal M5 is positioned between the fourth layer of substrate 401 and the fifth layer of substrate 501, and the sixth layer of metal M6 is positioned above the fifth layer of substrate 501; the chip includes a radio frequency chip 203, a chip embedded groove, an input/output micro-mechanical silicon waveguide-CPWG conversion structure, a strip line-micro-mechanical silicon waveguide conversion structure, a silicon waveguide passive component and a TSV array 104. The input/output micro-mechanical silicon waveguide-CPWG (grounded coplanar waveguide) conversion structure is located on the first layer substrate 101, the second layer substrate 201 and the third layer substrate 301 from bottom to top, the silicon waveguides 102_1 and 102_2 in the input/output micro-mechanical silicon waveguide-CPWG conversion structure are located on the first layer substrate 101, the input/output micro-mechanical silicon waveguides 202_1 and 202_2 are located on the lower surface of the third layer substrate 301 from bottom to top, the switching structure is located on the second layer substrate 201 and the third layer substrate 301, a cavity 205 is included in a corresponding position on the second layer substrate above the silicon waveguides in the switching structure, and a deep groove 305 with a certain depth from top to bottom is included in a corresponding position on the third layer substrate 301 above the cavity. The input/output micro-mechanical silicon waveguide-CPWG conversion structure is mainly used for converting a CPWG transmission line connected with a chip lead inside a terahertz system into a waveguide structure so as to meet the requirement of low loss of transmission of the terahertz frequency band system. The chip embedded groove 206 is positioned on the second layer substrate 201, and the radio frequency chip 203 is placed in the chip embedded groove 206 and is interconnected with the CPWG through a lead wire; the radio frequency chip 203 is connected with the passive device formed by the silicon waveguide through the CPWG and the conversion structure of the strip line-micro mechanical waveguide. The strip line 204 is located on the bottom of the second layer substrate 201, the second layer substrate on which the strip line 204 is located includes a deep groove 207 from bottom to top, the third layer substrate 301 on which the strip line is located includes cavities 303_1 and 303_2, the fourth layer substrate 401 above the cavities has silicon waveguide cavity structures 402_1, 402_2 and 403, the waveguide cavity structures 402_1 and 402_2 are input/output ports of the silicon waveguide passive device, and the fifth layer substrate 501 connected thereto includes a waveguide cavity structure 502. And (3) aligning all layers of substrates through a wafer-level bonding process, and stacking the substrates together to finally form the terahertz micro-nano system based on micro-mechanical waveguide space integration.
Fig. 2 is a manufacturing flow chart of the terahertz micro-nano system of the invention, which comprises the following steps:
photoetching and etching on a silicon-based substrate to form TSV etching holes, wherein the silicon-based substrate comprises a first layer substrate 101, a second layer substrate 201, a third layer substrate 301, a fourth layer substrate 401 and a fifth layer substrate 501 from bottom to top;
photoetching and etching are respectively carried out on the first layer substrate 101, the fourth layer substrate 401 and the fifth layer substrate 501 to form silicon waveguide cavity structures 102_1, 102_2, 402_1, 402_2, 403 and 502; photoetching and etching on the second layer substrate 201 to manufacture a buried trench 206;
performing photoetching, electroplating and other processes on the upper surface and the lower surface of the first layer substrate 101, the second layer substrate 201, the third layer substrate 301, the fourth layer substrate 401 and the fifth layer substrate 501 respectively to realize a metallization pattern;
photolithography, development, and etching are performed on the second-layer substrate 201 and the third-layer substrate 301, respectively, to manufacture cavities 205, 302, 303_1, 303_2, and deep grooves 207, 305;
wafer level bonding is performed after aligning the first layer substrate 101 and the second layer substrate 201;
after aligning the third layer substrate 301, the fourth layer substrate 401 and the fifth layer substrate 501 in pairs, wafer-level bonding is performed, so that three-layer substrate stacking is realized;
manufacturing metal micro-bumps on the lower surface of the bonded third layer substrate 301;
bonding a radio frequency chip 203 in a buried groove 206 of the bonded second layer substrate 201, and connecting the radio frequency chip with an interconnection circuit on the silicon substrate in a gold wire bonding mode;
after aligning the upper surface of the second-layer substrate 201 after bonding with the lower surface of the third-layer substrate 301 after bonding, stacking of five-layer substrates is achieved by using a wafer-level low-temperature micro-bump bonding process.
The terahertz micro-nano system based on the space integrated integration of the micromechanical silicon waveguide is formed by stacking a plurality of layers of silicon substrates, and can realize wafer-level integration of passive devices formed by the silicon waveguide and other radio frequency chips, wherein interconnection between the radio frequency chips and the silicon waveguide can be directly converted into a silicon waveguide structure by CPWG; the input and output structure of the micro-nano system is a CPWG silicon-transfer waveguide structure, an additional transfer structure is not needed, and the size of the whole system is reduced. The micro-mechanical silicon waveguide passive device and the switching structure formed by the high-precision DRIE, electroplating and wafer-level alignment bonding process have the characteristics of small loss and easy integration, so that the terahertz micro-nano system provided by the invention has the advantages of small volume, light weight, high performance and high integration level.
The foregoing is merely illustrative of the preferred embodiments of this invention, and it will be apparent to those skilled in the art that various modifications and variations can be made without departing from the principles of the invention, and it is intended to cover all such modifications and variations as fall within the true scope of the invention.
Claims (10)
1. The terahertz micro-nano system based on the micro-mechanical silicon waveguide space integration is characterized by comprising a first layer of substrate, a second layer of substrate, a third layer of substrate, a fourth layer of substrate and a fifth layer of substrate which are arranged from bottom to top; a radio frequency chip; a chip embedding groove; an input/output micro-mechanical silicon waveguide-CPWG conversion structure; a strip line-micromechanical silicon waveguide switching structure; a silicon waveguide passive element; an array of TSVs;
the input/output micro-mechanical silicon waveguide-CPWG conversion structure is positioned on the first layer of substrate, the second layer of substrate and the third layer of substrate; the silicon waveguide in the input/output micro-mechanical silicon waveguide-CPWG conversion structure is positioned on the first layer substrate, the input/output CPWG is positioned on the lower surface of the third layer substrate, and the switching structure in the input/output micro-mechanical silicon waveguide-CPWG conversion structure is positioned on the second layer substrate and the third layer substrate; the chip embedded groove is positioned on the second layer of substrate; the radio frequency chip is placed in the chip embedding groove and is interconnected with the CPWG through a lead wire; the strip line-micro mechanical silicon waveguide conversion structure is positioned on a second layer substrate, a third layer substrate, a fourth layer substrate and a fifth layer substrate, wherein the strip line is positioned on the second layer substrate and the third layer substrate, and the micro mechanical silicon waveguide is positioned on the fourth layer substrate and the fifth layer substrate; the silicon waveguide passive element is positioned on the fourth layer substrate and the fifth layer substrate; the terahertz micro-nano system integrated with the micro-mechanical silicon waveguide space adopts an MEMS wafer-level bonding process to realize the stacking of the multi-layer substrates.
2. The terahertz micro-nano system based on micro-mechanical silicon waveguide space integration according to claim 1, wherein the second and third substrates are high-resistance silicon first substrate materials with resistivity greater than 1000 Ω -cm and are silicon or metal, and the fourth and fifth substrates are silicon; the second layer substrate, the third layer substrate, the fourth layer substrate and the fifth layer substrate all comprise TSV arrays, and when the first layer substrate is made of silicon materials, the first layer substrate also comprises TSV arrays.
3. The terahertz micro-nano system based on the spatial integration of the micromechanical silicon waveguide according to claim 1, wherein the input port and the output port of the terahertz micro-nano system are both waveguides.
4. The terahertz micro-nano system based on spatial integration of micro-mechanical silicon waveguides of claim 1, wherein the input/output micro-mechanical silicon waveguide-CPWG conversion structure includes a cavity at a position corresponding to a position on the second layer substrate above the waveguide port where the first layer substrate is located, a deep groove from top to bottom is formed in a position corresponding to the third layer substrate above the cavity, and a metal coupling line is formed on the lower surface of the deep groove corresponding to the third layer substrate.
5. The terahertz micro-nano system based on micro-mechanical silicon waveguide spatial integration according to claim 1, wherein the second layer substrate where the strip line-micro-mechanical silicon waveguide conversion structure is located comprises a deep groove from bottom to top, the upper surface of the second layer substrate above the deep groove comprises a strip line, the position corresponding to the third layer substrate above the strip line comprises a cavity, the fourth layer substrate and the fifth layer substrate above the cavity comprise a silicon waveguide cavity structure, and the side wall of the silicon waveguide cavity is covered with metal.
6. The terahertz micro-nano system based on micro-mechanical silicon waveguide space integration according to claim 1, wherein the radio frequency chip is a low noise amplifier, a mixer, an equalizer, a power amplifier or an attenuator; the silicon waveguide passive element is a filter, a directional coupler, a power divider or a magic T and is positioned on the fourth layer substrate and the fifth layer substrate.
7. The terahertz micro-nano system based on micro-mechanical silicon waveguide space integration of claim 1, wherein the radio frequency chip embedded groove is formed by etching a second layer of substrate; the radio frequency chip is adhered in the chip embedded groove of the second layer substrate by adopting conductive adhesive, solder or nano silver paste, and is interconnected with the peripheral circuit by adopting a bond alloy wire mode.
8. The terahertz micro-nano system based on spatial integration of micro-mechanical silicon waveguides of claim 1, wherein the silicon waveguide passive element is formed by coupling silicon waveguides on a fourth layer substrate and a fifth layer substrate in the strip-micro-mechanical silicon waveguide switching structure.
9. The terahertz micro-nano system based on micro-mechanical silicon waveguide space integration according to claim 1, wherein the silicon micro-mechanical waveguide structure, the embedded groove, the TSV array, the cavity and the deep groove are realized by a silicon wet etching or a deep silicon reactive ion etching technology.
10. A method for manufacturing a terahertz micro-nano system based on spatial integration of micromechanical silicon waveguides according to any one of claims 1-9, comprising the steps of:
manufacturing a through hole on a silicon-based substrate, wherein the silicon-based substrate comprises a first layer of substrate, a second layer of substrate, a third layer of substrate, a fourth layer of substrate and a fifth layer of substrate from bottom to top;
manufacturing a waveguide cavity structure on a silicon-based substrate, wherein the silicon-based substrate comprises a first layer of substrate, a fourth layer of substrate and a fifth layer of substrate;
manufacturing a buried trench on the second layer substrate;
carrying out photoetching and electroplating processes on the upper and lower surfaces of a silicon-based substrate to realize metallized patterns, wherein the high-resistance silicon-based substrate comprises a first layer of substrate, a second layer of substrate, a third layer of substrate, a fourth layer of substrate and a fifth layer of substrate;
manufacturing a cavity and a deep groove on the second layer substrate and the third layer substrate;
wafer-level bonding is carried out on the first layer of substrate and the second layer of substrate, and wafer-level bonding is carried out on the third layer of substrate, the fourth layer of substrate and the fifth layer of substrate in pairwise alignment from bottom to top;
manufacturing metal micro-bumps on the lower surface of the bonded third layer substrate;
bonding a radio frequency chip on the bonded second layer of substrate, and connecting the radio frequency chip with the silicon-based interconnection circuit in a gold wire bonding mode;
and carrying out wafer-level low-temperature micro bump bonding stacking on the first layer substrate, the second layer substrate, the third layer substrate, the fourth layer substrate and the fifth layer substrate from bottom to top.
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