CN117715458A

CN117715458A - Display panel and display device

Info

Publication number: CN117715458A
Application number: CN202311857627.4A
Authority: CN
Inventors: 陈龙; 刘胜优
Original assignee: Kunshan Govisionox Optoelectronics Co Ltd
Current assignee: Kunshan Govisionox Optoelectronics Co Ltd
Priority date: 2023-03-29
Filing date: 2023-12-29
Publication date: 2024-03-15
Also published as: CN116322145A

Abstract

The embodiment of the application provides a display panel and display device, the display panel has first district and is located the peripheral second district of first district, and first district and second district all include island region and tensile district, and a plurality of island regions are in first district and second district array distribution, and tensile district is located between two adjacent rows and/or two adjacent lines of island regions, and display panel includes: a plurality of functional islands, each functional island being provided with a functional element, the plurality of functional islands including a plurality of pixel islands located in the first region and a plurality of circuit islands located in the second region, the functional element including a first pixel circuit structure disposed in the pixel islands and a driving circuit structure disposed in the circuit islands; the stretching part is connected between two adjacent functional islands, and at least part of the stretching region penetrates through the second region along the direction from the first region to the second region in the second region; and the signal wire is arranged on the stretching part and is used for connecting the functional pieces of two adjacent functional islands. The stretching performance of the display panel can be improved.

Description

Display panel and display device

Cross Reference to Related Applications

The present application claims priority from chinese patent application No. 202310319700.6 entitled "display panel and display device" filed on 29 of 2023, the entire contents of which are incorporated herein by reference.

Technical Field

The application relates to the technical field of display equipment, in particular to a display panel and a display device.

Background

Organic light-emitting diode (OLED) display panels are favored because of their wide viewing angle, ultra-high contrast ratio, and rapid response. One of the advantages of the OLED display substrate is that flexibility can be achieved, which allows for a flexible display device by fabricating OLED devices on a flexible substrate. But as wearable devices become popular, they place higher demands on the tensile properties of OLED flexible panels.

Disclosure of Invention

The embodiment of the application provides a display panel and a display device, and aims to improve the tensile property of the display panel.

Embodiments of the first aspect of the present application provide a display panel having a first region and a second region disposed around at least a portion of the first region, the first region and the second region each including an island region and a tensile region, the plurality of island regions being distributed in an array of the first region and the second region, the tensile region being located between two adjacent rows and/or two adjacent columns of island regions, the display panel comprising: the functional islands are positioned in the island areas and are provided with functional pieces, each functional island comprises a plurality of pixel islands positioned in the first area and a plurality of circuit islands positioned in the second area, each functional island comprises a first pixel circuit structure arranged in the pixel island, a first light-emitting unit and a driving circuit structure arranged in the circuit island, and the first pixel circuit structure is used for driving the first light-emitting unit to emit light; the stretching part is arranged in the stretching region and connected between two adjacent functional islands, and at least part of the stretching region penetrates through the second region along the direction from the first region to the second region in the second region; and the signal wire is arranged on the stretching part and is used for connecting the functional pieces of two adjacent functional islands.

According to an embodiment of the first aspect of the present application, the plurality of circuit islands comprises a first island component comprising:

the first circuit island, the driving circuit structure comprises a shift register unit arranged on the first circuit island,

the second circuit island is arranged side by side with the first circuit island, and the driving circuit structure comprises a connecting part arranged on the second circuit island;

the signal lines comprise first signal lines connected with the shift register units and second signal lines connected with the connecting parts, and the plurality of shift register units are connected with the first pixel circuit structures through at least part of the second signal lines, the connecting parts and the first signal lines so as to provide scanning signals for the first pixel circuit structures.

According to any one of the foregoing embodiments of the first aspect of the present application, the plurality of circuit islands and the plurality of pixel islands are arranged in rows and columns along the first direction and the second direction, and in the circuit islands and the pixel islands in the same row, the shift register unit on the circuit island is used for driving the first pixel circuit structure of the pixel island in the same row.

According to any one of the foregoing embodiments of the first aspect of the present application, the first circuit islands and the second circuit islands of the first island assembly are arranged side by side along the first direction, and the plurality of first island assemblies are arranged at intervals along the second direction, the first signal lines of the plurality of first circuit islands arranged side by side along the second direction are connected to each other, and the second signal lines of the plurality of second circuit islands arranged side by side along the second direction are connected to each other.

According to any of the foregoing embodiments of the first aspect of the present application, the first circuit islands of the plurality of first island assemblies disposed at intervals along the second direction are disposed in alignment along the second direction.

According to any of the foregoing embodiments of the first aspect of the present application, the second circuit islands of the plurality of first island assemblies disposed at intervals along the second direction are disposed in alignment along the second direction.

According to any one of the foregoing embodiments of the first aspect of the present application, the functional element further includes a second pixel circuit structure and a second light emitting unit, where the second pixel circuit structure is disposed on at least one of the first circuit island and the second circuit island, and the second pixel circuit structure is configured to drive the second light emitting unit to emit light.

According to any of the foregoing embodiments of the first aspect of the present application, the first circuit island and the second circuit island of the first island assembly are provided with a second pixel circuit structure and a second light emitting unit thereon.

According to any of the foregoing embodiments of the first aspect of the present application, the first island assembly includes a first circuit island and two second circuit islands, the two second circuit islands are disposed on two sides of the first circuit island, and the second pixel circuit structure is disposed on the second circuit island located on the first circuit island toward the first region.

According to any of the foregoing embodiments of the first aspect of the present application, the first circuit island and the second circuit island in the same first island component are both provided with the second light emitting unit, and one of the first circuit island and the second circuit island in the same first island component is provided with the second pixel circuit structure, and the second pixel circuit structure is used for driving the plurality of second light emitting units in the same first island component to emit light.

According to any of the foregoing embodiments of the first aspect of the present application, at least one of the second circuit islands has a dummy pixel circuit disposed thereon.

According to any of the foregoing embodiments of the first aspect of the present application, virtual pixel circuits are disposed on both the two second circuit islands, and a sum of the numbers of the second pixel circuit structures and the virtual pixel circuits on one of the second circuit islands is equal to a sum of the numbers of the virtual pixel circuits on the other second circuit island.

According to any one of the foregoing embodiments of the first aspect of the present application, the second light emitting unit includes a first electrode, and the signal line includes:

a first connection line for connecting two adjacent first electrodes within the same first island assembly;

the second connecting wire is a scanning wire and is used for connecting the driving circuit structure and the second pixel circuit structure, or is used for connecting the adjacent first pixel circuit structure and second pixel circuit structure;

the third connecting wire is a power signal wire and is used for connecting the first pixel circuit structure and the second pixel circuit structure;

wherein, the second connecting wire and the first connecting wire which are connected between two adjacent circuit islands are arranged in a lamination way along the thickness direction of the display panel; and/or the second connecting line and the third connecting line connected between two adjacent circuit islands are stacked along the thickness direction of the display panel.

According to any one of the foregoing embodiments of the first aspect of the present application, the second light emitting unit further includes a second electrode, the first signal line further includes a fourth connection line, the fourth connection line is used for connecting the second electrodes on two adjacent circuit islands, and the fourth connection line and the second connection line are stacked in a thickness direction.

According to any of the foregoing embodiments of the first aspect of the present application, the fourth connection line and the first electrode are disposed in the same layer and are insulated from each other at intervals, and the fourth connection line is connected to the second electrode via.

According to any one of the foregoing embodiments of the first aspect of the present application, the second connecting line includes a first scanning line and a second scanning line, the first scanning line and the second scanning line are disposed at intervals along the second direction, the first scanning line and the fourth connecting line are disposed in a stacked manner along the thickness direction, and the second scanning line and the first connecting line are disposed in a stacked manner along the thickness direction, or the second scanning line and the third connecting line are disposed in a stacked manner along the thickness direction.

According to any one of the foregoing embodiments of the first aspect of the present application, the signal line includes a fifth connection line connected to the pixel island and extending in the second direction, at least one fourth connection line is connected to the second circuit island and the pixel island, and the fifth connection line is connected to the pixel island.

According to any one of the foregoing embodiments of the first aspect of the present application, the signal line includes a data line and a sixth connection line connected to a second circuit island provided with the second pixel circuit structure, the data line and the sixth connection line are disposed side by side along the first direction, and the sixth connection line and the first scan line are electrically connected to each other.

According to any one of the foregoing embodiments of the first aspect of the present application, the signal line includes:

a clock signal line connected to a second circuit island located in the first circuit structure away from the first region;

a fifth connection line connecting the clock signal line and the driving circuit structure, the fifth connection line connected between two adjacent circuit islands being stacked with the first connection line in the thickness direction; and/or the fifth connecting line and the fourth connecting line connected between two adjacent circuit islands are stacked along the thickness direction.

According to any one of the foregoing embodiments of the first aspect of the present application, the clock signal line includes a first clock signal line and a second clock signal line, the fifth connection line includes a first sub-connection line connected to the first clock signal line and a second sub-connection line connected to the second clock signal line, the first sub-connection line and the second sub-connection line are arranged at intervals along the second direction, the first sub-connection line and the fourth connection line are arranged in a stacked manner along the thickness direction, and the second sub-connection line and the first connection line are arranged in a stacked manner along the thickness direction.

According to any one of the foregoing embodiments of the first aspect of the present application, the signal line further includes a redundant trace located in the first region, and a signal trace for connecting adjacent first pixel circuit structures, at least a portion of the redundant trace and the signal trace being stacked in a thickness direction.

According to any of the foregoing embodiments of the first aspect of the present application, the sum of the number of redundant traces and signal traces between two adjacent pixel islands is the same as the number of signal traces between two adjacent circuit islands.

According to any of the foregoing embodiments of the first aspect of the present application, the redundant wiring between two adjacent pixel islands and at least one of the first connection line, the second connection line, the third connection line, and the fourth connection line are disposed in the same layer of the same material.

According to any one of the foregoing embodiments of the first aspect of the present application, the first signal line includes a first sub-line, and the first sub-line extends from the first circuit island at both sides of the second direction;

the second signal line comprises a second sub-line which extends from the second circuit island at two sides of the second direction,

the number of the first sub-lines corresponding to the first circuit islands is the same as the number of the second sub-lines corresponding to the second circuit islands.

According to any one of the foregoing embodiments of the first aspect of the present application, the signal line further includes a driving signal line connected to the first pixel circuit structure, the driving signal line includes a third sub-line, the third sub-line extends from two sides of the pixel island in the second direction, and the number of third sub-lines corresponding to each pixel island is the same as the number of first sub-lines corresponding to each first circuit island.

According to any one of the foregoing embodiments of the first aspect of the present application, the first signal line includes a fourth sub-line extending from the first circuit island on both sides of the first direction;

the second signal line includes a fifth sub-line extending from the second circuit island at both sides of the first direction,

the number of the fourth sub-lines corresponding to the first circuit islands is the same as the number of the fifth sub-lines corresponding to the second circuit islands.

According to any one of the foregoing embodiments of the first aspect of the present application, the driving signal line includes a sixth sub-line, the sixth sub-line extends from two sides of the pixel island in the first direction, and the number of the sixth sub-lines corresponding to each pixel island is the same as the number of the fourth sub-lines corresponding to each first circuit island.

According to any of the foregoing embodiments of the first aspect of the present application, the number of corresponding first sub-lines and the number of corresponding third sub-lines of the same first circuit island are the same.

According to any of the foregoing embodiments of the first aspect of the present application, the number of second sub-lines and the number of fifth sub-lines corresponding to the same second circuit island are the same.

According to any of the foregoing embodiments of the first aspect of the present application, the number of third sub-lines and the number of sixth sub-lines corresponding to the same pixel island are the same.

According to any of the foregoing embodiments of the first aspect of the present application, at least a portion of the third sub-line and at least a portion of the sixth sub-line are connected to each other, so that the first pixel circuit structure can be electrically connected to each other through the sixth sub-line, the third sub-line and the shift register unit.

According to any of the foregoing embodiments of the first aspect of the present application, at least a portion of the fourth sub-line and at least or a portion of the sixth sub-line are connected to each other, so that the first pixel circuit structure can be electrically connected to each other through the sixth sub-line, the fourth sub-line and the connection portion.

According to any of the foregoing embodiments of the first aspect of the present application, the number of the second circuit islands is one, and the second circuit islands are disposed on a side of the first circuit islands facing or facing away from the first region;

the second signal line includes at least one of a clock signal line, a scan line, and a first power signal line.

According to any of the foregoing embodiments of the first aspect of the present application, the number of the second circuit islands is plural, and the plural second circuit islands are disposed on two sides of the first circuit island, or the plural second circuit islands are disposed on one side of the first circuit island facing or facing away from the first area.

According to any of the foregoing embodiments of the first aspect of the present application, the second region includes a first sub-region extending along the first direction and a second sub-region extending along the second direction, the first island component is located in the second sub-region, and the display panel further includes a bonding pin located in the first sub-region.

According to any of the preceding embodiments of the first aspect of the present application, at least part of the stretch is arranged in the first direction through the second sub-zone.

According to any of the foregoing embodiments of the first aspect of the present application, two second sub-regions are disposed on both sides of the first region in the first direction, and each second sub-region is provided with a first island component therein.

According to any of the foregoing embodiments of the first aspect of the present application, the plurality of bonding pins are spaced apart along the second direction in the first sub-region.

According to any of the foregoing embodiments of the first aspect of the present application, the two first sub-areas are disposed on two sides of the first area in the second direction, and binding pins are disposed in each of the first sub-areas.

According to any of the preceding embodiments of the first aspect of the present application, the extension of the first sub-zone in the first direction is smaller than the extension of the second sub-zone in the second direction.

According to any of the foregoing embodiments of the first aspect of the present application, at least two of the pixel island, the first circuit island, and the second circuit island are the same size.

According to any one of the embodiments described in the first aspect of the present application, the number of the second circuit islands is two, wherein the second signal lines corresponding to one second circuit island include a first clock signal line and a second clock signal line, the second signal lines corresponding to the other second circuit island include a scan line and a first power signal line, and the first signal line includes a high-level power line and a low-level power line;

Or, the number of the second circuit islands is more than three, and the second signal lines corresponding to at least one second circuit island comprise virtual signal lines.

According to any of the foregoing embodiments of the first aspect of the present application, the second signal lines include dummy signal lines, and the number of dummy signal lines and the signal lines connected thereto to the same second circuit island are symmetrically arranged.

According to any of the foregoing embodiments of the first aspect of the present application, at least a portion of the signal lines are arcuate.

According to any of the foregoing embodiments of the first aspect of the present application, the signal line includes a circular arc segment.

According to any of the embodiments described above in the first aspect of the present application, the two signal lines connected to the same functional island and extending from the same side of the functional island are symmetrically arranged.

Embodiments of the first aspect of the present application further provide a display panel having a first region and a second region located at a periphery of the first region, the first region and the second region each including an island region and a stretching region, the plurality of island regions being distributed in an array of the first region and the second region, the stretching region being located between two adjacent rows and/or two adjacent columns of island regions, the display panel comprising: the functional islands are positioned in the island areas and are provided with functional pieces, each functional island comprises a plurality of pixel islands positioned in the first area and a plurality of circuit islands positioned in the second area, each functional island comprises a first pixel circuit structure arranged in the pixel island, a first light-emitting unit and a driving circuit structure arranged in the circuit island, and the first pixel circuit structure is used for driving the first light-emitting unit to emit light; the stretching part is arranged in the stretching region and connected between two adjacent functional islands, and at least part of the stretching region penetrates through the second region along the direction from the first region to the second region in the second region; a signal line arranged in the stretching region and used for connecting the functional pieces of two adjacent functional islands; the plurality of circuit islands includes a first island assembly, the first island assembly including: the driving circuit structure comprises a shift register unit arranged on the first circuit island; the second circuit island is arranged side by side with the first circuit island, the shift register unit is connected with the first pixel circuit structure through a signal line so as to provide scanning signals for the first pixel circuit structure, the first circuit island and the second circuit island of the first island component are arranged side by side along a first direction, a plurality of first island components are arranged at intervals along a second direction, the functional piece further comprises a second pixel circuit structure arranged on at least one of the first circuit island and the second circuit island and a second light-emitting unit electrically connected with the second pixel circuit structure, the second pixel circuit structure is used for driving the second light-emitting unit to emit light, and the circuit island, close to the first area, of the first island component and the second circuit island is provided with the second pixel circuit structure and the second light-emitting unit.

Embodiments of the second aspect of the present application further provide a display device, including the display panel of any one of the embodiments of the first aspect.

In the display panel provided in the embodiment of the application, the display panel has a first area and a second area, the first area can be used for setting the light emitting unit to realize display of the display panel, and the second area can be used for setting a signal line and a controller for driving the display panel to emit light. The display panel includes a functional island, a stretching portion, and a signal line. The functional island is provided with a functional part, the functional island comprises a pixel island and a circuit island, the functional part comprises a first pixel circuit structure and a driving circuit structure, the first pixel circuit structure is arranged on the pixel island, and the problem that the first pixel circuit structure is easy to damage in the stretching process of the display panel can be improved. Similarly, the driving circuit structure is arranged on the circuit island, so that the problem that the driving circuit structure is easy to damage in the stretching process of the display panel can be solved. The stretching parts are arranged between the functional islands, so that the stretching performance of the display panel can be improved, and at least part of the stretching parts of the second area penetrate through the second area to form a non-display stretching area, so that the stretching performance of the second area can be further improved. The signal wire is arranged in the stretching part and connected with the functional pieces of the adjacent functional islands so as to realize signal transmission among different functional pieces.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings, in which like or similar reference characters designate like or similar features.

Fig. 1 is a schematic view of a display panel according to an embodiment of a first aspect of the present application;

fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the first aspect of the present application;

fig. 3 is a schematic structural diagram of a first island component of a display panel according to an embodiment of the first aspect of the present application;

FIG. 4 is a cross-sectional view at A-A in FIG. 2;

fig. 5 is a schematic structural view of a first island component of a display panel according to another embodiment of the first aspect of the present application;

FIG. 6 is a cross-sectional view at B-B in FIG. 2;

fig. 7 is a schematic structural view of a first island component and a pixel island of a display panel according to another embodiment of the first aspect of the present application;

FIG. 8 is a partial cross-sectional view of FIG. 7;

FIG. 9 is a partial cross-sectional view of the alternative location of FIG. 7;

fig. 10 is a schematic structural diagram of a pixel island of a display panel according to an embodiment of the first aspect of the present application;

fig. 11 is a schematic structural diagram of a display panel according to another embodiment of the first aspect of the present application;

Fig. 12 is a schematic structural view of a first island component of a display panel according to still another embodiment of the first aspect of the present application;

fig. 13 is a schematic structural diagram of a first island component of a display panel according to still another embodiment of the first aspect of the present application.

Reference numerals illustrate:

100. a functional island; 100a, a first island component; 110. a pixel island; 120. a circuit island; 121. a first circuit island; 122. a second circuit island;

200. a functional member; 210. a first pixel circuit structure; 220. a driving circuit structure; 221. a shift register unit; 222. a connection part; 230. a second pixel circuit structure; 240. a first electrode; 250. a second electrode; 260. a dummy pixel circuit;

300. a stretching section; 301. a protective layer; 302. a metal layer;

400. a signal line; 410. a first signal line; 411. a first sub-line; 412. a fourth sub-line; 420. a second signal line; 421. a second sub-line; 422. a fifth sub-line; 430. a driving signal line; 431. a third sub-line; 432. a sixth sub-line; 401. a first connecting line; 402. a second connecting line; 4021. a first scan line; 4022. a second scanning line; 403. a third connecting line; 404. a fourth connecting line; 405. a fifth connecting line; 4051. a first sub-connection line; 4052. a second sub-connection line; 406. a sixth connecting line; 407. redundant wiring; 408. a signal trace; 409. an auxiliary line;

500. Binding pins;

600. an elastic filling layer;

AA. A first zone; NA, second region; NA1, first subregion; NA2, second subregion;

x, a first direction; y, second direction; z, thickness direction.

Detailed Description

Features and exemplary embodiments of various aspects of the present application are described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by showing an example of the present application. In the drawings and the following description, at least some well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present application; also, the dimensions of some of the structures may be exaggerated for clarity. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

In the description of the present application, it is to be noted that, unless otherwise indicated, the meaning of "plurality" is two or more; the terms "upper," "lower," "left," "right," "inner," "outer," and the like indicate an orientation or positional relationship merely for convenience of description and to simplify the description, and do not indicate or imply that the devices or elements being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus are not to be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

The directional terms appearing in the following description are all directions shown in the drawings and do not limit the specific structure of the embodiments of the present application. In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be directly connected or indirectly connected. The specific meaning of the terms in the present application can be understood as appropriate by one of ordinary skill in the art.

The display panel and the display device according to the embodiments of the present application are described in detail below with reference to fig. 1 to 13.

As shown in fig. 1 to 10, the embodiment of the first aspect of the present application provides a display panel having a first area AA and a second area NA disposed around at least a portion of the first area AA, the first area AA and the second area NA each including an island area and a stretching area, the plurality of island areas being distributed in the first area AA and the second area NA array, the stretching area being located between two adjacent rows and/or two adjacent columns of island areas, the display panel including functional islands 100, a stretching portion 300 and signal lines 400, each functional island 100 being located in each island area and having a functional element 200 disposed thereon, the plurality of functional islands 100 including a plurality of pixel islands 110 located in the first area AA and a plurality of circuit islands 120 located in the second area NA, the functional element 200 including a first pixel circuit structure 210 disposed in the pixel islands 110 and a driving circuit structure 220 disposed in the circuit islands 120; the stretching part 300 is arranged in the stretching region and connected between two adjacent functional islands 100, and at least part of the stretching region penetrates through the second region NA along the direction from the first region AA to the second region NA in the second region NA; the signal line 400 is provided to the tensile portion 300 and is used to connect the functional elements 200 of two adjacent functional islands 100.

Optionally, at least part of the stretch zone is arranged through the second zone NA in the direction from the first zone AA to the second zone NA; that is, the second region NA is divided into a plurality of sub-regions by the stretching region, that is, a region provided with the stretching portion 300, between adjacent sub-regions, to form a stretching region for breaking the second region NA.

In the display panel provided in the embodiment of the present application, the display panel has a first area AA and a second area NA, where the first area AA may be used for setting a light emitting unit to implement display of the display panel, and the second area NA may be set with a signal line 400 and a controller for driving the display panel to emit light. The display panel includes a functional island 100, a stretching portion 300, and a signal line 400. The functional island 100 is provided with the functional element 200, the functional island 100 comprises the pixel island 110 and the circuit island 120, the functional element 200 comprises the first pixel circuit structure 210 and the driving circuit structure 220, and the first pixel circuit structure 210 is arranged on the pixel island 110, so that the problem that the first pixel circuit structure 210 is easy to damage in the stretching process of the display panel can be solved. Similarly, the driving circuit structure 220 is disposed on the circuit island 120, so that the problem that the driving circuit structure 220 is easily damaged during the stretching process of the display panel can be improved. The tensile portion 300 is provided between the functional islands 100, so that the tensile performance of the display panel can be improved, and at least part of the tensile portion 300 of the second region NA is provided to penetrate the second region NA, so that the tensile performance of the second region can be further improved. The signal lines 400 are disposed in the stretching portion 300 and connect the function pieces 200 of adjacent function islands 100 to realize signal transmission between the different function pieces 200.

Optionally, a plurality of islands are arranged in rows and columns along the first direction X and the second direction Y, the plurality of islands are arranged at intervals, the stretching region is located between two adjacent rows of islands along the first direction X, and/or the stretching region is located between two adjacent columns of islands along the second direction Y. Optionally, a stretching region is disposed between the first region AA and two adjacent rows and columns of island regions, so that the first region AA can be stretched in both the first direction X and the second direction Y. The island region may be regarded as a region where the functional island 100 is provided, and the stretching region may be regarded as a region where the stretching portion 300 is provided. A tensile region is provided between two adjacent rows or two adjacent columns of the second region NA. For example, as shown in fig. 1, in a portion of the second area NA located on both sides of the first area AA in the first direction, a stretching area is provided between two adjacent rows and two columns of island areas, and island areas of this portion of the area are arranged at intervals from each other so that this portion of the second area NA can be stretched in the first direction and the second direction. In the second area NA located at both sides of the first area AA in the second direction, the stretching area is not disposed through the second area along the second direction Y.

At least a portion of the stretch 300 is disposed through the second zone NA in a direction from the first zone AA to the second zone NA. That is, the second area NA includes two parts, one for disposing the circuit island 120 and the other for disposing the stretching portion 300, and the stretching portion 300 is disposed through the second area NA in a direction from the first area AA to the second area NA. That is, at least a portion of the second area NA is not in a continuous structure around the first area AA, and at least a portion of the second area NA around the first area AA is divided into a plurality of structures for disposing the circuit islands 120 by the stretching portion 300.

Alternatively, as shown in fig. 2 to 4, the functional island 100 is a rigid region, and the functional island 100 includes a substrate (PI), a buffer layer (not shown), a semiconductor layer (P-Si), a plurality of metal layers (M), a Planarization Layer (PLN), a Pixel Definition Layer (PDL), a support column layer, and an insulating layer between two adjacent metal layers, which are stacked in this order.

Alternatively, as shown in fig. 8, the stretching portion 300 is a flexible region, and the number of functional layer structures of the stretching portion 300 is smaller than that of the functional layer structures of the functional islands 100, so that the stretching portion 300 is easily deformed to realize stretchability of the display panel. For example, the stretching portion 300 includes a metal layer 301 and protective layers 302 disposed on two sides of the metal layer 301, the signal line 400 is disposed on the metal layer 301, and the protective layers 302 are used for providing protection for the signal line 400 and avoiding the short-circuit connection between the signal line 400 and other circuits.

Optionally, the stretching part 300 further includes an elastic filling layer 600, and the elastic filling layer 600 has elasticity to improve the stretching performance of the display panel. Alternatively, the elastic filler layer 600 may be located at one side or both sides of the metal layer for disposing the signal line 400 in the thickness direction Z. Alternatively, the light transmittance of the elastic filler layer 600 is greater than 15%, for example, the light transmittance of the elastic filler layer 600 is greater than 20%, or the light transmittance of the elastic filler layer 600 is greater than 80%, or even the light transmittance of the elastic filler layer 600 is greater than 95%. The elastic filling layer 600 has good light transmission performance, and the display effect of the display panel is improved.

Alternatively, the signal line 400 extends along a straight path within the stretching part 300, and overcomes a stretching force generated when the display panel is stretched by using the material characteristics of the signal line 400 itself.

In other alternative embodiments, at least a portion of signal line 400 extends along a serpentine path. When the display panel is stretched, the signal line 400 is deformed to overcome the stretching force, so that the problem of easy breakage of the signal line 400 due to stress can be improved.

The plurality of circuit islands 120 include a first island assembly 100a, the first island assembly 100a includes a first circuit island 121 and a second circuit island 122, the driving circuit structure 220 includes a shift register unit 221 disposed on the first circuit island 121, the second circuit island 122 and the first circuit island 121 are disposed side by side, and the driving circuit structure 220 includes a connection portion 222 disposed on the second circuit island 122. The signal lines 400 include a first signal line 410 connected to the shift register unit 221, a second signal line 420 connected to the connection part 222, and the plurality of shift register units 221 are connected to the first pixel circuit structure 210 through at least part of the second signal line 420, the connection part 222, and the first signal line 410 to supply a scan signal to the first pixel circuit structure 210. The location of the first island assembly 100a is shown in fig. 2 by a dashed box, which is not meant to limit the structure of the embodiments of the present application.

In these alternative embodiments, the first island assembly 100a includes the first circuit island 121 and the second circuit island 122 arranged side by side with a space therebetween, and since the first circuit island 121 and the second circuit island 122 are arranged spaced apart from each other, a gap can be formed between the first circuit island 121 and the second circuit island 122, which can provide the stretching portion 300 to increase the stretching performance of the second area NA, thereby increasing the stretching performance of the entire display panel.

Further, the signal line 400 is divided into a first signal line 410 and a second signal line 420, so that the shift register unit 221 may be connected to the pixel driving structure through the first signal line 410 and the second signal line 420, thereby supplying a scan signal to the pixel driving structure.

In the embodiment of the present application, two different circuit islands 120, namely, a first circuit island 121 and a second circuit island 122 are disposed in the second area NA, so that the shift register unit 221 and the signal line 400 in the second area NA can be separately disposed on the first circuit island 121 and the second circuit island 122, on the one hand, enough disposition areas can be provided for the shift register unit 221 and the signal line 400; on the other hand, the problem of mutual interference between the shift register unit 221 and the signal line 400 wiring can be improved.

In the embodiment of the present application, the connection portion 222 and the second signal line 420 are different in the position where the connection portion 222 is disposed in the second circuit island 122, and the second signal line 420 is disposed in the stretching portion 300, but the connection portion 222 and the second signal line 420 may be used for transmitting the same signal, the connection portion 222 and the second signal line 420 may be disposed in the same conductive layer, and the extension directions of the connection portion 222 and the second signal line 420 may be the same or different.

Optionally, the plurality of circuit islands 120 are divided into a first circuit island 121 and a second circuit island 122, where the first circuit island 121 and the second circuit island 122 are different in that the functional elements 200 disposed thereon are different, a shift register unit 221 is disposed on the first circuit island 121, a connection part 222 is disposed on the second circuit island 122, the shift register unit 221 is used for transmitting scan signals, and the connection part 222 is used for realizing connection between different signal lines 400. The connection part 222 is disposed on the second circuit island 122, which can improve the problem that the connection position between the different signal lines 400 is easily broken during the stretching process of the display panel.

Optionally, the first circuit island 121 and the second circuit island 122 are combined side by side to form a first island assembly 100a, and the first island assembly 100a includes the first circuit island 121 and one or more second circuit islands 122.

Alternatively, the plurality of circuit islands 120 and the plurality of pixel islands 110 are arranged in rows and columns along the first direction X and the second direction Y, and in the circuit islands 120 and the pixel islands 110 of the same row, the shift register units 221 on the circuit islands 120 are used to drive the first pixel circuit structures 210 of the pixel islands 110 of the same row.

In these alternative embodiments, the shift register unit 221 and the first pixel circuit structure 210 connected to each other are located on the circuit island 120 and the pixel island 110 disposed in the same row, and the arrangement path of the signal line 400 can be simplified.

As shown in fig. 1 to 6, the first signal line 410 may be arranged in various ways, and the first signal line 410 may include at least one of a high-level power line (VGH) and a low-level power line (VGL). For example, the first signal line 410 includes a high-level power supply line and a low-level power supply line, and the high-level power supply line and the low-level band-energy signal line are disposed side by side in the first direction X.

The second signal line 420 may be arranged in various manners, for example, the second signal line 420 includes at least one of a first clock signal line (CLK 1), a second clock signal line (CLK 2), a first power signal line 400 (VSS), and a scan line (Sn). The first power signal line may be used to transmit a negative voltage, and may be connected to the cathode of the first area AA.

In some alternative embodiments, the first circuit islands 121 and the second circuit islands 122 within the same first island assembly 100a are disposed at intervals along the first direction X, the plurality of first island assemblies 100a are disposed at intervals along the second direction Y within the second area NA, and the first signal lines 410 connected to the plurality of first circuit islands 121 disposed along the second direction Y are connected to each other, that is, the first signal lines 410 are used to connect the shift register units 221 disposed along the second direction Y; the second signal lines 420 connected to the plurality of second circuit islands 122 disposed along the second direction Y are connected to each other, that is, the second signal lines 420 are used to connect the connection portions 222 disposed along the second direction Y.

In these alternative embodiments, the plurality of first and second circuit islands 121 and 122 are arranged in an array along the first and second directions X and Y, with gaps between the first and second circuit islands 121 and 122 adjacent along the first direction X, and gaps between the first or second circuit islands 121 or 122 adjacent along the second direction Y, and stretching portions 300 may be disposed in the gaps, so that the stretching performance of the display panel in the first and second directions X and Y can be improved.

Alternatively, the first circuit islands 121 of the plurality of first island assemblies 100a disposed at intervals along the second direction Y are aligned along the second direction Y, that is, the first circuit islands 121 of the plurality of first island assemblies 100a are located in the same column, and the column direction is the second direction Y, so that the arrangement of the plurality of first circuit islands 121 is more regular, and meanwhile, the first signal lines 410 are convenient for connecting adjacent gate driving circuits.

Alternatively, the second circuit islands 122 of the plurality of first island assemblies 100a spaced apart along the second direction Y are aligned along the second direction Y. That is, the second circuit islands 122 of the plurality of first island assemblies 100a are located in the same column, and the column direction is the second direction Y, so that the arrangement of the plurality of second circuit islands 122 is more regular, and the second signal lines 420 are convenient to be connected to each other along the second direction Y.

Alternatively, when the number of the second circuit islands 122 in the same first island assembly 100a is plural, the second circuit islands 122 are arranged side by side along the first direction X, the second circuit islands 122 of the first island assembly 100a are distributed in a plurality of columns, and the second circuit islands 122 in the same column are aligned along the second direction Y.

Alternatively, in any of the above embodiments, the second area NA may be provided without a light emitting unit, and the second area NA is used to provide the shift register unit 221 and the associated signal line 400 and constitutes a non-display area of the display panel.

In other embodiments, as shown in fig. 7, the functional element 200 further includes a second pixel circuit structure 230 and a second light emitting unit disposed on at least one of the first circuit island 121 and the second circuit island 122, and the second pixel circuit structure 230 is used for driving the second light emitting unit to emit light to the first electrode 240.

In these embodiments, the second pixel circuit structure 230 may drive the second light emitting unit to emit light, so that the second area NA can also display, expand the display area of the display panel, and increase the screen duty ratio of the display panel.

Alternatively, the second light emitting unit includes a first electrode 240, a second electrode 250, and a light emitting structure disposed between the first electrode 240 and the second electrode 250, and the first electrode 240 may be connected to the second pixel circuit structure 230 such that the second pixel circuit structure 230 drives the light emitting structure to emit light through the first electrode 240.

Alternatively, the second pixel circuit structure 230 and the second light emitting unit may be disposed on one of the first circuit island 121 or the second circuit island 122 to be connected to each other. Alternatively, the first and second circuit islands 121 and 122 are each provided with the second light emitting unit and the second pixel circuit structure 230 connected to each other.

In still other embodiments, the circuit islands 120 of the first island assembly 100a and the second circuit islands 122 adjacent to the first area AA are provided with the second pixel circuit structure 230 and the second light emitting unit, so that a portion of the second area NA adjacent to the first area AA can be displayed, and further the display area of the display panel is enlarged, so as to achieve the purpose of narrow frame.

In other alternative embodiments, the first electrode 240 is disposed on each of the first circuit island 121 and the second circuit island 122 in the same first island assembly 100a, and the second pixel circuit structure 230 is disposed on one of the first circuit island 121 and the second circuit island 122 in the same first island assembly 100a, and the second pixel circuit structure 230 is used to drive the plurality of first electrodes 240 in the same first island assembly 100 a.

In these alternative embodiments, the first electrodes 240 are disposed on the first circuit islands 121 and the second circuit islands 122 in the same first island assembly 100a, so that the light emitting units may be disposed at the corresponding positions of the first circuit islands 121 and the second circuit islands 122 in the first island assembly 100a to realize the light emitting display of the display panel. The second pixel circuit structure 230 is disposed on one circuit island 120 in the same first island component 100a, and the one second pixel circuit structure 230 is used for driving the plurality of first electrodes 240 in the same first island component 100a, and the second pixel circuit structure 230 and the first electrodes 240 are in a one-drive-multiple relationship, so that the number of signal lines 400 in the second area NA can be reduced, and the stretching performance of the second area NA can be further improved.

Optionally, the second pixel circuit structure 230 may be disposed on the second circuit island 122 to improve the mutual interference between the second pixel circuit structure 230 and the shift register unit 221, and the second circuit island 122 has enough space for disposing the second pixel circuit structure 230.

Alternatively, the first island assembly 100a includes a first circuit island 121 and two second circuit islands 122, the two second circuit islands 122 are disposed on two sides of the first circuit island 121, and the second pixel circuit structure 230 is disposed on the second circuit island 122 located on the first circuit island 121 toward the first area AA. Alternatively, as shown in fig. 7, the first three circuit islands 120 from the left constitute a first island assembly 100a, and the first and third from the left are second circuit islands 122, the second from the left are first circuit islands 121, and the rightmost functional island 100 is a pixel island 110.

In these alternative embodiments, the second pixel circuit structure 230 is disposed near the first area AA, which can reduce the space between the second pixel circuit structure 230 and the first pixel circuit structure 210, and facilitate the introduction of other signal transmission lines from the first pixel circuit structure 210 to the second pixel circuit structure 230, which can simplify the arrangement of the signal lines 400 of the display panel.

Optionally, at least one second circuit island 122 has a dummy pixel circuit 260 disposed thereon. By providing the dummy pixel circuit 260 structure, uniformity of metal wiring density on the plurality of functional islands 100 can be ensured, and display effect of the display panel can be improved.

Optionally, dummy pixel circuits 260 are disposed on both the second circuit islands 122, and the sum of the numbers of the second pixel circuit structures 230 and the dummy pixel circuits 260 on one of the second circuit islands 122 is equal to the sum of the numbers of the dummy pixel circuits 260 on the other second circuit island 122. For example, 3 dummy pixel circuits 260 are disposed on the second circuit island 122 on the side of the first circuit island 121 facing away from the first area AA, and 2 dummy pixel circuits 260 and 1 second pixel circuit structure 230 are disposed on the second circuit island 122 on the side of the first circuit island 121 facing toward the first area AA, so that consistency of metal wiring densities on the two second circuit islands 122 can be ensured.

In some alternative embodiments, as shown in fig. 7 to 9, the signal line 400 includes a first connection line 401, a second connection line 402, and a third connection line 403, the first connection line 401 being used to connect two adjacent first electrodes 240 within the same first island component 100 a; the second connection line 402 is a scan line and is used to connect the driving circuit structure 220 and the second pixel circuit structure 230, or to connect the adjacent first pixel circuit structure 210 and second pixel circuit structure 230; the third connection line 403 is a power signal line 400 and is used for connecting the first pixel circuit structure 210 and the second pixel circuit structure 230; wherein, the second connection line 402 and the first connection line 401 connected between two adjacent circuit islands 120 are stacked along the thickness direction Z of the display panel; and/or, the second connection line 402 and the third connection line 403 connected between the adjacent two circuit islands 120 are stacked in the thickness direction Z of the display panel.

In these alternative embodiments, the first connection lines 401 connect the first electrodes 240 adjacent in the first direction, so that the same second pixel circuit structure 230 can drive more than two first electrodes 240 connected through the first connection lines 401. For example, the number of the first connection lines 401 is two, the two first connection lines 401 are disposed at two sides of the first circuit island 121, the two first connection lines 401 are respectively connected to the first electrode 240 on the second circuit island 122 and the first electrode 240 on the first circuit island 121, so that the three first electrodes 240 are connected to each other, and the second pixel circuit structure 230 can simultaneously drive the three first electrodes 240.

Alternatively, fig. 8 may be a schematic cross-sectional view of a set of signal lines 400 disposed on top of each other between the first and second left-hand circuit islands 122 and 121 in fig. 7. For example, in fig. 7, two sets of signal lines 400 are stacked on each other between the first and second circuit islands 122 and 121, and fig. 8 is a schematic cross-sectional structure of the first set of signal lines 400.

The second connection line 402 is a scan line, and the second connection line 402 may be located between the first circuit island 121 and the second circuit island 122 to connect the shift register unit 221 and the second pixel circuit structure 230, and/or the second connection line 402 may also be located between the second circuit island 122 and the pixel island 110 to connect the first pixel circuit structure 210 and the second pixel circuit structure 230. When the second connection line 402 is located between the first circuit island 121 and the second circuit island 122, the second connection line 402 and the first connection line 401 also located between the first circuit island 121 and the second circuit island 122 may be used to connect the same circuit island 120, and the second connection line 402 and the first connection line 401 may be stacked in the thickness direction Z to reduce the distribution area of the metal wiring and ensure the stretching ratio of the display panel.

The third connection line 403 is a power signal line 400 and connects the first pixel circuit structure 210 and the second pixel circuit structure 230, at this time, the third connection line 403 may be located between the second circuit island 122 and the pixel island 110, and when the second connection line 402 is also located between the second circuit island 122 and the pixel island 110 to connect the first pixel circuit structure 210 and the second pixel circuit structure 230, the third connection line 403 and the second connection line 402 may be stacked along the thickness direction Z, so as to reduce the distribution area of the metal wiring and ensure the stretching ratio of the display panel.

In some alternative embodiments, the display panel further includes a second electrode 250, the second electrode 250 is disposed on the first circuit island 121 and the second circuit island 122, the signal line 400 further includes a fourth connection line 404, the fourth connection line 404 is used to connect the second electrodes 250 on two adjacent circuit islands 120, and the fourth connection line 404 and the second connection line 402 are stacked along the thickness direction with the second electrode 250.

In these alternative embodiments, the second electrode 250 is disposed on each of the first and second circuit islands 121 and 122, and the second electrode 250 and the first electrode 240 interact to drive the light emitting unit to emit light. The number of the fourth connection lines 404 may be two, and the two fourth connection lines 404 may be disposed at both sides of the first circuit island 121 such that the fourth connection lines 404 may connect the second electrodes 250 on the first circuit island 121 and the second electrodes 250 on the second circuit island 122. When the second connection line 402 is located between the first circuit island 121 and the second circuit island 122 to connect the shift register unit 221 and the second pixel circuit structure 230, the fourth connection line 404 and the second connection line 402 may be stacked along the thickness direction Z to reduce the distribution area of the metal wiring and ensure the stretching ratio of the display panel.

The fourth connection line 404 may be disposed in the same layer as the second electrode 250. Alternatively, the fourth connection line 404 may be provided in the same layer as the first electrode 240.

Alternatively, the second connection line 402 includes a first scanning line 4021 and a second scanning line 4022, the first scanning line 4021 and the second scanning line 4022 are disposed at intervals in the second direction, the first scanning line 4021 and the fourth connection line 404 are disposed in a stacked manner in the thickness direction, the second scanning line 4022 and the first connection line 401 are disposed in a stacked manner in the thickness direction, or the second scanning line 4022 and the third connection line 403 are disposed in a stacked manner in the thickness direction.

When the second connection line 402 includes the first scanning line 4021 and the second scanning line 4022, the first scanning line 4021 and the second scanning line 4022 may each be connected to the shift register unit 221, one of the first scanning line 4021 and the second scanning line 4022 is connected to the shift register unit 221 as an input signal, and the other is connected to the shift register unit 221 as an output. In the embodiment, the first scan line 4021 is connected to the shift register unit 221 by an input signal, and the second scan line 4022 is connected to the shift register unit 221 by way of an output signal.

When the first scanning line 4021 and the second scanning line 4022 are connected to the same side of the first circuit island 121, the side of the first circuit island 121 may also be provided with a first connecting line 401 and a fourth connecting line 404, one of the first scanning line 4021 and the second scanning line 4022 is stacked with the first connecting line 401 in the thickness direction Z, and the other is stacked with the fourth connecting line 404 in the thickness direction Z.

When the first scanning line 4021 and the second scanning line 4022 are connected between the second circuit island 122 provided with the second pixel circuit structure 230 and the pixel circuit island, the side of the second circuit island 122 may also be provided with a fourth connection line 404 and a third connection line 403, one of the first scanning line 4021 and the second scanning line 4022 is stacked with the third connection line 403 in the thickness direction Z, and the other is stacked with the fourth connection line 404 in the thickness direction Z.

Optionally, the fourth connection line 404 is connected to the second electrode 250, and the fourth connection line 404 may be used to transmit a negative voltage signal (VSS). The first area AA may be provided with a negative voltage signal line, and the negative voltage signal line of the first area AA may be directly led to the second area NA to reduce the number of signal lines 400 arranged in the second area NA. For example: the signal line 400 includes a fifth connection line 405 connected to the pixel island 110 and extending in the second direction, and at least one fourth connection line 404 connected to the second circuit island 122 and the pixel island 110 and connected to the fifth connection line 405 at the pixel island 110.

In these alternative embodiments, the signal line 400 includes a fifth connection line 405 located at the first area AA and connecting the pixel island 110, the fifth connection line 405 extending in the second direction Y, and a fourth connection line 404 for connecting the pixel island 110 connecting the fifth connection line 405 on the pixel island 110, thereby introducing the negative voltage signal line of the first area AA into the second area NA.

Alternatively, the signal line 400 includes a Data line (Data) and a sixth connection line 406 connected to the second circuit island 122 provided with the second pixel circuit structure 230, the Data line and the sixth connection line 406 are disposed side by side along the first direction X, and the sixth connection line 406 and the first scan line 4021 are electrically connected to each other.

In these alternative embodiments, the sixth connection line 406 may be connected to the scan output line of the upper row circuit island (e.g., the second scan line 4022 of the upper row first island component 100 a) and the scan output line of the upper row circuit island 120 serves as the scan input line of the lower row circuit island 120. The second scan line 4022 may be connected to the first scan line 4021 of the next row by a sixth connection line 406. The data line is used to input a data signal to the second pixel circuit structure 230 on the second circuit island 122.

In some alternative embodiments, the signal line 400 further includes a clock signal line 400 and a fifth connection line 405, the clock signal line 400 being connected to the second circuit island 122 located in the first circuit structure away from the first area AA; a fifth connection line 405, the fifth connection line 405 connecting the clock signal line 400 and the driving circuit structure, the fifth connection line 405 connected between two adjacent circuit islands being stacked in the thickness direction with the first connection line 401; and/or the fifth connection line 405 and the fourth connection line 404 connected between two adjacent circuit islands are stacked in the thickness direction.

Optionally, the fifth connection line 405 may be used to connect the clock signal line 400 and the driving circuit structure, that is, the fifth connection line 405 may be used to connect the clock signal line 400 and the shift register unit 221, so that the fifth connection line 405 is connected between the first circuit island 121 and the second circuit island 122, the fifth connection line 405 and the first connection line 401, the fourth connection line 404 may be connected between the same two circuit islands, and the fifth connection line 405 and the fourth connection line 404 connected between two adjacent circuit islands, and/or the fifth connection line 405 and the first connection line 401 are stacked along the thickness direction Z, so as to reduce the distribution area of the metal wiring and ensure the stretching ratio of the display panel.

Alternatively, the clock signal line 400 may include a first clock signal line 400 and a second clock signal line 400, and the fifth connection line 405 may include a first sub-connection line 4051 and a second sub-connection line 4052, the first sub-connection line 4051 being connected to the first clock signal line 400 and the driving circuit structure, and the second sub-connection line 4052 being connected to the second clock signal line 400 and the driving circuit structure. Then one of the first sub-connection line 4051 and the second sub-connection line 4052 may be stacked in the thickness direction with the fourth connection line 404, and the other may be stacked in the thickness direction with the first connection line 401.

Alternatively, when the second area NA is not used for display and the first island assembly 100a includes two second circuit islands 122 and a first circuit island 121, the two second circuit islands 122 may be disposed on both sides of the first circuit island 121, the signal line 400 of the second area NA may include a first clock signal line CLK1, a second clock signal line CLK2, a first scan line Sn and a second scan line sn+1, the first clock signal line CLK1 and the second clock signal line CLK2 may be connected between one of the second circuit islands 122 and extend between the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221, the first scan line Sn and the second scan line sn+1 may be connected between the other second circuit island 122 and extend between the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221, and thus two connection lines disposed between the adjacent two circuits 120, that is, the first scan line Sn 1 and the second scan line sn+1 disposed between the first circuit islands 122 and the first circuit island 121 may be connected between the first scan line sn+1 and the second circuit island 121.

When the second area NA is used for display and the first island assembly 100a includes two second circuit islands 122 and a first circuit island 121, the two second circuit islands 122 are disposed on both sides of the first circuit island 121, the first circuit island 121 and the two second circuit islands 122 are provided with second light emitting units, the second light emitting units include a first electrode 240 and a second electrode 250, and the same second pixel circuit structure 230 drives three second light emitting units within the same first island assembly 100 a. This requires a connection line to connect the first electrode 240 and the second electrode 250 of two adjacent circuit islands 120, and thus a first connection line 401 and a fourth connection line 404 are added between two adjacent circuit islands 120. The first connection line 401 is used to connect the first electrodes 240 of adjacent circuit islands 120, and the fourth connection line 404 is used to connect the second electrodes 250 of adjacent two circuit islands 120. Since the first connection line 401 and the fourth connection line 404 are added, the first connection line 401 may be stacked on one of the two connection lines (for example, the first scan line Sn or the first clock signal line CLK 1) between the original adjacent two circuit islands 120, and the fourth connection line 404 may be stacked on the other of the two connection lines (for example, the second scan line sn+1 or the second clock signal line CLK 2) between the original adjacent two circuit islands 120.

In some alternative embodiments, the signal line 400 further includes a redundant trace 407 located in the first area AA, and a signal trace 408 for connecting adjacent first pixel circuit structures 210, at least a portion of the redundant trace 407 and the signal trace 408 being stacked in a thickness direction.

In these embodiments, the redundant wiring 407 is disposed in the first area AA, and the redundant wiring 407 and the signal wiring 408 are stacked in the thickness direction, so that the signal lines 400 of the first area AA and the second area NA are arranged in the same manner, and the difference in stretch ratio between the first area AA and the second area NA can be improved.

Optionally, the sum of the number of redundant traces 407 and signal traces 408 between two adjacent pixel islands 110 is the same as the number of first signal lines 400 between two adjacent circuit islands. The difference in stretch ratio between the first area AA and the second area NA is further improved.

Optionally, the redundant wiring 407 between two adjacent pixel islands 110 and at least one of the first connection line 401, the second connection line 402, the third connection line 403, and the fourth connection line 404 are disposed in the same material. For example, when the first connection line 401 and the first scan line Sn are stacked, the redundant trace 407 may be disposed in the same material as one of the first connection line 401 and the first scan line Sn, and the signal trace 408 and the other are disposed in the same material as one another, so as to simplify the manufacturing process of the display panel.

In some alternative embodiments, the first signal line 410 includes a first sub-line 411, the first sub-line 411 extending from the first circuit island 121 at both sides of the second direction Y; the second signal line 420 includes second sub-lines 421, and the second sub-lines 421 extend from the second circuit islands 122 at two sides of the second direction Y, where the number of first sub-lines 411 corresponding to each first circuit island 121 is the same as the number of second sub-lines 421 corresponding to each second circuit island 122. The first sub-line 411 corresponding to the first circuit island 121 refers to the first sub-line 411 protruding from both sides of the second direction Y of the first circuit island 121. The second sub-lines 421 corresponding to the second circuit islands 122 are second sub-lines 421 extending from the second circuit islands 122 on both sides in the second direction Y.

In these alternative embodiments, the number of the first sub-lines 411 and the second sub-lines 421 extended from the same side of the first circuit island 121 and the second circuit island 122 is the same, so that the stretching ratios of the first circuit island 121 and the second circuit island 122 in the second direction Y tend to be uniform, and the stretching performance of the second area NA of the display panel in the second direction Y can be improved well.

Alternatively, the first circuit island 121 extends out of the first sub-line 411 at both sides of the second direction Y, and the first sub-line 411 correspondingly disposed along the second direction Y may be used to transmit the same signal, where the first sub-line 411 includes at least one of a high-level power line (VGH) and a low-level power line (VGL).

Optionally, the second circuit island 122 extends out of the second sub-line 421 at two sides of the second direction Y, and the second sub-line 421 correspondingly disposed along the second direction Y is used for transmitting the same signal, where the second sub-line 421 includes at least one of the first clock signal line (CLK 1), the second clock signal line (CLK 2), the first power signal line (VSS), the scan line (Sn), the data line (data), and the sixth connection line (Vin). The second sub-line 421 may be used as a scanning line to connect the shift register units 221 of two adjacent rows, or the second sub-line 421 may be used as a scanning line to connect two adjacent rows of scanning lines extending in the second direction Y, so that the pixel driving units of the i+1th row may be reset when the pixel driving units of the i th row are driven.

Alternatively, when the second area NA is used for display, the second sub-line 421 may include at least one of a first clock signal line, a second clock signal line, a scan line, a data line, and a sixth connection line. When the second area NA is not used for display, the second sub-line 421 may include at least one of a first clock signal line (CLK 1), a second clock signal line (CLK 2), a first power signal line (VSS), and a scan line (Sn).

Optionally, the driving signal line 430 includes third sub-lines 431, the third sub-lines 431 extend from two sides of the pixel island 110 in the second direction Y, and the number of the third sub-lines 431 corresponding to each pixel island 110 is the same as the number of the first sub-lines 411 in each first circuit island 121. The third sub-line 431 corresponding to each pixel island 110 is a third sub-line 431 extending from the pixel island 110.

In these alternative embodiments, the number of the third sub-lines 431 of the single pixel island 110 is the same as the number of the first sub-lines 411 of the single first circuit island 121, so that the stretching ratios of the first area AA and the second area NA in the second direction Y tend to be uniform, and the stretching performance of the entire display panel in the second direction Y can be improved well.

Alternatively, the third sub-line 431 may include a data line, a first power signal line, a second power signal line, and the like.

In some alternative embodiments, the first signal line 410 includes a fourth sub-line 412, the fourth sub-line 412 extending from the first circuit island 121 on both sides of the first direction X; the second signal line 420 includes a fifth sub-line 422, and the fifth sub-line 422 extends from the second circuit island 122 at two sides of the first direction X, where the number of fourth sub-lines 412 corresponding to each first circuit island 121 is the same as the number of fifth sub-lines 422 corresponding to each second circuit island 122.

In these alternative embodiments, the number of the fourth sub-lines 412 protruding from the single first circuit island 121 and the number of the fifth sub-lines 422 protruding from the single second circuit island 122 are the same, so that the stretching ratios of the first circuit island 121 and the second circuit island 122 in the first direction X tend to be uniform, and the stretching performance of the second area NA of the display panel in the first direction X can be improved well.

Optionally, the fourth sub-line 412 may include at least one of the first, second, third, fourth, and fifth connection lines 401, 402, 403, 404, and 405 described above, for example, at least one of the first, second, third, fourth, and fifth connection lines 401, 402, 403, 404, and 405 for connecting the first circuit island 121 may be the fourth sub-line 412.

The fifth sub-line 422 may include at least one of the first connection line 401, the second connection line 402, the third connection line 403, the fourth connection line 404, and the fifth connection line 405 described above.

Optionally, at least a portion of the fourth sub-line 412 and at least a portion of the fifth sub-line 422 are connected to each other, so that the shift register unit 221 of the first circuit island 121 may be connected to the connection portion 222 through the fourth sub-line 412 and the fifth sub-line 422, so that the second signal line 420 may be connected to the shift register unit 221.

In some alternative embodiments, the driving signal line 430 includes sixth sub-lines 432, the sixth sub-lines 432 extend from the pixel islands 110 at both sides of the first direction X, and the number of the sixth sub-lines 432 corresponding to each pixel island 110 is the same as the number of the fourth sub-lines 412 corresponding to each first circuit island 121.

In these alternative embodiments, the number of the sixth sub-lines 432 protruding from the single pixel island 110 is identical to the number of the fourth sub-lines 412 protruding from the single first circuit island 121, so that the extension rates of the first area AA and the second area NA in the first direction X tend to be constant, enabling to improve the tensile property of the display panel as a whole.

Optionally, the sixth sub-line 432 may include the signal trace 408 and the redundant trace 407 described above.

Optionally, at least part of the fourth sub-line 412 and at least part of the sixth sub-line 432 are connected to each other, so that the shift register unit 221 can be connected to the first pixel circuit structure 210 through the fourth sub-line 412, the sixth sub-line 432, thereby transmitting a driving signal to the first pixel circuit structure 210.

Optionally, at least a portion of the fifth sub-line 422 and at least a portion of the sixth sub-line 432 are connected to each other, such that the first pixel circuit structure 210 can be connected to the connection portion 222 of the second circuit island 122 through the sixth sub-line 432, the fifth sub-line 422.

Optionally, the first sub-line 411, the second sub-line 421, the third sub-line 431, the fourth sub-line 412, the fifth sub-line 422 and the sixth sub-line 432 are different in arrangement positions, at least two of which may be used to transmit the same signal, at least two of which may be located in the same conductive layer and integrally formed, or at least two of which may have the same or different extension directions.

In some alternative embodiments, the number of first sub-lines 411 and the number of third sub-lines 431 corresponding to the same first circuit island 121 are the same. So that the forces of the shift register unit 221 in different directions are more balanced.

In some alternative embodiments, the number of second sub-lines 421 and the number of fifth sub-lines 422 corresponding to the same second circuit island 122 are the same. So that the stress of the connecting portion 222 in different directions is more balanced.

In some alternative embodiments, the number of third sub-lines 431 and the number of sixth sub-lines 432 corresponding to the same pixel island 110 are the same. So that the stress of the first pixel circuit structure 210 in different directions is more balanced. In some embodiments, the second sub-line 421 includes a first clock signal line, a second clock signal line, a first scan line, and a first negative voltage signal line (i.e., a first power signal line), and the fifth sub-line 422 may be used to connect the first clock signal line and the shift register unit, or the fifth sub-line 422 may be used to connect the second clock signal line and the shift register unit 221, or the fifth sub-line 422 may be used to connect the shift register unit 221 and the first scan line.

In some embodiments, the driving signal line 430 includes a data line, a second scan line, a second negative voltage signal line, and a first positive voltage signal line (i.e., a second power line). The sixth sub-line 432 may also connect the shift register unit 221 and the first pixel circuit structure 210 through the fourth sub-line 412. The sixth sub-line 432 may be connected to the first scan line and the second scan line, or the sixth sub-line 432 may be connected to the first negative voltage signal line and the second negative voltage signal line.

In some alternative embodiments, as shown in fig. 1 and 2, the second area NA includes a first sub-area NA1 extending in the first direction X and a second sub-area NA2 extending in the second direction Y, the first island assembly 100a is located in the second sub-area NA2, and the display panel further includes a bonding pad 500, and the bonding pad 500 is located in the first sub-area NA1.

In these alternative embodiments, the second area NA is divided into a first sub-area NA1 and a second sub-area NA2, the first island assembly 100a is located in the second sub-area NA2, and the bonding pad 500 is located in the first sub-area NA1, such that the arrangement of the first island assembly 100a and the bonding pad 500 does not affect each other. A continuous metal layer or other material layer may be provided for the bonding pad 500 within the first sub-area NA1.

Alternatively, the stretching portions 300 are located in the second sub-area NA2, and the stretching portions 300 penetrate through the second sub-area NA2 along the first direction X, and the circuit islands 120 are disposed between adjacent stretching portions 300.

Optionally, the two second sub-areas NA2 are separately disposed at two sides of the first area AA in the first direction X, and the first island assemblies 100a are disposed in each second sub-area NA2, that is, the shift register units 221 are disposed in each second sub-area NA2, so that the light emitting units in the first area AA can be driven from the two sides of the first area AA in the first direction X at the same time, thereby improving the driving hysteresis and improving the display effect of the display panel.

Alternatively, the binding pin 500 may be used to bind to a scan driver, a display driver, etc. Optionally, a plurality of bonding pins 500 are spaced apart along the second direction Y within the first sub-area NA1 so as to connect a plurality of drivers and the like through the bonding pins 500.

Optionally, two first sub-areas NA1 are separately disposed on two sides of the first area AA in the second direction Y, and binding pins 500 are disposed in each first sub-area NA1, so that more binding pins 500 are disposed in the first sub-area NA1.

Optionally, the extension of the first sub-area NA1 in the first direction X is smaller than the extension of the second sub-area NA2 in the second direction Y. That is, the first direction X may be a width direction of the display panel, and the second direction Y may be a length direction of the display panel. The first island assemblies 100a are distributed in the length direction within the second sub-area NA2, and can improve the tensile property of the display panel in the length direction thereof.

Referring to fig. 11, in other embodiments, the bonding pad 500 may also be disposed in the second sub-area NA2, and the first island 100a is disposed in the first sub-area NA1. At this time, the stretching unit 300 may be positioned at the first sub-area NA1 to improve the stretching performance of the first sub-area NA1.

In some alternative embodiments, as shown in fig. 1 to 10, the signal line 400 further includes a driving signal line 430, where the driving signal line 430 is connected to the first pixel circuit structure 210, and the driving signal line 430 is formed by extending along a bending path.

In these alternative embodiments, the driving signal line 430 is formed to extend along the bending path, so that the stretching performance of the driving signal line 430 can be improved, and the problem that the driving signal line 430 is damaged during the stretching of the display panel can be improved.

Alternatively, the driving signal line 430 may be a Data line (Data), a Scan line (Scan), a second power line (VSS), or the like. The second power line may be connected to the anode of the first area AA light emitting cell.

In some alternative embodiments, at least two of the pixel island 110, the first circuit island 121, and the second circuit island 122 are the same size. The stretching ratios of different positions of the display panel tend to be consistent, and the stretching performance of the display panel can be well improved.

For example, the dimensions of the first circuit islands 121 and the second circuit islands 122 are the same, so that the gap between two adjacent first circuit islands 121 along the second direction Y is the same as the gap between two adjacent second circuit islands 122 along the second direction Y, and the stretching ratios of the positions of the first circuit islands 121 and the positions of the second circuit islands 122 in the second area NA tend to be consistent, so that the stretching performance of the second area NA is improved.

Alternatively, the dimensions of the pixel island 110, the first circuit island 121 and the second circuit island 122 are all the same, so that the stretching ratio of the second area NA is consistent with that of the first area a, and the stretching performance of the whole display panel can be improved.

As shown in fig. 3, the number of the second circuit islands 122 may be one, the second circuit islands 122 are used for setting the connection portions 222, and the first circuit islands 121 are used for setting the shift register units 221, and by separately setting the connection portions 222 and the shift register units 221 in the second area NA in different circuit islands 120, the distance between the shift register units 221 and the connection portions 222 can be increased, and the insulation performance between the shift register units 221 and the connection portions 222 is ensured.

In other alternative embodiments, as shown in fig. 5, the number of second circuit islands 122 is more than two. For example, the number of the second circuit islands 122 is two, and the second signal line 420 of one of the second circuit islands 122 includes a clock signal line, for example, the second signal line 420 of one of the second circuit islands 122 includes a first clock signal line CLK1 and a second clock signal line (CLK 2), and the second signal line 420 of the other second circuit island 122 includes a scan line and a first power signal line (VDD). As shown in fig. 2, two second circuit islands 122 may be separately provided at both sides of the first circuit island 121 in the first direction X, or two second circuit islands 122 may be located at the same side of the first circuit island 121 in the first direction X.

Alternatively, in the display panel shown in fig. 5, two second circuit islands 122 are provided separately on both sides of the first circuit island 121 in the first direction X. The second circuit island 122 distant from the first area AA is provided with a first clock signal line CLK1 and a second clock signal line CLK2, and the first clock signal line CLK1 and the second clock signal line CLK2 extend between the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221 of the first circuit island 121. The second circuit island 122 adjacent to the first area AA is provided with a scan line including a first scan line Sn extending as an input between the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221 and a second scan line sn+1 extending as an output between the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221, and a first power signal line VDD. Alternatively, the first circuit island 121 may be further connected with a high-level power line VGH and a low-level power line VGL, which protrude from both sides of the first circuit island 121 in the second direction Y. Alternatively, the first signal line 410 includes the signal line 400 connected to the shift register unit 221, the second signal line 420 includes the signal line 400 connected to the second circuit island 122, and the signal line 400 is divided into the first signal line 410 and the second signal line 420 by the setting position and the connection object, and part of the first signal line 410 and the second signal line 420 may be used to transmit the same signal.

Alternatively, as shown in fig. 12, the number of the second circuit islands 122 is three or more, for example, the number of the second circuit islands 122 is three, and the second signal lines 420 include clock signal lines, dummy signal lines (dum), scanning lines, and first power signal lines, which are provided on the three second circuit islands 122. The clock signal lines may include a first clock signal line (CLK 1) and a second clock signal line (CLK 2), and the dummy signal lines may also include a first dummy signal line and a second dummy signal line, for example, the first clock signal line and the first dummy signal line are disposed at the same second circuit island 122, the second dummy signal line and the second clock signal line are disposed at another second circuit island 122, and the scan line and the first power signal line are disposed at the second circuit island 122.

With continued reference to fig. 12, the number of the second circuit islands 122 is optionally three, the number of the first circuit islands 121 is one, two second circuit islands 122 are located on a side of the first circuit islands 121 away from the first area AA, and one second circuit island 122 is located on a side of the first circuit islands 121 close to the first area AA. In the two second circuit islands 122 of the first circuit island 121 distant from the first area AA, one clock signal line and one dummy signal line are each connected, for example, a first second circuit island 122 from the left is connected with the first clock signal line CLK1 and one dummy signal line dum, a second circuit island 122 from the left is connected with the second clock signal line CLK2 and one dummy signal line dum, and the first clock signal line CLK1 and the second clock signal line CLK2 extend to the two second circuit islands 122, and the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221. The second circuit island 122 adjacent to the first area AA is provided with a scan line and a first power signal line VDD, and the scan line and the first power signal line VDD are arranged in a manner shown in fig. 3, which is not described herein. The first circuit island 121 may be further connected to a high-level power line VGH and a low-level power line VGL, and the arrangement manner is shown in fig. 3, which is not described herein again.

Alternatively, as shown in fig. 13, the number of the second circuit islands 122 may be four, each second circuit island 122 may include two second signal lines, the number of the virtual signal lines may be four, each virtual signal line may be disposed on each second circuit island 122, and the first clock signal line, the second clock signal line, the scan line, and the first power signal line may be disposed on each second circuit island 122.

As shown in fig. 13, the number of the second circuit islands 122 is four, and the four second circuit islands 122 are equally disposed on both sides of the first circuit island 121, that is, one side of the first circuit island 121 is provided with two second circuit islands 122. The arrangement of the two second circuit islands 122 and the signal lines 400 connected thereto on the side of the first circuit island 121 far from the first area AA is shown in fig. 12, and will not be described again. Among the two second circuit islands 122 adjacent to the first area AA, one is connected to a scan line and a dummy signal line dum, and the other is connected to a first power signal line VDD and a dummy signal line dum, the scan line and the scan line extending to the two second circuit islands 122, and between the second circuit island 122 and the first circuit island 121 to connect the shift register unit 221. The first circuit island 121 may be further connected to a high-level power line VGH and a low-level power line VGL, and the arrangement manner is shown in fig. 3, which is not described herein again.

Optionally, in any of the foregoing embodiments, as shown in fig. 13, an auxiliary line 409 may be further disposed on the signal line 400, where the auxiliary line 409 and the signal line 400 intersect and are located on the circuit island 120, and the auxiliary line 409 is used to increase the contact area between the signal line 400 and the circuit island 120, so as to improve the position stability of the signal line 400.

In the above embodiment, by adding the virtual signal line 125, on the one hand, by reasonably arranging the positions of the virtual signal lines, the virtual signal line is arranged near the side of the second area NA away from the first area AA, and at least part of the second signal line 420 (for example, the first power signal line) is arranged far from the edge of the second area NA, so that the influence of static electricity generated by cutting on the second signal line 420 can be improved; in addition, by reasonably setting the number of the virtual signal lines, the numbers of the second sub-lines 421 and the fifth sub-lines 422 of the second circuit island 122 and the first sub-lines 411 and the fourth sub-lines 412 of the first circuit island 121 tend to be consistent, and the tensile performance of the display panel is improved.

Alternatively, the signal line 400 may be arranged in various ways, for example, the signal line 400 is not straight. For example, at least a portion of the signal line 400 is arcuate. For example, the signal line 400 includes a circular arc segment, and the signal line 400 includes a semicircular arc segment. Optionally, two signal lines 400 extend from the same side of the same functional island 100. Alternatively, the semicircular segments of the two signal lines 400 connected to the same functional island 100 and extending from the same side of the functional island 100 are symmetrically arranged. Alternatively, when the signal line 400 includes the first signal lines 410, and two first signal lines 410 are disposed on one side of the first circuit island 121 and are disposed side by side, the arc-shaped openings of the two first signal lines 410 are disposed opposite to each other. The arc-shaped opening is an opening formed by bending the semicircular first signal line 410.

Optionally, the two sides of the first area AA are provided with the second areas NA, and each second area NA is provided with the driving circuit structure 220, so that the dual-side driving of the display panel is realized, the problem of voltage drop can be improved, and the display effect of the display panel is improved.

The embodiment of the first aspect of the present application further provides another display panel, having a first area AA and a second area NA disposed around at least a portion of the first area AA, where the first area AA and the second area NA each include an island area and a stretching area, where the plurality of island areas are distributed in the first area AA and the second area NA, the stretching area is located between two adjacent rows and/or two adjacent columns of island areas, the display panel includes functional islands 100, a stretching portion 300, and signal lines 400, each functional island 100 is located in each island area and is provided with a functional element 200 thereon, the plurality of functional islands 100 includes a plurality of pixel islands 110 located in the first area AA and a plurality of circuit islands 120 located in the second area NA, and the functional element 200 includes a first pixel circuit structure 210 located in the pixel islands 110 and a driving circuit structure 220 located in the circuit islands 120; the stretching part 300 is arranged in the stretching region and connected between two adjacent functional islands 100, and at least part of the stretching region penetrates through the second region NA along the direction from the first region AA to the second region NA in the second region NA; the signal line 400 is provided to the tensile portion 300 and is used to connect the functional elements 200 of two adjacent functional islands 100. The plurality of circuit islands 120 include a first island assembly 100a, the first island assembly 100a includes a first circuit island 121 and a second circuit island 122, the driving circuit structure 220 includes a shift register unit 221 disposed at the first circuit island 121, the second circuit island 122 and the first circuit island 121 are disposed side by side, and the shift register unit 221 is connected with the first pixel circuit structure 210 through a signal line 400 to supply a scan signal to the first pixel circuit structure 210. The first circuit islands 121 and the second circuit islands 122 within the same first island assembly 100a are disposed at intervals along the first direction X, and the plurality of first island assemblies 100a are disposed at intervals along the second direction Y within the second area NA. The functional element 200 further includes a second pixel circuit structure 230 and a second light emitting unit disposed on at least one of the first circuit island 121 and the second circuit island 122, the second pixel circuit structure 230 being for driving the second light emitting unit to emit light. The circuit islands 120 of the first island assembly 100a and the second circuit islands 122 close to the first area AA are provided with the second pixel circuit structure 230 and the second light emitting unit, so that a part of the second area NA close to the first area AA can be displayed, the display area of the display panel is enlarged, and the purpose of narrow frame is achieved.

Optionally, the setting manner of the display panel is as described in any one of the foregoing embodiments of the display panel, which is not described herein.

Embodiments of the second aspect of the present application further provide a display device, including the display panel of any one of the embodiments of the first aspect. Since the display device provided in the second embodiment of the present application includes the display panel of any one of the embodiments of the first aspect, the display device provided in the second embodiment of the present application has the beneficial effects of the display panel of any one of the embodiments of the first aspect, which are not described herein.

The display device in the embodiment of the application includes, but is not limited to, a mobile phone, a personal digital assistant (Personal Digital Assistant, abbreviated as PDA), a tablet computer, an electronic book, a television, an access control, a smart phone, a console, and other devices with display functions.

While the present application has been described with reference to a preferred embodiment, various modifications may be made and equivalents may be substituted for elements thereof without departing from the scope of the present application. In particular, the technical features mentioned in the respective embodiments may be combined in any manner as long as there is no structural conflict. The present application is not limited to the specific embodiments disclosed herein, but encompasses all technical solutions falling within the scope of the claims.

Claims

1. A display panel having a first region and a second region located at a periphery of the first region, the first region and the second region each including an island region and a stretched region, a plurality of the island regions being distributed in the first region and the second region array, the stretched region being located between two adjacent rows and/or two adjacent columns of the island regions, the display panel comprising:

a plurality of functional islands, each of the functional islands being located in each island region and provided with a functional member thereon, the plurality of functional islands including a plurality of pixel islands located in the first region and a plurality of circuit islands located in the second region, the functional member including a first pixel circuit structure provided in the pixel islands, a first light emitting unit, and a driving circuit structure provided in the circuit islands, the first pixel circuit structure being for driving the first light emitting unit to emit light;

the stretching part is arranged in the stretching region and connected between two adjacent functional islands, and at least part of the stretching region penetrates through the second region along the direction from the first region to the second region in the second region;

and the signal wire is arranged on the stretching part and is used for connecting the functional pieces of two adjacent functional islands.

2. The display panel of claim 1, wherein a plurality of the circuit islands comprise a first island assembly, the first island assembly comprising:

the driving circuit structure comprises a shift register unit arranged on the first circuit island;

the signal lines comprise first signal lines connected with the shift register units and second signal lines connected with the connecting parts, and the plurality of shift register units are connected with the first pixel circuit structures through at least part of the second signal lines, the connecting parts and the first signal lines so as to provide scanning signals for the first pixel circuit structures;

preferably, the plurality of circuit islands and the plurality of pixel islands are arranged in rows and columns along a first direction and a second direction, and in the circuit islands and the pixel islands in the same row, the shift register unit on the circuit island is used for driving the first pixel circuit structure of the pixel islands in the same row.

3. The display panel of claim 2, wherein the first circuit island and the second circuit island of the first island assembly are disposed side by side along the first direction and a plurality of the first island assemblies are spaced apart along the second direction;

Preferably, the first signal lines of the plurality of first circuit islands disposed side by side in the second direction are connected to each other, and the second signal lines of the plurality of second circuit islands disposed side by side in the second direction are connected to each other;

preferably, the first circuit islands of the plurality of first island assemblies disposed at intervals along the second direction are aligned along the second direction;

preferably, the second circuit islands of the plurality of first island assemblies disposed at intervals along the second direction are aligned along the second direction.

4. The display panel according to claim 3, wherein the functional member further includes a second pixel circuit structure provided on at least one of the first circuit island and the second circuit island and a second light emitting unit electrically connected to the second pixel circuit structure, the second pixel circuit structure for driving the second light emitting unit to emit light;

preferably, the first circuit island and the second circuit island of the first island assembly are provided with the second pixel circuit structure and the second light emitting unit, wherein the circuit island is close to the first area;

preferably, the first island assembly includes one first circuit island and two second circuit islands, the two second circuit islands are respectively arranged at two sides of the first circuit island, and the second pixel circuit structure is arranged on the second circuit island, which is positioned on the first circuit island and is close to the first area.

5. The display panel according to claim 4, wherein the second light emitting units are provided on both of the first circuit island and the second circuit island in the same first island component, and the second pixel circuit structure for driving the plurality of the second light emitting units in the same first island component to emit light is provided on one of the first circuit island and the second circuit island in the same first island component;

preferably, at least one of the second circuit islands is provided with a dummy pixel circuit;

preferably, the virtual pixel circuits are disposed on both the second circuit islands, and the sum of the number of the second pixel circuit structures and the number of the virtual pixel circuits on one of the second circuit islands is equal to the sum of the number of the virtual pixel circuits on the other second circuit island.

6. The display panel according to claim 5, wherein the first light emitting unit includes a first electrode, and the signal line includes:

a first connection line for connecting two adjacent first electrodes within the same first island component;

the second connecting line is a scanning line and is used for connecting the driving circuit structure and the second pixel circuit structure, or is used for connecting the adjacent first pixel circuit structure and second pixel circuit structure;

The third connecting wire is a power supply signal wire and is used for connecting the first pixel circuit structure and the second pixel circuit structure;

7. The display panel according to claim 6, wherein the second light-emitting unit includes a second electrode, the signal line further includes a fourth connection line for connecting the second electrodes on adjacent two of the circuit islands, the fourth connection line and the second connection line being stacked in the thickness direction;

preferably, the fourth connecting wire and the first electrode are arranged in the same layer and are insulated at intervals, and the fourth connecting wire is connected with the second electrode via hole;

preferably, the second connection line includes a first scan line and a second scan line, the first scan line and the second scan line are disposed at intervals along the second direction, the first scan line and the fourth connection line are disposed in a stacked manner along the thickness direction, and the second scan line and the first connection line are disposed in a stacked manner along the thickness direction, or the second scan line and the third connection line are disposed in a stacked manner along the thickness direction;

Preferably, the signal line includes a fifth connection line connected to the pixel island and extending in the second direction, at least one of the fourth connection lines is connected to the second circuit island and the pixel island, and the fifth connection line is connected to the pixel island;

preferably, the signal line includes a data line and a sixth connection line connected to a second circuit island provided with the second pixel circuit structure, the data line and the sixth connection line are arranged side by side along the first direction, and the sixth connection line and the first scan line are electrically connected to each other.

8. The display panel according to claim 7, wherein the signal line includes:

a clock signal line connected to the second circuit island located at the first circuit structure away from the first region;

a fifth connection line connecting the clock signal line and the driving circuit structure, the fifth connection line connected between two adjacent circuit islands being stacked with the first connection line in the thickness direction; and/or, a fifth connecting line and a fourth connecting line connected between two adjacent circuit islands are stacked along the thickness direction;

Preferably, the clock signal line includes a first clock signal line and a second clock signal line, the fifth connection line includes a first sub-connection line connected to the first clock signal line and a second sub-connection line connected to the second clock signal line, the first sub-connection line and the second sub-connection line are arranged at intervals along the second direction, the first sub-connection line and the fourth connection line are arranged in a stacked manner along the thickness direction, and the second sub-connection line and the first connection line are arranged in a stacked manner along the thickness direction.

9. The display panel according to claim 7, wherein the signal lines further include redundant wirings in the first region, signal wirings for connecting adjacent first pixel circuit structures, at least part of the redundant wirings and the signal wirings being stacked in the thickness direction;

preferably, the sum of the numbers of the redundant wires and the signal wires between two adjacent pixel islands is the same as the number of the signal wires between two adjacent circuit islands;

preferably, the redundant wiring between two adjacent pixel islands and at least one of the first connection line, the second connection line, the third connection line, and the fourth connection line are disposed in the same layer of material.

10. The display panel according to claim 3, wherein,

the first signal line comprises a first sub-line which extends out of the first circuit island at two sides of the second direction;

the number of the first sub-lines corresponding to the first circuit islands is the same as the number of the second sub-lines corresponding to the second circuit islands;

preferably, the signal line further includes a driving signal line connected to the first pixel circuit structure, the driving signal line includes a third sub-line extending from the pixel island at two sides of the second direction, and the number of the third sub-lines corresponding to each pixel island is the same as the number of the first sub-lines corresponding to each first circuit island;

preferably, the first signal line includes a fourth sub-line extending from the first circuit island at both sides of the first direction;

the second signal line comprises a fifth sub-line which extends from the second circuit island at two sides of the first direction,

The number of the fourth sub-lines corresponding to the first circuit islands is the same as the number of the fifth sub-lines corresponding to the second circuit islands;

preferably, the driving signal line includes a sixth sub-line extending from the pixel island at both sides of the first direction, and the number of the sixth sub-lines corresponding to each pixel island is the same as the number of the fourth sub-lines corresponding to each first circuit island;

preferably, the number of the first sub-lines and the number of the third sub-lines corresponding to the same first circuit island are the same;

preferably, the number of the second sub-lines corresponding to the same second circuit island is the same as the number of the fifth sub-lines;

preferably, the number of the third sub-lines and the number of the sixth sub-lines corresponding to the same pixel island are the same;

preferably, at least part of the third sub-line and at least part of the sixth sub-line are connected to each other, so that the first pixel circuit structure can be electrically connected to each other through the sixth sub-line, the third sub-line, and the shift register unit;

preferably, at least a part of the fourth sub-line and at least or a part of the sixth sub-line are connected to each other, so that the first pixel circuit structure can be electrically connected to each other through the sixth sub-line, the fourth sub-line, and the connection portion.

11. The display panel according to claim 3, wherein the number of the second circuit islands is one, and the second circuit islands are disposed on a side of the first circuit islands facing or facing away from the first region;

12. The display panel of claim 2, wherein the second region comprises a first sub-region extending along a first direction and a second sub-region extending along a second direction, the first island component being located in the second sub-region, the display panel further comprising a bonding pin located in the first sub-region;

preferably, at least part of the stretch is arranged in the first direction through the second sub-zone;

preferably, two second sub-areas are respectively arranged at two sides of the first area in the first direction, and the first island component is arranged in each second sub-area;

preferably, a plurality of binding pins are distributed at intervals along the second direction in the first subarea;

preferably, the two first sub-areas are respectively arranged at two sides of the first area in the second direction, and the binding pins are arranged in each first sub-area;

Preferably, the extension of the first sub-zone in the first direction is smaller than the extension of the second sub-zone in the second direction.

13. The display panel of claim 2, wherein at least two of the pixel island, the first circuit island, and the second circuit island are the same size.

14. The display panel according to claim 2, wherein the number of the second circuit islands is plural, the plural second circuit islands are disposed on both sides of the first circuit island, or the plural second circuit islands are disposed on one side of the first circuit island facing or facing away from the first region;

preferably, the number of the second circuit islands is two, wherein one second signal line corresponding to the second circuit island comprises a first clock signal line and a second clock signal line, the other second signal line corresponding to the second circuit island comprises a scanning line and a first power signal line, and the first signal line comprises a high-level power line and a low-level power line;

or the number of the second circuit islands is more than three, and the second signal lines corresponding to at least one second circuit island comprise virtual signal lines;

Preferably, the second signal lines include dummy signal lines, and the number of the dummy signal lines and the signal lines connected thereto to the same second circuit island are symmetrically arranged.

15. The display panel according to claim 1, wherein at least part of the signal lines are arc-shaped;

preferably, the signal line includes a circular arc segment;

preferably, the circular arc segments of the two signal lines connected to the same functional island and extending from the same side of the functional island are symmetrically arranged.

16. A display panel having a first region and a second region located at a periphery of the first region, the first region and the second region each including an island region and a stretched region, a plurality of the island regions being distributed in the first region and the second region array, the stretched region being located between two adjacent rows and/or two adjacent columns of the island regions, the display panel comprising:

a signal line provided in the stretching portion and connecting the functional members of the adjacent two functional islands;

a plurality of the circuit islands include a first island component, the first island component including:

the second circuit island is arranged side by side with the first circuit island, the driving circuit structure comprises a connecting part arranged on the second circuit island,

the shift register unit is connected with the first pixel circuit structure through the signal line to provide scanning signals to the first pixel circuit structure,

the first circuit island and the second circuit island of the first island component are arranged side by side along a first direction, a plurality of first island components are arranged at intervals along a second direction, the functional piece further comprises a second pixel circuit structure arranged on at least one of the first circuit island and the second circuit island and a second light-emitting unit electrically connected with the second pixel circuit structure, the second pixel circuit structure is used for driving the second light-emitting unit to emit light, and the second pixel circuit structure and the second light-emitting unit are arranged on the circuit island, which is close to the first area, of the first circuit island and the second circuit island of the first island component.

17. A display device comprising the display panel of any one of claims 1-16.