CN117713783A

CN117713783A - Delay start-stop circuit and method

Info

Publication number: CN117713783A
Application number: CN202311853354.6A
Authority: CN
Inventors: 周龙江; 张贤成
Original assignee: Wuxi Dechip Microelectronics Co ltd
Current assignee: Wuxi Dechip Microelectronics Co ltd
Priority date: 2023-12-28
Filing date: 2023-12-28
Publication date: 2024-03-15

Abstract

The disclosure provides a delay start-stop circuit and a delay start-stop method, relates to the technical field of electronic circuits, and can be applied to the scenes of delay start-stop, delay power-on and the like. The delay start-up circuit specifically comprises: the power-on delay circuit is used for enabling the capacitor charging circuit to delay power-on; the capacitor charging circuit is used for receiving an external driving signal and enabling a first capacitor in the capacitor charging circuit to enter a charging state or enabling the first capacitor to enter a discharging state according to the external receiving signal; the path determining circuit is used for determining whether the path of the circuit is an on path or an off path according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the voltage of the turning point; a switching potential setting circuit for setting a switching point voltage of the path selection circuit; and the soft start circuit is used for gently starting the drive control circuit when the circuit path is an open path or gently stopping the drive control circuit when the circuit path is an off path. The method and the device can eliminate hidden danger caused by uncontrollability of the delayed starting and stopping time.

Description

Delay start-stop circuit and method

Technical Field

The disclosure relates to the technical field of electronic circuits, and is applicable to the scenes of delayed start-stop, delayed power-up and the like, in particular to a delayed start-stop circuit and a delayed start-stop method.

Background

The drive control circuit is an important component in the electronic system and is responsible for controlling and driving other electronic components (such as transistors, field effect transistors, motors, etc.) to ensure that the electronic components operate in a desired manner.

At present, uncontrollability exists in the delayed starting time and the delayed switching-off time of the driving control circuit, and the uncontrollability can bring hidden trouble to the driving control circuit.

Disclosure of Invention

The disclosure provides a delay start-stop circuit and a delay start-stop method, which can control delay start time and delay turn-off time of a drive control circuit and eliminate hidden danger caused by uncontrollability of the delay start-stop time.

According to a first aspect of the present disclosure, there is provided a delay-start power circuit comprising:

the device comprises a power-on delay circuit, a capacitor charging circuit, a path determining circuit, a flip potential setting circuit and a soft start circuit.

The power-on delay circuit is respectively connected with the capacitor charging circuit and the path determining circuit, the capacitor charging circuit is connected with the path determining circuit, the path determining circuit is respectively connected with the overturning potential setting circuit and the soft starting circuit, and the soft starting circuit is connected with the driving control circuit; the power-on delay circuit, the access determination circuit and the overturning potential setting circuit are all connected with a power supply and grounded, the capacitor charging circuit is grounded, and the soft start circuit is connected with the power supply; the power-on delay circuit is used for enabling the capacitor charging circuit to delay power-on; the capacitor charging circuit is used for receiving an external driving signal and enabling a first capacitor in the capacitor charging circuit to enter a charging state or enabling the first capacitor to enter a discharging state according to the external receiving signal; the path determining circuit is used for determining whether the path of the circuit is an on path or an off path according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the voltage of the turning point; a switching potential setting circuit for setting a switching point voltage of the path selection circuit; and the soft start circuit is used for gently starting the drive control circuit when the circuit path is an open path or gently stopping the drive control circuit when the circuit path is an off path.

Further, the power-on delay circuit includes: the zero bias constant current source, the first resistor, the second capacitor, the first triode, the second triode and the third triode; the input end of the zeroth bias constant current source is connected with a power supply, and the output end of the zeroth bias constant current source is respectively connected with one end of the first resistor, one end of the first capacitor and the base electrode of the third triode; the other end of the first resistor, the other end of the first capacitor and the emitter of the third triode are grounded; the emitter of the first triode and the emitter of the second triode are connected with a power supply, the base electrode of the first triode is connected with the base electrode of the second triode, and the base electrode of the first triode is in short circuit with the collector electrode of the first triode; the input end of the first bias constant current source is connected with the collector electrode of the first triode, and the output end of the first bias constant current source is connected with the collector electrode of the third triode; the collector electrode of the second triode is connected with the capacitor charging circuit and the passage determining circuit.

Further, the capacitor charging circuit includes: the second bias constant current source, the fourth triode, the second resistor and the first capacitor; the input end of the second bias constant current source, one end of the second resistor and one end of the first capacitor are connected with the power-on delay circuit and the path determining circuit at the same time; the output end of the second bias constant current source is connected with the collector electrode of the fourth triode, and the other end of the second resistor and the other end of the first capacitor are grounded; the base electrode of the fourth triode receives an external driving signal, and the emitter electrode of the fourth triode is grounded.

Further, the path determination circuit includes: a third bias constant current source, a fourth bias constant current source, a fifth triode, a sixth triode, a seventh triode and an eighth triode; the input end of the third bias constant current source is connected with a power supply, and the output end of the third bias constant current source is respectively connected with the emitter of the fifth triode and the emitter of the sixth triode; the base electrode of the fifth triode is respectively connected with the power-on delay circuit and the capacitor charging circuit, and the collector electrode of the fifth triode is grounded; the base electrode of the sixth triode is connected with the overturning potential setting circuit, and the collector electrode of the sixth triode is connected with the collector electrode of the seventh triode; the base electrode of the seventh triode is in short circuit with the collector electrode of the seventh triode, the base electrode of the seventh triode is connected with the base electrode of the eighth triode, and the emitter electrode of the seventh triode is grounded; the input end of the fourth bias constant current source is connected with a power supply, and the output end of the fourth bias constant current source is respectively connected with the collector electrode of the eighth triode and the soft start circuit; the emitter of the eighth triode is grounded.

Further, the flip-flop potential setting circuit includes: a third resistor and a fourth resistor; one end of the third resistor is connected with a power supply, and the other end of the third resistor is connected with one end of the fourth resistor and the path determining circuit; the connecting end of the fourth resistor and the third resistor is also connected with the path determining circuit, and the other end of the fourth resistor is grounded.

Further, the soft start circuit includes: a ninth triode, a thirteenth triode, an eleventh triode, a twelfth triode and at least one thirteenth triode; the collector of the ninth triode is connected with the passage determining circuit, the base of the ninth triode is in short circuit with the collector of the ninth triode, the base of the ninth triode is connected with the base of the thirteenth triode, and the emitter of the ninth triode is grounded; the collector of the thirteenth triode is connected with the emitter of the eleventh triode, and the emitter of the tenth triode is grounded; the base electrode of the eleventh triode is in short circuit with the collector electrode of the eleventh triode, and the collector electrode of the eleventh triode is connected with the collector electrode of the twelfth triode; the emitter of the twelfth triode is connected with a power supply, the base of the twelfth triode is in short circuit with the collector of the twelfth triode, and the base of the twelfth triode is connected with the base of at least one thirteenth triode; the emitter of at least one thirteenth triode is connected with a power supply, and the collector of at least one thirteenth triode is connected with a drive control circuit.

According to a second aspect of the present disclosure, there is provided a delay-start power circuit comprising:

the circuit comprises a capacitor charging circuit, a path determining circuit, a flip potential setting circuit and a soft start circuit.

The capacitor charging circuit is connected with the path determining circuit, the path determining circuit is respectively connected with the overturning potential setting circuit and the soft starting circuit, and the soft starting circuit is connected with the driving control circuit; the capacitor charging circuit, the path determining circuit and the overturning potential setting circuit are all connected with a power supply and grounded, and the soft start circuit is connected with the power supply; the capacitor charging circuit is used for receiving an external driving signal and enabling a first capacitor in the capacitor charging circuit to enter a charging state or enabling the first capacitor to enter a discharging state according to the external receiving signal; the path determining circuit is used for determining whether the path of the circuit is an on path or an off path according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the voltage of the turning point; a switching potential setting circuit for setting a switching point voltage of the path selection circuit; and the soft start circuit is used for gently starting the drive control circuit when the circuit path is an open path or gently stopping the drive control circuit when the circuit path is an off path.

Further, the capacitor charging circuit includes: the first bias constant current source, the second triode, the fourth triode, the second resistor and the first capacitor; the emitter of the second triode is connected with a power supply, the base of the second triode is connected with the input end of the first bias constant current source, and the collector of the second triode is respectively connected with the input end of the second bias constant current source, one end of the second resistor, one end of the first capacitor and the path determining circuit; the output end of the first bias constant current source is grounded, the output end of the second bias constant current source is connected with the collector electrode of the fourth triode, and the other end of the second resistor and the other end of the first capacitor are grounded; the base electrode of the fourth triode receives an external driving signal, and the emitter electrode of the fourth triode is grounded.

Further, the path determination circuit includes: a third bias constant current source, a fourth bias constant current source, a fifth triode, a sixth triode, a seventh triode and an eighth triode; the input end of the third bias constant current source is connected with a power supply, and the output end of the third bias constant current source is respectively connected with the emitter of the fifth triode and the emitter of the sixth triode; the base electrode of the fifth triode is connected with the capacitor charging circuit, and the collector electrode of the fifth triode is grounded; the base electrode of the sixth triode is connected with the overturning potential setting circuit, and the collector electrode of the sixth triode is connected with the collector electrode of the seventh triode; the base electrode of the seventh triode is in short circuit with the collector electrode of the seventh triode, the base electrode of the seventh triode is connected with the base electrode of the eighth triode, and the emitter electrode of the seventh triode is grounded; the input end of the fourth bias constant current source is connected with a power supply, and the output end of the fourth bias constant current source is respectively connected with the collector electrode of the eighth triode and the soft start circuit; the emitter of the eighth triode is grounded.

According to a third aspect of the present disclosure, there is provided a delayed start-stop method, including:

delaying power-on of the capacitor charging circuit through a power-on delay circuit; an external driving signal is sent to the capacitor charging circuit, and a first capacitor in the capacitor charging circuit enters a charging state or a discharging state according to the external driving signal through the capacitor charging circuit; determining an opening passage or a closing passage by a passage determining circuit according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the turning point voltage set by the turning potential setting circuit; the drive control circuit is smoothly started according to the opening path or is smoothly stopped according to the closing path by the soft start circuit.

According to a fourth aspect of the present disclosure, there is provided a delayed start-stop method, including:

an external driving signal is sent to the capacitor charging circuit, and a first capacitor in the capacitor charging circuit enters a charging state or a discharging state according to the external driving signal through the capacitor charging circuit; determining an opening passage or a closing passage by a passage determining circuit according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the turning point voltage set by the turning potential setting circuit; the drive control circuit is smoothly started according to the opening path or is smoothly stopped according to the closing path by the soft start circuit.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.

Drawings

The drawings are for a better understanding of the present solution and are not to be construed as limiting the present disclosure. Wherein:

fig. 1 is a schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure;

fig. 2 is another schematic structural diagram of a delayed start-stop circuit according to an embodiment of the disclosure;

Fig. 3 is a schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure;

fig. 4 is another schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure;

fig. 5 is a flow chart of a delayed start-stop method according to an embodiment of the disclosure;

fig. 6 is a flowchart of another delay start-stop method according to an embodiment of the disclosure.

Specific reference numerals: zero bias constant current source Ibias0, first bias constant current source Ibias1, second bias constant current source Ibias2, third bias constant current source Ibias3, fourth bias constant current source Ibias4, first resistor R1, second resistor R1, third resistor R3, fourth resistor R4, first capacitor C1, second capacitor C2, first transistor T1, second transistor T2, third transistor T3, fourth transistor T4, fifth transistor T5, sixth transistor T6, seventh transistor T7, eighth transistor T8, ninth transistor T8Transistor T9, tenth transistor T10, twelfth transistor T11, twelfth transistor T12, thirteenth transistor T13, power supply V _DD An external driving signal DRV.

Detailed Description

Exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present disclosure to facilitate understanding, and should be considered as merely exemplary. Accordingly, one of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

It should be appreciated that in embodiments of the present disclosure, the character "/" generally indicates that the context associated object is an "or" relationship. The terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

Under the background technology, the present disclosure provides a delay start-up circuit, which can control delay start-up time and delay turn-off time of a drive control circuit, and eliminate hidden trouble caused by uncontrollability.

The delay-start circuit is described in the following with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 1, the delay start-stop circuit, applied to a drive control circuit, may include:

A power-on delay circuit 101, a capacitor charging circuit 102, a path determination circuit 103, a reverse potential setting circuit 104, and a soft start circuit 105.

The power-on delay circuit 101 is connected to the capacitor charging circuit 102 and the path determination circuit 103, respectively, the capacitor charging circuit 102 is connected to the path determination circuit 103, the path determination circuit 103 is connected to the reverse potential setting circuit 104 and the soft start circuit 105, respectively, and the soft start circuit 105 is connected to the drive control circuit.

The power-on delay circuit 101, the path determination circuit 103, the flip-flop potential setting circuit 104 and the power supply V _DD Is connected and grounded, the capacitor charging circuit 102 is grounded, and the soft start circuit 105 and the power supply V _DD And (5) connection.

A power-up delay circuit 101 for delaying the power-up of the capacitor charging circuit 102.

The capacitor charging circuit 102 is configured to receive an external driving signal, and make a first capacitor in the capacitor charging circuit 102 enter a charging state or make the first capacitor enter a discharging state according to the external receiving signal.

The path determining circuit 103 is configured to determine whether the circuit path is an on path or an off path according to the charge/discharge state of the first capacitor, the voltage of the first capacitor, and the inversion point voltage.

A switching potential setting circuit 104 for setting a switching point voltage of the path selection circuit 103.

The soft start circuit 105 is used for smoothly starting the drive control circuit when the circuit path is an on path or smoothly stopping the drive control circuit when the circuit path is an off path.

Illustratively, after the power supply supplies power to the delay power-on/off circuit, the power-on delay circuit can delay the capacitor charging circuit to be powered on, so that the influence of output jitter of the power supply when the power supply is just supplied on the delay power-on/off circuit can be reduced.

The external driving signal may include a high level signal and a low level signal, and the first capacitor in the capacitor charging circuit is put into a charged state when the external driving signal is the low level signal, and put into a discharged state when the external driving signal is the high level signal.

The path determining circuit may determine that the path of the delay start-stop circuit is a shutdown path when the first capacitor is in a charged state and the voltage of the first capacitor is greater than the inversion point voltage; when the first capacitor is in a discharging state and the voltage of the first capacitor is smaller than the voltage of the turning point, the passage of the delay start-stop circuit is determined to be an opening passage.

By way of example, the switching-on time of the turn-on path can be set to be the charging time when the capacitor voltage of the first capacitor in the charging state is greater than the switching-on point voltage by the switching-on potential setting circuit, and the switching-off time of the turn-off path can be set to be the discharging time when the capacitor voltage of the first capacitor in the discharging state is less than the switching-on point voltage, so that the control of the delay start time and the delay stop time of the drive control circuit can be realized by controlling the magnitude of the switching-on point voltage.

The soft start circuit may gradually increase the current level of the input drive control circuit when the circuit path is an on path, thereby realizing a gentle start of the drive control circuit, and gradually decrease the current level of the input drive control circuit when the circuit path is an off path, thereby realizing a gentle stop of the drive control circuit.

It will be appreciated that the drive control circuit may be grounded for proper operation of the drive control circuit.

According to the embodiment of the disclosure, the delay start-stop circuit comprising the power-on delay circuit, the capacitor charging circuit, the path determining circuit, the overturning potential setting circuit and the soft start circuit is arranged for the drive control circuit, so that the delay start time and the delay stop time of the drive control circuit can be accurately controlled through the delay start-stop circuit.

Fig. 2 is another schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 2, the power-on delay circuit may include:

zero bias constant current source Ibias0, first bias constant current source Ibias1, first resistor R1, second capacitor C2, first triode T1, second triode T2 and third triode T3.

Input end of zero-bias constant current source Ibias0 and power supply V _DD The output end is connected with one end of the first resistor R1, one end of the first capacitor C1 and the base electrode of the third triode T3 respectively.

The other end of the first resistor R1, the other end of the first capacitor C1 and the emitter of the third triode T3 are grounded.

The emitter of the first triode T1 and the emitter of the second triode T2 are both connected with a power supply V _DD And the base electrode of the first triode T1 is connected with the base electrode of the second triode T2, and the base electrode of the first triode T1 is in short circuit with the collector electrode of the first triode T1.

The input end of the first bias constant current source Ibias1 is connected with the collector electrode of the first triode T1, and the output end of the first bias constant current source Ibias1 is connected with the collector electrode of the third triode T3.

The collector of the second triode T2 is connected with a capacitor charging circuit and a passage determining circuit.

The first triode T1 and the second triode T2 are PNP, and the third triode T3 is NPN.

Illustratively, after the power supply supplies power to the delayed start power circuit, the power-up delay circuit may begin to operate as the power supply voltage climbs. In the power-on delay circuit, the resistance value of the first resistor R1 is larger, and the first resistor R is used for providing pull-down for the base electrode of the third triode T3. Therefore, the consumption of the current by the first resistor R1 is very small and can be approximately ignored.

Once the constant current source bias is established, the constant current value output by the bias constant current source is almost unchanged even if the power supply voltage continues to rise. In other words, it can be approximately understood that the fluctuation of the power supply does not affect the operating point of the constant current source, and the output current of the constant current source can be regarded as unchanged. In this way, once the zero-bias constant current source Ibias0 is established, the second capacitor C2 is charged with a constant current, and the charging time t2 of the second capacitor C2 may satisfy the following formula (1):

in the formula (1), t2 is the charging time, C ₂ Is the capacitance value of the second capacitor, I0 is the zero-bias constantCurrent value of current source, V _t At the voltage of the second capacitor, V ₂₀ Is the initial voltage value of the second capacitor.

Illustratively, the voltage V of the second capacitor _t Defined by the base of the third transistor T3, i.e. the voltage V of the second capacitor _t The magnitude of (2) is a preset fixed value, which may be 0.7V.

Illustratively, at the beginning of the power supply, the second capacitor initial voltage value V ₀ The size of (2) is 0V.

As an example, as can be seen from the formula (1), the charging time of the second capacitor is related to the capacitance value of the second capacitor, the voltage of the second capacitor, and the current value of the zeroth bias constant current source, and is a constant value when the capacitance value of the second capacitor, the voltage of the second capacitor, and the current value of the zeroth bias constant current source are preset.

For example, when the voltage of the second capacitor is greater than a preset fixed value, the third triode T3 is turned on to ground, the first triode T1 has a current passing through, the first bias constant current source Ibias1 is started, the current of the loop is limited to be I1, the second triode T2 is also turned on, and meanwhile, since the second triode T2 is connected with the first triode T1 through a current mirror, the current value of the second triode T2 is n times I1.

For example, only after the second triode T2 is turned on, the capacitor charging circuit connected to the collector of the second triode T2 may be powered, thereby achieving delayed power-up of the capacitor charging circuit.

According to the embodiment, the delayed electrification of the capacitor charging circuit is rapidly and accurately realized by setting the electronic elements contained in the electrification delay circuit and the physical topological connection relation among the electronic elements.

Fig. 2 is another schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 2, the capacitor charging circuit may include:

the second bias constant current source Ibias2, the fourth triode T4, the second resistor R2 and the first capacitor C1.

The input end of the second bias constant current source Ibias2, one end of the second resistor R2 and one end of the first capacitor C1 are connected with the power-on delay circuit and the path determining circuit at the same time.

The output end of the second bias constant current source Ibias2 is connected with the collector electrode of the fourth triode T4, and the other end of the second resistor R2 and the other end of the first capacitor C1 are grounded.

The base of the fourth transistor T4 receives the external driving signal DRV, and the emitter of the fourth transistor T4 is grounded.

The fourth triode T4 is NPN, and the second resistor R2 has a larger resistance.

Illustratively, when the external driving signal DRV is at a low level, the fourth triode is not turned on, and the second bias constant current source Ibias2 is turned off, so that the first capacitor C1 can be charged by the power-on delay circuit, and the first capacitor C1 enters a charging state; when the external driving signal DRV is at a high level, the fourth triode is turned on, the second bias constant current source Ibias2 establishes a loop to ground, the loop current is limited to I2, and when I2 is set to be greater than the current limited by the power-on delay circuit, the first capacitor C1 can be discharged, so that the first capacitor C1 enters a discharge state.

According to the embodiment, the first capacitor in the capacitor charging circuit is enabled to enter a charging state or a discharging state according to an external receiving signal is rapidly and accurately achieved through the arrangement of the electronic elements contained in the capacitor charging circuit and the physical topological connection relation among the electronic elements.

Fig. 2 is another schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 2, the path determination circuit may include:

the third bias constant current source Ibias3, the fourth bias constant current source Ibias4, the fifth triode T5, the sixth triode T6, the seventh triode T7 and the eighth triode T8.

The input end of the third bias constant current source Ibias3 and the power supply V _DD And the output end is respectively connected with the emitter of the fifth triode T5 and the emitter of the sixth triode T6.

The base electrode of the fifth triode T5 is respectively connected with the power-on delay circuit and the capacitor charging circuit, and the collector electrode of the fifth triode T5 is grounded.

The base electrode of the sixth triode T6 is connected with the overturning potential setting circuit, and the collector electrode of the sixth triode T6 is connected with the collector electrode of the seventh triode T7.

The base of the seventh triode T7 is in short circuit with the collector of the seventh triode T7, the base of the seventh triode T7 is connected with the base of the eighth triode T8, and the emitter of the seventh triode T7 is grounded.

The input end of the fourth bias constant current source Ibias4 and the power supply V _DD And the output end is respectively connected with the collector electrode of the eighth triode T8 and the soft start circuit.

The emitter of the eighth transistor T8 is grounded.

The fifth triode T5 and the sixth triode T6 are PNP, and the seventh triode T7 and the eighth triode T8 are NPN.

For example, when the first capacitor is in a charged state, the voltage value of the first capacitor increases, the current of the fifth transistor T5 gradually decreases, the current of the sixth transistor T6 gradually increases, the bias voltage and current on the seventh transistor T7 increase with the increase of the current on the sixth transistor T6, the eighth transistor T8 is connected to the seventh transistor T7 by a current mirror, the eighth transistor T8 is turned on to ground, and the current in the eighth transistor T8 also increases with the increase of the current on the seventh transistor T7.

When the first capacitor is in a charging state and the voltage value of the first capacitor is greater than the voltage of the turning point received by the base electrode of the sixth triode T6, the current I3 output by the third bias constant current source Ibias3 can be all led to pass through the sixth triode T6 and the seventh triode T7, and since the eighth triode T8 and the seventh triode T7 are connected by a current mirror, the current of the eighth triode T8 can be limited to be m times of I3, and when the n times of I3 is set to be greater than the current I4 output by the fourth bias constant current source Ibias4, the voltage of the collector electrode of the eighth triode T8 is pulled down, so that the voltage of the soft start circuit connected with the collector electrode of the eighth triode T8 is pulled down, the driving circuit is not supported to work, and the circuit path is a turn-off path.

For example, when the first capacitor is in a discharging state, the voltage value of the first capacitor is reduced, the current of the fifth transistor T5 is gradually increased, the current of the sixth transistor T6 is gradually reduced, the bias voltage and the current on the seventh transistor T7 are reduced along with the reduction of the current on the sixth transistor T6, the eighth transistor T8 is connected to the seventh transistor T7 by a current mirror, the eighth transistor T8 is turned on to ground, and the current in the eighth transistor T8 is also reduced along with the reduction of the current on the seventh transistor T7.

When the first capacitor is in a discharging state and the voltage value of the first capacitor is smaller than the voltage of the turning point received by the base electrode of the sixth triode T6, the current I3 output by the third bias constant current source Ibias3 can be enabled to pass through the fifth triode T5 completely, the sixth triode T6 and the seventh triode T7 are not conducted, and as the eighth triode T8 and the seventh triode T7 are connected through a current mirror, the eighth triode T8 is also not conducted due to the non-conduction of the seventh triode T7, so that the current I4 output by the fourth bias constant current source Ibias4 passes through a soft start circuit, and the circuit path is an opening path.

According to the embodiment, the electronic elements contained in the circuit and the physical topological connection relation among the electronic elements are determined by setting the circuit, so that whether the circuit is an on circuit or an off circuit can be determined rapidly and accurately according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the voltage of the turning point.

Fig. 2 is another schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 2, the flip-flop potential setting circuit includes:

a third resistor R3 and a fourth resistor R4.

One end of the third resistor R3 is connected with the power supply V _DD The other end is connected to one end of the fourth resistor R4 and the path determination circuit.

The connecting end of the fourth resistor R4 and the third resistor R3 is also connected with the path determining circuit, and the other end of the fourth resistor R4 is grounded.

Illustratively, the trip point voltage may be divided by the third resistor R3 and the fourth resistor R4.

Illustratively, the roll-over point voltage may be determined by the following equation (2):

in the formula (2), R3 is the resistance of the third resistor, R4 is the resistance of the fourth resistor, and V _DD For the supply voltage, V _b Is the roll-over point voltage.

According to the embodiment, the turnover point voltage can be rapidly and accurately determined by setting the resistance values of the third resistor and the fourth resistor through setting the electronic elements contained in the turnover potential setting circuit and the physical topological connection relation among the electronic elements.

Fig. 2 is another schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 2, the soft start circuit includes:

a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, at least one thirteenth transistor T13.

The collector of the ninth triode T9 is connected with the passage determining circuit, the base of the ninth triode T9 is in short circuit with the collector of the ninth triode T9, the base of the ninth triode T9 is connected with the base of the thirteenth triode T10, and the emitter of the ninth triode T9 is grounded.

The collector of the thirteenth transistor T10 is connected to the emitter of the eleventh transistor T11, and the emitter of the tenth transistor T10 is grounded.

The base of the eleventh triode T11 is in short circuit with the collector of the eleventh triode T11, and the collector of the eleventh triode T11 is connected with the collector of the twelfth triode T12.

Emitter of twelfth triode T12 and power supply V _DD The base of the twelfth triode T12 is connected with the collector of the twelfth triode T12 in a short circuit mode, and the base of the twelfth triode T12 is connected with the base of at least one thirteenth triode T13.

Emitter of at least one thirteenth transistor T13 and power supply V _DD And the collector electrode of the thirteenth triode T13 is connected with the drive control circuit.

The ninth triode T9, the tenth triode T10 and the eleventh triode T11 are NPN transistors, and the twelfth triode T12 and the thirteenth triode T13 are PNP transistors.

Illustratively, when the circuit path determined by the path determining circuit is an off path, the voltage at the collector of the ninth transistor T9 gradually decreases, and the current through the ninth transistor T9 becomes smaller and smaller, resulting in the current through the thirteenth transistor T10 connected to the current mirror of the ninth transistor T9 becoming smaller and smaller, and the current through the eleventh transistor T11 and the twelfth transistor T12 becomes smaller and smaller, resulting in the base of the twelfth transistor T12 providing the base of the thirteenth transistor T13 with a smaller and smaller current. Until the ninth triode T9 is not conducted due to the voltage reduction of the collector electrode, the thirteenth triode T10 is not conducted, the eleventh triode T11 and the twelfth triode T12 are not conducted, so that the base electrode of the twelfth triode T12 cannot supply current to the base electrode of the thirteenth triode T13, the thirteenth triode T13 is not conducted, the driving control circuit does not have current input, and the driving control circuit stops working.

Illustratively, when the circuit path determined by the path determining circuit is an open path, the voltage at the collector of the ninth transistor T9 gradually increases, and the current through the ninth transistor T9 increases, resulting in an increasing current through the thirteenth transistor T10 connected to the current mirror of the ninth transistor T9, and the current through the eleventh transistor T11 and the twelfth transistor T12 increases, resulting in an increasing current provided by the base of the twelfth transistor T12 to the base of the thirteenth transistor T13. When the current passing through the thirteenth transistor T10 is maximum until the current passing through the ninth transistor T9 is maximum, the current passing through the eleventh transistor T11 and the twelfth transistor T12 is maximum, so that the current provided by the base electrode of the twelfth transistor T12 for the base electrode of the thirteenth transistor T13 is maximum, and the output current of the collector electrode of the thirteenth transistor T13 is maximum, thereby enabling the driving circuit to work normally.

The number of thirteenth transistors may be one or more, for example, depending on the requirements of the drive control circuit. When the thirteenth triode comprises a plurality of transistors, the emitter of each thirteenth triode is connected with the power supply, the base of each thirteenth triode is connected with the base of the twelfth triode, and the collector of each thirteenth triode is connected with the drive control circuit.

In this embodiment, by setting the electronic components included in the soft start circuit and the physical topological connection relationship between the electronic components, the drive control circuit can be started smoothly when the circuit path is an open path, or stopped smoothly when the circuit path is a close path.

The foregoing embodiments describe a delay-start circuit provided by embodiments of the present disclosure, and the delay-start circuit is described in more detail below by way of a specific example with reference to fig. 2. Fig. 2 is another schematic structural diagram of a delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 2, the delay start circuit includes:

zero bias constant current source Ibias0, first bias constant current source Ibias1, second bias constant current source Ibias2, third bias constant current source Ibias3, fourth bias constant current source Ibias4, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, first capacitor C1, second capacitor C2, first transistor T1, second transistor T2, third transistor T3, fourth transistor T4, fifth transistor T5, sixth transistor T6, seventh transistor T7, eighth transistor T8, ninth transistor T9, tenth transistor T10, eleventh transistor T11, twelfth transistor T12, at least one thirteenth transistor T13.

The input end of the zero bias constant current source Ibias0 is connected with a power supply, and the output end of the zero bias constant current source Ibias0 is respectively connected with one end of the first resistor R1, one end of the first capacitor C1 and the base electrode of the third triode T3.

The emitter of the first triode T1 and the emitter of the second triode T2 are connected with a power supply, the base electrode of the first triode T1 is connected with the base electrode of the second triode T2, and the base electrode of the first triode T1 is in short circuit with the collector electrode of the first triode T1.

The collector of the second triode T2 is connected with the input end of the second bias constant current source Ibias2, one end of the second resistor R2, one end of the first capacitor C1 and the base of the fifth triode T5.

The base of the fourth triode T4 receives the external driving signal, and the emitter of the fourth triode T4 is grounded.

The input end of the third bias constant current source Ibias3 is connected with a power supply, and the output end of the third bias constant current source Ibias3 is respectively connected with the emitter of the fifth triode T5 and the emitter of the sixth triode T6.

The collector of the fifth transistor T5 is grounded.

The base of the sixth triode T6 is connected with one end of the third resistor R3 and one end of the fourth resistor R4, and the collector of the sixth triode T6 is connected with the collector of the seventh triode T7.

The other end of the third resistor R3 is connected with a power supply, and the other end of the fourth resistor R4 is grounded.

The input end of the fourth bias constant current source Ibias4 is connected with a power supply, and the output end of the fourth bias constant current source Ibias4 is respectively connected with the collector electrode of the eighth triode T8 and the collector electrode of the ninth triode T9.

The emitter of the eighth transistor T8 is grounded.

The base of the ninth triode T9 is in short circuit with the collector of the ninth triode T9, the base of the ninth triode T9 is connected with the base of the thirteenth triode T10, and the emitter of the ninth triode T9 is grounded.

The emitter of the twelfth triode T12 is connected with a power supply, the base electrode of the twelfth triode T12 is in short circuit with the collector electrode of the twelfth triode T12, and the base electrode of the twelfth triode T12 is connected with the base electrode of at least one thirteenth triode T13.

The emitter of at least one thirteenth triode T13 is connected with a power supply, and the collector of at least one thirteenth triode T13 is connected with a drive control circuit.

For example, the delayed start time may be approximately the discharge time for the voltage of the first capacitor to decrease to the inversion point voltage, i.e., the delayed start time may be approximately described by the following equation (3):

in the formula (3), t1 _open In order to delay the starting time, C1 is the capacitance value of the first capacitor, vb is the voltage of the turning point, n is the proportionality coefficient of the first triode and the second triode current source, R3 is the resistance value of the third resistor, I1 is the current value of the first bias constant current source, and I2 is the current value of the second bias constant current source.

As an example, as can be seen from the formula (3), the delay start time is related to the capacitance value of the first capacitor, the current value of the first bias constant current source, the current mirror proportionality coefficient n, the resistance value of the third resistor, and the inversion point voltage, and is a constant value when the capacitance value of the first capacitor, the current value of the first bias constant current source, the current mirror proportionality coefficient, the resistance value of the third resistor, and the inversion point voltage are preset.

For example, the delayed off time may be approximately the charging time for the voltage of the first capacitor to rise to the inversion point voltage, i.e., the delayed off time may be approximately described by the following equation (4):

in the formula (4), t1 _close For delaying the turn-off time, C1 is the capacitance value of the first capacitor, vb is the voltage of the turning point, n is the proportionality coefficient of the current sources of the first triode and the second triode, V ₁₀ The initial voltage of the first capacitor, I1, is the current value of the first bias constant current source.

As an example, as can be seen from the formula (4), the time-lapse shutdown time is related to the capacitance value of the first capacitor, the current value of the first bias constant current source, the current mirror ratio coefficient, the initial voltage of the first capacitor, and the inversion point voltage, and is a constant value when the capacitance value of the first capacitor, the current value of the first bias constant current source, the current mirror ratio coefficient, the initial voltage of the first capacitor, and the inversion point voltage are preset.

Illustratively, as can be seen from the examples of the formula (3) and the formula (4), the present embodiment can change the delay on time and the delay off time by adjusting the inherent properties (such as capacitance value, resistance value, etc.) of each electronic element in the delay on-off circuit.

For example, reference may be made to the foregoing embodiments for other specific implementation and beneficial effects of the present embodiment, which are not described herein.

In an exemplary embodiment, the disclosed embodiments also provide another delayed start-stop circuit.

Fig. 3 is a schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 3, the circuit includes:

a capacitor charging circuit 301, a path determining circuit 302, a reverse potential setting circuit 303, and a soft start circuit 304;

the capacitor charging circuit 301 is connected to the path determination circuit 302, the path determination circuit 302 is connected to the reverse potential setting circuit 303 and the soft start circuit 304, respectively, and the soft start circuit 304 is connected to the drive control circuit;

the capacitor charging circuit 301, the path determining circuit 302 and the flip potential setting circuit 303 are all connected with a power supply and grounded, and the soft start circuit 304 is connected with the power supply;

the capacitor charging circuit 301 is configured to receive an external driving signal, and make a first capacitor in the capacitor charging circuit 301 enter a charging state or make the first capacitor enter a discharging state according to the external receiving signal;

the path determining circuit 302 is configured to determine, according to the charge and discharge states of the first capacitor, whether the path of the circuit is an on path or an off path according to the voltage of the first capacitor and the voltage of the inversion point;

A switching potential setting circuit 303 for setting a switching point voltage of the path selection circuit 302;

the soft start circuit 304 is used for smoothly starting the drive control circuit when the circuit path is an on path or smoothly stopping the drive control circuit when the circuit path is an off path.

The specific implementation and the beneficial effects of the embodiments of the present disclosure may refer to the foregoing embodiments, and are not described herein in detail.

Fig. 4 is another schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 4, the capacitor charging circuit includes:

the first bias constant current source Ibias1, the second bias constant current source Ibias2, the second triode T2, the fourth triode T4, the second resistor R2 and the first capacitor C1;

the emitter of the second triode T2 is connected with a power supply, the base of the second triode T2 is connected with the input end of the first bias constant current source Ibias1, and the collector of the second triode T2 is respectively connected with the input end of the second bias constant current source Ibias2, one end of the second resistor R2, one end of the first capacitor C1 and a path determining circuit;

the output end of the first bias constant current source Ibias1 is grounded, the output end of the second bias constant current source Ibias2 is connected with the collector electrode of the fourth triode T4, and the other end of the second resistor R2 and the other end of the first capacitor C1 are grounded;

For example, after the power supply supplies power to the capacitor charging circuit, the second triode T2 is turned on, the first bias constant current source Ibias1 is turned on to the ground, and when the external driving signal DRV is at a low level, the fourth triode is turned off, and the second bias constant current source Ibias2 is turned off, so that the second triode T2 can charge the first capacitor C1, and the first capacitor C1 enters a charging state; when the external driving signal DRV is at a high level, the fourth transistor is turned on, the second bias constant current source Ibias2 establishes a loop to ground, the loop current is limited to I2, and when I2 is set to be greater than the current of the second transistor T2 (i.e., I2 is greater than the current of the second transistor T2 limited by the first bias constant current source Ibias 1), the first capacitor C1 can be discharged, so that the first capacitor C1 enters a discharge state.

Other specific implementations and beneficial effects of the embodiment of the present disclosure may refer to the foregoing embodiments, and are not described herein.

Fig. 4 is another schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 4, the path determination circuit includes: a third bias constant current source Ibias3, a fourth bias constant current source Ibias4, a fifth triode T5, a sixth triode T6, a seventh triode T7 and an eighth triode T8;

The input end of the third bias constant current source Ibias3 is connected with a power supply, and the output end of the third bias constant current source Ibias3 is respectively connected with the emitter of the fifth triode T5 and the emitter of the sixth triode T6;

the base electrode of the fifth triode T5 is connected with the capacitor charging circuit, and the collector electrode of the fifth triode T5 is grounded;

the base electrode of the sixth triode T6 is connected with the overturning potential setting circuit, and the collector electrode of the sixth triode T6 is connected with the collector electrode of the seventh triode T7;

the base electrode of the seventh triode T7 is in short circuit with the collector electrode of the seventh triode T7, the base electrode of the seventh triode T7 is connected with the base electrode of the eighth triode T8, and the emitter electrode of the seventh triode T7 is grounded;

the input end of the fourth bias constant current source Ibias4 is connected with a power supply, and the output end of the fourth bias constant current source Ibias4 is respectively connected with the collector electrode of the eighth triode T8 and the soft start circuit;

the emitter of the eighth transistor T8 is grounded.

The specific implementation and the beneficial effects of the embodiment of the present disclosure may refer to the foregoing embodiments, and are not described herein in detail.

Fig. 4 is another schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 4, the flip-flop potential setting circuit includes: a third resistor R3 and a fourth resistor R4;

one end of the third resistor R3 is connected with a power supply, and the other end of the third resistor R4 is connected with one end of the fourth resistor R4 and the path determining circuit;

Fig. 4 is another schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 4, the soft start circuit includes: a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, at least one thirteenth transistor T13;

the collector of the ninth triode T9 is connected with the passage determining circuit, the base of the ninth triode T9 is in short circuit with the collector of the ninth triode T9, the base of the ninth triode T9 is connected with the base of the thirteenth triode T10, and the emitter of the ninth triode T9 is grounded;

the collector of the thirteenth transistor T10 is connected with the emitter of the eleventh transistor T11, and the emitter of the tenth transistor T10 is grounded;

the base electrode of the eleventh triode T11 is in short circuit with the collector electrode of the eleventh triode T11, and the collector electrode of the eleventh triode T11 is connected with the collector electrode of the twelfth triode T12;

the emitter of the twelfth triode T12 is connected with a power supply, the base electrode of the twelfth triode T12 is in short circuit with the collector electrode of the twelfth triode T12, and the base electrode of the twelfth triode T12 is connected with the base electrode of at least one thirteenth triode T13;

Fig. 4 is another schematic structural diagram of another delay start-stop circuit according to an embodiment of the disclosure. As shown in fig. 4, the delay start circuit includes:

the first bias constant current source Ibias1, the second bias constant current source Ibias2, the second triode T2, the fourth triode T4, the second resistor R2, the first capacitor C1, the third bias constant current source Ibias3, the fourth bias constant current source Ibias4, the fifth triode T5, the sixth triode T6, the seventh triode T7, the eighth triode T8, the third resistor R3, the fourth resistor R4, the ninth triode T9, the tenth triode T10, the eleventh triode T11, the twelfth triode T12 and the at least one thirteenth triode T13.

The emitter of the second triode T2 is connected with a power supply, the base electrode of the second triode T2 is connected with the input end of the first bias constant current source Ibias1, and the collector electrode of the second triode T2 is respectively connected with the input end of the second bias constant current source Ibias2, one end of the second resistor R2, one end of the first capacitor C1 and the base electrode of the fifth triode T5.

The output end of the first bias constant current source Ibias1 is grounded, the output end of the second bias constant current source Ibias2 is connected with the collector electrode of the fourth triode T4, and the other end of the second resistor R2 and the other end of the first capacitor C1 are grounded.

The collector of the fifth transistor T5 is grounded.

The emitter of the eighth transistor T8 is grounded.

In an exemplary embodiment, the embodiment of the disclosure further provides a delayed start-stop method.

The execution body of the delay start-stop method provided in this embodiment may be the delay start-stop circuit in the embodiment of fig. 1.

The delayed start-stop method is described in the following with reference to the accompanying drawings.

Fig. 5 is a flow chart of a delayed start-stop method according to an embodiment of the disclosure. The delay start-stop method is applied to a delay start-stop circuit, and the delay start-stop circuit comprises a power-on delay circuit, a capacitor charging circuit, a path determining circuit, a turnover potential setting circuit and a soft start circuit. As shown in fig. 5, the method may include:

s501, the capacitor charging circuit is powered on in a delayed manner through the power-on delay circuit.

S502, an external driving signal is sent to the capacitor charging circuit, and the capacitor charging circuit enables the first capacitor in the capacitor charging circuit to enter a charging state or enables the first capacitor to enter a discharging state according to the external driving signal.

S503, determining an on-path or off-path by a path determining circuit according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the turning point voltage set by the turning potential setting circuit.

S504, the driving control circuit is started gradually according to the opening path through the soft start circuit, or stopped gradually according to the closing path.

In an exemplary embodiment, the disclosed embodiments also provide another delayed start-stop method.

The execution body of the delay start-stop method provided in this embodiment may be another delay start-stop circuit in the embodiment of fig. 3.

Fig. 6 is a flow chart of a delayed start-stop method according to an embodiment of the disclosure. The delay start-stop method is applied to a delay start-stop circuit, and the delay start-stop circuit comprises a capacitor charging circuit, a circuit determining circuit, a turnover potential setting circuit and a soft start circuit. As shown in fig. 6, the method may include:

s601, an external driving signal is sent to the capacitor charging circuit, and the capacitor charging circuit enables a first capacitor in the capacitor charging circuit to enter a charging state or enables the first capacitor to enter a discharging state according to the external driving signal.

S602, determining an on-path or off-path by a path determining circuit according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the turning point voltage set by the turning potential setting circuit.

S603, the driving control circuit is started gently according to the opening path through the soft start circuit, or stopped gently according to the closing path.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel, sequentially, or in a different order, provided that the desired results of the disclosed aspects are achieved, and are not limited herein.

The above detailed description should not be taken as limiting the scope of the present disclosure. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present disclosure are intended to be included within the scope of the present disclosure.

Claims

1. A delayed start-stop circuit for use in a drive control circuit, the circuit comprising:

the device comprises a power-on delay circuit, a capacitor charging circuit, a path determining circuit, a flip potential setting circuit and a soft start circuit;

the power-on delay circuit is respectively connected with the capacitor charging circuit and the path determining circuit, the capacitor charging circuit is connected with the path determining circuit, the path determining circuit is respectively connected with the overturning potential setting circuit and the soft starting circuit, and the soft starting circuit is connected with the driving control circuit;

The power-on delay circuit, the path determining circuit and the overturning potential setting circuit are all connected with a power supply and grounded, the capacitor charging circuit is grounded, and the soft start circuit is connected with the power supply;

the power-on delay circuit is used for delaying the capacitor charging circuit to power on;

the capacitor charging circuit is used for receiving an external driving signal, and enabling a first capacitor in the capacitor charging circuit to enter a charging state or enabling the first capacitor to enter a discharging state according to the external receiving signal;

the path determining circuit is used for determining whether the path of the circuit is an on path or an off path according to the charge and discharge states of the first capacitor, the voltage of the first capacitor and the voltage of the turning point;

the switching potential setting circuit is used for setting the switching point voltage of the access selection circuit;

the soft start circuit is used for gently starting the drive control circuit when the circuit path is the opening path or gently stopping the drive control circuit when the circuit path is the closing path.

2. The delay start-stop circuit of claim 1, wherein the power-up delay circuit comprises: the zero bias constant current source, the first resistor, the second capacitor, the first triode, the second triode and the third triode;

The input end of the zeroth bias constant current source is connected with a power supply, and the output end of the zeroth bias constant current source is respectively connected with one end of the first resistor, one end of the first capacitor and the base electrode of the third triode;

the other end of the first resistor, the other end of the first capacitor and the emitter of the third triode are grounded;

the emitter of the first triode and the emitter of the second triode are connected with a power supply, the base electrode of the first triode is connected with the base electrode of the second triode, and the base electrode of the first triode is in short circuit with the collector electrode of the first triode;

the input end of the first bias constant current source is connected with the collector electrode of the first triode, and the output end of the first bias constant current source is connected with the collector electrode of the third triode;

and the collector electrode of the second triode is connected with the capacitor charging circuit and the path determining circuit.

3. The delayed start-stop circuit of claim 1, wherein said capacitor charging circuit comprises:

the second bias constant current source, the fourth triode, the second resistor and the first capacitor;

the input end of the second bias constant current source, one end of the second resistor and one end of the first capacitor are connected with the power-on delay circuit and the path determining circuit at the same time;

The output end of the second bias constant current source is connected with the collector electrode of the fourth triode, and the other end of the second resistor and the other end of the first capacitor are grounded;

and the base electrode of the fourth triode receives the external driving signal, and the emitter electrode of the fourth triode is grounded.

4. The delayed start-stop circuit of claim 1, wherein said path determination circuit comprises: a third bias constant current source, a fourth bias constant current source, a fifth triode, a sixth triode, a seventh triode and an eighth triode;

the input end of the third bias constant current source is connected with a power supply, and the output end of the third bias constant current source is respectively connected with the emitter of the fifth triode and the emitter of the sixth triode;

the base electrode of the fifth triode is respectively connected with the power-on delay circuit and the capacitor charging circuit, and the collector electrode of the fifth triode is grounded;

the base electrode of the sixth triode is connected with the overturning potential setting circuit, and the collector electrode of the sixth triode is connected with the collector electrode of the seventh triode;

the base electrode of the seventh triode is in short circuit with the collector electrode of the seventh triode, the base electrode of the seventh triode is connected with the base electrode of the eighth triode, and the emitter electrode of the seventh triode is grounded;

The input end of the fourth bias constant current source is connected with a power supply, and the output end of the fourth bias constant current source is respectively connected with the collector electrode of the eighth triode and the soft start circuit;

and the emitter electrode of the eighth triode is grounded.

5. The delayed start-stop circuit of claim 1, wherein said flip-flop potential setting circuit comprises: a third resistor and a fourth resistor;

one end of the third resistor is connected with a power supply, and the other end of the third resistor is connected with one end of the fourth resistor and the path determining circuit;

the connecting end of the fourth resistor and the third resistor is also connected with the path determining circuit, and the other end of the fourth resistor is grounded.

6. The delayed start-stop circuit of claim 1, wherein said soft start circuit comprises: a ninth triode, a thirteenth triode, an eleventh triode, a twelfth triode and at least one thirteenth triode;

the collector of the ninth triode is connected with the channel determining circuit, the base of the ninth triode is in short circuit with the collector of the ninth triode, the base of the ninth triode is connected with the base of the thirteenth triode, and the emitter of the ninth triode is grounded;

The collector of the thirteenth transistor is connected with the emitter of the eleventh transistor, and the emitter of the tenth transistor is grounded;

the base electrode of the eleventh triode is in short circuit with the collector electrode of the eleventh triode, and the collector electrode of the eleventh triode is connected with the collector electrode of the twelfth triode;

the emitter of the twelfth triode is connected with a power supply, the base of the twelfth triode is in short circuit with the collector of the twelfth triode, and the base of the twelfth triode is connected with the base of the at least one thirteenth triode;

the emitter of the at least one thirteenth triode is connected with a power supply, and the collector of the at least one thirteenth triode is connected with the drive control circuit.

7. A delayed start-stop circuit for use in a drive control circuit, the circuit comprising:

the circuit comprises a capacitor charging circuit, a path determining circuit, a flip potential setting circuit and a soft start circuit;

the capacitor charging circuit is connected with the path determining circuit, the path determining circuit is respectively connected with the overturning potential setting circuit and the soft start circuit, and the soft start circuit is connected with the driving control circuit;

The capacitor charging circuit, the path determining circuit and the overturning potential setting circuit are all connected with a power supply and grounded, and the soft start circuit is connected with the power supply;

8. The delayed start-stop circuit of claim 7, wherein said capacitor charging circuit comprises:

the first bias constant current source, the second triode, the fourth triode, the second resistor and the first capacitor;

The emitter of the second triode is connected with a power supply, the base of the second triode is connected with the input end of the first bias constant current source, and the collector of the second triode is respectively connected with the input end of the second bias constant current source, one end of the second resistor, one end of the first capacitor and the path determining circuit;

the output end of the first bias constant current source is grounded, the output end of the second bias constant current source is connected with the collector electrode of the fourth triode, and the other end of the second resistor and the other end of the first capacitor are grounded;

9. The delayed start-stop circuit of claim 8, wherein said path determination circuit comprises: a third bias constant current source, a fourth bias constant current source, a fifth triode, a sixth triode, a seventh triode and an eighth triode;

the base electrode of the fifth triode is connected with the capacitor charging circuit, and the collector electrode of the fifth triode is grounded;

and the emitter electrode of the eighth triode is grounded.

10. The delayed start-stop circuit of claim 8, wherein said flip-flop potential setting circuit comprises: a third resistor and a fourth resistor;

11. The delayed start-stop circuit of claim 8, wherein said soft start circuit comprises: a ninth triode, a thirteenth triode, an eleventh triode, a twelfth triode and at least one thirteenth triode;

12. A time delay start-stop method, which is characterized in that the method is applied to the time delay start-stop circuit of any one of claims 1-6, wherein the time delay start-stop circuit comprises a power-on time delay circuit, a capacitor charging circuit, a path determining circuit, a turnover potential setting circuit and a soft start circuit; the method comprises the following steps:

Delaying power-up of the capacitor charging circuit through the power-up delay circuit;

an external driving signal is sent to the capacitor charging circuit, and a first capacitor in the capacitor charging circuit is enabled to enter a charging state or a discharging state according to the external driving signal through the capacitor charging circuit;

determining an on-path or off-path by the path determining circuit according to the charge-discharge state of the first capacitor, the voltage of the first capacitor and the turning point voltage set by the turning potential setting circuit;

and smoothly starting the drive control circuit according to the opening passage through the soft start circuit, or smoothly stopping the drive control circuit according to the closing passage.

13. A time delay start-stop method, which is characterized in that the method is applied to the time delay start-stop circuit of any one of claims 7-11, and the time delay start-stop circuit comprises a capacitor charging circuit, a path determining circuit, a turnover potential setting circuit and a soft start circuit; the method comprises the following steps: