CN117706187B - Inductor current sampling circuit and inductor current sampling method of half-bridge driving chip - Google Patents
Inductor current sampling circuit and inductor current sampling method of half-bridge driving chip Download PDFInfo
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Abstract
The application discloses an inductance current sampling circuit and an inductance current sampling method of a half-bridge driving chip, and belongs to the technical field of circuits. In the inductance current sampling circuit, when a first switching tube is conducted and a second switching tube is disconnected, a first voltage sampling module samples voltages at two ends of the first switching tube and outputs the sampled voltages to a first gain module; the first gain module converts the voltage into current and outputs the current to the sampling resistor; the controller generates inductance current information in a rising stage according to the voltage on the sampling resistor and a preset reference voltage; when the second switching tube is turned on and the first switching tube is turned off, the second voltage sampling module samples voltages at two ends of the second switching tube and outputs the sampled voltages to the second gain module; the second gain module converts the voltage into current and outputs the current to the sampling resistor; the controller generates inductor current information in a falling stage according to the voltage on the sampling resistor and a preset reference voltage. The method can reduce circuit loss, improve system conversion efficiency, reduce system cost and volume, improve anti-interference capability of current sampling, and improve sampling precision and sampling speed.
Description
Technical Field
The application relates to the technical field of circuits, in particular to an inductance current sampling circuit and an inductance current sampling method of a half-bridge driving chip.
Background
The common inductance current sampling circuit of the half-bridge driving chip is shown in fig. 1, the topology of the inductance current sampling circuit is a Buck converter, and the controller generates an upper tube switch driving signal PWMH and a lower tube switch driving signal PWML to be input into the half-bridge driving chip, and the driving of the half-bridge driving chip is realized by controlling the on and off of the upper and lower switch tubes.
If the inductance current in the Buck converter needs to be sampled, devices such as an external sampling resistor, an operational amplifier and the like are needed, and the sampled inductance current is transmitted to the controller so that the controller can control and protect the output current.
However, the external resistor can reduce the conversion efficiency of the system, the external operational amplifier can increase the cost and the volume of the system, and the external device is easily affected by line noise, so that the sampling precision is poor, and the sampling speed is low.
Disclosure of Invention
The application provides an inductive current sampling circuit and an inductive current sampling method of a half-bridge driving chip, which are used for solving the problems that an external device reduces the system conversion rate, increases the system cost and volume, has poor sampling precision and has low sampling speed. The technical scheme is as follows:
according to a first aspect of the present application, there is provided an inductor current sampling circuit of a half-bridge driving chip, the inductor current sampling circuit comprising: the device comprises a half-bridge driving chip, a Buck converter, a sampling resistor and a controller;
the half-bridge driving chip comprises a first voltage sampling module and a first gain module which are connected in series, and a second voltage sampling module and a second gain module which are connected in series, wherein the first voltage sampling module is connected with a first switching tube in the Buck converter, the second voltage sampling module is connected with a second switching tube in the Buck converter, the first switching tube and the second switching tube are respectively connected with an inductor in the Buck converter in series, the first gain module and the second gain module are respectively connected with a sampling resistor, and the controller is connected with the sampling resistor;
when the first switching tube is switched on and the second switching tube is switched off, the first voltage sampling module is used for sampling voltages at two ends of the first switching tube and outputting the sampled voltages to the first gain module; the first gain module is used for converting the voltage into current and outputting the current to the sampling resistor; the controller is used for generating inductance current information in a rising stage according to the voltage on the sampling resistor and a preset reference voltage;
when the second switching tube is switched on and the first switching tube is switched off, the second voltage sampling module is used for sampling voltages at two ends of the second switching tube and outputting the sampled voltages to the second gain module; the second gain module is used for converting the voltage into current and outputting the current to the sampling resistor; the controller is used for generating inductance current information in a falling stage according to the voltage on the sampling resistor and a preset reference voltage.
In one possible implementation, the on-resistance ratio of the first switching tube and the second switching tube is n: m, the gain ratio of the first gain module and the second gain module is m: n.
In one possible implementation manner, the half-bridge driving chip further comprises a voltage division detection pin, wherein the voltage division detection pin is connected with a voltage division resistance module,
the half-bridge driving chip is used for acquiring the voltage dividing resistance ratio of the voltage dividing resistance module according to the voltage dividing detection pin, and setting the gain ratio according to the voltage dividing resistance ratio.
In one possible implementation, the on-resistance ratio of the first switching tube and the second switching tube is related to the steady state transformation ratio of the Buck converter.
In one possible implementation manner, a VIN pin, a SW pin and a GND pin are disposed in the half-bridge driving chip, the VIN pin is connected to the first end of the first voltage sampling module and the drain end of the first switching tube, the SW pin is connected to the second end of the first voltage sampling module, the first end of the second voltage sampling module and the source end of the first switching tube, and the GND pin is connected to the second end of the second voltage sampling module and the source end of the second switching tube.
In one possible implementation, the Buck converter further includes a capacitor;
the drain end of the first switching tube is also connected with an input power supply VIN, the source end of the first switching tube is also connected with the drain end of the second switching tube and the first end of the inductor respectively, the second end of the inductor is connected with the first end of the capacitor, and the second end of the capacitor and the source end of the second switching tube are grounded.
In one possible implementation manner, the controller is provided with an ADC pin and a reference voltage output pin, and the half-bridge driving chip is provided with an ISNS pin and a VREFIN pin;
the ISNS pin is respectively connected with the first end of the sampling resistor and the ADC pin, and the VREFIN pin is respectively connected with the second end of the sampling resistor and the reference voltage output pin.
In one possible implementation, the first gain module and the second gain module are respectively connected to the ISNS pin.
In one possible implementation, when the voltage across the sampling resistor is greater than the reference voltage, the current direction of the inductor current flows from the switching tube to the inductor;
when the voltage on the sampling resistor is smaller than the reference voltage, the current direction of the inductance current flows from the inductance to the switching tube.
According to a second aspect of the present application, there is provided an inductor current sampling method of a half-bridge driver chip, for use in an inductor current sampling circuit of a half-bridge driver chip as described above, the method comprising:
the half-bridge driving chip controls the on-off of the first switching tube and the second switching tube;
when the first switching tube is conducted and the second switching tube is disconnected, the first voltage sampling module samples voltages at two ends of the first switching tube and outputs the sampled voltages to the first gain module; the first gain module converts the voltage into current and outputs the current to the sampling resistor; the controller generates inductance current information in an ascending stage according to the voltage on the sampling resistor and a preset reference voltage;
when the second switching tube is conducted and the first switching tube is disconnected, the second voltage sampling module samples voltages at two ends of the second switching tube and outputs the sampled voltages to the second gain module; the second gain module converts the voltage into current and outputs the current to the sampling resistor; and the controller generates inductor current information in a falling stage according to the voltage on the sampling resistor and a preset reference voltage.
The beneficial effects of the technical scheme that this application provided include at least:
when the first switching tube is conducted, the inductor current is detected through the VIN pin, the SW pin and a first voltage sampling module and a first gain module which are arranged in the half-bridge driving chip, when the second switching tube is conducted, the inductor current is detected through the SW pin, the GND pin and a second voltage sampling module and a second gain module which are arranged in the half-bridge driving chip, and the inductor current information can be sampled without an external sampling resistor and an operational amplifier, so that the circuit loss can be reduced, the system conversion efficiency can be improved, the system cost and the volume can be reduced, the anti-interference capability of current sampling can be improved, and the sampling precision and the sampling speed can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of an inductor current sampling circuit of a half-bridge driving chip according to the related art;
fig. 2 is a schematic structural diagram of an inductor current sampling circuit of a half-bridge driving chip according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an inductor current sampling circuit of a half-bridge driving chip according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of inductor current provided by one embodiment of the present application;
fig. 5 is a schematic structural diagram of an inductor current sampling circuit of a half-bridge driving chip according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an inductor current sampling circuit of a half-bridge driving chip according to an embodiment of the present disclosure;
fig. 7 is a flowchart of an inductor current sampling method according to an embodiment of the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
As shown in fig. 2 and 3, one embodiment of the present application provides an inductor current sampling circuit of a half-bridge driving chip, the inductor current sampling circuit comprising: the device comprises a half-bridge driving chip, a Buck converter, a sampling resistor and a controller.
The Buck converter is internally provided with a first switching tube (Q1), a second switching tube (Q2) and an inductor (L), and the first switching tube (Q1) and the second switching tube (Q2) are respectively connected with the inductor (L) in series.
The half-bridge driving chip is internally provided with a first voltage sampling module (Se 1) and a first gain module (A1) which are connected in series, and is also internally provided with a second voltage sampling module (Se 2) and a second gain module (A2) which are connected in series. The first voltage sampling module (Se 1) is connected with the first switching tube (Q1) and is used for sampling the voltage on the first switching tube (Q1). The second voltage sampling module (Se 2) is connected with the second switching tube (Q2) and is used for sampling the voltage on the second switching tube (Q2). The first gain module (A1) and the second gain module (A2) are respectively connected with a sampling Resistor (RISNS) so as to convert the sampled voltage into current and output the current to the sampling Resistor (RISNS).
A Controller (Controller) is connected to the sampling Resistor (RISNS) to sample the voltage of the sampling Resistor (RISNS) and to generate inductor current information based on the sampled voltage.
Fig. 1 shows a related art half-bridge driver chip and Controller (Controller), fig. 2 shows a half-bridge driver chip and Controller (Controller) in this embodiment, and it is known that in this embodiment, a VIN pin, a SW pin, an ISNS pin and a VREFIN pin are added to the half-bridge driver chip, and a reference voltage output pin (not labeled in fig. 2 and 3) is added to the Controller (Controller). The VIN pin is an input end of the half-bridge driving chip, the SW pin is a midpoint of the half-bridge driving chip, the ISNS pin is a connection end of a sampling Resistor (RISNS), the VREFIN pin is a connection end of a reference Voltage (VREFIN), and the reference voltage output pin is an output end of a preset reference Voltage (VREFIN).
The half-bridge driving chip is also provided with a GND pin, the VIN pin is respectively connected with the first end of the first voltage sampling module (Se 1) and the drain end of the first switching tube (Q1), the SW pin is respectively connected with the second end of the first voltage sampling module (Se 1), the first end of the second voltage sampling module (Se 2) and the source end of the first switching tube (Q1), and the GND pin is respectively connected with the second end of the second voltage sampling module (Se 2) and the source end of the second switching tube (Q2). Thus, voltage detection can be performed on the input terminal, the midpoint and the ground terminal of the half-bridge driving chip through the VIN pin, the SW pin and the GND pin.
The Controller (Controller) is also provided with an ADC pin, the ISNS pin is respectively connected with the first end of the sampling Resistor (RISNS) and the ADC pin, the VREFIN pin is respectively connected with the second end of the sampling Resistor (RISNS) and the reference voltage output pin, and the first gain module (A1) and the second gain module (A2) are respectively connected with the ISNS pin. In this way, the voltage across the sampling resistor and the magnitude of the reference Voltage (VREFIN) can be obtained in order to generate inductor current information.
A TIN pin and a BIN pin are also arranged in the half-bridge driving chip, a PWMH pin and a PWML pin are also arranged in the Controller (Controller), the PWMH pin is connected with the TIN pin, and the PWML pin is connected with the BIN pin. The Controller (Controller) can control the half-bridge driving chip through the PWMH pin and the PWML pin so that the half-bridge driving chip drives the first switching tube (Q1) and the second switching tube (Q2) to be switched on and off. That is, the first switching tube (Q1) can be controlled to be turned on and the second switching tube (Q2) can be controlled to be turned off; alternatively, the second switching transistor (Q2) may be controlled to be on and the first switching transistor (Q1) may be controlled to be off.
VCC pin, BOOT pin, TGP pin, TGN pin, BGP pin and BGN pin are also arranged in the half-bridge driving chip. The VCC pin half-bridge drives the voltage input of the chip. The BOOT pin is connected with a first end of the bootstrap capacitor, and a second end of the bootstrap capacitor is connected with the SW pin. The TGP pin is connected with the first end of the first resistor, the TGN pin is connected with the first end of the second resistor, and the second end of the first resistor and the second end of the second resistor are respectively connected with the gate end of the first switch tube (Q1). The BGP pin is connected with the first end of the third resistor, the BGN pin is connected with the first end of the fourth resistor, and the second end of the third resistor and the second end of the fourth resistor are respectively connected with the gate end of the second switch tube (Q2).
The Buck converter further comprises a capacitor (C); the drain end of the first switching tube (Q1) is also connected with an input power supply VIN; the source end of the first switching tube (Q1) is also connected with the drain end of the second switching tube (Q2) and the first end of the inductor (L) respectively, the second end of the inductor (L) is connected with the first end of the capacitor (C), and the second end of the capacitor (C) and the source end of the second switching tube (Q2) are grounded. The Load is across the capacitor (C).
That is, the drain terminal of the first switching tube (Q1), the VIN pin and the power supply VIN are connected, the source terminal of the first switching tube (Q1), the drain terminal of the second switching tube (Q2), the second terminal of the bootstrap capacitor, the first terminal of the inductor (L), and the SW pin are connected, and the source terminal of the second switching tube (Q2) is grounded after being connected to the GND pin.
The steady-state transformation ratio of the Buck converter refers to the transformation ratio of the integral conduction time of the first switching tube (Q1) and the two switching tubes (Q1 and Q2). Since the length of the on-time is positively correlated with the amount of heat accumulated in the on-resistance (Ron), the on-resistance ratio of the first switching tube (Q1) and the second switching tube (Q2) needs to be set according to the steady-state transformation ratio in order to ensure that the heat accumulated in the first switching tube (Q1) and the second switching tube (Q2) in the on-time is equal. That is, the on-resistance ratio of the first switching tube (Q1) and the second switching tube (Q2) is related to the steady-state ratio of the Buck converter.
In an alternative embodiment, it is assumed that the on-resistance ratio of the first switching tube (Q1) and the second switching tube (Q2) is n: m, the gain ratio of the first gain module (A1) and the second gain module (A2) is m: n. In this case, it can be considered that the on-resistance ratio matches the gain ratio, and at this time, a continuous and complete inductor current (iL) can be sampled at the sampling Resistor (RISNS), which is convenient for average current control and the like. As shown in the left-hand diagram of fig. 4, when the first switching tube (Q1) is on and the second switching tube (Q2) is off, the current (isisns) across the sampling Resistor (RISNS) rises with the rise of the inductor current (iL); when the second switching tube (Q2) is turned on and the first switching tube (Q1) is turned off, the current (iISNS) on the sampling Resistor (RISNS) decreases along with the decrease of the inductance current (iL), and the peak value of the current increase and the peak value of the current decrease are equal.
In one example, as shown in fig. 5, when the on-resistance ratio of the first switching tube (Q1) and the second switching tube (Q2) is 2:1, the gain ratio of the first gain module (A1) and the second gain module (A2) is 1:2.
when the on-resistance ratio does not match the gain ratio, one case is where the gain ratio is greater than m: n, that is, the gain of the second gain module (A2) is smaller, and at this time, the peak value when the current decreases is smaller than the peak value when the current increases, as shown in the right diagram of fig. 4; another case is a gain ratio less than m: n, that is, the gain of the first gain module (A1) is smaller, and at this time, the peak value when the current decreases is larger than the peak value when the current increases. Although continuous complete inductor current (iL) cannot be sampled when the on-resistance ratio is not matched with the gain ratio, peak and valley values of the inductor current (iL) can still be sampled, and peak/valley current control, current protection and the like can still be performed.
To match the gain ratio to the on-resistance ratio, we can use an external voltage dividing resistance module to adjust the gain ratio of the first gain module (A1) and the second gain module (A2). Specifically, the half-bridge driving chip further comprises a voltage division detection pin, the voltage division detection pin is connected with the voltage division resistance module, the half-bridge driving chip is used for obtaining the voltage division resistance ratio of the voltage division resistance module according to the voltage division detection pin, and the gain ratio is set according to the voltage division resistance ratio.
As shown in fig. 6, when the on-resistance ratio of the first switching tube (Q1) and the second switching tube (Q2) is n: and when m, the resistance ratio of the voltage dividing resistor module is m: n.
The operation principle of the inductor current sampling circuit will be described below.
The Controller (Controller) controls the half-bridge driving chip through the PWMH pin and the PWML pin so that the half-bridge driving chip drives the first switching tube (Q1) and the second switching tube (Q2) to be switched on and off.
When the first switching tube (Q1) is turned on and the second switching tube (Q2) is turned off, the first voltage sampling module (Se 1) is used for sampling voltages at two ends of the first switching tube (Q1) and outputting the sampled voltages to the first gain module (A1); the first gain module (A1) is used for converting the voltage into current and outputting the current to the sampling Resistor (RISNS); the Controller (Controller) is used for generating inductor current information in a rising stage according to the voltage on the sampling Resistor (RISNS) and a preset reference Voltage (VREFIN).
That is, the VIN pin and the SW pin sample voltages on the first switching tube (Q1), the first voltage sampling module (Se 1) converts the voltages into a current I1, the current I1 is transmitted to the sampling Resistor (RISNS) to form a voltage, the Controller (Controller) samples the voltage on the sampling Resistor (RISNS), and the inductor current information of the rising phase is generated according to the voltage on the sampling Resistor (RISNS) and a preset reference Voltage (VREFIN).
The inductor current information includes a current magnitude and a current direction. In calculating the current magnitude, the Controller (Controller) may subtract the reference Voltage (VREFIN) from the voltage across the sampling Resistor (RISNS) and calculate the current magnitude of the inductor current from the difference.
When the voltage across the sampling Resistor (RISNS) is greater than the reference Voltage (VREFIN), the inductor current is directed from the switching tube to the inductor. Assuming that we set the current direction from the switching tube to the inductor to be positive, the current direction of the inductor current sampled by the Controller (Controller) is positive; assuming that we set the current direction from the switching tube to the inductor negative, the current direction of the inductor current sampled by the Controller (Controller) is negative.
When the second switching tube is turned on (Q2) and the first switching tube (Q1) is turned off, the second voltage sampling module (Se 2) is used for sampling voltages at two ends of the second switching tube (Q2) and outputting the sampled voltages to the second gain module (A2); the second gain module (A2) is used for converting the voltage into current and outputting the current to the sampling Resistor (RISNS); the Controller (Controller) is used for generating inductor current information in a falling stage according to the voltage on the sampling Resistor (RISNS) and a preset reference Voltage (VREFIN).
That is, the SW pin and the GND pin sample voltages on the second switching tube (Q2), the second voltage sampling module (Se 2) converts the voltages into currents I2, the currents I2 are transmitted to the sampling Resistor (RISNS) to form voltages, the Controller (Controller) samples the voltages on the sampling Resistor (RISNS), and inductor current information of a falling phase is generated according to the voltages on the sampling Resistor (RISNS) and a preset reference Voltage (VREFIN).
The inductor current information includes a current magnitude and a current direction. In calculating the current magnitude, the Controller (Controller) may subtract the reference Voltage (VREFIN) from the voltage across the sampling Resistor (RISNS) and calculate the current magnitude of the inductor current from the difference.
When the voltage across the sampling Resistor (RISNS) is smaller than the reference Voltage (VREFIN), the current direction of the inductor current is from the inductor to the switching tube. Assuming that we set the current direction from the inductor to the switching tube to be positive, the current direction of the inductor current sampled by the Controller (Controller) is positive; assuming that we set the current direction from the inductor to the switching tube negative, the current direction of the inductor current sampled by the Controller (Controller) is negative.
In summary, in the inductor current sampling circuit of the half-bridge driving chip provided in this embodiment, VIN pins (input points), SW pins (midpoints) and GND pins (ground) are set in the half-bridge driving chip, when the first switching tube is turned on, the inductor current is detected through the VIN pins, the SW pins, the first voltage sampling module and the first gain module built in the half-bridge driving chip, when the second switching tube is turned on, the inductor current is detected through the SW pins, the GND pins, the second voltage sampling module and the second gain module built in the half-bridge driving chip, and no external sampling resistor or operational amplifier is needed to sample the inductor current information, so that not only can circuit loss be reduced, but also system conversion efficiency be improved, system cost and volume can be reduced, but also anti-interference capability of current sampling can be improved, and sampling precision and sampling speed can be improved.
As shown in fig. 7, the present embodiment provides an inductor current sampling method applied to the inductor current sampling circuit of the half-bridge driving chip, where the inductor current sampling method includes:
in step 701, the half-bridge driving chip controls the on-off of the first switching tube and the second switching tube.
The Controller (Controller) controls the half-bridge driving chip through the PWMH pin and the PWML pin so that the half-bridge driving chip drives the first switching tube (Q1) and the second switching tube (Q2) to be switched on and off.
Step 702, when the first switching tube is turned on and the second switching tube is turned off, the first voltage sampling module samples voltages at two ends of the first switching tube, and outputs the sampled voltages to the first gain module; the first gain module converts the voltage into current and outputs the current to the sampling resistor; the controller generates inductor current information in a rising stage according to the voltage on the sampling resistor and a preset reference voltage.
That is, the VIN pin and the SW pin sample voltages on the first switching tube (Q1), the first voltage sampling module (Se 1) converts the voltages into a current I1, the current I1 is transmitted to the sampling Resistor (RISNS) to form a voltage, the Controller (Controller) samples the voltage on the sampling Resistor (RISNS), and the inductor current information of the rising phase is generated according to the voltage on the sampling Resistor (RISNS) and a preset reference Voltage (VREFIN).
The inductor current information includes a current magnitude and a current direction. In calculating the current magnitude, the Controller (Controller) may subtract the reference Voltage (VREFIN) from the voltage across the sampling Resistor (RISNS) and calculate the current magnitude of the inductor current from the difference.
When the voltage across the sampling Resistor (RISNS) is greater than the reference Voltage (VREFIN), the inductor current is directed from the switching tube to the inductor. Assuming that we set the current direction from the switching tube to the inductor to be positive, the current direction of the inductor current sampled by the Controller (Controller) is positive; assuming that we set the current direction from the switching tube to the inductor negative, the current direction of the inductor current sampled by the Controller (Controller) is negative.
Step 703, when the second switching tube is turned on and the first switching tube is turned off, the second voltage sampling module performs voltage sampling at two ends of the second switching tube, and outputs the sampled voltage to the second gain module; the second gain module converts the voltage into current and outputs the current to the sampling resistor; the controller generates inductor current information in a falling stage according to the voltage on the sampling resistor and a preset reference voltage.
That is, the SW pin and the GND pin sample voltages on the second switching tube (Q2), the second voltage sampling module (Se 2) converts the voltages into currents I2, the currents I2 are transmitted to the sampling Resistor (RISNS) to form voltages, the Controller (Controller) samples the voltages on the sampling Resistor (RISNS), and inductor current information of a falling phase is generated according to the voltages on the sampling Resistor (RISNS) and a preset reference Voltage (VREFIN).
The inductor current information includes a current magnitude and a current direction. In calculating the current magnitude, the Controller (Controller) may subtract the reference Voltage (VREFIN) from the voltage across the sampling Resistor (RISNS) and calculate the current magnitude of the inductor current from the difference.
When the voltage across the sampling Resistor (RISNS) is smaller than the reference Voltage (VREFIN), the current direction of the inductor current is from the inductor to the switching tube. Assuming that we set the current direction from the inductor to the switching tube to be positive, the current direction of the inductor current sampled by the Controller (Controller) is positive; assuming that we set the current direction from the inductor to the switching tube negative, the current direction of the inductor current sampled by the Controller (Controller) is negative.
In summary, in the inductor current sampling method provided in the embodiment of the present application, the VIN pin (input point), the SW pin (midpoint) and the GND pin (ground) are set in the half-bridge driving chip, when the first switching tube is turned on, the inductor current is detected through the VIN pin, the SW pin, the first voltage sampling module and the first gain module built in the half-bridge driving chip, and when the second switching tube is turned on, the inductor current is detected through the SW pin, the GND pin, the second voltage sampling module and the second gain module built in the half-bridge driving chip, so that the inductor current information can be sampled without external sampling resistor and operational amplifier, which can reduce circuit loss, improve system conversion efficiency, reduce system cost and volume, and improve anti-interference capability of current sampling, and improve sampling precision and sampling speed.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, where the program may be stored in a computer readable storage medium, and the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
The foregoing description is not intended to limit the embodiments of the present application, and any modifications, equivalents, improvements, etc. that fall within the spirit and principles of the embodiments of the present application are intended to be included within the scope of the embodiments of the present application.
Claims (10)
1. An inductor current sampling circuit of a half-bridge driving chip, which is characterized by comprising: the device comprises a half-bridge driving chip, a Buck converter, a sampling resistor and a controller;
the half-bridge driving chip comprises a first voltage sampling module and a first gain module which are connected in series, and a second voltage sampling module and a second gain module which are connected in series, wherein the first voltage sampling module is connected with a first switching tube in the Buck converter, the second voltage sampling module is connected with a second switching tube in the Buck converter, the first switching tube and the second switching tube are respectively connected with an inductor in the Buck converter in series, the first gain module and the second gain module are respectively connected with a sampling resistor, and the controller is connected with the sampling resistor;
when the first switching tube is switched on and the second switching tube is switched off, the first voltage sampling module is used for sampling voltages at two ends of the first switching tube and outputting the sampled voltages to the first gain module; the first gain module is used for converting the voltage into current and outputting the current to the sampling resistor; the controller is used for generating inductance current information in a rising stage according to the voltage on the sampling resistor and a preset reference voltage;
when the second switching tube is switched on and the first switching tube is switched off, the second voltage sampling module is used for sampling voltages at two ends of the second switching tube and outputting the sampled voltages to the second gain module; the second gain module is used for converting the voltage into current and outputting the current to the sampling resistor; the controller is used for generating inductance current information in a falling stage according to the voltage on the sampling resistor and a preset reference voltage.
2. The inductor current sampling circuit of a half-bridge driver chip of claim 1, wherein the on-resistance ratio of the first switching tube and the second switching tube is n: m, the gain ratio of the first gain module and the second gain module is m: n.
3. The inductor current sampling circuit of a half-bridge driver chip of claim 2 further comprising a voltage division detection pin connected to the voltage division resistor module,
the half-bridge driving chip is used for acquiring the voltage dividing resistance ratio of the voltage dividing resistance module according to the voltage dividing detection pin, and setting the gain ratio according to the voltage dividing resistance ratio.
4. The inductor current sampling circuit of a half-bridge driver chip of claim 2, wherein the on-resistance ratio of the first and second switching tubes is related to the steady state transformation ratio of the Buck converter.
5. The inductor current sampling circuit of the half-bridge driver chip according to claim 1, wherein a VIN pin, a SW pin and a GND pin are provided in the half-bridge driver chip, the VIN pin is connected to the first end of the first voltage sampling module and the drain end of the first switching tube, the SW pin is connected to the second end of the first voltage sampling module, the first end of the second voltage sampling module and the source end of the first switching tube, respectively, and the GND pin is connected to the second end of the second voltage sampling module and the source end of the second switching tube, respectively.
6. The inductor current sampling circuit of a half-bridge driver chip of claim 5, wherein the Buck converter further comprises a capacitor;
the drain end of the first switching tube is also connected with an input power supply VIN, the source end of the first switching tube is also connected with the drain end of the second switching tube and the first end of the inductor respectively, the second end of the inductor is connected with the first end of the capacitor, and the second end of the capacitor and the source end of the second switching tube are grounded.
7. The inductor current sampling circuit of a half-bridge driver chip of claim 1, wherein an ADC pin and a reference voltage output pin are provided in the controller, and an ISNS pin and a VREFIN pin are provided in the half-bridge driver chip;
the ISNS pin is respectively connected with the first end of the sampling resistor and the ADC pin, and the VREFIN pin is respectively connected with the second end of the sampling resistor and the reference voltage output pin.
8. The inductor current sampling circuit of claim 7 wherein said first gain block and said second gain block are each coupled to said ISNS pin.
9. The inductor current sampling circuit of a half-bridge driver chip according to any one of claims 1 to 8, wherein,
when the voltage on the sampling resistor is larger than the reference voltage, the current direction of the inductance current flows from the switching tube to the inductance;
when the voltage on the sampling resistor is smaller than the reference voltage, the current direction of the inductance current flows from the inductance to the switching tube.
10. An inductor current sampling method for a half-bridge driver chip, wherein the inductor current sampling method is used in an inductor current sampling circuit for a half-bridge driver chip according to any one of claims 1 to 9, and the method comprises:
the half-bridge driving chip controls the on-off of the first switching tube and the second switching tube;
when the first switching tube is conducted and the second switching tube is disconnected, the first voltage sampling module samples voltages at two ends of the first switching tube and outputs the sampled voltages to the first gain module; the first gain module converts the voltage into current and outputs the current to the sampling resistor; the controller generates inductance current information in an ascending stage according to the voltage on the sampling resistor and a preset reference voltage;
when the second switching tube is conducted and the first switching tube is disconnected, the second voltage sampling module samples voltages at two ends of the second switching tube and outputs the sampled voltages to the second gain module; the second gain module converts the voltage into current and outputs the current to the sampling resistor; and the controller generates inductor current information in a falling stage according to the voltage on the sampling resistor and a preset reference voltage.
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