CN117641727A - Circuit board and preparation method thereof - Google Patents

Abstract

The circuit board comprises a second circuit substrate, a first bonding layer and a first circuit substrate which are sequentially laminated; the first circuit substrate comprises a first dielectric layer and a first conductive circuit layer, and the first conductive circuit layer comprises a first couple; the second circuit substrate comprises a second dielectric layer and a second conductive circuit layer, and the second conductive circuit layer comprises a second couple; the first bonding layer bonds the first conductive circuit layer and the second dielectric layer; the second circuit substrate is provided with a first opening penetrating through the second couple, the second dielectric layer and the first bonding layer, the first couple is the bottom wall of the first opening, the first couple and the second couple are at least partially overlapped in the lamination direction of the second circuit substrate, the first bonding layer and the first circuit substrate, a conductive piece is arranged in the first opening, and the conductive piece is electrically connected with the first couple and the second couple. The circuit board provided by the application is beneficial to the reduction of contact thermal resistance, the improvement of sensing sensitivity and sensing response speed. The application also provides a preparation method of the circuit board.

Description

Circuit board and preparation method thereof

Technical Field

The application relates to the field of circuit boards, in particular to a circuit board and a preparation method of the circuit board.

Background

The conventional circuit board including the temperature sensor is generally manufactured by providing a double-sided board including a first conductive trace layer and a second conductive trace layer, forming an opening in the double-sided board penetrating through the first conductive trace layer and the second conductive trace layer at the same time, forming a conductive member in the opening by electroplating, and forming a cover film on each of the first conductive trace layer and the second conductive trace layer. Since the conductive member is formed by electroplating, the conductive member may be protruded from the conductive circuit layer. Therefore, after the cover film is pressed, the outer surface of the cover film corresponding to the conductive piece is caused to be convexly arranged in other areas of the cover film, so that the contact resistance of the temperature sensor is increased, and the sensitivity and the response speed of the temperature sensor are reduced.

Disclosure of Invention

In view of this, the present application provides a circuit board that facilitates reduction of contact resistance, improvement of sensitivity and response speed.

The application also provides a preparation method of the circuit board.

The circuit board comprises a second circuit substrate, a first bonding layer and a first circuit substrate which are sequentially laminated;

the first circuit substrate comprises a first dielectric layer and a first conductive circuit layer which are stacked, and the first conductive circuit layer comprises a first couple;

the second circuit substrate comprises a second dielectric layer and a second conductive circuit layer which are laminated, and the second conductive circuit layer comprises a second couple;

the first bonding layer bonds the first conductive circuit layer and the second dielectric layer;

the second circuit substrate is provided with a first opening penetrating through the second couple, the second dielectric layer and the first bonding layer, the first couple is a bottom wall of the first opening, the first couple and the second couple are at least partially overlapped in the lamination direction of the second circuit substrate, the first bonding layer and the first circuit substrate, a conductive piece is arranged in the first opening, the conductive piece is electrically connected with the first couple and the second couple, and the first dielectric layer is used for mounting a heating element.

Optionally, the material of the first conductive circuit layer is constantan, and the material of the second conductive circuit layer is copper.

Optionally, the thickness of the second dielectric layer is 30-150 μm along the stacking direction.

Optionally, the circuit board further includes a cover film, the cover film including a second adhesive layer and an insulating protective layer stacked, the second adhesive layer adhering the second conductive line layer and the insulating protective layer.

Optionally, a second opening penetrating through the insulating protection layer and the second bonding layer is formed in the cover film, a part of the second conductive circuit layer except the second couple is exposed out of the second opening, and a conductive protection layer covering the second conductive circuit layer is arranged in the second opening.

The application also provides a preparation method of the circuit board, which comprises the following steps:

providing an intermediate, wherein the intermediate comprises a second circuit substrate, a first bonding layer and a first circuit substrate which are sequentially laminated, the first circuit substrate comprises a first conductive circuit layer and a first dielectric layer which are laminated, the first conductive circuit layer comprises a first couple, the second circuit substrate comprises a second dielectric layer and a second conductive circuit layer which are laminated, the second conductive circuit layer comprises a second couple, the first bonding layer bonds the first conductive circuit layer and the second dielectric layer, and the first couple and the second couple are at least partially overlapped in the lamination directions of the second circuit substrate, the first bonding layer and the first circuit substrate;

forming a first opening penetrating through the second couple, the second dielectric layer and the first adhesive layer in the second circuit substrate, wherein the first couple is a bottom wall of the first opening;

and printing a conductive piece in the first opening, wherein the conductive piece is electrically connected with the first couple and the second couple.

Optionally, the preparation of the intermediate comprises:

providing the first circuit substrate and a substrate unit, wherein the substrate unit comprises the second dielectric layer and the conductive layer which are laminated;

forming a first bonding layer on the surface of the second dielectric layer far away from the conductive layer, and pressing the first bonding layer on the first conductive circuit layer;

patterning the conductive layer to form the second conductive line layer and forming the intermediate.

Optionally, the method further comprises the steps of:

and forming a cover film on the second conductive circuit layer, wherein the cover film comprises a second bonding layer and an insulating protective layer which are stacked, the second bonding layer bonds the second conductive circuit layer and the insulating protective layer, and the cover film covers the second galvanic couple.

Optionally, the method further comprises the steps of:

forming a second opening penetrating through the insulating protective layer and the second adhesive layer in the cover film, wherein a part of the second conductive circuit layer except the second couple is exposed out of the second opening;

and forming a conductive protection layer covering the second conductive circuit in the second opening.

Optionally, the material of the first conductive circuit layer is constantan, and the material of the second conductive circuit layer is copper.

Compared with the prior art, the first opening is formed in the second circuit substrate, so that part of the first couple is the bottom wall of the first opening (namely, the first opening does not penetrate through the first couple), and after the conductive piece connecting the first couple and the second couple is formed in the first opening, the conductive piece is not convexly arranged on the surface of the first couple. The first couple and the second couple together form a temperature sensor. Meanwhile, a covering film is not required to be arranged on one side, far away from the first conductive circuit layer, of the first dielectric layer, and a heating element can be directly arranged on one side, far away from the first conductive circuit layer, of the first dielectric layer. And the temperature rise of the heating element can be monitored through the thermoelectromotive force according to the known relation between the thermoelectromotive force and the temperature difference. Because the conductive piece can not be convexly arranged on the surface of the first thermocouple, the part of the conductive piece corresponding to the first dielectric layer can not be convexly arranged on other parts of the first dielectric layer, and the flatness of the outer surface of the circuit board is improved, so that the reduction of the contact thermal resistance, the improvement of the sensing sensitivity and the sensing response speed of the temperature sensor are facilitated.

Drawings

FIG. 1 is a cross-sectional view of a first substrate unit according to an embodiment of the present disclosure;

FIG. 2 is a cross-sectional view illustrating a first conductive trace layer formed by patterning a first conductive layer in the first substrate unit shown in FIG. 1;

FIG. 3 is a cross-sectional view showing the connection between a second substrate unit and a first adhesive layer according to one embodiment of the present disclosure;

FIG. 4 is a cross-sectional view of the first conductive trace layer and the second dielectric layer of FIG. 3 bonded by the first bonding layer;

FIG. 5 is a cross-sectional view illustrating the formation of a second conductive trace layer by patterning a second conductive layer in the second substrate unit shown in FIG. 4;

FIG. 6 is a cross-sectional view of a first opening formed in a second galvanic of the second conductive trace layer shown in FIG. 5;

FIG. 7 is a cross-sectional view of the conductive element formed in the first opening shown in FIG. 6;

FIG. 8 is a cross-sectional view of a cover film formed over the second conductive trace layer shown in FIG. 7 and a second opening formed in the cover film;

fig. 9 is a cross-sectional view of the formation of a conductive protective layer within the second opening of fig. 8 and the formation of a heat generating element on the first dielectric layer of the first substrate unit.

Description of the main reference signs

Circuit board 100

First circuit board 10

First dielectric layer 11

First conductive trace layer 12

First couple 121

First substrate unit 103

First conductive layer 13

First adhesive layer 20

Second circuit board 30

Second dielectric layer 31

Second conductive trace layer 32

Second couple 321

Second substrate unit 301

Second conductive layer 33

Intermediate 113

Conductive member 40

First opening 41

Cover film 50

Second adhesive layer 51

Insulating protective layer 52

Second opening 60

Conductive protective layer 70

Heating element 80

Thickness R

The following detailed description will further illustrate the application in conjunction with the above-described figures.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application.

It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present.

Referring to fig. 9, the present application provides a circuit board 100, the circuit board 100 including a second circuit substrate 30, a first adhesive layer 20, and a first circuit substrate 10 laminated in this order. The first circuit board 10 includes a first dielectric layer 11 and a first conductive trace layer 12 stacked. The first conductive trace layer 12 includes a first galvanic couple 121. The second circuit board 30 includes a second dielectric layer 31 and a second conductive trace layer 32 stacked. The second conductive trace layer 32 includes a second couple 321. The first adhesive layer 20 adheres the first conductive trace layer 12 and the second dielectric layer 31. The first conductive trace layer 12 further has a trace gap (not shown), and the first adhesive layer 20 further covers the first dielectric layer 11 exposed from the trace gap of the first conductive trace layer 12. The second circuit board 30 is provided with a first opening 41 penetrating the second couple 321, the second dielectric layer 31, and the first adhesive layer 20. The first galvanic couple 121 is a bottom wall of the first opening 41. The first couple 121 and the second couple 321 at least partially overlap in the lamination direction of the second circuit substrate 30, the first adhesive layer 20, and the first circuit substrate 10. The first opening 41 is provided therein with a conductive member 40. The conductive member 40 electrically connects the first couple 121 and the second couple 321. The first dielectric layer 11 is used for mounting the heating element 80. The heating element 80 may be disposed on the first dielectric layer 11 corresponding to the first couple 121. The heating element 80 may not be electrically connected to the circuit board 100, but may be electrically connected to the circuit board 100.

Specifically, the materials of the first dielectric layer 11 and the second dielectric layer 31 include, but are not limited to, one of polytetrafluoroethylene, polyimide, and liquid crystal polymer. In this embodiment, the material of the first dielectric layer 11 is polytetrafluoroethylene, and the material of the second dielectric layer 31 is polyimide. The material of the first adhesive layer 20 includes, but is not limited to, epoxy glue or silicone gel. The material of the first conductive trace layer 12 includes, but is not limited to, constantan (a copper nickel alloy) or nickel aluminum alloy or nickel silicon alloy. The material of the second conductive trace layer 32 includes, but is not limited to, copper or nichrome. The material of the conductive member 40 includes, but is not limited to, copper.

In this application, the first opening 41 is formed on the second circuit substrate 30, so that a portion of the first thermocouple 121 is a bottom wall of the first opening 41 (i.e., the first opening 41 does not penetrate the first thermocouple 121), so that after the conductive element 40 connecting the first thermocouple 121 and the second thermocouple 321 is formed in the first opening 41, the conductive element 40 is not protruding on the surface of the first thermocouple 121. The first galvanic couple 121 and the second galvanic couple 321 together form a temperature sensor. Meanwhile, the present disclosure does not need to provide a cover film on a side of the first dielectric layer 11 away from the first conductive trace layer 12, but may directly mount the heating element 80 on a side of the first dielectric layer 11 away from the first conductive trace layer 12, and when the heating element 80 works to generate heat, a temperature difference is generated between the first couple 121 and the second couple 321, so as to generate a thermoelectromotive force (seebeck electromotive force). The temperature rise of the heating element 80 can be monitored by the thermoelectromotive force according to the known relationship between the thermoelectromotive force and the temperature difference. Because the conductive element 40 is not protruded on the surface of the first couple 121, the portion of the conductive element 40 corresponding to the first dielectric layer 11 is not protruded on other portions of the first dielectric layer 11, so that the flatness of the outer surface of the circuit board 100 is improved, thereby being beneficial to the reduction of the contact thermal resistance of the temperature sensor, and the improvement of the sensing sensitivity and the sensing response speed.

In this embodiment, the material of the first conductive trace layer 12 is constantan, and the material of the second conductive trace layer 32 is copper. The first galvanic couple 121 and the second galvanic couple 321 form a copper-constantan material sensing galvanic couple.

In some embodiments, with continued reference to fig. 9, the second dielectric layer 31 has a thickness R of 30-150 μm along the lamination direction of the second circuit substrate 30, the first adhesive layer 20, and the first circuit substrate 10. In other embodiments, the thickness R of the second dielectric layer 31 may vary, e.g., the thickness R may be less than 30 μm or greater than 150 μm.

In some embodiments, with continued reference to fig. 9, the circuit board 100 further includes a cover film 50. The cover film 50 includes a second adhesive layer 51 and an insulating protective layer 52 stacked. The second adhesive layer 51 adheres the second conductive trace layer 32 and the insulating protective layer 52, and the second adhesive layer 51 also covers the second dielectric layer 31 exposing the second conductive trace layer 32. The material of the second adhesive layer 51 includes, but is not limited to, silicone or epoxy. The insulating protective layer 52 is used for dust or corrosion protection or solder resist.

In some embodiments, with continued reference to fig. 9, the cover film 50 is provided with a second opening 60 extending through the second adhesive layer 51 and the insulating protective layer 52. The second conductive trace layer 32 except the second galvanic couple 321 is exposed to the second opening 60. A conductive protection layer 70, such as a nickel-plated gold layer, is disposed in the second opening 60 to cover the second conductive trace layer 32, so as to prevent oxidation of the second conductive trace layer 32 exposed in the second opening 60. The circuit board 100 may be electrically connected to an external connector (not shown) through the conductive protection layer 70.

In other embodiments, the second opening 60 may not be provided, or the conductive protective layer 70 may not be provided. In further embodiments, the cover film 50 may not be provided.

The application also provides a preparation method of the circuit board, the sequence of the steps of the preparation method can be changed according to different requirements, and certain steps can be omitted or combined. The preparation method comprises the following steps:

step one: referring to fig. 1, a first substrate unit 103 is provided, the first substrate unit 103 including a first dielectric layer 11 and a first conductive layer 13 stacked. The material of the first dielectric layer 11 includes, but is not limited to, one of polytetrafluoroethylene, polyimide, or liquid crystal polymer. The first conductive layer 13 includes, but is not limited to, one of constantan, nickel-aluminum alloy, or nickel-silicon alloy.

Step two: referring to fig. 1 and 2, the first conductive layer 13 is patterned to form a first conductive trace layer 12. The first conductive trace layer 12 includes a first galvanic couple 121. The specific steps of forming the first conductive trace layer 12 include: a first pattern film (not shown) is formed on a surface of the first conductive layer 13 away from the first dielectric layer 11, a portion of the first conductive layer 13 is exposed out of the first pattern film, the first conductive layer 13 exposed out of the first pattern film is etched, and the first pattern film is removed, so as to obtain the first conductive circuit layer 12. In further embodiments, the first conductive trace layer 12 may be obtained by other means in the industry. The first dielectric layer 11 and the first conductive trace layer 12 form a first circuit substrate 10.

In other embodiments, the first circuit substrate 10 may be directly provided without step one and step two. Referring to fig. 2, the first circuit substrate 10 includes a first conductive trace layer 12 and a first dielectric layer 11 stacked. The first conductive trace layer 12 includes a first galvanic couple 121. The material of the first conductive trace layer 12 includes, but is not limited to, one of constantan, nickel-aluminum alloy, or nickel-silicon alloy. The material of the first dielectric layer 11 includes, but is not limited to, one of polytetrafluoroethylene, polyimide, or liquid crystal.

Step three: referring to fig. 3, a second substrate unit 301 is provided, the second substrate unit 301 including a second dielectric layer 31 and a second conductive layer 33 stacked. A first adhesive layer 20 is formed on the surface of the second dielectric layer 31 remote from the second conductive layer 33. The material of the second dielectric layer 31 includes, but is not limited to, one of polytetrafluoroethylene, polyimide, or liquid crystal polymer. The second conductive layer 33 includes, but is not limited to, copper or nichrome. The material of the first adhesive layer 20 includes, but is not limited to, silicone or epoxy.

In further embodiments, the first adhesive layer 20 may be formed on the first substrate unit 103, and the first adhesive layer 20 covers the first conductive line layer 12.

Step four: referring to fig. 4, the second substrate unit 301, the first adhesive layer 20, and the first circuit substrate 10 are sequentially laminated and pressed such that the first adhesive layer 20 adheres the first conductive trace layer 12 and the second dielectric layer 31.

Step five: referring to fig. 4 and 5, the second conductive layer 33 is patterned to form a second conductive trace layer 32, forming an intermediate 113. The second conductive trace layer 32 includes a second couple 321. Along the above-described lamination direction, the second galvanic couple 321 and the first galvanic couple 121 at least partially overlap. The step of patterning the second conductive layer 33 to form the second conductive circuit layer 32 may be the same as the step of patterning the first conductive layer 13 to form the first conductive circuit layer 12, and will not be described herein.

In other embodiments, steps one through five may be omitted directly, providing intermediate 113 directly. Referring to fig. 5, the intermediate body 113 includes a second circuit substrate 30, a first adhesive layer 20, and a first circuit substrate 10, which are sequentially stacked. The first circuit board 10 includes a first conductive trace layer 12 and a first dielectric layer 11 stacked. The first conductive trace layer 12 includes a first galvanic couple 121. The second circuit board 30 includes a second dielectric layer 31 and a second conductive trace layer 32 stacked. The second conductive trace layer 32 includes a second couple 321. The first adhesive layer 20 adheres the first conductive trace layer 12 and the second dielectric layer 31. The first couple 121 and the second couple 321 at least partially overlap in the lamination direction of the second circuit substrate 30, the first adhesive layer 20, and the first circuit substrate 10. The materials of the first dielectric layer 11 and the second dielectric layer 31 include, but are not limited to, one of polytetrafluoroethylene, polyimide or liquid crystal polymer, and the material of the first conductive trace layer 12 includes, but is not limited to, one of constantan, nickel-aluminum alloy or nickel-silicon alloy. The material of the second conductive trace layer 32 includes, but is not limited to, copper or nichrome. The first adhesive layer 20 includes, but is not limited to, a silicone or epoxy. In this embodiment, the material of the first conductive trace layer 12 is constantan, and the material of the second conductive trace layer 32 is copper.

Step six: referring to fig. 6, a first opening 41 is formed in the second circuit board 30. The first opening 41 penetrates the second galvanic couple 321, the second dielectric layer 31 and the first adhesive layer 20. The first galvanic couple 121 is a bottom wall of the first opening 41. The first openings 41 may be formed by means of mechanical openings or laser openings. In the present embodiment, the first opening 41 is formed by laser opening.

Step seven: referring to fig. 7, a conductive member 40 is printed in the first opening 41. The conductive member 40 electrically connects the first couple 121 and the second couple 321. The material of the conductive member 40 includes, but is not limited to, copper. Specifically, a second pattern film (not shown) is formed on the second conductive trace layer 32, the second pattern film also covering the second couple 321. The first opening 41 is exposed to the second pattern film, and the first opening 41 is printed with a conductive copper paste, thereby forming the conductive member 40 in the first opening 41. Then, the second pattern film is removed. Thus, a portion of the conductive element 40 is disposed along the second conductive trace layer 32. In other embodiments, a screen of dots may be used to print, in which case the conductive element 40 may be flush with the second conductive trace layer 32.

Step eight: referring to fig. 8, a cover film 50 is formed on the second conductive trace layer 32. The cover film 50 includes a second adhesive layer 51 and an insulating protective layer 52 stacked. The second adhesive layer 51 adheres the second conductive trace layer 32 and the insulating protective layer 52. The cover film 50 covers the second galvanic couple 321. Optionally, a second opening 60 penetrating the insulating protection layer 52 and the second adhesive layer 51 is formed on the cover film 50, and a portion of the second conductive trace layer 32 except the second galvanic couple 321 is exposed to the second opening 60.

Step nine: referring to fig. 9, a conductive protection layer 70 is formed within the second opening 60 to cover the second conductive trace layer 32, thereby forming a circuit board 100. Optionally, a heating element 80 is formed on a side of the first dielectric layer 11 remote from the first conductive trace layer 12. The heat generating element 80 includes, but is not limited to, a chip.

In further embodiments, step eight and step nine may be omitted, and the circuit board 100 may not include the cover film 50, the heat generating element 80, and the conductive protective layer 70.

The above description is only one preferred embodiment of the present application, but is not limited to this embodiment during actual application. Other variations and modifications of the present application, which are apparent to those of ordinary skill in the art, are intended to be within the scope of the present application.

Claims (10)

1. A circuit board is characterized by comprising a second circuit substrate, a first bonding layer and a first circuit substrate which are sequentially laminated;

the first circuit substrate comprises a first dielectric layer and a first conductive circuit layer which are stacked, and the first conductive circuit layer comprises a first couple;

the second circuit substrate comprises a second dielectric layer and a second conductive circuit layer which are laminated, and the second conductive circuit layer comprises a second couple;

the first bonding layer bonds the first conductive circuit layer and the second dielectric layer;

the second circuit substrate is provided with a first opening penetrating through the second couple, the second dielectric layer and the first bonding layer, the first couple is a bottom wall of the first opening, the first couple and the second couple are at least partially overlapped in the lamination direction of the second circuit substrate, the first bonding layer and the first circuit substrate, a conductive piece is arranged in the first opening, the conductive piece is electrically connected with the first couple and the second couple, and the first dielectric layer is used for mounting a heating element.

2. The circuit board of claim 1, wherein the material of the first conductive trace layer is constantan and the material of the second conductive trace layer is copper.

3. The circuit board of claim 1, wherein the second dielectric layer has a thickness of 30-150 μm along the stacking direction.

4. The circuit board of claim 1, further comprising a cover film comprising a second adhesive layer and an insulating protective layer laminated, the second adhesive layer adhering the second conductive trace layer and the insulating protective layer.

5. The circuit board of claim 4, wherein a second opening penetrating through the insulating protective layer and the second adhesive layer is provided in the cover film, a portion of the second conductive trace layer other than the second galvanic couple is exposed to the second opening, and a conductive protective layer covering the second conductive trace layer is provided in the second opening.

6. A method of manufacturing a circuit board, comprising:

providing an intermediate, wherein the intermediate comprises a second circuit substrate, a first bonding layer and a first circuit substrate which are sequentially laminated, the first circuit substrate comprises a first conductive circuit layer and a first dielectric layer which are laminated, the first conductive circuit layer comprises a first couple, the second circuit substrate comprises a second dielectric layer and a second conductive circuit layer which are laminated, the second conductive circuit layer comprises a second couple, the first bonding layer bonds the first conductive circuit layer and the second dielectric layer, and the first couple and the second couple are at least partially overlapped in the lamination directions of the second circuit substrate, the first bonding layer and the first circuit substrate;

forming a first opening penetrating through the second couple, the second dielectric layer and the first adhesive layer in the second circuit substrate, wherein the first couple is a bottom wall of the first opening;

and printing a conductive piece in the first opening, wherein the conductive piece is electrically connected with the first couple and the second couple.

7. The method of manufacturing a circuit board according to claim 6, wherein the preparation of the intermediate comprises:

providing the first circuit substrate and a substrate unit, wherein the substrate unit comprises the second dielectric layer and the conductive layer which are laminated;

forming a first bonding layer on the surface of the second dielectric layer far away from the conductive layer, and pressing the first bonding layer on the first conductive circuit layer;

patterning the conductive layer to form the second conductive line layer and forming the intermediate.

8. The method of manufacturing a circuit board according to claim 6, further comprising the steps of:

and forming a cover film on the second conductive circuit layer, wherein the cover film comprises a second bonding layer and an insulating protective layer which are stacked, the second bonding layer bonds the second conductive circuit layer and the insulating protective layer, and the cover film covers the second galvanic couple.

9. The method of manufacturing a circuit board according to claim 8, further comprising the steps of:

forming a second opening penetrating through the insulating protective layer and the second adhesive layer in the cover film, wherein a part of the second conductive circuit layer except the second couple is exposed out of the second opening;

and forming a conductive protection layer covering the second conductive circuit in the second opening.

10. The method of manufacturing a circuit board according to claim 6, wherein the material of the first conductive trace layer is constantan and the material of the second conductive trace layer is copper.