CN117613060A - Monolithic silicon light integrated device based on white light and preparation method thereof - Google Patents

Monolithic silicon light integrated device based on white light and preparation method thereof Download PDF

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Publication number
CN117613060A
CN117613060A CN202311640413.1A CN202311640413A CN117613060A CN 117613060 A CN117613060 A CN 117613060A CN 202311640413 A CN202311640413 A CN 202311640413A CN 117613060 A CN117613060 A CN 117613060A
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light
silicon
substrate
electrode
sio
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刘凌光
张少琼
陈卓
赵爽
岳睿燕
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Yanshan University
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Yanshan University
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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Electromagnetism (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Semiconductor Lasers (AREA)
  • Light Receiving Elements (AREA)

Abstract

The invention provides a monolithic silicon light integrated device based on white light and a preparation method thereof, belonging to the field of photoelectric integration, wherein the structure comprises: the light emitting device comprises a MOS structure light emitting device, a control electrode, a bevel coupling device, a planar optical waveguide, a light receiving device, a detection electrode and a common bottom electrode. The white-light-based monolithic silicon light integrated device designed by the invention is characterized in that a control electrode, a light source, an optical coupler, an optical waveguide and an optical receiver are prepared on the same Si substrate through a COMS (complementary metal oxide semiconductor) process on the basis of 350-950 nm continuous spectrum white light emitted by a MOS structure light emitting device on the Si substrate, and the device directly works in an atmospheric environment without special encapsulation. The monolithic silicon light integrated device based on white light and the preparation method provided by the invention simplify the process flow, reduce the preparation cost and realize the monolithic integrated silicon-based photoelectric device easy to prepare.

Description

Monolithic silicon light integrated device based on white light and preparation method thereof
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a monolithic silicon light integrated device based on white light and a preparation method thereof.
Background
The silicon optical integration technology is to integrate a photon device and a microelectronic device on the same chip by using a CMOS process, and realize on-chip optical interconnection by taking light as a signal transmission medium. The optical interconnect has the advantages of higher interconnect integration, larger bandwidth, lower power consumption, minimal signal delay, cross-talk, etc., compared to the electrical interconnect. Optoelectronic integration technology is a new research direction for modern integrated circuit technology, and the technology will lead to a new revolution of integrated circuit technology.
At present, the technical difficulty of realizing silicon light integration is mainly concentrated on a silicon-based light source device, and three solutions to the silicon-based light source exist in the prior art: an external laser light source; bonding III-V light emitting diodes, and mixing and integrating the III-V light emitting diodes on a silicon wafer; the silicon-based light emitting device is monolithically integrated. However, external lasers cannot meet the requirement of large-scale integration; the hybrid integration has extremely high requirements on the preparation and packaging process, the CMOS compatibility is poor, and the preparation cost is high, so that the large-scale integration is not facilitated; the existing silicon-based light-emitting devices capable of being monolithically integrated, such as silicon nanowire light-emitting devices, superlattice quantum well material silicon-based light-emitting devices, dislocation loop light-emitting devices and the like, have the problems of poor light-emitting stability, complex structure, higher preparation and packaging cost and the like, and restrict the development of monolithic silicon light integration technology.
Therefore, it is important to produce a monolithic silicon photo-integrated device that can produce a light source device and an electronic device on the same Si substrate.
Disclosure of Invention
The invention aims to provide a white light-based monolithic silicon optical integrated device and a preparation method thereof, so as to provide a novel silicon-based monolithic photoelectric integrated device.
In order to solve the technical problems, the invention adopts the following technical scheme:
a white light monolithic silicon-based optical integrated device comprising:
a p-doped Si substrate;
SiO 2 dielectric isolation layer located in p-type doped regionOn top of a hetero Si substrate
A MOS structure light emitting device located on the p-type doped Si substrate;
a silicon photodiode light receiving device located over the p-type doped Si substrate;
mo control electrode, located at SiO 2 A dielectric isolation layer over the substrate;
mo detection electrode positioned at SiO 2 A dielectric isolation layer over the substrate;
Si 3 N 4 a wedge optical coupling device, a MOS structure light emitting device and a silicon photodiode light receiving device;
Si 3 N 4 planar optical waveguide connecting Si at both ends 3 N 4 Wedge optical coupling device located at SiO 2 A dielectric isolation layer over the substrate;
mo shares the bottom electrode, below the p-doped Si substrate.
The technical scheme of the invention is further improved as follows: the MOS structure light-emitting device sequentially comprises a p-type doped silicon substrate and HfO 2 A high-k dielectric layer and an ITO transparent top electrode; wherein the doping concentration of the p-type doped silicon substrate is 10 14 Individual/cm 3 ~ 10 18 Individual/cm 3 ；HfO 2 The thickness of the high-k dielectric layer is 3 nm-30 nm; the thickness of the ITO transparent top electrode is 80 nm-120 nm.
The technical scheme of the invention is further improved as follows: the applied voltage range of the MOS structure light-emitting device is 100 mV-60V, and the light-emitting spectrum range is 350 nm-950 nm.
The technical scheme of the invention is further improved as follows: the Si is 3 N 4 The inclined plane of the wedge optical coupling device has an included angle of 30-60 degrees with the horizontal plane.
The technical scheme of the invention is further improved as follows: the Si is 3 N 4 The thickness of the planar optical waveguide is 200 nm-300 nm.
The technical scheme of the invention is further improved as follows: the thickness of the bottom electrode shared by the Mo control electrode, the Mo detection electrode and the Mo is 80 nm-120 nm.
A preparation method of a white light-based monolithic silicon light integrated device comprises the following steps:
on a p-type doped Si substrate, siO is grown by epitaxy 2 A dielectric isolation layer;
in SiO 2 Etching a region for preparing the MOS light-emitting device at a designated position of the dielectric isolation layer through a photoetching process, exposing a p-type doped Si substrate at the region, and sequentially depositing HfO (high-definition) at the position through a magnetron sputtering process 2 The luminous medium layer and the ITO transparent top electrode layer form a MOS structure luminous device through etching;
in SiO 2 Etching a light receiving device area for preparing the silicon photodiode at a designated position of the dielectric isolation layer through a photoetching process, exposing a p-type doped Si substrate at the area, forming an n-type doped area at the position through an ion implantation process, preparing the silicon photodiode, and forming a light receiving device of the silicon photodiode;
in SiO 2 Depositing metal Mo on the medium isolation layer through a magnetron sputtering process, forming a Mo control electrode through a photoetching process, and connecting the Mo control electrode with the ITO transparent top electrode without shielding a light-emitting area;
in SiO 2 Depositing metal Mo on the dielectric isolation layer through a magnetron sputtering process, forming a Mo detection electrode through a photoetching process, and connecting with the n-type region of the silicon photodiode without shielding the photosensitive region;
depositing Si on the completed structure by PECVD process 3 N 4 Forming a planar optical waveguide through a photoetching process, and connecting the MOS structure light emitting device with the silicon photodiode light receiving device;
si directly above MOS structured light emitting device and silicon photodiode light receiving device 3 N 4 Si to be etched is exposed at the planar optical waveguide through a photoetching process 3 N 4 Partial waveguide, by controlling the temperature of the buffer oxide etching solution and the post-baking film hardening time of the photoresist, the speed of the etching solution in different depth transverse etching is controlled to form the oblique optical coupling device;
mo is deposited by magnetron sputtering process at the bottom of the Si substrate of the completed structure to form a common bottom electrode for use as a light emitting device return electrode of MOS structure and as a light receiving device return electrode of silicon photodiode.
The technical scheme of the invention is further improved as follows: the composition of the buffer oxide etching liquid is HF, NH 4 F=15:2, and the etching temperature is 25-80 ℃.
The technical scheme of the invention is further improved as follows: before etching the inclined plane optical coupling device, the hardening temperature of the photoresist is 120 ℃ and the time is 60-150 s.
By adopting the technical scheme, the invention has the following technical progress:
1. the invention provides a monolithic silicon light integrated device based on white light and a preparation method thereof, wherein a white light emitting device with an MOS structure can be directly prepared on a Si substrate as a light source, a control electrode, the light source, an optical coupler, an optical waveguide and a light receiving device are prepared on the same Si substrate, the preparation flow meets the CMOS process requirement, and external light is not required to be introduced.
2. Compared with the prior art, the bonding process of the III-V light emitting device with higher preparation cost is omitted, and the monolithic silicon light integrated device with low cost and easy preparation is realized.
3. The MOS structure light-emitting device based on the invention has the advantages that encapsulation is not needed, white light can be directly excited in air, and stable regulation and control of signals can be realized by utilizing the control electrode. The structure and the characteristics of the device enable the silicon optical integrated device not to need to be specially packaged aiming at the light-emitting device, and further expand the application range and the scene of the silicon optical integrated device.
4. The invention provides a novel monolithic silicon light integration device and a preparation method thereof, which simplify the silicon light integration process flow, reduce the preparation cost and realize the monolithic integrated silicon-based photoelectric device with low cost.
Drawings
FIG. 1 is a schematic diagram of a monolithic silicon optical integrated device based on white light according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional view of a light emitting device with a MOS structure according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of a silicon photodiode light receiving device according to an embodiment of the present invention;
FIG. 4 is a diagram of a light emission spectrum of a MOS structure light emitting device according to an embodiment of the present invention;
FIG. 5 is a flowchart of a process for fabricating a monolithic silicon optical integrated device based on white light according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of bevel etching of a wedge-shaped optical coupling device according to an embodiment of the present invention;
wherein, 101, p-type doped Si substrate, 102, mo share a bottom electrode, 103, siO 2 Dielectric isolation layer 104, mo control electrode 105, MOS structure light emitting device 106, first Si 3 N 4 Wedge optical coupling device, 107, si 3 N 4 Planar optical waveguide 108, silicon photodiode light receiving device 109, second Si 3 N 4 Wedge optical coupling device, 110, detection electrode, 201, hfO 2 The high-k dielectric layer 202, the ITO transparent top electrode 301, the n-type doped region 601, photoresist, S702 and buffer oxide etching liquid.
Detailed Description
The invention is described in further detail below with reference to the attached drawings and examples:
in the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" … …, etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," … … are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "first", "second" … … can explicitly or implicitly include at least one such feature.
The invention provides a single-chip silicon light integrated device which is used for preparing light and electric devices for realizing silicon light integration, such as a light source device, an optical waveguide, a light receiving device and the like, on the same Si substrate by utilizing a light emitting device which can be directly prepared on the Si substrate and a continuous spectrum white light emitted by the light emitting device. Meanwhile, the invention also provides a preparation method of the monolithic silicon light integrated device based on white light, and the wedge-shaped inclined plane coupler is prepared, so that the coupling of a wide-spectrum light source can be realized, and the monolithic silicon light integration can be realized by matching with a silicon photodiode light receiver. Compared with the prior art, the invention omits the bonding process of the III-V group LED light source device, simplifies the preparation flow, reduces the preparation cost and realizes the monolithic integrated silicon-based photoelectric device with low cost and easy preparation.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a monolithic silicon optical integrated device based on white light according to an embodiment of the present invention, where the monolithic silicon optical integrated device based on white light according to the embodiment of the present invention includes:
a p-type doped Si substrate 101, which is a base for device fabrication;
SiO 2 a dielectric isolation layer 103 located over the p-type doped Si substrate 101 for electrical isolation;
a MOS structure light emitting device 105 located over the p-type doped Si substrate 101, serving as a light source;
a silicon photodiode light receiving device 108 located over the p-type doped Si substrate 101, for receiving an optical signal, and converting into an electrical signal;
mo control electrode 104, located at SiO 2 A dielectric isolation layer 103 for regulating and controlling the electric excitation to generate light signals;
mo detection electrode 110, located at SiO 2 A dielectric isolation layer 103 on top of the substrate for detecting the electrical signal after conversion;
first Si 3 N 4 A wedge optical coupling device 106, located above the MOS structure light emitting device 105, for coupling an optical signal generated by the MOS structure light emitting device 105 into the planar optical waveguide 107;
second Si 3 N 4 A wedge optical coupling device 109 located above the silicon photodiode light receiving device 108, coupling the optical signal in the planar optical waveguide 107 into the silicon photodiode light receiving device 108;
Si 3 N 4 planar optical waveguide 107 connecting first Si at both ends 3 N 4 Wedge optical coupling device 106 and second Si 3 N 4 Wedge optical coupling device 109, located at SiO 2 Over the dielectric spacer layer 103 for optical signal transmission;
mo shares the bottom electrode 102, which is located under the p-type doped Si substrate 101, and serves as a return electrode for exciting the MOS structure light emitting device 105 to emit light and a silicon photodiode light receiving device 108 to detect the return electrode.
Referring to fig. 2, fig. 2 is a schematic cross-sectional view of a light emitting device 105 with a MOS structure, where the light emitting device 105 with a MOS structure includes, in order: a p-type doped silicon substrate 101; hfO (HfO) 2 A high-k dielectric layer 201; an ITO transparent top electrode 202.
Referring to fig. 3, fig. 3 is a schematic cross-sectional view of a silicon photodiode light-receiving device 108, and the silicon photodiode light-receiving device 108 has a main structure including a p-type doped Si substrate 101 and an n-type ion implantation doped region 301 in sequence.
FIG. 4 is a graph of the luminescence spectrum of a light emitting device of MOS structure, which can excite 350 nm-950 nm continuous spectrum white light when 100 mV-60V voltage is applied.
Further, the MOS structure light-emitting device sequentially comprises a p-type doped silicon substrate with a doping concentration of 10 14 Individual/cm 3 ~ 10 18 Individual/cm 3 ；HfO 2 The thickness of the high-k dielectric layer is 3 nm-30 nm; the thickness of the ITO transparent top electrode is 80 nm-120 nm.
Further, the Si 3 N 4 The inclined plane of the wedge optical coupling device has an included angle of 30-60 degrees with the horizontal plane.
Further, the Si 3 N 4 The thickness of the planar optical waveguide is 200 nm-300 nm.
Further, the thickness of all the Mo electrodes is 80 nm-120 nm.
Referring to fig. 5, fig. 5 is a flowchart of a preparation process of a monolithic silicon optical integrated device based on white light, and the preparation method of the monolithic silicon optical integrated device based on white light, which is provided by the embodiment of the invention in combination with fig. 5, includes the following steps:
s1: a p-type doped Si substrate 101 on which 1000nm of SiO was epitaxially grown by a low-temperature CVD method was provided 2 A dielectric isolation layer 103;
s2: in SiO 2 A region for preparing the MOS light emitting device 105 is etched at a designated position of the dielectric isolation layer 103 by a photolithography process, a p-type doped Si substrate 101 is exposed at the region, and HfO is deposited at the position by a magnetron sputtering process 2 Luminescent medium layer 201, sputtering parameters: using metallic hafnium (Hf) targets, argon-oxygen ratio Ar/O 2 (20 sccm: 20 sccm), pressure was 2.3X10 −1 Pa, power 150W; the ITO transparent top electrode layer 202, the sputtering parameters are: indium Tin Oxide (ITO) and Ar/O ratio of argon-oxygen adopting ceramic targets 2 (20 sccm: 0 sccm), pressure 1.3X10 g −1 Pa, power 70W; etching the ITO top electrode 202 through a photolithography process, thereby forming a MOS structure light emitting device 105 of a specified pattern and size;
s3: in SiO 2 Etching a region for preparing the silicon photodiode light receiving device 109 at a designated position of the dielectric isolation layer 103 through a photoetching process, exposing the p-type doped Si substrate 101 at the region, forming an n-type doped region 301 at the position through an ion implantation process, forming a p-n junction between the n-type doped Si substrate 101 and the p-type doped Si substrate 101, and finally forming the silicon photodiode light receiving device 108;
s4: in SiO 2 The metal Mo is deposited on the dielectric isolation layer 103 by a magnetron sputtering process, and sputtering parameters are as follows: using metallic molybdenum (Mo) targets, argon-to-oxygen ratio Ar/O 2 (20 sccm: 0 sccm), pressure 1.3X10 g −1 Pa, power 100W. Forming a control electrode 104 by etching the Mo metal layer through a photoetching process, wherein the control electrode is connected with the ITO transparent top electrode 202 but does not shade a light-emitting area;
s5: in SiO 2 The metal Mo is deposited on the dielectric isolation layer 103 by a magnetron sputtering process, and sputtering parameters are as follows: using metallic molybdenum (Mo) targets, argonOxygen ratio Ar/O 2 (20 sccm: 0 sccm), pressure 1.3X10 g −1 Pa, power 100W. Etching the Mo metal layer by a photolithography process to form a detection electrode 110, which is connected to the n-type region of the silicon photodiode 108 but does not shield the photosensitive region;
s6: depositing Si on the completed structure by PECVD process 3 N 4 The preparation parameters are as follows: ammonia (NH) 3 ) And Si alkane (SiH) 4 ) Mixed gas (NH 3 : SiH 4 =50 sccm: 10 sccm), reaction temperature 250 ℃, discharge power 100W. Etching the layer by photolithography to form Si 3 N 4 A planar optical waveguide 107 connecting the MOS structure light emitting device 105 and the silicon photodiode light receiving device 108;
s7: si directly above the MOS-structured light emitting device 105 and the silicon photodiode light receiving device 108 3 N 4 Si to be etched is exposed at the planar optical waveguide through a photoetching process 3 N 4 Part of the waveguide is etched by controlling a buffer oxide etching solution S702 (BOE, HF: NH) 4 F=15:2) temperature and post-baking film hardening time of photoresist to control the transverse etching rate of different depths of the etching solution, so as to form oblique optical coupling devices 106 and 109;
further, first the temperature can change the BOE solution etching rate, and next referring to FIG. 6, the photoresist 601 and Si can be controlled by controlling the post-bake hardening time of the photoresist 3 N 4 The adhesion of the planar optical waveguide layer 107 allows the BOE etchant to penetrate into the photoresist and Si 3 N 4 Gaps between the layers, so that the penetrating BOE etching liquid and the external BOE etching liquid jointly act to simultaneously generate transverse and longitudinal etching, and finally an inclined plane is etched to form a first oblique Si 3 N 4 Optical coupling device 106 and second wedge Si 3 N 4 An optical coupling device 109.
Step S8: and depositing Mo sputtering parameters at the bottom of the Si substrate with the completed structure through a magnetron sputtering process, wherein the Mo sputtering parameters are as follows: using metallic molybdenum (Mo) targets, argon-to-oxygen ratio Ar/O 2 (20 sccm: 0 sccm), pressure 1.3X10 g −1 Pa, power 100W, forming a common bottom electrode 102, serving as a MOSThe loop electrode of the light emitting device is structured, and the loop electrode is detected by the light receiving device of the silicon photodiode.
In summary, the present invention provides a monolithic silicon optical integrated device based on white light, and utilizes a continuous spectrum white light emitted by a light emitting device with a MOS structure directly fabricated on a Si substrate, and provides a monolithic silicon optical integrated device for fabricating light and electric devices for implementing silicon optical integration, such as a light source device, an optical waveguide, a light receiving device, etc., on the same Si substrate, and the device provided by the present invention can directly operate in an atmospheric environment without special packaging. Meanwhile, the invention also provides a preparation method of the monolithic silicon light integrated device based on white light, and the wedge-shaped inclined plane coupler is prepared, so that the coupling of a wide-spectrum light source can be realized, and the monolithic silicon light integration can be realized by matching with a silicon photodiode light receiver. Compared with the prior art, the invention omits the bonding process of the III-V group LED light source device, simplifies the preparation flow, reduces the preparation cost and realizes the monolithic integrated silicon-based photoelectric device with low cost and easy preparation.

Claims (9)

1. A white light monolithic silicon-based optical integrated device, comprising:
a p-doped Si substrate;
SiO 2 a dielectric isolation layer on the p-type doped Si substrate
A MOS structure light emitting device located on the p-type doped Si substrate;
a silicon photodiode light receiving device located over the p-type doped Si substrate;
mo control electrode, located at SiO 2 A dielectric isolation layer over the substrate;
mo detection electrode positioned at SiO 2 A dielectric isolation layer over the substrate;
Si 3 N 4 a wedge optical coupling device, a MOS structure light emitting device and a silicon photodiode light receiving device;
Si 3 N 4 planar optical waveguide connecting Si at both ends 3 N 4 Wedge optical couplingA device at SiO 2 A dielectric isolation layer over the substrate;
mo shares the bottom electrode, below the p-doped Si substrate.
2. The white light-based monolithic silicon light integration device according to claim 1, wherein the MOS-structured light emitting device comprises a p-doped silicon substrate, hfO, in order 2 A high-k dielectric layer and an ITO transparent top electrode; wherein the doping concentration of the p-type doped silicon substrate is 10 14 Individual/cm 3 ~ 10 18 Individual/cm 3 ；HfO 2 The thickness of the high-k dielectric layer is 3 nm-30 nm; the thickness of the ITO transparent top electrode is 80 nm-120 nm.
3. The white light-based monolithic silicon light integration device according to claim 1, wherein the MOS-structured light-emitting device has an applied voltage range of 100 mV-60V and a light-emitting spectrum range of 350 nm-950 nm.
4. A white light monolithic silicon light integrated device as defined in claim 1 wherein the Si 3 N 4 The inclined plane of the wedge optical coupling device has an included angle of 30-60 degrees with the horizontal plane.
5. A white light monolithic silicon light integrated device as defined in claim 1 wherein the Si 3 N 4 The thickness of the planar optical waveguide is 200 nm-300 nm.
6. The white light-based monolithic silicon photo-integrated device according to claim 1, wherein the thickness of the Mo control electrode, the Mo detection electrode and the Mo common bottom electrode is 80nm to 120nm.
7. A method for preparing a white light-based monolithic silicon optical integrated device, which is characterized by being applied to preparing the white light-based monolithic silicon optical integrated device according to any one of claims 1 to 6, and comprising the following steps:
on a p-doped Si substrateBy epitaxial growth of SiO 2 A dielectric isolation layer;
in SiO 2 Etching a region for preparing the MOS light-emitting device at a designated position of the dielectric isolation layer through a photoetching process, exposing a p-type doped Si substrate at the region, and sequentially depositing HfO (high-definition) at the position through a magnetron sputtering process 2 The luminous medium layer and the ITO transparent top electrode layer form a MOS structure luminous device through etching;
in SiO 2 Etching a light receiving device area for preparing the silicon photodiode at a designated position of the dielectric isolation layer through a photoetching process, exposing a p-type doped Si substrate at the area, forming an n-type doped area at the position through an ion implantation process, preparing the silicon photodiode, and forming a light receiving device of the silicon photodiode;
in SiO 2 Depositing metal Mo on the medium isolation layer through a magnetron sputtering process, forming a Mo control electrode through a photoetching process, and connecting the Mo control electrode with the ITO transparent top electrode without shielding a light-emitting area;
in SiO 2 Depositing metal Mo on the dielectric isolation layer through a magnetron sputtering process, forming a Mo detection electrode through a photoetching process, and connecting with the n-type region of the silicon photodiode without shielding the photosensitive region;
depositing Si on the completed structure by PECVD process 3 N 4 Forming a planar optical waveguide through a photoetching process, and connecting the MOS structure light emitting device with the silicon photodiode light receiving device;
si directly above MOS structured light emitting device and silicon photodiode light receiving device 3 N 4 Si to be etched is exposed at the planar optical waveguide through a photoetching process 3 N 4 Partial waveguide, by controlling the temperature of the buffer oxide etching solution and the post-baking film hardening time of the photoresist, the speed of the etching solution in different depth transverse etching is controlled to form the oblique optical coupling device;
mo is deposited by magnetron sputtering process at the bottom of the Si substrate of the completed structure to form a common bottom electrode for use as a light emitting device return electrode of MOS structure and as a light receiving device return electrode of silicon photodiode.
8. The method for manufacturing a white light monolithic silicon light integrated device according to claim 7, wherein the buffer oxide etching liquid comprises HF: NH 4 F=15:2, and the etching temperature is 25-80 ℃.
9. The method for manufacturing the white light-based monolithic silicon optical integrated device according to claim 7, wherein before etching the inclined plane optical coupling device, the hardening temperature of the photoresist is 120 ℃ and the time is 60-150 s.
CN202311640413.1A 2023-12-04 2023-12-04 Monolithic silicon light integrated device based on white light and preparation method thereof Pending CN117613060A (en)

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CN202311640413.1A CN117613060A (en) 2023-12-04 2023-12-04 Monolithic silicon light integrated device based on white light and preparation method thereof

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CN117613060A true CN117613060A (en) 2024-02-27

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