CN117578851A

CN117578851A - Switching power supply device and integrated control circuit thereof

Info

Publication number: CN117578851A
Application number: CN202210942244.6A
Authority: CN
Inventors: 早川章; 古贺龙彦
Original assignee: Sanken Electric Co Ltd
Current assignee: Sanken Electric Co Ltd
Priority date: 2022-08-08
Filing date: 2022-08-08
Publication date: 2024-02-20
Also published as: JP2024023132A

Abstract

The embodiment of the application provides a control method of a switching power supply device, an integrated control circuit and the switching power supply device, wherein the integrated control circuit comprises: the control circuit includes: the overcurrent protection circuit is used for outputting an abnormality detection signal when detecting that a voltage signal corresponding to the switch current is larger than a second threshold value or a first threshold value in a switch conduction detection time period; wherein the second threshold is greater than the first threshold, and the switch-on detection period includes a leading-edge blanking period and a predetermined period after the leading-edge blanking period; and, the control circuit performs a predetermined protection operation based on the abnormality detection signal.

Description

Switching power supply device and integrated control circuit thereof

Technical Field

The application relates to the technical field of circuits.

Background

In the switching power supply device of the related art (patent document 1: japanese patent application laid-open No. 2005-130668), since the fall time of the pulse drive signal supplied to the switching element is set relatively short only at the time of transition (transient output short circuit), the fall time of the pulse drive signal supplied to the switching element is set relatively short at the time of steady-state operation, even when the transient output short circuit occurs, the surge voltage of the switching element can be suppressed, and the efficiency of the switching power supply is not affected at the time of steady-state operation.

It should be noted that the foregoing description of the background art is only for the purpose of facilitating a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background section of the present application.

Disclosure of Invention

The inventors found that, in the prior art, even under transient conditions, the loss of the switching element in the off (turn off) mode is large, and therefore, in order to suppress the surge voltage, when the off drive (off drive) of the switching element is delayed, if the semiconductor chip is a small area, the chip temperature may rise instantaneously, and there is a possibility of breakage.

To solve at least one of the above problems or other similar problems, embodiments of the present application provide a switching power supply device and an integrated control circuit thereof.

According to a first aspect of embodiments of the present application, there is provided an integrated control circuit of a switching power supply device, the integrated control circuit including: a switching element and a control circuit for controlling on and off of the switching element, the control circuit comprising:

According to a second aspect of embodiments of the present application, there is provided a switching power supply device, including the integrated control circuit of the first aspect.

One of the beneficial effects of the embodiment of the application is that: by setting the switch on detection period longer than the leading edge blanking period to detect the overcurrent and setting the second threshold larger than the normal overcurrent threshold to detect the overcurrent, the abnormal current can be detected as early as possible and timely, thereby reducing the surge voltage generated immediately after turn off, realizing the protection of the switching element, avoiding the breakage of the switching element even if the short circuit occurs, and avoiding the addition of components for abnormal protection and the heating of the element at the time of transition.

Specific embodiments of the present application are disclosed in detail below with reference to the following description and drawings, indicating the manner in which the principles of the present application may be employed. It should be understood that the embodiments of the present application are not limited in scope thereby. The embodiments of the present application include many variations, modifications and equivalents within the scope of the terms of the appended claims.

Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments in combination with or instead of the features of the other embodiments.

It should be emphasized that the term "comprises/comprising" when used herein is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.

Drawings

Elements and features described in one drawing or one implementation of an embodiment of the present application may be combined with elements and features shown in one or more other drawings or implementations. Furthermore, in the drawings, like reference numerals designate corresponding parts throughout the several views, and may be used to designate corresponding parts as used in more than one embodiment.

The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art. In the drawings:

FIG. 1 is a schematic diagram of an integrated control circuit of a switching power supply device according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a switch on detection period of an embodiment of the present application;

fig. 3A and 3B are schematic condition diagrams of outputting an abnormality detection signal according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a switching frequency change according to a feedback control signal according to an embodiment of the present application;

fig. 5 is a schematic diagram showing an internal structure of an integrated control circuit of the switching power supply device according to the embodiment of the present application;

FIG. 6 is a schematic diagram of a drive control circuit in an embodiment of the present application;

fig. 7A and 7B are schematic diagrams of conditions under which no abnormality detection signal is output in the embodiment of the present application;

fig. 8 is a schematic diagram showing an internal structure of an integrated control circuit of the switching power supply device according to the embodiment of the present application;

fig. 9 is a schematic diagram of a switching power supply device according to an embodiment of the present application;

fig. 10 is a schematic diagram of a switching power supply device according to an embodiment of the present application;

fig. 11 is a schematic diagram of a control method of the switching power supply device of the embodiment of the present application;

fig. 12 is a schematic diagram of a control method of the switching power supply device according to the embodiment of the present application.

Detailed Description

The foregoing and other features of the present application will become apparent from the following description, with reference to the accompanying drawings. In the specification and drawings, there have been specifically disclosed specific embodiments of the present application which are indicative of some of the embodiments in which the principles of the present application may be employed, it being understood that the present application is not limited to the described embodiments, but, on the contrary, the present application includes all modifications, variations and equivalents falling within the scope of the appended claims. Various embodiments of the present application are described below with reference to the accompanying drawings. These embodiments are merely exemplary and are not limiting of the present application.

In the embodiments of the present application, the terms "first," "second," "upper," "lower," and the like are used to distinguish between different elements from their names, but do not denote a spatial arrangement or temporal order of the elements, which should not be limited by the terms. The term "and/or" includes any and all combinations of one or more of the associated listed terms. The terms "comprises," "comprising," "including," "having," and the like, are intended to reference the presence of stated features, elements, components, or groups of components, but do not preclude the presence or addition of one or more other features, elements, components, or groups of components.

In the embodiments of the present application, the singular forms "a," an, "and" the "include plural referents and should be construed broadly to mean" one "or" one type "and not limited to" one "or" another; furthermore, the term "comprising" is to be interpreted as including both the singular and the plural, unless the context clearly dictates otherwise. Furthermore, the term "according to" should be understood as "at least partially according to … …", and the term "based on" should be understood as "based at least partially on … …", unless the context clearly indicates otherwise.

Example of the first aspect

Embodiments of a first aspect of the present application provide an integrated control circuit for a switching power supply device. Fig. 1 is a schematic diagram of an integrated control circuit of a switching power supply device according to an embodiment of the present application.

As shown in fig. 1, the integrated control circuit includes: a switching element 111 and a control circuit for controlling on and off of the switching element, the control circuit comprising: an overcurrent protection circuit 112 for outputting an abnormality detection signal when it is detected that the voltage signal corresponding to the switch current is greater than the second threshold or the first threshold in the switch-on detection period; wherein the second threshold is greater than the first threshold, and the switch-on detection period includes a leading-edge blanking period and a predetermined period after the leading-edge blanking period; the control circuit performs a predetermined protection operation based on the abnormality detection signal.

In some embodiments, the switching element 111 may be an element capable of performing conduction control between an input and an output by controlling a voltage applied to a control terminal of a switching tube. For example, the switching transistor may be a small MOSFET f (e.g., super junction MOSFET, SJ-MOS), etc., but this application is not limited thereto and is not exemplified herein.

In some embodiments, the control circuit further comprises: the leading edge blanking circuit LEB113 is connected to the overcurrent protection circuit 112, and is configured to control the overcurrent protection circuit 112 to perform overcurrent detection after a leading edge blanking time (leading edge blanking time period) elapses after the switch is turned on.

In the conventional method, after the leading edge blanking time, the drain current detection signal is input to the overcurrent protection circuit 112 via the leading edge blanking circuit LEB113, the overcurrent protection circuit 112 compares the drain current detection signal with an overcurrent detection voltage threshold (for example, a first threshold), and when the drain current detection signal, that is, a voltage signal corresponding to the switching current reaches the overcurrent detection voltage threshold, an off signal is output, and the switching element 111Q1 is controlled to be turned off (turned off) based on the off signal. As a result, the signal in the period in which the inrush current occurs when the switching element 111 is turned on is invalidated (blanked) in the drain current detection signal (hereinafter, also referred to as a voltage signal corresponding to the switching current). And in the leading edge blanking period, even if the drain current detection signal exceeds the first threshold, no overcurrent detection is performed.

In contrast, in the embodiment of the present application, when the overcurrent protection circuit 112 detects that the voltage signal corresponding to the switch current is greater than the second threshold or the first threshold in the switch-on detection period, an abnormality detection signal is output; wherein the second threshold is greater than the first threshold, and the switch-on detection period includes a leading-edge blanking period and a predetermined period after the leading-edge blanking period.

In some embodiments, when the overcurrent protection circuit 112 detects that the voltage signal corresponding to the switch current is greater than the second threshold or the first threshold in the switch-on detection period, outputting the abnormality detection signal includes: the overcurrent protection circuit outputs the abnormality detection signal when detecting that the voltage signal is greater than the second threshold value in the leading edge blanking period. That is, in the leading edge blanking period, when the voltage signal exceeds the newly set second threshold value, it is also determined as abnormal.

In some embodiments, when the overcurrent protection circuit 112 detects that the voltage signal corresponding to the switch current is greater than the second threshold or the first threshold in the switch-on detection period, outputting the abnormality detection signal includes: the overcurrent protection circuit outputs the abnormality detection signal when detecting that the voltage signal is greater than the first threshold value within the predetermined period of time. That is, when the voltage signal is detected to be greater than the first threshold immediately after the leading edge blanking period has elapsed, it is also determined as abnormal.

The following is a detailed description.

In some embodiments, the control circuit may further include a switch-on detection circuit 114 that outputs a switch-on detection signal (e.g., a high level signal) in synchronization with an on (turn on) signal of the switching element 111, that is, a start point of the switch-on detection period is a period (a period of time, which may also be regarded as a high level signal duration) of the switch-on detection signal when the switching element is turned on is set to be longer than a leading-edge blanking period by a predetermined time, and fig. 2 is a switch-on detection period and t in the embodiment of the present application ₁ ，t _BW A schematic diagram of the relationship, as shown in FIG. 2, the predetermined time period is continuous and non-overlapping with the leading edge blanking time period, the predetermined time period t ₁ + leading edge blanking period t _BW =switch on detection period.

In some embodiments, a normal first threshold value, which is not used for overcurrent detection during the leading edge blanking period, and a second threshold value, which is larger than the normal first threshold value, which is used for overcurrent detection even during the leading edge blanking period,

in some embodiments, in the switch on detection period, first, in the leading edge blanking period, when the overcurrent protection circuit 112 detects that there is an overcurrent exceeding the second threshold, an abnormal detection signal (e.g., a high level signal) is output, whereby it is possible to detect abnormal currents in all the switch on detection periods (including the leading edge blanking period) as compared with the related art. When the overcurrent protection circuit 112 detects that there is an overcurrent exceeding the first threshold for a predetermined period of time, an abnormality detection signal (e.g., a high-level signal) is output, whereby the exceeding of the abnormal current generated immediately after blanking is detected.

FIGS. 3A and 3B are diagrams illustrating conditions for outputting an abnormality detection signal according to an embodiment of the present application, as shown in FIG. 3A, at t _BW In this case, the presence of a voltage signal exceeding a second threshold (e.g., 1.7V) is detected, and as shown in fig. 3B, the presence of a voltage signal exceeding a first threshold (e.g., vocp) is detected for a predetermined period of time.

By providing the switch on detection period longer than the leading edge blanking period and by providing the overcurrent detection period with the second threshold value larger than the normal overcurrent threshold value, the abnormal current can be detected as early as possible and timely, thereby reducing the surge voltage generated immediately after turn off, realizing the protection of the switching element, preventing the switching element from being broken even if the short circuit occurs, and preventing the element from generating heat during the transition without adding a component for the abnormal protection.

The above-described leading edge blanking circuit 113 and the switch on detection circuit 114 are merely examples, and the foregoing leading edge blanking period and the switch on detection period may be generated by other means, which is not limited in this embodiment of the present application. The first threshold, the second threshold, and the leading edge blanking period (typically 270 ns) may be determined as desired, and the switch on detection period may be set to be slightly longer than the leading edge blanking period (slightly longer may be understood as the predetermined period being less than a time threshold, such as the switch on detection period being set to 300 ns), which is not exemplified herein.

In some embodiments, when the overcurrent protection circuit 112 detects an abnormality, the control circuit performs a predetermined protection action based on the abnormality detection signal, the predetermined protection action including one or more combinations of the following protection actions: the following description will be given of the switching frequency reduction, the switching to soft-off driving of the switching element, the overcurrent detection threshold reduction, and the blanking time elimination.

(1) With respect to lowering the switching frequency

In some embodiments, the control circuit further includes a frequency control circuit 115, where the frequency control circuit 115 is an Oscillator (OSC) that can control the switching frequency of the switching element, and the frequency control circuit 115 is based on the PWM mode, i.e. determines the oscillating frequency during PWM control, and the configuration of the frequency control circuit 115 may refer to the prior art and will not be described in detail herein. In the normal oscillation operation, the frequency control circuit 115 may control the switching frequency (oscillation frequency) of the switching element according to the feedback control (FB) signal. The feedback control (FB) signal will be described in the later-described embodiment.

Fig. 4 is a schematic diagram showing a change of the switching frequency according to the feedback control signal in the embodiment of the present application, as shown in fig. 4, the frequency control circuit 115 controls the switching frequency of the switching element to rise from the first frequency to a fixed frequency (green mode function) when the load is constant according to the feedback control signal from the light load to the heavy load according to the FB signal. The first frequency is the lowest frequency f1, the fixed frequency is the highest frequency f0, the lowest frequency may be 20kHZ, that is, sound at a frequency just audible to humans, and the highest frequency may be 150kHZ, which is merely illustrative and the embodiments of the present application are not limited thereto.

As shown in fig. 4, when the feedback signal voltage is VFB1 or less, the frequency control circuit 115 controls the switching frequency to be the normal minimum frequency f1. When the feedback signal voltage is VFB2 or higher, the frequency control circuit 115 sets the switching frequency to the normal highest frequency f0. When the FB voltage is within the range of VFB1 to VFB2, the frequency control circuit 115 increases the oscillation frequency from the lowest frequency f1 to the highest frequency f0 according to the feedback signal voltage VFB. Although fig. 4 shows an example in which the switching frequency is linearly increased, the switching frequency may be increased stepwise or non-linearly.

In some embodiments, the frequency control circuit 115 performs the predetermined protection action according to the anomaly detection signal, including: the frequency control circuit reduces the switching frequency of the switching element to a first frequency according to the abnormality detection signal. That is, when an abnormality is detected, the gate drive is turned off (turn off), and the next switching element on (turn on) timing is delayed. For example, the frequency control circuit controls the switching frequency to be directly reduced to the first frequency or gradually linearly reduced to the first frequency or gradually and stepwise reduced to the first frequency. The rule (waveform) concerning the drop can be determined by the waveform generation section.

In some embodiments, in order to more flexibly control the change (falling law, etc.) of the switching frequency, the control circuit may further include a waveform generation part 116 connected to the frequency control circuit 115, the waveform generation part 116 generates a frequency falling waveform signal based on the abnormality detection signal (high level signal), and inputs the frequency falling waveform signal to the frequency control circuit 115, the frequency control circuit 115 controls the switching frequency to fall to the first frequency according to the frequency falling waveform signal, for example, the waveform generation part 116 inputs a low level signal to the frequency control circuit 115 to directly fall (transfer) the switching frequency to the first frequency, or the waveform generation part 116 may further output a waveform signal (linear) that linearly falls or a waveform signal (nonlinear) that stepwise falls with time, so that the switching frequency gradually linearly falls to the first frequency or gradually stepwise falls to the first frequency, and the specific circuit structure of the waveform generation part 116 may refer to the prior art, without being limited thereto.

In this way, in the case of abnormality detection, the increase in the voltage of the drain and source of the switching element at the time of abnormality is suppressed and the frequency is reduced, so that the heat generation of the switching element at the time of transition is suppressed in a distributed manner, and the loss of the switching element is reduced by enlarging the duty ratio in the off period.

In some embodiments, to further advance the detection of an over-current after the over-current protection circuit 112 detects an anomaly, the predetermined protection action may include: (2) - (4), detailed description below.

(2) Reducing an overcurrent detection threshold

In some embodiments, the control circuit performing the predetermined protection action based on the anomaly detection signal comprises: the overcurrent protection circuit 112 reduces the first threshold to a third threshold according to the abnormality detection signal, and then performs abnormality detection. The third threshold may be set as desired, for example, the third threshold may be two-thirds of the first threshold, but is merely illustrative and not limiting.

In some embodiments, the overcurrent detection threshold (for overcurrent detection after abnormality detection) may be lowered by changing the first threshold to the third threshold, or a plurality of threshold voltages may be set in advance, and the overcurrent detection threshold (for overcurrent detection after abnormality detection) may be lowered by switching the first threshold to the third threshold.

In some embodiments, the bias voltage may be overlapped on the overcurrent detection voltage, so as to change the first threshold value to the third threshold value, so that the operation start time of the overcurrent protection circuit is advanced, and multiple thresholds are not required to be set, so that the implementation is simple.

Thus, by reducing the threshold value of the overcurrent detection after the abnormality is detected, the peak value of the switching current is suppressed, the problem that the abnormal current cannot be suppressed by the 1 st threshold value is avoided, and the overcurrent detection speed is improved, that is, the overcurrent detection after the abnormality detection signal is output is further advanced, that is, the abnormality after the abnormality detection signal is output is detected as early as possible.

(3) Eliminating leading edge blanking periods

In some embodiments, the control circuit performing the predetermined protection action based on the anomaly detection signal comprises: the leading edge blanking time is eliminated. That is, at the time of on, normal overcurrent detection (the overcurrent detection threshold is the first threshold) is performed on the current including the inrush current.

In some embodiments, the leading edge blanking circuit 113 may be disconnected from the over-current protection circuit 112, that is, the voltage signal corresponding to the switching current does not need to pass through the leading edge blanking circuit 113, but the over-current detection is directly performed (the first threshold is the over-current detection threshold), or the leading edge blanking circuit 113 may be modified to eliminate the leading edge blanking time, which is not limited in this application, and the above embodiments may avoid the problem that the abnormal current cannot be suppressed.

(4) Switching to soft off drive

In some embodiments, the control circuit further includes a drive control circuit 117, and the drive control circuit 117 outputs a drive signal DRV that drives the switching element 111 to control on/off (on/off). The gate terminal of the switching element 111 is connected to the drive control circuit 117. How this drive signal is generated will be described later.

In some embodiments, the driving control circuit 117 performs the predetermined protection action according to the abnormality detection signal, including: switching to soft off drive. That is, the operation at the time of the switch off driving is switched to the soft driving, that is, the off speed of the gate driving is set to be slow, whereby the off driving is delayed, and the surge voltage of the drain voltage can be suppressed, and if the switching frequency is lowered at the same time as the abnormality detection, the rise in the chip temperature can be suppressed by obtaining the heat radiation time after the chip generates heat.

Fig. 6 is a schematic diagram of a drive control circuit in the embodiment of the present application, as shown in fig. 6, after detecting an abnormality, according to an abnormality detection signal (high level signal, drive switching signal), the switch 41 is controlled to switch off the drive mode, the operation of the drive element 24 for closing (opening) is stopped, and the voltage change dv/dt at the time of switching off is slowed by being performed on the drive element 23 alone for closing (opening), that is, the switch is switched to soft-off drive, and the implementation of the drive control circuit (for example, other components and connection relations of the drive control circuit in fig. 6) can refer to the prior art, and the embodiment of the present application is not limited thereto.

Fig. 5 is a schematic diagram of an internal structure of an integrated control circuit of a switching power supply device according to an embodiment of the present application, and as shown in fig. 5, the integrated control circuit includes:

a switching element Q1, a feedback signal detection circuit 11, a frequency control circuit 12, a Leading Edge Blanking (LEB) circuit 13, a start circuit 14, a switching current waveform correction circuit 15, an overcurrent protection circuit (OCP) 16, a drive control circuit (DRV) 17, a waveform generation unit (MODE) 18, a switch on detection circuit 19, a LATCH circuit LATCH20, a plurality of logic circuits and flip-flops, and the like.

The integrated control circuit has: D/ST (MOSFET drain/start current input) terminals; an S/OCP (MOSFET source/over-current protection) terminal; a Vcc (integrated control circuit power supply voltage input) terminal; FB/OLP (feedback signal input/overload protection signal input) terminal; and a GND (ground) terminal. A feedback signal detection circuit 11 is connected to the FB/OLP terminal connected to the light receiving transistor PC 2. The source of the switching element Q1 is connected to the S/OCP terminal, and is connected to the primary GND via an external resistor Rocp.

The start circuit 14 is connected between the D/ST terminal and the Vcc terminal, and turns on/off a constant current to the Vcc terminal via a high withstand voltage element of the rectifying circuit DB, which is not shown in the rectified voltage.

The Leading Edge Blanking (LEB) circuit 13 is connected to the switching current waveform correction circuit 15, the feedback signal detection circuit 11, AND the S/OCP terminal, wherein the feedback signal detection circuit 11 is further connected to the FB/OLP terminal, AND a voltage (drop) signal of an external resistor Rocp, which is a switching current signal of the switching element Q1 of the S/OCP terminal, is input through the Leading Edge Blanking (LEB) circuit 13, AND is compared with a feedback signal from the FB/OLP terminal in a normal case, AND when the switching current signal is larger than the feedback signal, an H signal is sent to the logic circuit AND2, AND the flip-flop circuit FF1 is reset. Thereby, the switching element Q1 is turned OFF (OFF) via the logic circuits AND1, AND3 AND the drive control circuit (DRV) 17.

In some embodiments, the structure of the feedback signal detection circuit 11 can refer to the prior art, and is not described herein, for example, the feedback signal detection circuit 11 includes a comparator, etc., and switches the current signal (i.e. the voltage signal V _ocp ) With FB voltage V _FB Comparing when the switch current signal is greater than V _FB When the switching element is turned OFF, a high-level output signal (i.e., feedback control signal FB signal) is output, and the drive control circuit (DRV) 17 is driven based on the output signal.

In some embodiments, the frequency control circuit 12 is connected to the feedback signal detection circuit 11, and during normal operation controls the switching frequency, e.g. from a first frequency to a fixed frequency, in dependence on a feedback control signal (FB signal) from the feedback signal detection circuit 11.

In addition, for example, the frequency control circuit 12 generates a ramp wave based on a constant current circuit and a capacitor, and outputs a one-shot signal to the set terminal of the flip-flop circuit FF1 according to the ramp wave. Thereby, the switching element Q1 is turned ON (turned ON) via the logic circuits AND1, AND3 AND the drive control circuit (DRV) 17.

The embodiments in which the circuits operate during normal operation are described above, and the overcurrent detection function of the integrated control circuit is described below with reference to fig. 5.

In some embodiments, the switch-on detection circuit 19 outputs a switch-on detection signal (for example, a high level signal) in synchronization with an on (turn on) signal of the switching element Q1, that is, a start point of the switch-on detection period is a period of the switch-on detection signal when the switching element is turned on, and after the switching element is turned on, a voltage signal corresponding to the switch current may be directly input to the overcurrent protection circuit 16, and the abnormal detection signal is output when the voltage signal is detected to be greater than the second threshold value in the leading edge blanking period. The voltage signal is input to an overcurrent protection circuit (OCP) 16 via a switching current waveform correction circuit 15 after passing through a leading edge blanking circuit 13, and the abnormality detection signal is output when the voltage signal is detected to be greater than the first threshold value in the predetermined period.

In some embodiments, the overcurrent protection circuit 16 inputs an abnormality detection signal (high-level signal) to an input terminal of the logic circuit OR1, and the switch-on detection circuit 10 inputs the switch-on detection signal (high-level signal) to the logic circuit OR1, and therefore, when the overcurrent protection circuit 16 detects that there is an overcurrent exceeding the first threshold OR exceeding the second threshold during the switch-on detection period, an H-level signal is output from the overcurrent detection circuit OCP to the other input terminal of the logic circuit OR1, and the output of the logic circuit OR1 is the high-level signal (corresponding to the abnormality detection signal) to the LATCH circuit LATCH20. Meanwhile, the overcurrent protection circuit 16 outputs an abnormality detection signal to the logic circuit AND2, inputs a high-level signal to the reset terminal of the flip-flop circuit FF1, AND inverts the gate drive DRV signal of the drive control circuit (DRV) 17 to an L level via the logic circuits AND1 AND3, AND turns off (turns off) the switching element Q1 to protect the circuit.

In some aspects, an output terminal of the LATCH circuit 20 is connected to an input terminal of the waveform generation section 18, an output terminal of the waveform generation section 18 is connected to the frequency control circuit 12, when the LATCH circuit LATCH20 is inputted with the abnormality detection signal, the LATCH circuit LATCH20 output signal is maintained at a high level and is inputted to the waveform generation section 18, the waveform generation section 18 generates a frequency-falling waveform signal based on the abnormality detection signal (high level signal), and inputs the frequency-falling waveform signal to the frequency control circuit 12, and the frequency control circuit 12 controls the switching frequency to fall to the first frequency according to the frequency-falling waveform signal, specifically as described above, which will not be described here.

In some aspects, the output terminal of the LATCH circuit 20 may be further connected to the switching current waveform correction circuit 15, and when the abnormality detection signal is input to the LATCH circuit LATCH20, the output signal of the LATCH circuit LATCH20 is maintained at a high level and input to the switching current waveform correction circuit 15, and the switching current waveform correction circuit 15 superimposes a bias voltage on the switching current signal from the Leading Edge Blanking (LEB) circuit 13 based on the abnormality detection signal (high level signal), thereby advancing the operation start time of the overcurrent protection circuit (OCP) 16 after the abnormality is detected.

In some aspects, the output terminal of the LATCH circuit 20 may also be connected to the leading edge blanking circuit 13, and when the LATCH circuit LATCH20 is inputted with an abnormality detection signal, the LATCH circuit LATCH20 output signal is maintained at a high level and inputted to the leading edge blanking circuit 13, and the leading edge blanking circuit 13 eliminates the leading edge blanking time after detecting an abnormality based on the abnormality detection signal (high level signal).

In some aspects, the output terminal of the LATCH circuit 20 may also be connected to the drive control circuit 17, and when the LATCH circuit LATCH20 is inputted with an abnormality detection signal, the LATCH circuit LATCH20 output signal is maintained at a high level and inputted to the drive control circuit 17 (for example, a switch 41 shown in fig. 6), and the drive control circuit 17 switches to soft-off driving after detecting an abnormality based on the abnormality detection signal (high level signal). That is, the operation at the time of the switch off driving is switched to the soft driving, that is, the off speed of the gate driving is set to be slow. With respect to the implementation manner of the driving control circuit (such as other components and connection relationships of the driving control circuit in fig. 6), reference may be made to the prior art, and the embodiment of the present application is not limited thereto.

The circuit connection relationships and control manners of the above aspects may be implemented alone or in combination, and the embodiments of the present application are not limited thereto.

In addition, optionally, the integrated control circuit may further include an overload protection OLP circuit, an overvoltage protection OVP circuit, a thermal shutdown TSD circuit, and the like, where specific connection relationships and functions thereof may refer to the prior art, and are not described herein in detail.

In some embodiments, when the abnormality detection signal is not detected in the switch on detection period, the setting of the overcurrent detection may be released, as will be described below.

In some embodiments, the latch circuit 20 has a function of a timer that can maintain the latch state for a certain period of time, and release after the certain period of time has elapsed. And when the overcurrent protection circuit does not output the abnormal detection signal in the switch conduction detection time period, releasing the timer of the latch circuit. That is, when the switch on detection period does not exceed the second threshold OR the first threshold, the abnormality detection signal (high level signal) is not input from the logic circuit OR1 to the latch circuit 20, and therefore, the switching operation is released after the end of the timer timing. That is, when the abnormality detection signal is not output in any of the on detection periods of the switch, the signal is not output from the logic circuit OR1, and the overcurrent detection is returned to the original state (for example, the overcurrent detection is performed using the overcurrent detection threshold in the normal (existing) state) as long as the timing time of the timer elapses. The latch circuit 20 maintains the setting of the first threshold value and the second threshold value and the corresponding overcurrent detection for the period of time set by the timer, and thus maintains the state after the frequency is lowered.

In some embodiments, the time of the timer is set to be at least a period longer than the lowest frequency. Thus, even in the next switching cycle, when an abnormality occurs, the state of abnormality detection can be maintained.

FIGS. 7A and 7B are diagrams showing conditions under which no abnormality detection signal is output in the embodiment of the present application, as shown in FIGS. 7A and 7B, at t _BW In this case, the presence of the voltage signal of the second threshold is not detected, and the voltage signal exceeding the first threshold (or even the third threshold) is not detected for a predetermined period of time.

In some embodiments, in addition to releasing the aforementioned setting of the overcurrent detection using the timer function of the latch circuit, an additional release circuit may be provided in the integrated control circuit to release (e.g., release at the next switching) the aforementioned setting of the overcurrent detection.

Fig. 8 is a schematic diagram of an integrated control circuit according to an embodiment of the present application, which is different from fig. 5 in that a release circuit 800 is further added in fig. 8, and the release circuit is configured to reset the latch circuit at the timing of the next switch when the overcurrent protection circuit does not output the abnormality detection signal during the switch-on detection period.

In some embodiments, the cancel circuit 800 includes a D-FF logic circuit FF2801, a delay circuit DL802, and a diode 803, and an output signal of the logic circuit OR1 is input to an input terminal of the D-FF logic circuit FF2801 via the delay circuit DL 802. In addition, the output signal of the logic circuit AND3 is input to the clock terminal CK of the D-FF logic circuit FF2801, AND at the lower edge, when the output signal of the logic circuit OR1 reaches a low level, a reset signal is output to the latch circuit 20.

That is, in a condition in which no abnormality is detected (the overcurrent protection circuit 16 does not output an abnormality detection signal), the output signal of the logic circuit OR1 is in a low level state, and therefore, at the timing of the lower edge of the drive control signal (timing of turning on to off), the setting at the time of the foregoing various abnormality detection is released by resetting (reset) the latch circuit 20.

When an abnormality is detected (the overcurrent protection circuit 16 outputs an abnormality detection signal), the output signal of the logic circuit OR1 goes high, and the delay circuit DL802 keeps the high level of the input terminal of the D-FF logic circuit FF2801 until the lower edge of the drive control signal is reached, thereby not resetting the operation of the latch circuit 20.

It should be noted that, the integrated control circuit of the embodiment of the present application may further include other structures according to actual needs, or may not include some of the structures shown in the drawings, specifically including which structures may be set according to actual needs with reference to related technologies, which is not limited in this embodiment of the present application.

As is clear from the above embodiments, by setting the switch on detection period longer than the leading edge blanking period to perform overcurrent detection and setting the second threshold larger than the normal overcurrent threshold to perform overcurrent detection, it is possible to detect abnormal current as early as possible and timely, thereby reducing surge voltage generated immediately after turn off, realizing protection of the switching element, preventing breakage of the switching element even if a short circuit occurs, and avoiding the need to add a component for abnormal protection, and preventing element heat generation at the time of transition.

Embodiments of the second aspect

An embodiment of a second aspect of the present application provides a switching power supply device, where the switching power supply device of the embodiment of the present application includes the integrated control circuit according to the embodiment of the first aspect. Since in the embodiment of the first aspect, the structure and function of the integrated control circuit have been described in detail, the contents thereof are incorporated herein, and the description thereof is omitted herein.

Fig. 9 is a schematic diagram of a switching power supply device according to an embodiment of the present application, as shown in fig. 9, a switching power supply device 900 includes:

a rectifying circuit DB; a smoothing capacitor Cin, co, cd; a transformer T; an integrated control circuit 901; rectifier diodes D1, D2; a shunt regulator Z1; a light emitting diode PC1 and a light receiving transistor PC2 constituting a photocoupler; a current detection resistor Rocp; resistance Rb, rc; capacitor C4.

The commercial AC power AC is connected to AC input terminals ACin1 and ACin2 of the rectifier circuit DB configured by a diode bridge, and an AC voltage input from the commercial AC power AC is full-wave rectified and output from the rectifier circuit DB. A smoothing capacitor Cin is connected between the rectifying output positive terminal and the rectifying output negative terminal of the rectifying circuit DB. The rectifying output negative terminal of the rectifying circuit DB is connected to the ground terminal. Thus, a direct current power supply (input voltage) obtained by rectifying and smoothing the commercial alternating current power supply AC by the rectifying circuit DB and the smoothing capacitor Cin is obtained.

The transformer T for supplying electric power from the primary side (input side) to the secondary side (load side) is configured by a primary winding P, an auxiliary winding D, and a secondary winding S, a rectifying output positive terminal of the rectifying circuit DB is connected to one end portion of the primary winding P of the transformer T, the other end portion of the primary winding P of the transformer T is connected to a D/ST terminal of the integrated control circuit 901, and an S/OCP terminal of the integrated control circuit 901 is connected to a ground terminal via a resistor Rocp. As a result, the switching element incorporated in the integrated control circuit 901 performs on/off control, and electric power supplied to the primary winding P of the transformer T is transmitted to the secondary winding S of the transformer T, so that a pulse voltage is generated in the secondary winding S of the transformer T. The current detection resistor Rocp is connected as a resistor that detects a current flowing through a switching element incorporating the integrated control circuit 901 as the voltage signal Vocp. The integrated control circuit 901 has an over-current protection (OCP) function, as described in particular in the embodiments of the first aspect, and is not repeated here.

A snubber circuit composed of a diode D3, a capacitor Ca, and a resistor Ra is connected between both ends of the primary winding P of the transformer T. The diode D3 and the capacitor Ca are connected in series between both ends of the primary winding P of the transformer T, and the resistor Ra and the capacitor Ca are connected in parallel. The diode D3 is connected in a forward bias direction based on a voltage generated at the primary winding P of the transformer T when the switching element incorporated in the integrated control circuit 901 is turned off.

A smoothing capacitor Co is connected between both terminals of the secondary winding S of the transformer T via a rectifier diode D1. The voltage induced by the secondary winding S of the transformer T is rectified and smoothed by the rectifier diode D1 and the smoothing capacitor Co, and the inter-terminal voltage of the smoothing capacitor Co is output from the output terminal as the output voltage Vo. The line connected to the positive electrode terminal of the smoothing capacitor Co serves as a power supply line, and the line connected to the negative electrode terminal of the smoothing capacitor Co serves as a GND line connected to the ground terminal.

A shunt regulator Z1 functioning as a light emitting diode PC1 and an error amplifier is connected in series between the output power supply line and GND line. The output power line is connected with the positive electrode of the light emitting diode PC1, the negative electrode of the light emitting diode PC1 is connected with the negative electrode of the shunt regulator Z1, and the positive electrode of the shunt regulator Z1 is connected with the GND line. Further, a resistor Rb for voltage division and a resistor Rc are connected in series between the power supply line and the GND line, and a connection point of the resistor Rb and the resistor Rc is connected to the control terminal a of the shunt regulator Z1. The output voltage Vo divided by the resistor Rb and the resistor Rc is input to the control terminal a of the shunt regulator Z1, and is compared with the internal reference voltage of the shunt regulator Z1. Accordingly, a current corresponding to the error voltage flows through the light emitting diode PC1, and the current flowing through the light emitting diode PC1 is outputted from the light emitting diode PC1 to the primary-side light receiving transistor PC2 as a feedback signal. The integrated control circuit 901 controls the duty ratio and the switching frequency of the switching element according to the feedback signal input to the FB/OLP terminal, thereby controlling the amount of electric power supplied to the secondary side.

A smoothing capacitor Cd is connected between both terminals of the auxiliary winding D of the transformer T via a rectifier diode D2, and a connection point between the rectifier diode D2 and the smoothing capacitor Cd is connected to the Vcc terminal of the integrated control circuit 901. Thus, the voltage generated in the auxiliary winding D is rectified and smoothed by the rectifying diode D2 and the smoothing capacitor Cd, and then supplied to the Vcc terminal of the integrated control circuit 901 as the power supply voltage Vcc for the integrated control circuit 901.

Fig. 10 is a schematic diagram of a switching power supply device according to the embodiment of the present application, and the same points as those in fig. 9 are not repeated, and the switching power supply device in fig. 10 is a non-insulated buck converter, which does not include a transformer, and current flows to a load terminal through an inductor, and meanwhile, the inductor L1 also stores electric energy, at this time, when the connection between D/ST and S/OCP is opened, the diode D1 is turned on, and the electric energy stored in the inductor L1 is supplied to the load terminal. The regenerative current of the inductor L1 flows through the diode D2 and is supplied to the capacitor Cd. For the specific structure of the non-isolated buck converter, please refer to the prior art, for example, the diode D1 may also be formed by a switching element, which is not described herein.

It should be noted that, the switching power supply device according to the embodiment of the present application may further include other structures according to actual needs, or may not include part of the structures shown in the drawings, and specifically include which structures may be set according to actual needs with reference to the related art, which is not limited in this embodiment of the present application.

Embodiments of the third aspect

An embodiment of a third aspect of the present application provides a control method of a switching power supply device. Since the integrated control circuit structure and functions of the switching power supply device have been described in detail in the embodiments of the first aspect, the same is incorporated herein, and the description thereof is omitted.

Fig. 11 is a schematic diagram of a control method of the switching power supply device according to the embodiment of the present application, as shown in fig. 11, the control method includes:

1101, outputting an abnormality detection signal when the overcurrent protection circuit detects that a voltage signal corresponding to the switch current is greater than a second threshold or a first threshold in a switch on detection period; wherein the second threshold is greater than the first threshold, and the switch-on detection period includes a leading-edge blanking period and a predetermined period after the leading-edge blanking period; the method comprises the steps of carrying out a first treatment on the surface of the

1102, the control circuit performs a predetermined protection operation based on the abnormality detection signal.

For the implementation manners of 1101-1102, reference may be made to the embodiment of the first aspect, which is not described herein.

Fig. 12 is a schematic diagram of a control method of the switching power supply device according to the embodiment of the present application, as shown in fig. 11, where the control method includes:

1201, detecting whether a voltage signal corresponding to the switch current exceeds a second threshold value in a leading edge blanking period after the switch is turned on; executing 1203-1207 when exceeded, otherwise executing 1202;

1202, detecting whether a voltage signal corresponding to the switching current exceeds a first threshold value in a predetermined period after a leading edge blanking period has elapsed; executing 1203-1207 when exceeded, otherwise executing 1208;

1203, the overcurrent protection circuit outputs an abnormality detection signal;

1204, controlling the switching frequency to be reduced to a first frequency by the frequency control circuit according to the abnormality detection signal;

1205, switching the drive control circuit to soft-off drive based on the abnormality detection signal;

1206, reducing the first threshold to a third threshold according to the abnormality detection signal, and performing overcurrent detection;

1207, eliminating blanking time according to the abnormality detection signal;

The above 1204-1207 may be implemented separately, or in combination, or sequentially, or simultaneously, and the embodiments of the present application are not limited thereto.

1208, the overcurrent protection circuit performs overcurrent detection in a normal (existing) state by releasing the settings at the time of the foregoing various abnormality detection.

It should be noted that fig. 11 to 12 above are only illustrative of the embodiments of the present application, but the present application is not limited thereto. For example, the order of execution among the operations may be appropriately adjusted, and other operations may be added or some of the operations may be reduced. Those skilled in the art can make appropriate modifications in light of the above, and are not limited to the descriptions of fig. 11 to 12.

The above embodiments are merely illustrative of the embodiments of the present application, but the present application is not limited thereto, and appropriate modifications may be made on the basis of the above embodiments. For example, each of the above embodiments may be used alone, or one or more of the above embodiments may be combined.

Moreover, while those skilled in the art may have great effort and many design choices are made by, for example, available time, current technology, and economic considerations, they can readily generate such software instructions and programs and Integrated Circuits (ICs) with minimal experimentation, given the guidance of the concepts and principles disclosed herein.

In general, the various embodiments of the invention may be implemented in software or special purpose circuits, hardware, logic or any combination thereof. Some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device.

While embodiments of the invention have been illustrated and described in block diagrams, flow charts, or using some other pictorial representation, it is well understood that blocks, apparatus, systems, or methods described herein may be implemented in, without limitation, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or combinations thereof.

Also, while the above description contains details of several embodiments, these should not be construed as limitations on the scope of the invention, but rather as descriptions of features specific to particular embodiments. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of separate embodiments can also be implemented in multiple embodiments separately or in suitable combination.

Although the invention has been described in language specific to structural features and/or methodological acts, it is to be understood that the invention defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

The present application has been described in connection with specific embodiments, but it should be apparent to those skilled in the art that these descriptions are intended to be illustrative and not limiting. Various modifications and alterations of this application may occur to those skilled in the art in light of the spirit and principles of this application, and are to be seen as within the scope of this application.

Claims

1. An integrated control circuit of a switching power supply device, the integrated control circuit comprising: a switching element and a control circuit for controlling on and off of the switching element, characterized in that the control circuit comprises:

the overcurrent protection circuit is used for outputting an abnormality detection signal when detecting that a voltage signal corresponding to the switch current is larger than a second threshold value or a first threshold value in a switch conduction detection time period; wherein the second threshold is greater than the first threshold, and the switch-on detection period includes a leading-edge blanking period and a predetermined period after the leading-edge blanking period;

and, the control circuit performs a predetermined protection operation based on the abnormality detection signal.

2. The integrated control circuit according to claim 1, wherein the overcurrent protection circuit outputs the abnormality detection signal when the voltage signal is detected to be greater than the first threshold value within the predetermined period.

3. The integrated control circuit according to claim 1, wherein the overcurrent protection circuit outputs the abnormality detection signal when the voltage signal is detected to be greater than the second threshold value in the leading edge blanking period.

4. An integrated control circuit according to any one of claims 1 to 3, wherein the control circuit further comprises a frequency control circuit that performs the predetermined protection action in accordance with the abnormality detection signal, comprising: the frequency control circuit reduces the switching frequency of the switching element to a first frequency according to the abnormality detection signal.

5. The integrated control circuit of claim 4, wherein the frequency control circuit controls the switching frequency to drop directly to the first frequency or to drop linearly stepwise to the first frequency or to drop stepwise to the first frequency.

6. An integrated control circuit according to any one of claims 1 to 3, wherein the control circuit further comprises a drive control circuit that performs the predetermined protection action in accordance with the abnormality detection signal, comprising: switching to soft off drive.

7. An integrated control circuit according to any one of claims 1 to 3, wherein the control circuit performing the predetermined protection action in accordance with the anomaly detection signal comprises: and the overcurrent protection circuit reduces the first threshold value to a third threshold value according to the abnormality detection signal and then performs abnormality detection.

8. The integrated control circuit of claim 7, wherein the over-current protection circuit alters the first threshold to the third threshold by superimposing a bias voltage on an over-current detection voltage.

9. An integrated control circuit according to any one of claims 1 to 3, wherein the control circuit performs the predetermined protection action in accordance with the abnormality detection signal, comprising: the leading edge blanking time is eliminated.

10. The integrated control circuit according to claim 1, wherein the control circuit further includes a latch circuit that releases a timer of the latch circuit when the overcurrent protection circuit does not output the abnormality detection signal for the switch-on detection period.

11. The integrated control circuit according to claim 1, wherein the control circuit further comprises a release circuit for resetting the latch circuit at a timing of a next switch when the overcurrent protection circuit does not output the abnormality detection signal for the switch on detection period.

12. A switching power supply device comprising an integrated control circuit as claimed in any one of claims 1 to 11.