JP2010124573A - Switching power supply unit and semiconductor apparatus used for the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching power supply unit which performs soft start for reducing overshoot of rush current and output voltage when power supply is started and can prevent deterioration and damage of a main switching element due to flowing of current of not less than a maximum allowable current value to the main switching element in a soft start period. <P>SOLUTION: The switching power supply unit includes a blanking period generation circuit 23 inhibiting turn-on of the main switching element 2 until blanking time elapses after the main switching element 2 is turned on. The unit is also provided with a soft start period generation circuit 25 deciding the soft start period until soft start time elapses after the main switching element 2 starts oscillation and a blanking time adjusting circuit 26 for generating a signal for shortening blanking time compared to time after lapse of the soft start period during the soft start period. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a switching power supply device and a semiconductor device used therefor.

  A switching power supply used to obtain an output voltage having a voltage value different from that of the input power supply voltage is generally generated by PWM (pulse width modulation) control based on a signal obtained by feeding back the output voltage. The main switching element is driven based on the PWM signal thus generated to generate an AC voltage in an energy converter such as a coil or a transformer, and the AC voltage is rectified and smoothed to generate a predetermined output voltage.

  Such a switching power supply device attempts to switch the main switching element at the maximum on-duty of the PWM signal in an attempt to charge the output-side smoothing capacitor when the power supply is activated. As a result, the output voltage overshoots and an output voltage higher than a predetermined value occurs for a certain period of time, or an excessive current (inrush current) flows to the main switching element, energy converter such as a coil or transformer, etc. There was a problem that these members were destroyed.

  Therefore, Patent Document 1 discloses a switching power supply apparatus that performs a soft start that gradually increases the on-duty of a PWM signal at the time of power supply startup in order to reduce inrush current and output voltage overshoot at the time of power supply startup. Hereinafter, a conventional switching power supply device disclosed in Patent Document 1 will be described with reference to FIG. FIG. 9 is a circuit diagram of a conventional switching power supply device.

  As shown in FIG. 9, a power switch 102 and a capacitor 103 connected to the terminal 101 of the IC 100 are provided outside the IC 100, and a constant current source 104 connected to the terminal 101 is provided inside the IC 100. .

  When the power switch 102 is turned off to start the power supply, the capacitor 103 is charged by the constant current source 104. When the voltage at the terminal 101 becomes equal to or higher than the reference voltage Vf of the comparator 105, the bias circuit 106 is connected to each internal circuit of the IC 100. Supply of the power supply voltage Vcc to the circuit (block) is started. Conversely, when the power switch 102 is turned on to stop the power supply, the capacitor 103 is discharged, and when the voltage at the terminal 101 falls below the reference voltage Vf of the comparator 105, the bias circuit 106 supplies the power supply voltage Vcc. Stop.

  In addition, the IC 100 is provided with a switching voltage generator 111 including a switching transistor 107 as a main switching element, a rectifier diode 108, a coil 109 as an energy converter, and a smoothing capacitor 110. The switching voltage generator 111 generates an output voltage having a voltage value different from that of the power supply voltage Vcc supplied from the bias circuit 106, and this output voltage is supplied as a power supply voltage to a desired circuit. The output voltage is also supplied as a feedback signal to the error amplifier 113 via the voltage dividing circuit 112 composed of two resistors.

  The error amplifier 113 compares the voltage supplied from the voltage dividing circuit 112 with the reference voltage Vr, and generates an error signal having a voltage corresponding to the difference therebetween. This error signal is supplied to the PWM comparator 114. During normal operation, the PWM comparator 114 compares the error signal with a reference triangular wave generated by the triangular wave generator 115 to generate a pulse signal (PWM signal) having a duty ratio according to the voltage of the error signal. This PWM signal is supplied to the transistor driver 116. The transistor driver 116 controls the on-time of the switching transistor 107 according to the duty ratio of the PWM signal.

  With the configuration described above, when the output voltage is low, the error signal voltage increases, the ON time of the switching transistor 107 increases, the output voltage increases, and conversely, when the output voltage is high, the ON time of the switching transformer 107 increases. The output voltage decreases.

  The PWM comparator 114 is a three-input comparator, and the terminal 101 is connected to the other input terminals. The PWM comparator 114 compares the lower voltage of the error signal voltage and the terminal 101 voltage with the reference triangular wave. As described above, when the power switch 102 is turned off to start the power supply, the voltage at the terminal 101 gradually increases. Therefore, when the power supply is activated, the PWM comparator 114 compares the voltage of the terminal 101 that gradually increases with the reference triangular wave, and generates a pulse signal (PWM signal) that gradually increases the on-duty.

  In this way, when the power supply is started, the voltage of the external capacitor that gradually increases and the reference triangular wave are compared by the PWM comparator, and the soft start is executed by generating the PWM signal that gradually increases the on-duty. Conventionally, a switching power supply device has been proposed.

  Some switching power supply devices have an overcurrent protection function for protecting an overcurrent of a drain current flowing through the main switching element during the ON period of the main switching element. In such a switching power supply device, Patent Document 2 discloses a soft start circuit that reduces an inrush current and an output voltage overshoot at the time of starting the power supply by suppressing the overcurrent detection value of the drain current to be small at the time of starting the power supply. Yes.

  This soft start circuit includes an error amplifier for inputting a reference voltage and a feedback voltage, a first counter for stepping up the reference voltage, a comparator for comparing an error output signal of the error amplifier with a triangular wave, and a comparator output signal of the comparator. A second counter that counts up the count value when the feedback voltage rise does not catch up with the reference voltage, and an output transistor (main switching) whose conduction state is controlled by the comparator output signal of the comparator Element), an overcurrent protection circuit that monitors the drain current flowing through the output transistor, and a detection current value that sets a detection current value (overcurrent detection value) of the drain current flowing through the output transistor according to the count value of the second counter Control circuit and overcurrent protection circuit And a current comparator for comparing the drain current is more monitors, and a detection current value detected current value control circuit is set.

  The soft-start circuit increases the reference voltage of the error amplifier in a staircase pattern at the time of starting up the power supply and suppresses the detected current value to reduce the inrush current and the output voltage overshoot at the time of starting up the power supply.

In addition, this soft start circuit periodically compares the reference voltage that gradually increases with the feedback voltage, and keeps it small when starting up the power supply when the increase in the feedback voltage has not caught up with the increase in the reference voltage. Step up the detected current value at any time. With this configuration, the output voltage rises to a predetermined value regardless of the size of the load.
Japanese Patent No. 3251770 JP 2006-288054 A

  However, in the conventional method of gradually increasing the on-duty of the PWM signal, when the switching power supply device is a chopper method, even if the on-duty is minimized at the time of power activation, the main switching element is turned on when the main switching element is turned on. The current value of the flowing current becomes equal to or higher than the rated current value of the main switching element, and the main switching element may be destroyed.

  Specifically, since the output voltage is almost zero when the power is turned on, the slope of the drain current flowing in the main switching element becomes steep during the ON period of the main switching element, and the drain current flowing when the main switching element is turned off The current value (the maximum current value of the drain current) increases. Also, if the output voltage is as close to zero as possible, the energy stored in the coil during the on period of the main switching element hardly decreases during the off period of the main switching element. In the continuous mode, the initial current value and the maximum current value (peak value) of the drain current increase. In the chopper type switching power supply device, when the current waveform of the drain current is in the continuous mode, the reverse recovery current Irr of the rectifier diode is rectified via the main switching element when the main switching element is switched from the off state to the on state. It flows to the diode. A current obtained by adding a current charged to a parasitic capacitance such as a main switching element or a rectifier diode during the OFF period of the main switching element to the reverse recovery current Irr is called a spike current. When the main switching element is turned on, The current having a current value obtained by adding the current value of the spike current component to the initial current value flows to the main switching element. Further, the current value of the reverse recovery current Irr increases as the initial current value increases. Therefore, even if the on-duty is minimized at the time of starting the power supply, the current value of the current flowing through the main switching element when the main switching element is turned on increases every switching cycle of the main switching element, and the rating of the main switching element is eventually reached. There is a risk that the main switching element may be destroyed due to the current value being exceeded.

  Furthermore, a chopper switching power supply generally uses a fast recovery diode (hereinafter referred to as FRD) having a short reverse recovery time trr in order to reduce switching loss, but reverse recovery is possible when FRD is used. The current value of the current Irr is further increased, and the possibility that the main switching element is destroyed increases.

  Further, in a switching power supply device having an overcurrent protection function for protecting the drain current flowing in the main switching element, the conventional method of suppressing the drain current overcurrent detection value in practice is not effective for the main switching element. Since there is a minimum on-period, the drain current cannot be limited by the overcurrent detection value at power-on, and the peak value of the drain current may exceed the rated current value of the main switching element, possibly destroying the main switching element. .

  Specifically, there is a delay time (detection delay time) from when the drain current is detected until the main switching element is actually turned off. Usually, a switching power supply device with an overcurrent protection function is In order to prevent the main switching element from turning off, the drain current turn-off is prohibited during a period (blanking period) from when the main switching element is turned on until a predetermined time (blanking time) elapses. For this reason, even if the overcurrent detection value of the drain current is reduced, the main switching element is always turned on during the minimum on period obtained by adding the detection delay time to the blanking time. As described above, the current waveform of the drain current is in the continuous mode when the power supply is activated, and the initial current value and peak value of the drain current increase. Therefore, even if the overcurrent detection value of the drain current is reduced at the time of starting the power supply, the minimum switching operation in which the main switching element is driven in the minimum on period and the initial current value and the peak value of the drain current are increased is repeated. There is a risk that the peak value of will gradually increase and eventually exceed the rated current value of the main switching element, and the main switching element may be destroyed.

  Further, when the switching power supply device having the overcurrent protection function is not configured to generate the blanking period, the main switching element is turned off by the spike current. Therefore, in this case, sufficient on-time cannot be obtained, and necessary energy cannot be transmitted to the output side, so that the output voltage does not become a predetermined value, and a startup failure state occurs.

  Further, the switching power supply device shown in FIG. 9 is configured to connect a soft start capacitor 103 and a power on / off power switch 102 to one terminal 101 in order to reduce the number of terminals of the IC 100. However, there is a delay time from when the power switch 102 is turned off until the bias circuit 106 starts supplying the power supply voltage Vcc to each block in the IC 100. In addition, since the operation of the switching transistor 107 is stopped until the voltage at the terminal 101 becomes equal to or higher than the lowest potential of the reference triangular wave after the bias circuit 106 starts supplying the power supply voltage Vcc, the operation of the main switching element is stopped. The oscillation start is further delayed. As a result, a large delay time occurs after the power switch 102 is turned off until the switching transistor 107 actually starts operating.

  In view of the above-described conventional problems, the present invention performs a soft start that reduces inrush current at the time of power supply startup and overshoot of the output voltage, and a current exceeding the maximum allowable current value in the main switching element during the soft start period. It is an object of the present invention to provide a switching power supply device capable of preventing deterioration and damage of a main switching element due to the flow of current and a semiconductor device used therefor.

  In addition, in view of the above-described conventional problems, the present invention provides a control circuit for controlling the operation of the main switching element, a regulator for making the voltage of the power supply for the control circuit constant based on the input power supply voltage, and oscillation start of the main switching element. By providing an external start terminal to which a signal for determining timing is supplied, the supply of power supply voltage to the control circuit can be started regardless of the oscillation start timing of the main switching element, and the signal supplied to the external start terminal is generated. It is an object of the present invention to provide a switching power supply device that can reduce the delay time from when the main switching element actually starts oscillation, and a semiconductor device used therefor.

  In order to achieve the above object, a first switching power supply device of the present invention includes a main switching element that switches a first DC voltage, and the first DC voltage that is switched by the main switching element. A conversion circuit for converting to a second DC voltage having a voltage value different from that of the first DC voltage, a control circuit for controlling the operation of the main switching element, and a feedback signal indicating the voltage value of the second DC voltage. An output voltage detection circuit that feeds back to the control circuit, wherein the control circuit oscillates a signal that determines a turn-on timing of the main switching element, and an element current that indicates a current value of a current flowing through the main switching element An element current detection circuit for generating a detection signal, and a signal corresponding to the voltage value of the second DC voltage based on the feedback signal A feedback signal control circuit for generating a bell signal, a clamp circuit for generating a clamp signal for fixing a maximum current value of a current flowing through the main switching element, a signal generated by the feedback signal control circuit, and the clamp circuit A comparator that generates a signal that determines a turn-off timing of the main switching element by comparing a lower signal level of the clamp signal generated by the signal current and a signal level of the element current detection signal; Generation of a switching control signal for generating a signal for turning on the main switching element based on a signal oscillated by an oscillation circuit and generating a signal for turning off the main switching element based on a signal generated by the comparator Circuit and a signal generated by the switching control signal generation circuit A drive circuit that generates a drive signal for driving the main switching element and, based on the drive signal, prohibits the main switching element from turning on until a blanking time elapses after the main switching element is turned on. A blanking period generating circuit that performs oscillation, a soft start period generating circuit that determines a soft start period from the start of oscillation of the main switching element until a soft start time elapses, and the soft start period during the soft start period And a blanking time adjusting circuit for generating a signal for shortening the blanking time as compared to after the elapse of the period.

  In the switching power supply device configured as described above, the blanking time is shorter than that during normal operation until the soft start period determined by the soft start period generation circuit elapses after the main switching element starts oscillation. be able to. Therefore, the ON time of the main switching element during the soft start period is shorter than that during normal operation, and the peak value (maximum current value) of the element current flowing through the main switching element is suppressed. In addition, the device current increases every switching period in the soft start period, but the increase amount can be suppressed. Therefore, it is possible to prevent deterioration and damage of the main switching element due to the current exceeding the maximum allowable current value flowing through the main switching element. In addition, when the slope of the device current waveform is large, that is, when the increase rate of the device current per switching cycle is fast, or when the second DC voltage (output voltage) is nearly zero, energy conversion of coils, transformers, etc. Even when the energy stored in the capacitor hardly decreases during the off-period of the main switching element, the peak value of the element current is suppressed and the switching period is reduced because the on-time of the main switching element is short. Since the increase amount of the element current that increases is suppressed, deterioration and damage of the main switching element can be prevented.

  In the first switching power supply device described above, the blanking time adjustment circuit may be configured to increase the blanking time during the soft start period with the start time of the soft start period as a minimum value.

  Since the switching power supply configured as described above gradually increases the blanking time during the soft start period, it is possible to smoothly shift to the blanking time required during normal operation after the soft start period has elapsed. .

  In the first switching power supply device described above, the clamp circuit may lower the signal level of the clamp signal during the soft start period as compared with after the soft start period has elapsed. Further, the clamp circuit may be configured to increase the signal level of the clamp signal during the soft start period with the minimum value at the start of the soft start period.

  In the switching power supply device configured as described above, the signal level (overcurrent detection value) of the clamp signal becomes low during the soft start period, so the second DC voltage (output voltage) is almost zero, When the energy stored in the energy converter such as a transformer hardly decreases during the OFF period of the main switching element, the main switching element is turned off even if the current waveform of the element current flowing through the main switching element is in the continuous mode. It is possible to limit the current value of the element current that occasionally flows, and to reduce the initial current value that flows to the main switching element when the main switching element is turned on next time.

  Furthermore, if the signal level of the clamp signal is increased during the soft start period, it is possible to smoothly shift to the signal level of the clamp signal required during normal operation after the soft start period. Further, since the energy transmitted to the output side gradually increases during the soft start period, the second DC voltage (output voltage) cannot reach a predetermined value after the soft start period elapses, resulting in a start-up failure state. There is nothing.

  Further, in the first switching power supply device, the blanking period generation circuit generates the element current detection generated by the element current detection circuit until the blanking time elapses after the main switching element is turned on. The signal or the signal generated by the comparator may be invalidated.

  In the first switching power supply device, the element current detection circuit may generate the element current detection signal based on an ON voltage of the main switching element. Since the switching power supply configured as described above does not need to use a detection resistor to detect an element current flowing in the main switching element, it is possible to reduce a loss generated by the detection resistor.

  In the first switching power supply device, the element current detection circuit is driven in common with the main switching element, has a current value smaller than a current flowing through the main switching element, and flows through the main switching element. A sub-switching element through which a current having a constant ratio to a current flows, and a resistor to which a current flowing through the sub-switching element is supplied, and the element current detection signal based on a voltage generated in the resistor It is good also as a structure which produces | generates.

  Since the switching power supply configured as described above does not need to directly detect the element current flowing through the main switching element with a resistor, loss generated by the detection resistor can be reduced. Further, in the method of detecting the element current using the on-voltage of the main switching element, the element current cannot be accurately detected until the input voltage of the main switching element becomes sufficiently small (generally several hundred nsec). On the other hand, since this switching power supply device detects the current flowing through the resistor, the device current can be accurately detected even immediately after the main switching device shifts from the off state to the on state.

  In order to achieve the above object, a second switching power supply device of the present invention includes a main switching element that switches a first DC voltage, and the first DC voltage that is switched by the main switching element. A conversion circuit for converting to a second DC voltage having a voltage value different from that of the first DC voltage; a control circuit for controlling an operation of the main switching element; and a feedback signal indicating a voltage value of the second DC voltage. And an output voltage detection circuit that feeds back to the control circuit, and the control circuit generates an oscillation circuit that oscillates a signal that determines a turn-on timing of the main switching element, and a drive signal that drives the main switching element Soft start period from the start of oscillation of the drive circuit and the main switching element until the soft start time elapses A soft start period generating circuit for determining the main switching element based on a signal oscillated by the oscillation circuit, and turning off the main switching element based on the feedback signal. The main switching element is driven until the soft start period elapses so that the time required for the main switching element to turn on becomes longer than after the soft start period elapses.

  In the switching power supply configured as described above, the turn-on time of the main switching element is longer than that during normal operation until the soft start period determined by the soft start period generating circuit elapses after the main switching element starts oscillating. Also gets longer. Therefore, when the main switching element switches from the off state to the on state, the reverse recovery current Irr of the rectifier diode flows to the rectifier diode through the main switching element, even when a large reverse recovery current Irr flows. Since the turn-on time of the main switching element is long and dV / dt and dI / dt are gradual, the current value of the current flowing through the main switching element when the main switching element is turned on does not increase, and the maximum allowable current flows in the main switching element. It is possible to prevent the main switching element from being deteriorated or damaged due to a current exceeding the value flowing.

  In the second switching power supply device described above, the conversion circuit may be formed of a series circuit of a diode, a coil, and a capacitor.

  Further, in the second switching power supply device described above, the drive circuit is configured to reduce the turn-on drive capability of the main switching element until the soft start period elapses, compared to after the soft start period elapses. Thus, the turn-on time during the soft start period may be longer than the turn-on time during normal operation after the soft start period has elapsed.

  Further, in the second switching power supply device, the control circuit generates an element current detection signal indicating a current value of a current flowing through the main switching element, and the first switching power supply device based on the feedback signal. A feedback signal control circuit that generates a signal having a signal level corresponding to the voltage value of the DC voltage of 2, a clamp circuit that generates a clamp signal for fixing a maximum current value of a current flowing through the main switching element, and the feedback The turn-off timing of the main switching element is obtained by comparing the lower signal level of the signal generated by the signal control circuit and the clamp signal generated by the clamp circuit with the signal level of the element current detection signal. A comparator for generating a signal for determining the main switch and the main switch based on the signal oscillated by the oscillation circuit. A switching control signal generation circuit for generating a signal for turning on the chucking element and generating a signal for turning off the main switching element based on the signal generated by the comparator; and the drive generated by the drive circuit And a blanking period generating circuit for prohibiting the main switching element from turning on until a blanking time elapses after the main switching element is turned on based on a signal, and the driving circuit includes the switching circuit. The drive signal may be generated based on a signal generated by the control signal generation circuit.

  In this case, similarly to the first switching power supply device described above, the clamp circuit may lower the signal level of the clamp signal during the soft start period as compared with after the soft start period has elapsed. Further, the clamp circuit may be configured to increase the signal level of the clamp signal during the soft start period with the minimum value at the start of the soft start period.

  In the switching power supply device configured as described above, the signal level (overcurrent detection value) of the clamp signal becomes low during the soft start period, so the second DC voltage (output voltage) is almost zero, When the energy stored in the energy converter such as a transformer hardly decreases during the OFF period of the main switching element, the main switching element is turned off even if the current waveform of the element current flowing through the main switching element is in the continuous mode. It is possible to limit the current value of the element current that occasionally flows, and to reduce the initial current value that flows to the main switching element when the main switching element is turned on next time. Furthermore, if the signal level of the clamp signal is increased during the soft start period, it is possible to smoothly shift to the signal level of the clamp signal required during normal operation after the soft start period. Further, since the energy transmitted to the output side gradually increases during the soft start period, the second DC voltage (output voltage) cannot reach a predetermined value after the soft start period elapses, resulting in a start-up failure state. There is nothing.

  Further, similarly to the first switching power supply device described above, the control circuit generates a blanking signal during the soft start period to generate a signal for shortening the blanking time as compared with after the soft start period has elapsed. It is good also as a structure further provided with a time adjustment circuit. Further, the blanking time adjustment circuit may be configured to increase the blanking time during the soft start period with the start time of the soft start period as a minimum value.

  The switching power supply configured as described above can make the blanking time shorter than that during normal operation until the soft start period elapses. Therefore, the ON time of the main switching element in the soft start period is shorter than that in the normal operation, and the current value of the element current that flows when the main switching element is turned off is suppressed. Moreover, the increase amount of the element current which increases every switching cycle can be suppressed. Therefore, it is possible to prevent deterioration and damage of the main switching element due to the current exceeding the maximum allowable current value flowing through the main switching element. Furthermore, if the configuration is such that the blanking time increases during the soft start period, it is possible to smoothly shift to the blanking time required during normal operation after the soft start period has elapsed.

  Similarly to the first switching power supply device described above, the blanking period generation circuit generates the element generated by the element current detection circuit until the blanking time elapses after the main switching element is turned on. The current detection signal or the signal generated by the comparator may be invalidated.

  Further, similarly to the first switching power supply device described above, the element current detection circuit may generate the element current detection signal based on the ON voltage of the main switching element. Since the switching power supply configured as described above does not need to use a detection resistor to detect an element current flowing in the main switching element, it is possible to reduce a loss generated by the detection resistor.

  Further, similarly to the first switching power supply device described above, the element current detection circuit is driven in common with the main switching element, and has a current value smaller than the current flowing through the main switching element, and the main switching element. A sub-switching element in which a current having a constant ratio with respect to a current flowing through the sub-switching element, and a resistor to which a current flowing in the sub-switching element is supplied, and the element current based on the voltage generated in the resistor The detection signal may be generated.

  Since the switching power supply configured as described above does not need to directly detect the element current flowing through the main switching element with a resistor, loss generated by the detection resistor can be reduced. Further, in the method of detecting the element current using the on-voltage of the main switching element, the element current cannot be accurately detected until the input voltage of the main switching element becomes sufficiently small (generally several hundred nsec). On the other hand, since this switching power supply device detects the current flowing through the resistor, the device current can be accurately detected even immediately after the main switching device shifts from the off state to the on state.

  In the first and second switching power supply apparatuses, the soft start period generation circuit includes a constant current source that charges an external capacitor externally attached to the control circuit, and is charged by the constant current source. The soft start period may be determined by the voltage level of the external capacitor. In the switching power supply device configured as described above, the soft start period can be adjusted by the capacitance value of the external capacitor.

  In the first and second switching power supplies, the soft start period generation circuit includes a plurality of constant current sources for charging and discharging an external capacitor externally attached to the control circuit, and the external Two comparators for detecting the upper and lower limits of the voltage of the external capacitor, a plurality of switches for switching charging and discharging of the external capacitor based on signals generated by the two comparators, and a signal generated by the two comparators And a counter circuit that counts up the count value based on the above, and the soft start period may be determined by the count value of the counter circuit.

  In the switching power supply configured as described above, the soft start period can be adjusted by the constant current value, the capacitance value of the external capacitor, and the count value of the counter circuit, so that the capacitance value of the external capacitor can be reduced. It becomes possible.

  In the first and second switching power supply devices, the control circuit further includes a regulator that keeps the voltage of the power supply for the control circuit constant based on the first DC voltage, and an external start terminal, The oscillation start timing of the main switching element may be determined based on a signal supplied to the external starting terminal. In this case, an external activation signal generation circuit is provided that generates an external activation signal when the first DC voltage reaches a predetermined voltage, and the control circuit supplies the external activation terminal when the external activation signal is generated. The oscillation start timing of the main switching element may be determined based on the received signal.

  In the switching power supply configured as described above, the regulator keeps the voltage of the power supply for the control circuit constant based on the first DC voltage (input power supply voltage), and the oscillation start timing of the main switching element is supplied to the external start terminal Therefore, the power supply voltage can be supplied to the control circuit regardless of the oscillation start timing of the main switching element, and the main switching element is actually generated after the signal supplied to the external start terminal is generated. It is possible to reduce the delay time until the oscillation starts.

  Further, in the configuration in which the soft start period generation circuit charges or charges / discharges the external capacitor externally attached to the control circuit, the external capacitor is connected to the external start terminal, and the control circuit includes the control circuit, The oscillation start timing of the main switching element may be determined based on the voltage level of the external capacitor charged by the soft start period generation circuit. In the switching power supply configured as described above, the external start terminal and the connection terminal of the external capacitor for soft start are shared, and the number of terminals of the semiconductor integrated circuit can be reduced. Even if the external start terminal and the connection terminal of the external capacitor for soft start are shared, the regulator keeps the power supply voltage for the control circuit constant based on the first DC voltage (input power supply voltage). The supply of power supply voltage to the control circuit can be started regardless of the oscillation start timing of the element, and the delay time from when the signal supplied to the external start terminal is generated until the main switching element actually starts oscillation is reduced. It becomes possible.

  The semiconductor device of the present invention is a semiconductor device used for any one of the switching power supply devices described above, wherein the main switching element and the control circuit are formed on the same semiconductor substrate, or the same It is incorporated in the package. In the semiconductor device configured as described above, the main switching element and the control circuit can be incorporated into one package. Therefore, if a switching power supply device is configured using this semiconductor device, the number of parts of the switching power supply device can be greatly reduced, and the switching power supply device can be easily reduced in size, weight, and cost. be able to.

  According to a preferred embodiment of the present invention, soft start is performed to reduce inrush current at the time of power supply startup and output voltage overshoot, and current exceeding the maximum allowable current value flows in the main switching element during the soft start period. It is possible to prevent the main switching element from being deteriorated or damaged.

  Further, the control circuit includes a regulator for making the voltage of the power supply for the control circuit constant based on the first DC voltage (input power supply voltage), and an external start terminal to which a signal for determining the oscillation start timing of the main switching element is supplied. By providing, the supply of power supply voltage to the control circuit can be started regardless of the oscillation start timing of the main switching element, and until the main switching element actually starts oscillating after the signal supplied to the external start terminal is generated It becomes possible to reduce the delay time.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in each drawing, the same code | symbol is attached | subjected to the same member and the overlapping description is abbreviate | omitted. In the following embodiments, a flyback switching power supply device and a chopper switching power supply device are described as examples. However, the present invention is not limited to these power supply switching power supply devices. Absent. Moreover, although the case where the output load is positive is described as an example for the chopper type switching power supply device, the present invention can also be applied to the case where the output load is negative. Further, although the chopper type switching power supply device has been described by taking the step-down type as an example, the present invention can also be applied to the step-up type. Furthermore, the following embodiment shows an example which actualized this invention, Comprising: For example, arrangement | positioning of a structural member etc. are not specified for this invention by the following. The present invention can be modified in various ways within the scope of the claims.

(Embodiment 1)
FIG. 1 is a circuit diagram showing an example of a switching power supply device and a semiconductor device according to Embodiment 1 of the present invention. This switching power supply apparatus employs current mode PWM control as a control method of the switching operation of the main switching element.

  As shown in FIG. 1, the switching transformer 1 has a primary winding 1a and a secondary winding 1b. The polarity of the primary winding 1a and the secondary winding 1b is reversed, and this switching power supply device is a flyback system.

  One end of the primary winding 1a is connected to a high potential side terminal (input power supply terminal) IN of two terminals to which an input power supply voltage (first DC voltage) VIN is applied. The other end of the primary winding 1 a is connected to the input terminal of the main switching element 2. The main switching element 2 has an input terminal, an output terminal, and a control terminal. As the main switching element 2, for example, a high voltage transistor is used. The output terminal of the main switching element 2 is connected to the low-potential side terminal RETURN of the two terminals to which the input power supply voltage VIN is applied. The control terminal of the main switching element 2 is connected to the gate drive circuit (drive circuit) 4 of the control circuit block 3. The main switching element 2 performs a switching operation according to a drive signal generated by the gate drive circuit 4. By this switching operation, the input power supply voltage VIN is switched.

  A rectifier diode 5 and a smoothing capacitor 6 are connected to the secondary winding 1 b of the switching transformer 1. The switching transformer 1, which is an energy converter, the rectifier diode 5, and the smoothing capacitor 6 constitute an energy conversion circuit 7. The energy conversion circuit 7 converts the input power supply voltage VIN switched by the main switching element 2 into an output voltage VOUT (second DC voltage) having a voltage value different from that of the input power supply voltage VIN. Specifically, the energy conversion circuit 7 rectifies and smoothes the AC voltage induced in the secondary winding 1b by the switching operation of the main switching element 2 to generate the output voltage VOUT.

  The output voltage VOUT is applied to the load 8 connected to the output terminal OUT. The output voltage detection circuit 9 detects the voltage level of the output voltage VOUT, and feeds back the feedback signal FB_S indicating the detected voltage level to the control circuit block 3.

  The main switching element 2 and the control circuit block 3 that controls the operation of the main switching element 2 are integrated on the same substrate and included in the semiconductor device 10. The semiconductor device 10 includes, as external connection terminals, a DRAIN terminal connected to an input terminal of the main switching element 2 and an input terminal of the control circuit block 3, an output terminal of the main switching element 2, and a reference potential terminal of the control circuit block 3 SOURCE terminal connected to the power supply terminal, a VDD terminal connected to the power supply terminal of the control circuit block 3, and an FB terminal connected to the feedback terminal of the control circuit block 3. Furthermore, the semiconductor device 10 includes an SS terminal for soft start as an external connection terminal.

  An input power supply terminal IN is connected to the DRAIN terminal via the primary winding 1a of the switching transformer 1. A terminal RETURN is connected to the SOURCE terminal. A power supply capacitor 11 that functions as a power supply for the control circuit block 3 is connected to the VDD terminal outside the semiconductor device 10. A feedback signal FB_S from the output voltage detection circuit 9 is supplied to the FB terminal. A soft start capacitor (external capacitor) 12 is connected to the SS terminal outside the semiconductor device 10.

  The control circuit block 3 includes a regulator 13. The regulator 13 includes a constant current source and a switch, and one end is connected to the DRAIN terminal and the other end is connected to the VDD terminal. Based on the input power supply voltage VIN supplied to the DRIN terminal via the primary winding 1a of the switching transformer 1, the regulator 13 keeps the voltage (VDD terminal voltage) of the power supply capacitor 11 functioning as the power supply of the control circuit block 3 constant. Keep on. This VDD terminal voltage becomes the power supply voltage of the control circuit block 3.

  The control circuit block 3 includes a start / stop circuit 14. The start / stop circuit 14 turns on the switch of the regulator 13 until the VDD terminal voltage reaches a certain voltage, and supplies the charging current from the regulator 13 to the VDD terminal. Thereafter, when the VDD terminal voltage becomes equal to or higher than a certain voltage, the start / stop circuit 14 turns off the switch of the regulator 13 to stop the current supply from the regulator 13 to the VDD terminal. The start / stop circuit 14 generates a start signal when the VDD terminal voltage reaches the start voltage, and generates a start / stop signal when the VDD terminal voltage decreases to the start / stop voltage.

  The control circuit block 3 includes an oscillator (oscillation circuit) 15. The oscillator 15 oscillates a maximum on-duty cycle signal that determines the maximum on-duty cycle of the main switching element 2 and a clock signal clock that determines the oscillation frequency of the main switching element 2. The turn-on timing of the main switching element 2 is determined by the clock signal clock.

  The control circuit block 3 includes a drain current detection circuit (element current detection circuit) 16. The drain current detection circuit 16 detects the element current (drain current IDS) flowing through the main switching element 2 based on the on-voltage of the main switching element 2, and converts the detected drain current IDS into a voltage, thereby An element current detection signal indicating the current level of the current IDS is generated.

  The control circuit block 3 includes a feedback signal control circuit FB17. The feedback signal control circuit FB17 generates a signal with a voltage level corresponding to the voltage level of the output voltage VOUT based on the feedback signal FB_S from the output voltage generation circuit 9 supplied to the FB terminal. The first reference voltage VR corresponding to the detection value (current detection value ILIMR) of the drain current IDS is determined by a signal generated by the feedback signal control circuit FB17. During normal operation, the drain current IDS is detected by the current detection value ILIMR.

  The control circuit block 3 includes a clamp circuit 18 for protecting the drain current IDS from overcurrent. The clamp circuit 18 generates a clamp signal (or a clamp signal for detecting an overcurrent) for fixing the maximum current value of the drain current IDS flowing through the main switching element 2. By this clamp signal, the second reference voltage VS (overcurrent detection value) corresponding to the maximum current detection value ILIMIT of the drain current IDS is determined.

  In addition, the control circuit 3 includes a comparator 19. The comparator 19 is a lower voltage of the first reference voltage VR determined by the signal generated by the feedback signal control circuit FB17 and the second reference voltage VS determined by the clamp signal generated by the clamp circuit 18. The level and the voltage level of the element current detection signal generated by the drain current detection circuit 16 are compared, and a comparison signal indicating the comparison result is generated. The turn-off timing of the main switching element 2 is determined by this comparison signal.

  The control circuit 3 includes a switching control signal generation circuit 20 that generates a switching control signal (pulse signal) based on the clock signal clock oscillated by the oscillator 15 and the comparison signal generated by the comparator 19.

  Specifically, the switching control signal generation circuit 20 includes a flip-flop circuit 21 to which a clock signal clock oscillated by the oscillator 15 is supplied to a set terminal and a comparison signal from the comparator 19 is supplied to a reset terminal. The switching control signal generation circuit 20 receives a signal from the output terminal Q of the flip-flop circuit 21, a start signal or start / stop signal from the start / stop circuit 14, and a maximum on-duty cycle signal oscillated by the oscillator 15. A three-input NAND circuit 22 that performs a logical operation of these signals to generate a switching control signal is provided. The switching control signal generation circuit 20 changes the signal level of the switching control signal to a signal level for turning on the main switching element 2 based on the clock signal clock oscillated by the oscillator 15, and the comparison signal generated by the comparator 19. The signal level of the switching control signal is shifted to the signal level for turning off the main switching element 2 based on the above. Further, when the switching control signal generation circuit 20 does not supply a signal for determining the turn-off timing of the main switching element 2 from the comparator 19 within the maximum on-duty cycle period determined by the maximum on-duty cycle signal oscillated by the oscillator 15, Based on the maximum on-duty cycle signal, the signal level of the switching control signal is changed to a signal level for turning off the main switching element 2. When a start / stop signal is supplied from the start / stop circuit 14, the switching control signal generation circuit 20 changes the signal level of the switching control signal to a signal level for turning off the main switching element 2.

  The control circuit 3 includes a gate drive circuit 4. The gate drive circuit 4 generates a drive signal for driving the main switching element 2 based on the switching control signal from the switching control signal generation circuit 20.

  Specifically, the gate drive circuit 4 is based on the switching control signal from the switching control signal generation circuit 20, the voltage value and the application time of the voltage applied to the control terminal of the main switching element 2, and the control terminal of the main switching element 2. By controlling the amount of current to be supplied, the amount of drain current IDS flowing through the main switching element 2 is controlled.

  Further, the control circuit 3 includes a blanking period generation circuit 23. The blanking period generation circuit 23 is based on a drive signal generated by the gate drive circuit 4 and is a period from when the main switching element 2 is turned on until a blanking time elapses (blanking period). An on-time blanking pulse signal BLK for inhibiting turn-on is generated.

  Specifically, in this switching power supply device, the drain current detection circuit 16 is connected to the comparator 19 via the switch 24, and the blanking period generation circuit 23 is blanked during the blanking period. The switch 24 is turned off by the pulse signal BLK and the signal generated by the drain current detection circuit 16 is invalidated to prohibit the main switching element 2 from being turned on. After the blanking period has elapsed, the switch 24 is turned on. By turning on the switch 24 by the hour blanking pulse signal BLK and enabling the signal generated by the drain current detection circuit 16, the main switching element 2 is allowed to turn on. By providing the blanking period generation circuit 23, it is possible to prevent malfunctions in which the main switching element 2 is turned off by a spike current generated when the main switching element 2 is turned on.

  Further, the control circuit 3 includes a soft start period generation circuit 25. The soft start period generation circuit 25 determines a soft start period TSS from when the main switching element 2 starts oscillation until the soft start time elapses.

  Specifically, the soft start period generation circuit 25 includes a constant current source and a switch for charging the soft start capacitor 12 externally attached to the SS terminal of the semiconductor device 4, and the switch is activated by a start signal from the start / stop circuit 14. When turned on, charging of the soft start capacitor 12 by the constant current source is started, and the soft start period TSS is determined by the voltage level (SS terminal voltage) of the soft start capacitor 12.

  Further, the control circuit 3 includes a blanking time adjustment circuit 26. The blanking time adjustment circuit 26 supplies an adjustment signal for adjusting the blanking time to the blanking period generation circuit 23. The blanking time is adjusted by this adjustment signal.

  Specifically, the SS terminal voltage is transmitted to the blanking time adjustment circuit 26. The blanking time adjustment circuit 26 is in normal operation after the elapse of the soft start period TSS until the soft start period TSS determined by the soft start period generation circuit 25, that is, the soft start period TSS determined by the SS terminal voltage elapses. Compared with this, an adjustment signal for shortening the blanking time is generated. The blanking time adjustment circuit 26 generates an adjustment signal for returning to the blanking time during normal operation when the soft start period TSS has elapsed.

  Further, in this switching power supply device, the SS terminal voltage is also transmitted to the clamp circuit 18, and the clamp circuit 18 operates normally after the soft start period TSS elapses until the soft start period TSS determined by the SS terminal voltage elapses. Compared to sometimes, the voltage level (second reference voltage VS) of the clamp signal, which is an overcurrent detection value, is lowered.

  The operation of the switching power supply device configured as described above will be described. The DRAIN terminal connected to the input terminal of the main switching element 2 is smoothed by the input capacitor from the input power supply terminal IN to the input power supply voltage VIN (not shown, for example, a voltage obtained by rectifying a commercial AC voltage by a rectifier such as a diode bridge) When a DC voltage such as a voltage is applied through the primary winding 1a of the switching transformer 1, a current is supplied to the power supply capacitor 11 connected to the VDD terminal by the regulator 13 of the control circuit block 3, and the VDD terminal The voltage rises.

  The switch of the regulator 13 is turned on until the VDD terminal voltage reaches a certain voltage, and current is supplied from the regulator 13 to the VDD terminal. Thereafter, when the VDD terminal voltage becomes equal to or higher than a certain voltage, the switch of the regulator 13 is turned off, the current supply from the regulator 13 to the VDD terminal is stopped, and the VDD terminal voltage is held at a constant potential.

  A junction-type FET (Field-Effect Transistor) may be provided between the constant current source of the regulator 13 and the DRAIN terminal (not shown). In this way, the high voltage applied to the high potential side of the junction FET is pinched off at a low voltage on the low potential side of the junction FET due to the pinch-off effect of the junction FET, so that the high voltage is directly controlled by the control circuit. It is possible to supply to block 3. Therefore, a power loss due to a starting resistor or the like is reduced, and a switching power supply device with high power conversion efficiency can be realized. This configuration is not limited to the switching power supply device according to the first embodiment, but can also be applied to the switching power supply devices according to other embodiments.

  The start / stop circuit 14 turns on the regulator 13 until the VDD terminal voltage reaches a certain voltage, and turns off the regulator 13 when the VDD terminal voltage exceeds the certain voltage. The start / stop circuit 14 generates a start signal when the VDD terminal voltage reaches the start voltage, and generates a start / stop signal when the VDD terminal voltage decreases to the start / stop voltage.

  When a start signal is supplied from the start / stop circuit 14, the soft start period generation circuit 25 causes a constant current to flow from the constant current source to the soft start capacitor 12 connected to the SS terminal, thereby increasing the SS terminal voltage. The soft start period TSS is until the SS terminal voltage reaches a certain voltage.

  When the oscillation (switching operation) of the main switching element 2 is started by the start signal from the start / stop circuit 14, an AC voltage is induced in the secondary winding 1b, and the load 8 connected from the energy conversion circuit 7 to the output terminal OUT. An output voltage VOUT is applied.

  This output voltage VOUT is detected by the output voltage detection circuit 9. The output voltage detection circuit 9 generates a feedback signal FB_S indicating the voltage level of the output voltage VOUT. The feedback signal FB_S is supplied to the feedback signal control circuit FB17 of the control circuit block 3 through the FB terminal.

  Based on the feedback signal FB_S, the feedback signal control circuit FB17 decreases the first reference voltage VR when the load state becomes light and the output voltage VOUT increases, and conversely the first condition when the load state becomes heavy and the output voltage VOUT decreases. The reference voltage VR is increased.

  During normal operation after the soft start period TSS has elapsed, the first reference voltage VR corresponding to the detection value of the drain current IDS (current detection value ILIMR) is the reference voltage of the comparator 19, and the load state is light. When the first reference voltage VR decreases, the detected value of the drain current IDS decreases, the on-time of the main switching element 2 is shortened, and the peak value (maximum current value) of the drain current IDS flowing through the main switching element 2 is reduced. As a result, the output voltage VOUT decreases. Conversely, when the load state becomes heavy and the first reference voltage VR increases, the detected value of the drain current IDS increases, the on-time of the main switching element 2 becomes longer, and the peak value of the drain current IDS flowing through the main switching element 2 (Maximum current value) rises and the output voltage VOUT rises. The switching power supply apparatus thus performs PWM control in the current mode to stabilize the output voltage VOUT at a predetermined voltage value.

  Next, the drain current IDS flowing through the main switching element 2 will be described with reference to FIG. FIG. 2 is a waveform diagram (time chart) showing the state of the drain current IDS flowing through the main switching element 2.

  In FIG. 2, the period during which the main switching element 2 is on is Ton, the current waveform of the drain current flowing through the main switching element 2 during that period is IDS, and the maximum current detection value of the drain current IDS determined by the clamp circuit 18 is ILIMIT, a delay time (detection delay time) from when the comparator 19 generates a signal for determining the turn-off timing of the main switching element 2 to when the main switching element 2 is actually turned off is Td, and a switching period of the drain current IDS Each peak current value (peak value) is IDpeak, and the maximum allowable current value of the main switching element 2 is IMAX. The relationship between the maximum allowable current value IMAX of the main switching element 2 and the maximum current detection value ILIMIT varies from manufacturer to manufacturer, but ILIMIT is generally set to 2/3 or less of IMAX.

  FIG. 2A shows a waveform of the drain current IDS in a normal operation in which a sufficient time elapses after the power is turned on and the soft start period TSS ends and the output voltage VOUT is stabilized to a predetermined voltage value. Yes.

  In FIG. 2A, the period during which the regenerative current IFRD flows through the rectifier diode 5 of the energy conversion circuit 7 during the period in which the main switching element 2 is OFF is Toff1, and the blanking period generation circuit 23 determines the blanking period. The time is TBLK, and the current detection value determined by the feedback signal control circuit FB17 is ILIMR (the absolute value of ILIMR is an arbitrary value less than or equal to ILIMIT). In addition, switching periods in which the main switching element 2 performs a switching operation are T11, T12, T13, and T14. In FIG. 2A, the regenerative current IFRD that flows during the period Toff1 is indicated by a one-dot chain line.

The drain current IDS flowing during the period Ton when the main switching element 2 is on is expressed by the following equation.
IDS = (VIN−VOUT) / L × Ton (1)

Further, the regenerative current IFRD that flows through the rectifier diode 5 during the period when the main switching element 2 is off is expressed by the following equation.
IFRD = −VOUT / L × Toff1 (2)

  In the above equations (1) and (2), VIN is an input power supply voltage, VOUT is an output voltage, and L is an inductance value of the switching transformer 1.

  From the above equation (1), the slope of the current waveform of the drain current IDS that flows during the period Ton when the main switching element 2 is on indicates that the input power supply voltage VIN and the output voltage when the inductance value L of the switching transformer 1 is constant. It is determined by the voltage difference from VOUT. Further, from the above equation (2), the slope of the current waveform of the regenerative current IFRD that flows through the rectifier diode 5 during the period in which the main switching element 2 is off is determined by the output voltage VOUT.

  As shown in FIG. 2A, in the normal operation in which the output voltage VOUT is stabilized at a predetermined voltage value, the ON period Ton of the main switching element 2 is equal to the blanking time TBLK and the detection delay time Td. Since it is longer than the minimum ON period Tmin determined by the sum, the drain current IDS flowing through the main switching element 2 is limited by the current detection value ILIMR smaller than the maximum current detection value ILIMIT, and the drain current IDS reaches the current detection value ILIMR. Then, the main switching element 2 is turned off after a predetermined detection delay time Td.

  Further, as shown in FIG. 2A, since the output voltage VOUT is in a stabilized state, the slope of the current waveform of the drain current IDS and the slope of the current waveform of the regenerative current IFRD are the switching periods T11, T12, T13, There is no big difference at T14 and it is stable.

  FIG. 2B shows that the maximum current detection value of the drain current IDS is set to ILIMITss smaller than ILIMIT during normal operation in the soft start period TSS at the time of power activation, as in the conventional general switching power supply device. The waveform of the drain current IDS is shown.

  In FIG. 2B, a period during which the main switching element 2 is off is defined as Toff2. In addition, switching periods in which the main switching element 2 performs a switching operation are T1, T2, T3, and T4. Further, the initial current value for each switching period of the drain current IDS is Is. In FIG. 2B, the regenerative current IFRD that flows during the period Toff2 is indicated by a two-dot chain line. For comparison, the regenerative current IFRD during normal operation is indicated by a one-dot chain line in the switching period T1.

  Since the output voltage VOUT is small when the power supply is activated, the slope of the current waveform of the drain current IDS flowing during the period Ton when the main switching element 2 is on becomes steep from the equation (1). Further, from the equation (2), the slope of the current waveform of the regenerative current IFRD that flows through the rectifier diode 5 during the period in which the main switching element 2 is off becomes gentle.

  As shown in FIG. 2B, in the switching cycle T1, the drain current IDS flowing through the main switching element 2 has a steep slope, so that the drain current IDS reaches the maximum current detection value ILIMITss within the blanking period. However, the main switching element 2 is prohibited from being turned off during the blanking period, and the main switching element 2 is turned off after the blanking period elapses and after a detection delay time Td. That is, the ON period of the main switching element 2 is the minimum ON period Tmin = TBLK + Td.

  Further, since the gradient of the regenerative current IFRD flowing through the rectifier diode 5 is gentle, only a part of the energy accumulated in the secondary winding 1b of the switching transformer 1 during the period Ton when the main switching element 2 is on is main. The signal is transmitted to the output side of the switching transformer 1 during the period Toff2 when the switching element 2 is off. The energy remaining without being regenerated in the switching period T1 becomes an initial current of the drain current IDS flowing in the main switching element 2 in the switching period T2. Thus, the current waveform of the drain current IDS when the main switching element 2 is turned on from the state where the initial current exists is called a continuous mode.

  In the switching cycle T2, the main switching element 2 is driven with the minimum on-period Tmin, so that the maximum current value of the drain current IDS is further increased. Thus, the drain current IDS flowing through the main switching element 2 is not limited by the overcurrent detection value, and the main switching element 2 is driven with the minimum on-period Tmin, and the initial current value and the peak value of the drain current IDS for each switching period. This phenomenon is called minimum pulse driving.

  Next, a case where the output voltage VOUT slightly increases in the switching period T3 will be described. The output voltage VOUT is gradually increased by energy transmitted from the output side of the switching transformer 1 every switching period. As a result, from the equation (1), the slope of the current waveform of the drain current IDS flowing in the main switching element 2 during the period Ton when the main switching element 2 is on becomes gentler than the slope in the switching period T2. Further, from the equation (2), the slope of the current waveform of the regenerative current IFRD flowing through the rectifier diode 5 during the period Toff2 when the main switching element 2 is off becomes steeper than the slope in the switching period T2. In order to show the difference in the slope of the current waveform of the regenerative current IFRD, the same waveform as that of the regenerative current IFRD in the switching period T2 is indicated by a broken line.

  Thus, although the increase amount of the drain current IDS flowing through the main switching element 2 slightly decreases with the increase of the output voltage VOUT, it is impossible to prevent the peak value IDpeak of the drain current IDS from increasing.

  As a result of the operation described above, the drain current IDS flowing through the main switching element 2 becomes equal to or greater than the maximum allowable current value IMAX only by setting the maximum current detection value of the drain current IDS to ILIMITs smaller than ILIMIT during normal operation. The main switching element 2 is deteriorated or broken.

  FIG. 2C shows a waveform of the drain current IDS when the blanking time is set to TBLKs shorter than TBLK during normal operation in the soft start period TSS at the time of power activation.

  FIG. 2C shows a case where TBLKs is set to 1/2 of TBLK. In this case, the slopes of the current waveforms of the drain current IDS and the regenerative current IFRD in the switching periods T1, T2, T3, and T4 are the same as in FIG.

  In FIG. 2C, a period during which the main switching element 2 is off is defined as Toff2. In addition, switching periods in which the main switching element 2 performs a switching operation are T1, T2, T3, and T4. Further, the initial current value for each switching period of the drain current IDS is Is. In FIG. 2C, the regenerative current IFRD that flows during the period Toff2 is indicated by a two-dot chain line. For comparison, the waveform of the drain current IDS shown in FIG. 2B is indicated by broken lines in the switching periods T2, T3, and T4.

  As shown in FIG. 2C, by shortening the blanking time, the drain current IDS is limited by the maximum current detection value ILIMIT in the switching period T1. Further, even if the initial current value becomes high and the minimum pulse driving is performed in the switching period T2, the increase amount (IDpeak-Is) of the drain current IDS is the increase in the drain current IDS in the switching period T2 shown in FIG. Smaller than the amount. Further, when the output voltage VOUT gradually increases after the switching period T3, the initial current value also decreases. As a result, the peak value IDpeak of the drain current IDS becomes lower than the peak value IDpeak of the drain current IDS shown in FIG. 2B, and gradually decreases after the switching period T3. Therefore, it is possible to prevent the drain current IDS from becoming larger than the maximum allowable current value of the main switching element 2, and it is possible to realize overcurrent protection that protects the main switching element 2 from deterioration and damage.

  After the switching period T3, as the output voltage VOUT rises, the slope of the drain current IDS becomes gentle, the slope of the regenerative current IFRD becomes steep, and the initial current value becomes small. Therefore, the blanking time is changed from TBLKs to TBLK. Even if it is changed, the drain current IDS is limited by the current detection value ILIMR determined by the feedback signal control circuit FB17, and the ON period of the main switching element 2 is the sum of the blanking time TBLK and the detection delay time Td during normal operation. Longer than the value.

  FIG. 2 (d) shows that in the soft start period TSS at the time of power activation, the blanking time is set to TBLKs shorter than TBLK in normal operation, and the maximum current detection value of the drain current IDS is ILIMIT in normal operation. The waveform of the drain current IDS when set to a smaller ILIMITss is shown.

  FIG. 2D shows a case where TBLKs is set to 1/2 of TBLK and ILIMITS is set to 1/2 of ILIMIT. In this case, the slopes of the current waveforms of the drain current IDS and the regenerative current IFRD in the switching periods T1, T2, T3, and T4 are the same as in FIG.

  In FIG. 2D, a period during which the main switching element 2 is off is defined as Toff2. In addition, switching periods in which the main switching element 2 performs a switching operation are T1, T2, T3, and T4. Further, the initial current value for each switching period of the drain current IDS is Is. In FIG. 2D, the regenerative current IFRD that flows during the period Toff2 is indicated by a two-dot chain line. For comparison, the waveform of the drain current IDS shown in FIG.

  As shown in FIG. 2D, by shortening the blanking time and reducing the maximum current detection value, the on period of the main switching element 2 in the switching period T1 becomes the minimum on period Tmins = TBLKs + Td. The maximum current value of the drain current IDS flowing through the main switching element 2 in the switching period T1 is smaller than the maximum current value of the drain current IDS in the switching period T1 shown in FIG. As a result, the increase amount of the drain current IDS after the switching cycle T2 is constant, but the initial current value Is is smaller than the initial current value of the drain current IDS shown in FIG. Accordingly, the peak value IDpeak of the drain current IDS becomes lower than the peak value IDpeak of the drain current IDS shown in FIG. 2C, and gradually decreases after the switching period T3. As a result, the drain current IDS can be prevented from becoming larger than the maximum allowable current value of the main switching element 2, and safer overcurrent protection that protects the main switching element 2 from deterioration and damage can be realized.

  In addition, by setting the maximum current detection value of the drain current IDS smaller than that in the normal operation in the soft start period TSS at the time of power activation, the amount of energy conversion per unit time is reduced, and the output voltage VOUT is raised smoothly. be able to.

  After the switching period T3, as the output voltage VOUT rises, the slope of the drain current IDS becomes gentle, the slope of the regenerative current IFRD becomes steep, and the initial current value becomes small. Therefore, the blanking time is changed from TBLKs to TBLK. Even if the maximum current detection value of the drain current IDS is changed from ILIMITITs to ILIMIT, the drain current IDS is limited by the current detection value ILIMR determined by the feedback signal control circuit FB17, and the ON period of the main switching element 2 However, it becomes longer than the total value of the blanking time TBLK and the detection delay time Td during normal operation.

  In FIGS. 2C and 2D, the case where the blanking time and the maximum current detection value in the soft start period TSS at the time of power activation are set to ½ of the normal operation is described. There is no need to be limited.

  2C and 2D, the case where the blanking time in the soft start period TSS at the time of power activation is set to ½ that in the normal operation has been described, but is determined by the soft start period generation circuit 25. The start time of the soft start period TSS may be a minimum value, and the blanking time may be gradually increased during the soft start period TSS. In this case, the blanking time may be increased stepwise (or digitally) during the soft start period TSS. Even in such a configuration, as described above, after the switching period T3, as the output voltage VOUT rises, the slope of the drain current IDS becomes gentle, the slope of the regenerative current IFRD becomes steep, and the initial current value becomes small. Therefore, the peak value of the drain current IDS decreases, and even if the blanking time changes from TBLKs to TBLK, the drain current IDS is limited by the current detection value ILIMR determined by the feedback signal control circuit FB17, and The ON period of the switching element 2 becomes longer than the total value of the blanking time TBLK and the detection delay time Td during normal operation. According to this configuration, it is possible to smoothly shift to the blanking time required during normal operation after the soft start period TSS has elapsed.

  Further, in FIG. 2D, the case where the maximum current detection value in the soft start period TSS at the time of starting the power supply is set to ½ that in the normal operation has been described. A configuration in which the voltage level of the clamp signal generated by the clamp circuit 18 gradually increases during the soft start period TSS and the maximum current detection value of the drain current IDS gradually increases with the start time of the start period TSS as a minimum value. Also good. Further, in this case, the voltage level of the clamp signal increases stepwise (or digitally) during the soft start period TSS, and the maximum current detection value of the drain current IDS increases stepwise (digitally). Good. Even in such a configuration, as described above, after the switching period T3, as the output voltage VOUT rises, the slope of the drain current IDS becomes gentle, the slope of the regenerative current IFRD becomes steep, and the initial current value becomes small. Therefore, even if the peak value of the drain current IDS decreases and eventually the blanking time changes from TBLKs to TBLK, and the maximum current detection value of the drain current IDS changes from ILIMITS to ILIMIT, the drain current IDS becomes the feedback signal control circuit. It is limited by the current detection value ILIMR determined by FB17, and the ON period of the main switching element 2 becomes longer than the total value of the blanking time TBLK and the detection delay time Td during normal operation. According to this configuration, it is possible to smoothly shift to the maximum current detection value (overcurrent detection value) required during normal operation after the soft start period TSS has elapsed. In addition, as the time passes, the energy transmitted to the output side of the switching transformer 1 increases, so that the output voltage VOUT cannot reach a predetermined voltage value after the soft start period TSS elapses, resulting in a startup failure state. Absent.

  In the first embodiment, the case where the main switching element 2 and the control circuit block 3 are integrated on the same substrate and incorporated in one package has been described. Thus, by configuring the switching power supply device using the package in which the main switching element 2 and the control circuit block 3 are incorporated, the number of parts of the switching power supply device can be greatly reduced. Furthermore, since the detection of the drain current IDS flowing through the main switching element 2 is performed inside the package, there is a low possibility that the detection will be affected by external noise or the like. Therefore, the probability of erroneous detection of the drain current IDS can be lowered, and safety can be improved.

(Embodiment 2)
Next, a second embodiment of the present invention will be described. FIG. 3 is a circuit diagram showing an example of the switching power supply device and the semiconductor device according to the second embodiment. 3, members corresponding to those shown in FIG. 1 are denoted by the same reference numerals as those in FIG. 1, and description thereof will be omitted. This switching power supply device employs current mode PWM control as the control method of the switching operation of the main switching element, as in the first embodiment.

  As shown in FIG. 3, in this switching power supply device, the energy conversion circuit 7 is configured by a series circuit including a coil 27, which is an energy converter, a smoothing capacitor 6, and a rectifier diode 28, and the output load is positive. The chopper method is a step-down type. Specifically, one end of the coil 27 is connected to one end of the smoothing capacitor 6, the other end of the smoothing capacitor 6 is connected to the anode of the rectifier diode 28, and the cathode of the rectifier diode 28 is connected to the other end of the coil 27. Yes. The input power supply terminal IN is connected to the DRAIN terminal of the semiconductor device 10 to which the input terminal of the main switching element 2 is connected, and the cathode of the coil 27 and the rectifier diode 28 is connected to the SOURCE terminal to which the output terminal of the main switching element 2 is connected. The common connection is connected. A terminal RETURN serving as a reference potential is connected to the other end of the smoothing capacitor 6 and the anode of the rectifier diode 28. Note that a fast recovery diode (FRD) having a short reverse recovery time trr is generally used for the rectifier diode 28 of the chopper type switching power supply device in order to reduce switching loss.

  The energy conversion circuit 7 converts the input power supply voltage VIN switched by the main switching element 2 into an output voltage VOUT having a voltage value different from the input power supply voltage VIN. Specifically, the energy conversion circuit 7 smoothes the energy accumulated in the coil 27 by the switching operation of the main switching element 2 by the smoothing capacitor 6 and generates the output voltage VOUT.

  Further, this switching power supply device is different from the first embodiment described above in the configuration of the control circuit block 3. Specifically, the control circuit block 3 includes a comparator 29 that compares the SS terminal voltage with a reference voltage and generates a comparison signal indicating the comparison result. Further, this switching power supply device does not include a blanking time adjustment circuit, and the clamp circuit 18 is not connected to the SS terminal. Therefore, in this switching power supply device, the blanking time TBLK and the overcurrent detection value (maximum current detection value ILIMIT) are constant.

  Further, this switching power supply device is different from the first embodiment described above in the configuration of the gate drive circuit 4. Specifically, the gate drive circuit 4 includes an Nch type MOS transistor 30, Pch type MOS transistors 31a and 31b, and an OR circuit 32. The Pch type MOS transistor 31a and the Pch type MOS transistor 31b have the same current drive capability. The Pch type MOS transistor 31 b and the Nch type MOS transistor 30 constitute a pre-driver 33, and the common output part of the gate drive circuit 4 and the pre-driver 33 is connected to the control terminal of the main switching element 2. A switching control signal from the switching control signal generation circuit 20 is supplied to one input terminal of the OR circuit 32 and an input terminal of the pre-driver 33, and a comparison signal from the comparator 29 is supplied to the other input terminal of the OR circuit 32. Supplied. A signal generated by the OR circuit 32 is supplied to the gate of the Pch-type MOS transistor 31a.

  The operation of the switching power supply device configured as described above will be described. The DRAIN terminal connected to the input terminal of the main switching element 2 is smoothed by the input capacitor from the input power supply terminal IN to the input power supply voltage VIN (not shown, for example, a voltage obtained by rectifying a commercial AC voltage by a rectifier such as a diode bridge) When a DC voltage such as a voltage is applied, a current is supplied to the power supply capacitor 11 connected to the VDD terminal by the regulator 13 of the control circuit block 3, and the VDD terminal voltage rises.

  The switch of the regulator 13 is turned on until the VDD terminal voltage reaches a certain voltage, and current is supplied from the regulator 13 to the VDD terminal. Thereafter, when the VDD terminal voltage becomes equal to or higher than a certain voltage, the switch of the regulator 13 is turned off, the current supply from the regulator 13 to the VDD terminal is stopped, and the VDD terminal voltage is held at a constant potential.

  The start / stop circuit 14 turns on the regulator 13 until the VDD terminal voltage reaches a certain voltage, and turns off the regulator 13 when the VDD terminal voltage exceeds the certain voltage. The start / stop circuit 14 generates a start signal when the VDD terminal voltage reaches the start voltage, and generates a start / stop signal when the VDD terminal voltage decreases to the start / stop voltage.

  When a start signal is supplied from the start / stop circuit 14, the soft start period generation circuit 25 causes a constant current to flow from the constant current source to the soft start capacitor 12 connected to the SS terminal, thereby increasing the SS terminal voltage. The soft start period TSS is until the SS terminal voltage becomes higher than the reference voltage of the comparator 29 and the logic level of the comparison signal generated by the comparator 29 changes to the L level.

  During the soft start period TSS, since the logic level of the comparison signal generated by the comparator 29 is H level, the logic level of the signal supplied from the OR circuit 32 to the gate of the Pch type MOS transistor 31a is also H level. The type MOS transistor 31a is off. Therefore, during the soft start period TSS, the Pch type MOS transistor 31b and the Nch type MOS transistor 30 operate according to the switching control signal from the switching control signal generation circuit 20 to drive the main switching element 2.

  After the soft start period TSS elapses, the logical level of the comparison signal generated by the comparator 29 is L level. Therefore, according to the switching control signal from the switching control signal generation circuit 20, the Pch type MOS transistor 31a and the Pch type MOS are used. Transistor 31b and Nch type MOS transistor 30 operate to drive main switching element 2.

  As described above, in this switching power supply device, the turn-on drive capability of the gate drive circuit 4 in the soft start period TSS is reduced as compared with the normal operation after the soft start period TSS has elapsed. The turn-on time of the element 2 can be made longer than that during normal operation.

  When oscillation (switching operation) of the main switching element 2 is started by a start signal from the start / stop circuit 14, power is supplied to the energy conversion circuit 7 including the coil 27, the smoothing capacitor 6, and the rectifier diode 28 via the SOURCE terminal. The output voltage VOUT is applied from the energy conversion circuit 7 to the load 8 connected to the output terminal OUT.

  This output voltage VOUT is detected by the output voltage detection circuit 9. The output voltage detection circuit 9 generates a feedback signal FB_S indicating the voltage level of the output voltage VOUT. The feedback signal FB_S is supplied to the feedback signal control circuit FB17 of the control circuit block 3 through the FB terminal.

  Based on the feedback signal FB_S, the feedback signal control circuit FB17 decreases the first reference voltage VR when the load state becomes light and the output voltage VOUT increases, and conversely the first condition when the load state becomes heavy and the output voltage VOUT decreases. The reference voltage VR is increased.

  During normal operation after the soft start period TSS has elapsed, the first reference voltage VR corresponding to the detection value of the drain current IDS (current detection value ILIMR) is the reference voltage of the comparator 19, and the load state is light. When the first reference voltage VR decreases, the detected value of the drain current IDS decreases, the on-time of the main switching element 2 is shortened, and the peak value (maximum current value) of the drain current IDS flowing through the main switching element 2 is reduced. As a result, the output voltage VOUT decreases. Conversely, when the load state becomes heavy and the first reference voltage VR increases, the detected value of the drain current IDS increases, the on-time of the main switching element 2 becomes longer, and the peak value of the drain current IDS flowing through the main switching element 2 (Maximum current value) rises and the output voltage VOUT rises. The switching power supply apparatus thus performs PWM control in the current mode to stabilize the output voltage VOUT at a predetermined voltage value.

  Next, the drain current IDS flowing through the main switching element 2 will be described with reference to FIGS. 4 and 5 are waveform diagrams (time charts) showing the state of the drain current IDS.

  FIG. 4 shows the drain current IDS flowing through the main switching element 2 during a normal operation in which a sufficient time elapses after the power is turned on and the soft start period TSS ends and the output voltage VOUT is stabilized to a predetermined voltage value. The waveform of the regenerative current IFRD flowing from the anode to the cathode of the rectifier diode 28 is shown.

  In the case of a chopper switching power supply, the on-duty of the switching control signal during normal operation is determined by the voltage difference between the input power supply voltage VIN and the output voltage VOUT. Whether the current waveform of the drain current IDS flowing through the main switching element 2 is in the continuous mode or the discontinuous mode is also determined by the voltage difference between the input power supply voltage VIN and the output voltage VOUT.

  FIG. 4A shows waveforms of the drain current IDS and the regenerative current IFRD when the current waveform of the drain current IDS is in the discontinuous mode. 4A, Ton is a period in which the main switching element 2 is on, IDS is a current waveform of a drain current flowing in the period, and a rectifier diode of the energy conversion circuit 7 is in a period in which the main switching element 2 is off. 28, Toff is the period during which the regenerative current IFRD is flowing, IFRD is the current waveform of the regenerative current flowing during that period, IDpeak is the current value of the current flowing when the main switching element 2 is turned off, and the main switching element 2 is turned on Let Isp1 be the current value of the spike current component that flows when

  During normal operation, the drain current IDS is determined by the current detection value ILIMR (absolute value is an arbitrary value less than ILIMIT) determined by the feedback signal control circuit FB17 that is less than or equal to the maximum current detection value ILIMIT determined by the clamp circuit 18. When the drain current IDS reaches the current detection value ILIMR, the main switching element 2 is turned off after a predetermined detection delay time Td. At this time, the current value of the drain current IDS reaches IDpeak (ILIMIT, ILIMR, and Td are not shown).

  Due to the energy accumulated in the coil 27 during the period Ton when the main switching element 2 is on, the regenerative current IFRD flows from the coil 27 to the loop of the smoothing capacitor 6 and the rectifier diode 28 during the period when the main switching element 2 is off. Flows. The regenerative current IFRD flowing through the rectifier diode 28 decreases with a constant slope from the peak value of the same value as IDpeak. In the discontinuous mode, the energy stored in the coil 27 is lost before the main switching element 2 is turned on next time. Therefore, the regenerative current IFRD does not flow when the main switching element 2 is turned on.

  When the main switching element 2 is turned on, a current charged in a parasitic capacitance or the like such as the main switching element 2 or the rectifier diode 28 flows as a spike current during the OFF period of the main switching element 2. However, since the parasitic capacitance value is about several pF, the current value Isp1 of the spike current component is a much smaller value than IDpeak.

  FIG. 4B shows waveforms of the drain current IDS and the regenerative current IFRD when the current waveform of the drain current IDS is in the continuous mode. In FIG. 4B, the period in which the main switching element 2 is on is Ton, the current waveform of the drain current flowing in that period is IDS, the period in which the main switching element 2 is off is Toff2, and the regeneration flowing in that period is IFRD is the current waveform of the current, IDpeak is the current value of the current that flows when the main switching element 2 is turned off, and Isp2 is the current value of the spike current component of the current that flows when the main switching element 2 is turned on Let Is be the current value of the initial current other than the current component.

  During normal operation, the drain current IDS is determined by the current detection value ILIMR (absolute value is an arbitrary value less than ILIMIT) determined by the feedback signal control circuit FB17 that is less than or equal to the maximum current detection value ILIMIT determined by the clamp circuit 18. When the drain current IDS reaches the current detection value ILIMR, the main switching element 2 is turned off after a predetermined detection delay time Td. At this time, the current value of the drain current IDS reaches IDpeak (ILIMIT, ILIMR, and Td are not shown).

  Due to the energy accumulated in the coil 27 during the period Ton when the main switching element 2 is on, the regenerative current IFRD flows from the coil 27 to the loop of the smoothing capacitor 6 and the rectifier diode 28 during the period when the main switching element 2 is off. Flows. The regenerative current IFRD flowing through the rectifier diode 28 decreases with a constant slope from the peak value of the same value as IDpeak. In the continuous mode, since the forward voltage is applied to the rectifier diode 28 until immediately before the main switching element 2 is turned on next time, the regenerative current IFRD flows even when the main switching element 2 is turned on. The positive current value becomes the initial current value Is of the drain current IDS.

  When the main switching element 2 is turned on, the voltage applied to the rectifier diode 28 changes from the forward voltage to the reverse voltage, so that a negative current, that is, a reverse recovery current Irr flows from the cathode of the rectifier diode 28 to the anode. At this time, the voltage applied to the rectifier diode 28 is applied via the main switching element 2, and in the case of a chopper type switching power supply device, the rectifier diode 28 and the main switching element 2 are directly connected. A current having the same current value as the reverse recovery current Irr also flows through the main switching element 2. At this time, a current charged in a parasitic capacitance such as the main switching element 2 or the rectifier diode 28 also flows during the off period of the main switching element 2.

  In a flyback type switching power supply device or the like, a magnetically coupled transformer is interposed between the rectifier diode and the main switching element, and a current having the same current value as the reverse recovery current Irr of the rectifier diode is supplied to the main switching element. Does not flow.

  The current value Isp2 of the spike current component generated when the main switching element 2 is turned on is opposite to the current value of the current charged in the parasitic capacitors such as the main switching element 2 and the rectifier diode 28 during the off period of the main switching element 2. This is the sum of the current values of the recovery current Irr. The current value of the reverse recovery current Irr depends on the reverse recovery time trr, which is a characteristic characteristic of the rectifier diode 28, but greatly depends on the applied reverse voltage. That is, the higher the reverse voltage is, the higher dV / dt and dI / dt are, and the higher the potential fluctuation is, the higher the reverse recovery current Irr becomes. Further, since the dI / dt is higher as the current value of the forward current (initial current value Is) flowing when the reverse voltage is applied is larger, the current value of the reverse recovery current Irr is also larger.

  As described above, in the continuous mode, the current value of the current flowing when the main switching element 2 is turned on is the total value of the initial current value Is and the spike current component current value Isp2, and in the discontinuous mode, the main switching element 2 This value is much larger than the current value Isp1 of the current flowing at the turn-on time.

  FIG. 5 shows a waveform of the drain current IDS flowing through the main switching element in the soft start period TSS at the time of power activation. FIG. 5A shows a drain current IDS in a conventional general chopper type switching power supply. FIG. 5B shows the waveform of the drain current IDS in the switching power supply device according to the second embodiment.

  In FIG. 5, the period when the main switching element is on is Ton, the current waveform of the drain current flowing through the main switching element during that period is IDS, the period when the main switching element is off is Toff2, and the switching period of the drain current IDS IDpeak is the maximum current value (peak value) for each, Is is the initial current value for each switching period of the drain current IDS, Isp2 is the current value of the spike current component for each switching period, and IMAX is the maximum allowable current value of the main switching element To do. In addition, switching periods in which the main switching element performs a switching operation are T1, T2, T3, and T4. Note that the regenerative current IFRD flowing from the anode to the cathode of the rectifier diode in the period Toff2 is indicated by a two-dot chain line.

  As shown in FIG. 5A, since the input power supply voltage VIN is high and the output voltage VOUT is extremely close to zero when the power supply is activated, the current waveform of the drain current IDS that flows during the period Ton when the main switching element is on. And the slope of the current waveform of the regenerative current IFRD that flows through the rectifier diode during the period Toff2 during which the main switching element is off becomes gentle. Therefore, when the power supply is activated, the current waveform of the drain current IDS flowing through the main switching element is in a continuous mode. Therefore, even if the on-time of the main switching element is minimized or the overcurrent detection value is kept low as in the conventional general switching power supply device, the switching periods T1 and T2 as shown in FIG. The main switching element is driven in the minimum ON period, and the minimum pulse drive in which the initial current value and the maximum current value (peak value) of the drain current IDS increase is repeated, and the initial current value Is and the peak value IDpeak of the drain current IDS are repeated. Will increase.

  Further, when the main switching element is turned on, the voltage applied to the rectifier diode changes from the forward voltage to the reverse voltage, so that the reverse recovery current Irr flows through the rectifier diode, and the main switching element During the OFF period, a spike current that is the sum of the current charged in the parasitic capacitance such as the main switching element or the rectifier diode and the reverse recovery current Irr flows. Since the initial current value Is of the drain current IDS increases every switching cycle at the time of power activation, the spike current component current value Isp2 also increases every switching cycle.

  As a result, when the minimum pulse driving continues, the initial current value Is of the drain current IDS and the current value Isp2 of the spike current component increase every switching cycle, and the rate of increase of the current value Isp2 of the spike current component increases the peak of the drain current IDS. Since the rate of increase of the value IDpeak is larger, the current value obtained by adding the current value Isp2 of the spike current component to the initial current value Is becomes higher than the peak value IDpeak of the drain current IDS.

  Next, a case where the output voltage VOUT slightly increases in the switching period T3 will be described. The output voltage VOUT gradually increases due to the energy transmitted from the output side of the coil every switching period. As a result, the slope of the current waveform of the drain current IDS flowing through the main switching element during the period Ton when the main switching element is on becomes gentler than the slope in the switching period T2. In addition, the slope of the current waveform of the regenerative current IFRD that flows through the rectifier diode during the period Toff2 in which the main switching element is off becomes steeper than the slope in the switching period T2. In order to show the difference in the slope of the current waveform of the regenerative current IFRD, the same waveform as that of the regenerative current IFRD in the switching period T2 is indicated by a broken line.

  Thus, although the increase amount of the drain current IDS flowing through the main switching element slightly decreases with the increase of the output voltage VOUT, the initial current value Is of the drain current IDS and the current value Isp2 of the spike current component are prevented from increasing. It is not possible.

  As a result of the operation described above, even if the on-time of the main switching element is minimized or the overcurrent detection value is kept low as in the conventional general switching power supply device, as shown in FIG. The current value obtained by adding the current value Isp2 of the spike current component to the initial current value Is becomes equal to or greater than the maximum allowable current value IMAX, and the switching element is deteriorated or broken.

  On the other hand, the switching power supply according to the second embodiment turns on the main switching element 2 with the current drive capability of the two Pch-type MOS transistors 31a and 31b during normal operation, and the soft start period TSS at the time of power activation. In FIG. 2, the main switching element 2 is turned on with the current drive capability of only the Pch-type MOS transistor 31b, and the turn-on drive capability of the gate drive circuit 4 is halved in the soft start period TSS. As a result, the turn-on time of the main switching element 2 in the soft start period TSS becomes longer than the turn-on time in the normal operation, and dV / dt and dI / dt become gradual, so that the reverse recovery current Irr can be kept small. Thus, the current value Isp2 of the spike current component can be kept small. Therefore, as shown in FIG. 5B, the initial current value Is of the drain current IDS and the current value Isp2 of the spike current component, which increase with each switching cycle, can be kept small, and the spike current component of the initial current value Is is reduced. It is possible to prevent the current value obtained by adding the current value Isp2 from increasing to the maximum allowable current value IMAX of the main switching element 2, and to realize overcurrent protection that protects the main switching element 2 from deterioration and damage.

  In the second embodiment, the case where the turn-on drive capability of the gate drive circuit 4 in the soft start period TSS is halved from that in the normal operation has been described. However, the present invention is not limited to this.

(Embodiment 3)
Subsequently, Embodiment 3 of the present invention will be described. FIG. 6 is a circuit diagram showing an example of the switching power supply device and the semiconductor device according to the third embodiment. 6, members corresponding to those shown in FIGS. 1 and 3 are given the same reference numerals as those in FIGS. 1 and 3, and descriptions thereof are omitted.

  As shown in FIG. 6, in this switching power supply device, the control circuit block 3 includes a blanking time adjustment circuit 26 and the clamp circuit 18 is connected to the SS terminal, as in the first embodiment. This is different from the second embodiment described above.

  With this configuration, in the soft start period TSS, not only the turn-on drive capability of the gate driver circuit 4 can be reduced, but also the blanking time can be made shorter than that during normal operation, and the drain current flowing through the main switching element 2 can be reduced. The maximum current detection value of IDS can be made smaller than that during normal operation.

  Therefore, even when the minimum pulse drive is performed at the time of starting the power supply, the current value of the current that flows when the main switching element 2 is turned on (the current obtained by adding the spike current to the initial current) and the drain current IDS that flows when the main switching element 2 is turned off The current value of the current flowing through the main switching element 2 can be prevented from exceeding the maximum allowable current value of the main switching element 2, and the main switching element 2 can be deteriorated or damaged. Safer overcurrent protection can be realized.

  In addition, by setting the maximum current detection value of the drain current IDS smaller than that in the normal operation in the soft start period TSS at the time of power activation, the amount of energy conversion per unit time is reduced, and the output voltage VOUT is raised smoothly. be able to.

  As described in the first embodiment, the blanking time in the soft start period TSS at the time of starting the power supply is gradually increased during the soft start period TSS with the minimum value at the start of the soft start period TSS. Also good. In this case, the blanking time may be increased stepwise (or digitally) during the soft start period TSS. In this way, it is possible to smoothly shift to the blanking time required during normal operation after the soft start period TSS has elapsed.

  In addition, as described in the first embodiment, the voltage level of the clamp signal in the soft start period TSS at the time of starting the power supply gradually increases during the soft start period TSS with the minimum value at the start of the soft start period TSS. It is good. Further, in this case, the voltage level of the clamp signal increases stepwise (or digitally) during the soft start period TSS, and the maximum current detection value of the drain current IDS increases stepwise (or digitally). Also good. In this way, it is possible to smoothly shift to the maximum current detection value (overcurrent detection value) required during normal operation after the soft start period TSS has elapsed. Further, as the time passes, the energy transmitted to the output side of the coil 27 increases, so that the output voltage VOUT cannot reach a predetermined voltage value after the soft start period TSS elapses, so that a start-up failure state does not occur. .

(Embodiment 4)
Next, a fourth embodiment of the present invention will be described. In the switching power supply device and the semiconductor device according to the fourth embodiment, the configuration of the soft start period generation circuit 25 is different from that of the first to third embodiments. FIG. 7 shows an example of the soft start period generation circuit 25 provided in the switching power supply device and the semiconductor device according to the fourth embodiment.

  As shown in FIG. 7, the soft start period generating circuit 25 is connected to the SS terminal and a first constant current source 34 for supplying a constant current ILS (SS1) to a soft start capacitor (not shown) connected to the SS terminal. A second constant current source 35 that draws current from a soft start capacitor (not shown) with a constant current ILS (SS2), an inverting input terminal is connected to the SS terminal, and a preset reference voltage VLS2 is applied to the non-inverting input terminal. The comparator 36 to be applied, the inverting input terminal is connected to the SS terminal, and the preset reference voltage VLS1 (<reference voltage VLS2) is applied to the non-inverting input terminal, and the comparator 36 and the comparator 37 are in common The inverter 38 that inverts the signal from the output unit, and the signal from the common output unit of the comparator 36 and the comparator 37 , A third constant current source 40 that supplies a constant current ILS (SS3) to a soft start capacitor (not shown) connected to the SS terminal, a first constant current source 34, and an SS terminal Between the switch 41 whose state is controlled by a signal from an unillustrated start / stop circuit, and between the switch 41 and the SS terminal, and a signal from a common output section of the comparator 36 and the comparator 37. A switch 42 whose state is controlled, a switch 43 which is interposed between the second constant current source 35 and the SS terminal and whose state is controlled by a signal from the inverter 38, and a common output part of the comparator 36 and the comparator 37 The state is controlled by a signal from, and the state is determined by a switch 44 that determines the power supply to the comparator 36 and a signal from the inverter 38. Controlled by a signal SS_END, which is interposed between the switch 45 for determining the power supply to the comparator 37, the third constant current source 40, and the SS terminal and indicating the end of the soft start period generated by the counter circuit 39. Is controlled.

  In the soft start period generation circuit 25, the two constant current sources 34 and 35 charge and discharge a soft start capacitor (not shown). The two comparators 36 and 37 detect the upper limit of the voltage level (SS terminal voltage) of a soft start capacitor (not shown) by the reference voltage VLS2, and detect the lower limit by the reference voltage VLS1. The four switches 42, 43, 44, and 45 switch charging and discharging of a soft start capacitor (not shown) based on signals generated by the two comparators 36 and 37. The counter circuit 39 counts up the count value based on the signals generated by the two comparators 36 and 37, and generates a signal SS_END indicating the end of the soft start period when the count value reaches a predetermined value.

  Before a start signal is supplied to each block from a start / stop circuit (not shown), the SS terminal voltage is fixed to the same potential as the SOURCE terminal voltage, and the start signal is supplied from the start / stop circuit to each block. Then, the fixation of the SS terminal voltage is released (not shown).

  When a start signal is supplied to each block from a start / stop circuit (not shown), the switch 41 is turned on by the start signal from the stop start / stop circuit. At this time, the SS terminal voltage is lower than VLS1 and VLS2. At this time, both the switches 44 and 45 are on. Therefore, at this time, a signal whose logic level is H level is generated from the comparators 36 and 37.

  The switches 42 and 44 are turned on while a signal having a logic level of H level is supplied from the common output unit of the comparator 36 and the comparator 37 and turned off while a signal having a logic level of L is supplied. It becomes. On the other hand, the switches 43 and 45 are turned on during a period in which a signal having a logic level of L is supplied from the common output section of the comparator 36 and the comparator 37, and in a period in which a signal having a logic level of H is supplied. Turns off.

  Therefore, when the start signal is supplied to each block, the switch 44 is kept on and the switch 45 is turned off, so that the internal circuit power supply voltage (power supply voltage of the control circuit block 3) is supplied to the comparator 36. The internal circuit power supply voltage is not supplied to the comparator 37, the operation of the comparator 37 is stopped, and the logic level generated by the comparator 36 is H level from the common output section of the comparator 36 and the comparator 37. A signal is supplied. As a result, the constant current ILS (SS1) from the first constant current source 34 is supplied to the soft start capacitor (not shown) via the SS terminal. At this time, the counter circuit 39 receives a signal having a logic level of H level.

  When a soft start capacitor (not shown) is charged by the constant current ILS (SS1) and the SS terminal voltage reaches VLS2, the comparator 36 generates a signal whose logic level is L level. As a result, the switch 42 is turned off, and the supply of the constant current ILS (SS1) from the first constant current source 34 to the soft start capacitor (not shown) is stopped. Then, the switch 43 is turned on, and the second constant current source 35 discharges a soft start capacitor (not shown) with the constant current ILS (SS2). At this time, since the switch 44 is turned off and the switch 45 is turned on, the operation of the comparator 36 is stopped, while the comparator 37 starts operating to generate a signal whose logic level is L level. . At this time, the counter circuit 39 receives a signal having a logic level of L level.

  Next, when a soft start capacitor (not shown) is discharged by the constant current ILS (SS2) and the SS terminal voltage is lowered to VLS1, the comparator 37 generates a signal having a logic level of H level. As a result, the switch 43 is turned off, and the discharge of the soft start capacitor (not shown) by the second constant current source 35 is stopped. Then, the switch 42 is turned on, and supply of the constant current ILS (SS1) from the first constant current source 34 to a soft start capacitor (not shown) is started. At this time, since the switch 45 is turned off and the switch 44 is turned on, the operation of the comparator 37 is stopped, while the comparator 36 starts operating to generate a signal whose logic level is H level. . At this time, the counter circuit 39 receives a signal having a logic level of H level and counts up the count value.

  When the series of operations described above is repeated a plurality of times and the count value of the counter circuit 39 reaches a predetermined value, the counter circuit 39 generates a signal SS_END indicating the end of the soft start period. The SS_END signal turns on the switch 46 and supplies the constant current ILS (SS3) from the third constant current source 40 to a soft start capacitor (not shown). When the SS_END signal is generated, both the switches 44 and 45 are turned off, and the comparators 36 and 37 stop operating (not shown). As a result, when the soft start period ends, the SS terminal voltage rises to the internal circuit power supply voltage and is fixed.

  When the soft start period generating circuit 25 described above is used, the soft start period is determined by the constant current value, the capacitance value of the soft start capacitor, and the count value of the counter circuit. Therefore, the soft start capacitor externally attached to the semiconductor device. It is possible to reduce the capacitance value.

  The counter circuit 39 may generate a voltage level signal corresponding to the count value. In this way, the overcurrent detection value determined by the clamp circuit can be gradually increased during the soft start period, or the blanking time can be gradually increased by the blanking time adjustment circuit during the soft start period. It becomes.

(Embodiment 5)
Next, a fifth embodiment of the present invention will be described. FIG. 8 is a circuit diagram showing an example of a switching power supply device and a semiconductor device according to the fifth embodiment. 8, members corresponding to those shown in FIGS. 1, 3, and 6 are given the same reference numerals as those in FIGS. 1, 3, and 6, and descriptions thereof are omitted.

  As shown in FIG. 8, this switching power supply device has a configuration for detecting the drain current flowing through the main switching element 2 and a configuration for preventing a malfunction in which the main switching element 2 is turned off by the spike current. This is different from the first to third embodiments. In addition, when a signal for determining the oscillation start timing of the main switching element 2 is supplied to the semiconductor device 10, the switching power supply device starts oscillation of the main switching element 2 and stops oscillation of the main switching element 2 to the semiconductor device 10. When a signal for determining the timing is supplied, it is different from the first to third embodiments described above in that the oscillation of the main switching element 2 is stopped.

  First, a configuration for detecting a drain current in the switching power supply device will be described. In the switching power supply devices according to Embodiments 1 to 3 described above, the drain current detection circuit 16 is configured to detect the drain current flowing through the main switching element 2 based on the ON voltage of the main switching element 2. On the other hand, in the drain current detection circuit 16 of this switching power supply device, a series circuit comprising a sub switching element 47 and a resistor 48 to which a current flowing through the sub switching element 47 is supplied is connected in parallel to the main switching element 2. It becomes the composition. Specifically, the input terminal of the sub switching element 47 is connected to the input terminal of the main switching element 2, and the output terminal of the sub switching element 47 is connected to the output terminal of the main switching element 2 via the resistor 48. The control terminal of the sub switching element 47 is connected to the control terminal of the main switching element 2, and the gate drive circuit 4 is configured to drive the sub switching element 47 and the main switching element 2 in common. A current having a current value smaller than the current flowing through the main switching element 2 and having a constant current value with respect to the current flowing through the main switching element 2 flows through the switching element 47.

  The drain current detection circuit 16 configured as described above generates a voltage having a voltage value corresponding to the current value of the current flowing through the sub switching element 47 at both ends of the resistor 48. The voltage generated in the resistor 48 is supplied to the comparator 19 as an element current detection signal indicating the current level of the drain current IDS.

  In the configuration in which the drain current of the main switching element 2 is detected based on the ON voltage of the main switching element 2 as in the switching power supply devices according to the first to third embodiments described above, the main switching element 2 is switched from the OFF state to the ON state. The drain current cannot be accurately detected for a certain period of time (generally several hundred nsec) after the transition to. On the other hand, according to the configuration in which the drain current of the main switching element 2 is detected based on the current flowing through the resistor 48 as in the fifth embodiment, the main switching element 2 shifts from the off state to the on state. Even immediately after, the drain current can be detected reliably and accurately.

  The configuration for detecting the drain current described above is not limited to the switching power supply device according to the fifth embodiment, but can be applied to the switching power supply devices according to other embodiments. .

  Next, a configuration for preventing a malfunction in which the main switching element 2 is turned off by a spike current in the switching power supply device will be described. In the first to third embodiments described above, the device current detection signal is not supplied from the drain current detection circuit 16 to the comparator 19 by the on-time blanking pulse signal BLK generated by the blanking period generation circuit 23. there were. On the other hand, in this switching power supply device, the comparator 19 is connected to the switching control signal generation circuit 20 via the AND circuit 49, and the comparison signal from the comparator 19 is supplied to one input terminal. An ON-time blanking pulse signal BLK from the blanking period generation circuit 23 is supplied to the other input terminal. Specifically, the blanking period generation circuit 23 supplies a signal having a logic level of L level to the AND circuit 49 during the blanking period, and invalidates the comparison signal generated by the comparator 19, thereby enabling the main switching element 2. Is prohibited from turning off.

  Note that the configuration for preventing the malfunction that causes the main switching element 2 to be turned off by the spike current described above is not limited to the switching power supply device according to the fifth embodiment, but other embodiments. The present invention can also be applied to such a switching power supply device.

  Next, the configuration for controlling the oscillation start and oscillation stop of the main switching element 2 in this switching power supply device will be described. This switching power supply device includes an input power supply voltage detection circuit (external activation signal generation circuit) 50 connected to the input power supply terminal IN outside the semiconductor device 10. Further, in this switching power supply device, not only the soft start capacitor 12 but also the oscillation start / oscillation stop switch 51 is connected to the SS terminal outside the semiconductor device 10, and the SS terminal is the oscillation start of the switching element 2. It also serves as an external start terminal to which a signal for determining timing / oscillation stop timing is supplied. The oscillation start / oscillation stop switch 51 is connected between the SS terminal and the SOURCE terminal, and its state is controlled by a signal from the input power supply voltage detection circuit 50. Here, the voltage of the soft start capacitor 12 not only serves to determine the soft start period, but also serves as a signal that determines the oscillation start timing / oscillation stop timing of the switching element 2. Further, the control circuit block 3 included in the semiconductor device 10 includes an oscillation start / oscillation stop comparator 52 in which one input terminal is connected to the SS terminal and a preset reference voltage is applied to the other input terminal. Have been added. The oscillation start / oscillation stop comparator 52 compares the voltage (SS terminal voltage) of the soft start capacitor 12 with a reference voltage, and generates a signal indicating the comparison result. This signal is supplied to the input terminal of the NAND circuit 22 of the switching control signal generation circuit 20 instead of the start signal / start stop signal generated by the start / stop circuit 14.

  In order to forcibly turn off the main switching element 2, the oscillation start / oscillation stop switch 51 is turned on. As a result, since the SS terminal voltage becomes the same potential as the SOURCE terminal voltage, a signal whose logic level is L level is supplied from the oscillation start / oscillation stop comparator 52 to the switching control circuit 22, and the main switching element 2 is turned off. Held in. Even when the main switching element 2 is in the OFF state, the input power supply voltage VIN is applied to the DRAIN terminal, so that the power supply voltage of the control circuit block 3 can be held higher than the starting voltage.

  When the oscillation start / oscillation stop switch 51 is turned off, the soft start capacitor 12 is charged by the constant current source of the soft start period generation 25, and the SS terminal voltage rises. When the SS terminal voltage becomes higher than the reference voltage of the oscillation start / oscillation stop comparator 52, a signal whose logic level is H level is supplied from the oscillation start / oscillation stop comparator 52 to the switching control circuit 22. As a result, the oscillation of the main switching element 2 can be started.

  As described above, this switching power supply device can control oscillation start and oscillation stop of the main switching element by the signal supplied to the semiconductor device 10, and the main switching element oscillates by the signal supplied to the semiconductor device 10. Even if is stopped, the internal circuit power supply voltage of the semiconductor device 10 is kept constant, so that restart without delay time (start of oscillation of the main switching element) is possible.

  In addition, this switching power supply device detects the input power supply voltage VIN, and when the input power supply voltage VIN reaches a predetermined value, the input power supply voltage that generates an external start signal for turning off the oscillation start / oscillation stop switch 51 The detection circuit 50 is provided. The power supply voltage for the internal circuit of the semiconductor device 10 is about 10V. Therefore, when the input power supply voltage VIN becomes 10 V or more at the time of starting the power supply, the power supply voltage is supplied to each block of the control circuit block 3 and becomes operable. Therefore, by setting a voltage value equal to or higher than the internal circuit power supply voltage of the semiconductor device 10 to the input power supply voltage detection circuit 50 as a predetermined value, when the input power supply voltage VIN reaches the predetermined value, the delay time does not occur. It becomes possible to start oscillation of the switching element.

  Note that the configuration for controlling the oscillation start and oscillation stop of the main switching element 2 by the signal supplied to the semiconductor device 10 described above is not limited to the switching power supply device according to the fifth embodiment, but other implementations. The present invention can also be applied to the switching power supply device according to the embodiment. Although the case where the soft start period generation circuit 25 includes a constant current source and a switch has been described here, the soft start period generation circuit 25 having the configuration shown in FIG. 7 may be used. In this case, the reference voltage of the oscillation start / oscillation stop comparator 52 may be set to be equal to or lower than the reference voltage VLS1 of the comparator 37 of the soft start period generation circuit 25.

  The switching power supply device and the semiconductor device according to the present invention are useful as a switching power supply device having a soft start function for reducing an inrush current at the time of power supply startup and an overshoot of output voltage.

1 is a circuit diagram showing an example of a switching power supply device and a semiconductor device according to a first embodiment of the present invention. Waveform diagram showing drain current in the switching power supply according to the first embodiment Circuit diagram showing an example of a switching power supply device and a semiconductor device according to a second embodiment of the present invention Waveform diagram showing drain current and regenerative current during normal operation of the switching power supply according to the second embodiment Waveform diagram showing drain current in the soft start period of the switching power supply according to the second embodiment The circuit diagram which shows an example of the switching power supply device and semiconductor device which concern on Embodiment 3 of this invention A circuit diagram showing an example of a soft start period generating circuit with which a switching power supply device and a semiconductor device concerning Embodiment 4 of the present invention are provided Circuit diagram showing an example of a switching power supply and a semiconductor device according to Embodiment 5 of the present invention Circuit diagram showing a conventional switching power supply device

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Switching transformer 1a Primary winding 1b Secondary winding 2 Main switching element 3 Control circuit block 4 Gate drive circuit 5 Rectifier diode 6 Smoothing capacitor 7 Energy conversion circuit 8 Load 9 Output voltage detection circuit 10 Semiconductor device 11 Power supply capacitor 12 Soft start capacitor 13 Regulator 14 Start / stop circuit 15 Oscillator 16 Drain current detection circuit 17 Feedback signal control circuit 18 Clamp circuit 19 Comparator 20 Switching control signal generation circuit 21 Flip-flop circuit 22 NAND circuit 23 Blanking period generation circuit 24 Switch 25 Soft start period generation circuit 26 Blanking time adjustment circuit 27 Coil 28 Rectifier diode 29 Comparator 30 Nch type MOS transistors 31a, 31 b Pch MOS transistor 32 OR circuit 33 Pre-driver 34 First constant current source 35 Second constant current source 36, 37 Comparator 38 Inverter 39 Counter circuit 40 Third constant current source 41-46 Switch 47 Sub switching element 48 Resistor 49 AND circuit 50 Input power supply voltage detection circuit 51 Oscillation start / oscillation stop switch 52 Oscillation start / oscillation stop comparator 100 IC
DESCRIPTION OF SYMBOLS 101 Terminal 102 Power switch 103 Capacitor 104 Constant current source 105 Comparator 106 Bias circuit 107 Switching transistor 108 Rectifier diode 109 Coil 110 Smoothing capacitor 111 Switching voltage generator 112 Voltage divider 113 Error amplifier 114 PWM comparator 115 Triangular wave generator 116 Transistor driver

Claims (26)

A main switching element for switching the first DC voltage;
A conversion circuit that converts the first DC voltage switched by the main switching element into a second DC voltage having a voltage value different from that of the first DC voltage;
A control circuit for controlling the operation of the main switching element;
An output voltage detection circuit that feeds back a feedback signal indicating the voltage value of the second DC voltage to the control circuit;
The control circuit includes:
An oscillation circuit that oscillates a signal that determines the turn-on timing of the main switching element;
An element current detection circuit for generating an element current detection signal indicating a current value of a current flowing through the main switching element;
A feedback signal control circuit that generates a signal having a signal level corresponding to a voltage value of the second DC voltage based on the feedback signal;
A clamp circuit for generating a clamp signal for fixing a maximum current value of a current flowing through the main switching element;
The main switching element is turned off by comparing the lower signal level of the signal generated by the feedback signal control circuit and the clamp signal generated by the clamp circuit with the signal level of the element current detection signal. A comparator that generates a signal that determines the timing of
A switching control signal for generating a signal for turning on the main switching element based on a signal oscillated by the oscillation circuit and for generating a signal for turning off the main switching element based on a signal generated by the comparator A generation circuit;
A drive circuit for generating a drive signal for driving the main switching element based on a signal generated by the switching control signal generation circuit;
A blanking period generating circuit for inhibiting the main switching element from turning on until a blanking time elapses after the main switching element is turned on based on the drive signal;
A soft start period generating circuit for determining a soft start period from the start of oscillation of the main switching element to the elapse of the soft start time;
A switching power supply apparatus comprising: a blanking time adjusting circuit that generates a signal for shortening the blanking time during the soft start period as compared with after the soft start period has elapsed.   2. The switching power supply device according to claim 1, wherein the blanking time adjusting circuit increases the blanking time during the soft start period with a minimum value at the start of the soft start period.   3. The switching power supply device according to claim 1, wherein the clamp circuit lowers a signal level of the clamp signal during the soft start period as compared with after the soft start period elapses.   4. The switching power supply device according to claim 3, wherein the clamp circuit increases the signal level of the clamp signal during the soft start period with a minimum value at the start of the soft start period.   The blanking period generation circuit invalidates the element current detection signal generated by the element current detection circuit or the signal generated by the comparator until the blanking time elapses after the main switching element is turned on. The switching power supply device according to any one of claims 1 to 4, wherein   6. The switching power supply device according to claim 1, wherein the element current detection circuit generates the element current detection signal based on an ON voltage of the main switching element. The element current detection circuit includes:
A sub-switching element driven in common with the main switching element, having a current value smaller than a current flowing in the main switching element, and a current having a constant ratio to a current flowing in the main switching element;
A resistor to which a current flowing through the sub-switching element is supplied;
6. The switching power supply device according to claim 1, wherein the element current detection signal is generated based on a voltage generated in the resistor. A main switching element for switching the first DC voltage;
A conversion circuit that converts the first DC voltage switched by the main switching element into a second DC voltage having a voltage value different from that of the first DC voltage;
A control circuit for controlling the operation of the main switching element;
An output voltage detection circuit that feeds back a feedback signal indicating the voltage value of the second DC voltage to the control circuit;
The control circuit includes:
An oscillation circuit that oscillates a signal that determines the turn-on timing of the main switching element;
A drive circuit for generating a drive signal for driving the main switching element;
A soft start period generation circuit for determining a soft start period from the start of oscillation of the main switching element until a soft start time elapses, and the main switching element is turned on based on a signal oscillated by the oscillation circuit And turning off the main switching element based on the feedback signal,
The driving circuit drives the main switching element until the soft start period elapses so that the time required for the main switching element to turn on becomes longer than after the soft start period elapses. Switching power supply.   9. The switching power supply device according to claim 8, wherein the conversion circuit includes a series circuit of a diode, a coil, and a capacitor.   10. The drive circuit according to claim 8, wherein the drive circuit reduces the turn-on drive capability of the main switching element until the soft start period elapses compared to after the soft start period elapses. Switching power supply. The control circuit includes:
An element current detection circuit for generating an element current detection signal indicating a current value of a current flowing through the main switching element;
A feedback signal control circuit that generates a signal having a signal level corresponding to a voltage value of the second DC voltage based on the feedback signal;
A clamp circuit for generating a clamp signal for fixing a maximum current value of a current flowing through the main switching element;
The main switching element is turned off by comparing the lower signal level of the signal generated by the feedback signal control circuit and the clamp signal generated by the clamp circuit with the signal level of the element current detection signal. A comparator that generates a signal that determines the timing of
A switching control signal for generating a signal for turning on the main switching element based on a signal oscillated by the oscillation circuit and for generating a signal for turning off the main switching element based on a signal generated by the comparator A generation circuit;
And a blanking period generating circuit for prohibiting the main switching element from turning on until a blanking time elapses after the main switching element is turned on based on the drive signal generated by the drive circuit. ,
11. The switching power supply device according to claim 8, wherein the drive circuit generates the drive signal based on a signal generated by the switching control signal generation circuit.   12. The switching power supply device according to claim 11, wherein the clamp circuit lowers the signal level of the clamp signal during the soft start period as compared to after the soft start period has elapsed.   13. The switching power supply device according to claim 12, wherein the clamp circuit increases the signal level of the clamp signal during the soft start period with a minimum value at the start of the soft start period.   12. The control circuit according to claim 11, further comprising a blanking time adjusting circuit that generates a signal for shortening the blanking time during the soft start period as compared to after the soft start period has elapsed. 14. The switching power supply device according to any one of 13 to 13.   15. The switching power supply device according to claim 14, wherein the blanking time adjustment circuit increases the blanking time during the soft start period with a minimum value at the start of the soft start period.   The blanking period generation circuit invalidates the element current detection signal generated by the element current detection circuit or the signal generated by the comparator until the blanking time elapses after the main switching element is turned on. The switching power supply device according to claim 11, wherein the switching power supply device is provided.   17. The switching power supply device according to claim 11, wherein the element current detection circuit generates the element current detection signal based on an ON voltage of the main switching element. The element current detection circuit includes:
A sub-switching element driven in common with the main switching element, having a current value smaller than a current flowing in the main switching element, and a current having a constant ratio to a current flowing in the main switching element;
A resistor to which a current flowing through the sub-switching element is supplied;
17. The switching power supply device according to claim 11, wherein the element current detection signal is generated based on a voltage generated in the resistor.   The soft start period generation circuit includes a constant current source for charging an external capacitor externally attached to the control circuit, and determines the soft start period based on a voltage level of the external capacitor charged by the constant current source. 19. The switching power supply device according to claim 1, wherein   The soft start period generation circuit includes a plurality of constant current sources for charging / discharging an external capacitor externally attached to the control circuit, two comparators for detecting an upper limit and a lower limit of the voltage of the external capacitor, A plurality of switches for switching charging and discharging of the external capacitor based on signals generated by the two comparators, and a counter circuit for counting up a count value based on the signals generated by the two comparators, 19. The switching power supply device according to claim 1, wherein the soft start period is determined by a count value of a counter circuit.   The control circuit further includes a regulator that keeps the voltage of the power supply for the control circuit constant based on the first DC voltage, and an external start terminal, and the control circuit is configured to output the main switching element based on a signal supplied to the external start terminal. 19. The switching power supply device according to claim 1, wherein the oscillation start timing is determined.   22. The switching power supply device according to claim 21, further comprising an external start signal generation circuit that generates an external start signal when the first DC voltage reaches a predetermined voltage, and the control circuit generates the external start signal. By doing so, the oscillation start timing of the main switching element is determined based on the signal supplied to the external starting terminal.   The control circuit further includes a regulator that keeps the voltage of the power supply for the control circuit constant based on the first DC voltage, and an external start terminal, and the control circuit is configured to output the main switching element based on a signal supplied to the external start terminal. 21. The switching power supply device according to claim 19, wherein the oscillation start timing is determined.   24. The switching power supply device according to claim 23, further comprising an external activation signal generation circuit that generates an external activation signal when the first DC voltage reaches a predetermined voltage, and the control circuit generates the external activation signal. Thus, based on a signal supplied to the external starting terminal, the oscillation start timing of the main switching element is determined.   The external start terminal is connected to the external capacitor, and the control circuit determines the oscillation start timing of the main switching element based on the voltage level of the external capacitor charged by the soft start period generation circuit. The switching power supply device according to any one of claims 23 and 24, wherein:   26. A semiconductor device used in the switching power supply device according to claim 1, wherein the main switching element and the control circuit are formed on the same semiconductor substrate or are incorporated in the same package. A semiconductor device characterized by that.

Images