CN117572039A - Test device and test method for chip three-terminal capacitive filter - Google Patents
Test device and test method for chip three-terminal capacitive filter Download PDFInfo
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- CN117572039A CN117572039A CN202311542703.2A CN202311542703A CN117572039A CN 117572039 A CN117572039 A CN 117572039A CN 202311542703 A CN202311542703 A CN 202311542703A CN 117572039 A CN117572039 A CN 117572039A
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- 238000012360 testing method Methods 0.000 title claims abstract description 401
- 238000010998 test method Methods 0.000 title claims abstract description 18
- 239000000523 sample Substances 0.000 claims abstract description 170
- 238000009413 insulation Methods 0.000 claims description 36
- 238000007664 blowing Methods 0.000 claims description 22
- 239000000919 ceramic Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 239000002699 waste material Substances 0.000 claims description 10
- 238000001514 detection method Methods 0.000 description 12
- 230000005540 biological transmission Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000011084 recovery Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The utility model provides a sheet type three-terminal capacitive filter's testing arrangement and sheet type three-terminal capacitive filter's test method, sheet type three-terminal capacitive filter's testing arrangement includes conveying structure, test structure and vacuum assembly, conveying structure includes hopper, conveying structure and cavity, conveying structure is connected with hopper and cavity respectively, test structure includes test base, test probe and test dish, the test dish sets up on test base, the test dish is connected with cavity and vacuum assembly respectively, the test dish is used for setting up sheet type three-terminal capacitive filter, test probe sets up on test base, and expose test probe, test probe and the contact of sheet type three-terminal capacitive filter in the test dish, so that can test sheet type three-terminal capacitive filter's electric property.
Description
Technical Field
The application relates to the technical field of chip three-terminal capacitive filters, in particular to a testing device and a testing method of a chip three-terminal capacitive filter.
Background
In order to meet the continuous development of miniaturization, large capacity, high reliability and low cost of electronic devices, chip three-terminal capacitive filters (Multi-layer Ceramic Chip Filters, MLCF) have been developed and widely used in various fields.
Unlike a conventional chip type Multi-layer ceramic capacitor (Multi-layer Ceramic Chip Capacitor, MLCC), which is also called a two-terminal capacitor, a chip type three-terminal capacitive filter has a pair of ground electrodes in a width direction, and by providing the ground electrodes, current can flow in from both ends of a chip and flow out from the middle ground electrode, so that a current path can be shortened by half, and simultaneously, an equivalent series inductance (ESL) of the chip can be greatly reduced due to the existence of current flowing out from four electrode directions and self inductance.
At present, before the product leaves the factory, the capacity electrical property and the loss electrical property of the product are usually required to be tested, so that the product with unqualified electrical property is removed, and 100% of the electrical property of the product leaves the factory is ensured to be qualified. However, the existing test method for detecting the electrical performance of the MLCC is not suitable for detecting the electrical performance of the MLCF due to the presence of the ground electrode of the MLCF, and therefore, a test device and a test method suitable for detecting the electrical performance of the MLCF need to be developed.
Disclosure of Invention
In view of the above, the present application provides a testing device and a testing method for a chip three-terminal capacitive filter, so as to detect the electrical performance of the chip three-terminal capacitive filter.
The application provides a sheet type three-terminal capacitive filter's testing arrangement, including conveying structure, test structure and vacuum assembly, conveying structure includes hopper, transmission structure and cavity, transmission structure respectively with the hopper with the cavity is connected, test structure includes test base, test probe and test dish, the test dish set up in on the test base, the test dish respectively with the cavity and vacuum assembly connects, the test dish is used for setting up sheet type three-terminal capacitive filter, the test probe sets up on test base, and exposes the test probe.
In some embodiments, the test base has first, second, third, fourth and fifth test regions disposed clockwise on a surface thereof, the test probes for connection with the chip three-terminal capacitive filter, the test probes including first, second and third test probes.
In some embodiments, the test probe further comprises a fourth test probe.
In some embodiments, the testing device of the chip three-terminal capacitive filter further comprises a blowing component, a material box and a waste box, wherein the blowing component is used for blowing the qualified chip three-terminal capacitive filter into the material box and blowing the unqualified chip three-terminal capacitive filter into the corresponding waste box.
The application also provides a test method of the chip three-terminal capacitive filter, which adopts the test device of the chip three-terminal capacitive filter to test, and comprises the following steps:
the method comprises the steps of providing a chip three-terminal capacitive filter, wherein the chip three-terminal capacitive filter comprises a ceramic body, a first external electrode, a second external electrode, a first grounding electrode and a second grounding electrode, the first external electrode and the second external electrode are arranged at two opposite ends of the ceramic body at intervals, and the first grounding electrode and the second grounding electrode are arranged at the waist of the ceramic body at intervals;
the chip three-terminal capacitive filter is sucked into the test disc through vacuum, and the width direction of the chip three-terminal capacitive filter is perpendicular to the surface of the test disc;
Electrically connecting a test probe with the first external electrode, the second external electrode and the first grounding electrode to form a loop;
obtaining a test value passing through the chip three-terminal capacitive filter;
and comparing the test value with a set threshold value, and analyzing whether each chip three-terminal capacitive filter is qualified or not.
In some embodiments, the first external electrode is connected to the first test probe, the second external electrode is connected to the second test probe, and the first ground electrode is connected to the third test probe.
In some embodiments, the electrically connecting the test probe with the first outer electrode, the second outer electrode, and the first ground electrode to form a loop comprises:
driving the test disc to drive the chip three-terminal capacitive filter to the first test area;
applying an alternating signal to one of the first and second test probes and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a capacity value and a loss value passing through the chip three-terminal capacitive filter;
Comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
and comparing the capacity value and the loss value with a capacity threshold value and a loss threshold value respectively, and analyzing whether the capacity value and the loss value of each chip three-terminal capacitive filter are qualified or not.
In some embodiments, the electrically connecting the test probe with the first outer electrode, the second outer electrode, and the first ground electrode to form a loop comprises:
driving the test disc to drive the chip three-terminal capacitive filter to the second test area;
applying a direct current voltage flowing in a first direction to one of the first test probe and the second test probe and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a leakage current value of withstand voltage passing through the chip three-terminal capacitive filter;
comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
And comparing the leakage current value of the withstand voltage with a first leakage current threshold value, and analyzing whether the withstand voltage value of each chip three-terminal capacitive filter is qualified.
In some embodiments, the electrically connecting the test probe with the first outer electrode, the second outer electrode, and the first ground electrode to form a loop comprises:
driving the test pad to drive the chip three-terminal capacitive filter to the third test area;
applying a direct current voltage flowing in a first direction to one of the first test probe and the second test probe and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a leakage current value passing through an insulation resistor of the chip three-terminal capacitive filter;
comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
comparing the leakage current value of the insulation resistor with a second leakage current threshold value, and analyzing whether the leakage current of the insulation resistance value of each sheet type three-terminal capacitive filter is qualified or not.
In some embodiments, the electrically connecting the test probe with the first outer electrode, the second outer electrode, and the first ground electrode to form a loop comprises:
driving the test pad to drive the chip three-terminal capacitive filter to the fourth test area;
applying a direct current voltage flowing in a second direction to one of the first test probe and the second test probe and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a leakage current value passing through an insulation resistor of the chip three-terminal capacitive filter;
comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
comparing the leakage current value of the insulation resistor with a third leakage current threshold value, and analyzing whether the leakage current value of the insulation resistance value of each sheet type three-terminal capacitive filter is qualified or not.
In some embodiments, a fourth test probe and the third test probe are connected to the first ground electrode;
after comparing the capacity value and the loss value with a capacity threshold value and a loss threshold value respectively and analyzing whether the capacity value and the loss value of each chip three-terminal capacitive filter are qualified, the method comprises the following steps:
Driving the test pad to drive the chip three-terminal capacitive filter to the fifth test area;
applying a direct current to the fourth test probe and the third test probe to form a loop;
acquiring a first direct current resistance value passing through the chip three-terminal capacitive filter;
comparing the first direct current resistance value with a first direct current resistance threshold value, and analyzing whether the direct current resistance value of each chip three-terminal capacitive filter is qualified or not.
In some embodiments, the comparing the dc resistance value with a dc resistance value threshold value, analyzing whether the dc resistance value of each of the chip three-terminal capacitive filters is acceptable, includes:
driving the test pad to drive the chip three-terminal capacitive filter to the fifth test area;
applying a direct current to the first test probe and the second test probe to form a loop;
acquiring a second direct current resistance value passing through the chip three-terminal capacitive filter;
and comparing the second direct current resistance value with a second direct current resistance threshold value, and analyzing whether the direct current resistance value of each chip three-terminal capacitive filter is qualified.
In some embodiments, after comparing the test value with a set threshold value and analyzing whether each of the chip three-terminal capacitive filters is acceptable, the method further comprises:
and blowing the qualified sheet type three-terminal capacitive filter into a material box by adopting a blowing component and blowing the unqualified sheet type three-terminal capacitive filter into a corresponding waste box.
The utility model provides a sheet type three-terminal capacitive filter's testing arrangement and sheet type three-terminal capacitive filter's test method, sheet type three-terminal capacitive filter's testing arrangement includes conveying structure, test structure and vacuum assembly, conveying structure includes the hopper, conveying structure and cavity, conveying structure is connected with hopper and cavity respectively, test structure includes test base, test probe and test dish, test dish sets up on test base, test dish is connected with cavity and vacuum assembly respectively, test dish is used for setting up sheet type three-terminal capacitive filter, be provided with test probe on the test base, so that can test sheet type three-terminal capacitive filter's electric property.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a chip three-terminal capacitive filter provided in the present application when on a test tray;
fig. 2 is a flow chart of a test method of the chip three-terminal capacitive filter provided by the application;
fig. 3 is a schematic structural diagram of a chip three-terminal capacitive filter provided in the present application.
Reference numerals:
10. a chip three-terminal capacitive filter; 20. a test tray; 100. a ceramic body; 200. a first external electrode; 300. a second external electrode; 400. a first ground electrode; 500. and a second ground electrode.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application. The various embodiments described below and their technical features can be combined with each other without conflict.
The utility model provides a sheet type three-terminal capacitive filter's testing arrangement, sheet type three-terminal capacitive filter's testing arrangement includes conveying structure, test structure and vacuum assembly, conveying structure includes the hopper, conveying structure and cavity, conveying structure is connected with hopper and cavity respectively, test structure includes test base, test probe and test panel, the test panel sets up on test base, the test panel is connected with cavity and vacuum assembly respectively, the test panel is used for setting up sheet type three-terminal capacitive filter, test probe sets up on test base, and expose test probe.
In this application, through setting up the test structure to mainly by conveying structure, test probe, test structure and vacuum assembly constitution for sheet type three terminal capacitive filter can be through the mode of vacuum inhalation, set up sheet type three terminal capacitive filter's width direction to with the surface of test dish perpendicularly, thereby make sheet type three terminal capacitive filter's testing arrangement can test sheet type three terminal capacitive filter's electric property.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a chip three-terminal capacitive filter provided in the present application when the chip three-terminal capacitive filter is on a test tray. The application provides a testing device of a chip three-terminal capacitive filter 10. The test device of the chip three-terminal capacitive filter 10 includes a transmission structure, a test structure, a vacuum assembly, a control system, a recovery system, a display system, and an auxiliary system. The control system, the recovery system, the display system and the auxiliary system are all connected with the conveying structure, the testing structure and the vacuum assembly. The control system comprises a vacuum system, a blowing system and an electromagnetic control system; the vacuum system is used for controlling the vacuum component so as to ensure that the chip three-terminal capacitive filter 10 cannot fall off after entering the test disc 20; the air blowing system blows the sheet type three-terminal capacitive filter 10 into a designated waste box and a designated material box according to the judging result of the sheet type three-terminal capacitive filter 10; the electromagnetic control system is used for controlling the test structure and the blowing-up assembly to synchronously operate according to set requirements. The recovery system is used for controlling the waste box and the material box, and the waste box comprises a short circuit product bin, a TV NG bin, an IR NG bin, an RDC NG bin and a missing detection bin. The display system is used for displaying the setting of the threshold value of each parameter and the display of the test value. The auxiliary system is used for controlling the appearance detection device to judge whether the chip three-terminal capacitive filter 10 is fed into the test tray 20 according to a preset direction; the material detection sensor blows out the chip three-terminal capacitive filter 10 with abnormal implantation through the sensor through a blowing system. The conveying structure comprises a hopper, a conveying structure and a cavity, the conveying structure is connected with the hopper and the cavity respectively, and the chip is conveyed into the cavity through the conveying structure. The test structure comprises a test base, a test probe and a test disc 20, wherein the test disc 20 is arranged on the test base, the test disc 20 is respectively connected with the cavity and the vacuum component, the test disc 20 is used for arranging the sheet type three-terminal capacitive filter 10, the test probe is arranged on the test base, and the test probe penetrates through the test base and is flush with the test base.
In an embodiment, the surface of the test base has a first test area, a second test area, a third test area, a fourth test area and a fifth test area disposed clockwise, and the test probes are used for connecting with the chip three-terminal capacitive filter 10, and the test probes include a first test probe, a second test probe and a third test probe.
In one embodiment, the test probe further comprises a fourth test probe.
In an embodiment, the testing device of the chip three-terminal capacitive filter 10 further includes a blowing component, a material box and a waste box, wherein the blowing component is used for blowing the qualified chip three-terminal capacitive filter 10 into the material box and blowing the unqualified chip three-terminal capacitive filter 10 into the corresponding waste box.
In the present application, the testing device is configured to be mainly composed of a transmission structure, a testing structure and a vacuum component, so that the chip three-terminal capacitive filter 10 can be set to be perpendicular to the surface of the test disc 20 in the width direction of the chip three-terminal capacitive filter 10 in a vacuum suction manner, and the testing device of the chip three-terminal capacitive filter 10 can test the electrical performance of the chip three-terminal capacitive filter 10.
The application also provides a test method of the chip three-terminal capacitive filter, and provides the chip three-terminal capacitive filter, which comprises a ceramic body, a first external electrode, a second external electrode, a first grounding electrode and a second grounding electrode, wherein the first external electrode and the second external electrode are arranged at two opposite ends of the ceramic body at intervals, and the first grounding electrode and the second grounding electrode are arranged at the waist of the ceramic body at intervals; the chip three-terminal capacitive filter is sucked into the test disc through vacuum, and the width direction of the chip three-terminal capacitive filter is perpendicular to the surface of the test disc; electrically connecting the test probe with the first external electrode, the second external electrode and the first grounding electrode to form a loop; obtaining a test value passing through a chip three-terminal capacitive filter; and comparing the test value with a set threshold value, and analyzing whether each three-terminal capacitive filter is qualified or not.
In this application, through setting up the sheet type three terminal capacitive filter to the width direction of sheet type three terminal capacitive filter and the surface perpendicular of test panel to make sheet type three terminal capacitive filter when measuring its electric property, can detect through the thickness face of sheet type three terminal capacitive filter, even make when switching on between sheet type three terminal capacitive filter and first test detection and the second test probe, can measure the electric property that obtains sheet type three terminal capacitive filter, thereby the detection of the electric property of sheet type three terminal capacitive filter has been accomplished.
Referring to fig. 2 and 3, fig. 2 is a flow chart of a testing method of the chip three-terminal capacitive filter provided in the present application; fig. 3 is a schematic structural diagram of a chip three-terminal capacitive filter provided in the present application. The application also provides a test method of the chip three-terminal capacitive filter, and the test device of the chip three-terminal capacitive filter is used for testing the chip three-terminal capacitive filter.
Example 1
The application provides a test method of a chip three-terminal capacitive filter, which is used for detecting the chip three-terminal capacitive filter 10, and comprises the following steps:
b11, providing a sheet type three-terminal capacitive filter, wherein the sheet type three-terminal capacitive filter comprises a ceramic body, a first external electrode, a second external electrode, a first grounding electrode and a second grounding electrode, wherein the first external electrode and the second external electrode are arranged at two opposite ends of the ceramic body at intervals, and the first grounding electrode and the second grounding electrode are arranged at the waist of the ceramic body at intervals.
B12, the chip three-terminal capacitive filter is sucked into the test disc through vacuum, and the width direction of the chip three-terminal capacitive filter is perpendicular to the surface of the test disc.
Specifically, the width w direction of the chip three-terminal capacitive filter 10 is perpendicular to the surface of the test disc 20, that is, one width w surface of the chip three-terminal capacitive filter 10 is perpendicular to the surface of the test disc 20, the surface of the test disc 20 is perpendicular to the ground, the length L direction of the chip three-terminal capacitive filter 10 is parallel to the surface of the test disc 20, and one thickness d surface of the chip three-terminal capacitive filter 10 is opposite to the surface of the test disc 20.
B13, electrically connecting the test probe with the first external electrode, the second external electrode and the first grounding electrode to form a loop.
Specifically, the test probes include a first test probe, a second test probe, a third test probe, and a fourth test probe, the first external electrode 200 is connected with the first test probe, the second external electrode 300 is connected with the second test probe, the first ground electrode 400 is connected with the third test probe and the fourth test probe, the test probes are externally connected with the display device, the surface of the test disc 20 is provided with a first test area, a second test area, a third test area, a fourth test area, and a fifth test area which are arranged clockwise, and the first test area, the second test area, the third test area, the fourth test area, and the fifth test area are arranged at intervals. Alternatively, the test tray 20 may be limited to only five test areas, and there may be more test areas, for example, six test areas, 8 test areas, 10 test areas, etc. may be disposed on the test tray, and the positions between each test area may be interchanged.
Then, the test pad 20 is driven to drive the chip three-terminal capacitive filter 10 to the first test area; and then alternating current signals are applied to the first test probe and the third test probe to form a loop, wherein the first test probe and the third test probe are externally connected with a capacity tester.
In another embodiment, the first test probe is connected to the first external motor, the second test probe is connected to the second external electrode 300, and a current or voltage is applied to the first test probe and the second test probe to form a loop.
And B14, acquiring a test value passing through the chip three-terminal capacitive filter.
Specifically, the capacity value and the loss value passing through the sheet three-terminal capacitive filter 10 are acquired by a capacity tester, and the capacity value and the loss value are saved in a control system.
And B15, comparing the test value with a set threshold value, and analyzing whether each three-terminal capacitive filter is qualified.
Specifically, the capacity value and the loss value are respectively compared with a capacity threshold and a loss threshold set on the control system, whether the capacity value and the loss value of the three-terminal capacitive filter 10 are within the set thresholds or not is obtained through analysis, if yes, the capacity value and the loss value of the three-terminal capacitive filter 10 are qualified, and if not, the capacity value and the loss value of the three-terminal capacitive filter 10 are unqualified.
In one embodiment, after step B15, further includes:
and blowing the qualified sheet type three-terminal capacitive filter 10 into a material box by adopting a blowing component and blowing the unqualified sheet type three-terminal capacitive filter 10 into a corresponding waste box.
In this application, by setting the chip three-terminal capacitive filter 10 such that the width W direction of the chip three-terminal capacitive filter 10 is perpendicular to the surface of the test disc 20, when the chip three-terminal capacitive filter 10 measures the capacitance value and the loss value thereof, the detection of the capacitance value and the loss value of the chip three-terminal capacitive filter 10 can be performed through the thickness surface of the chip three-terminal capacitive filter 10, i.e., when the chip three-terminal capacitive filter 10 is conducted between the first test probe and the third test probe or between the first test probe and the second test probe, the capacitance value and the loss value of the chip three-terminal capacitive filter 10 can be measured.
Example 2
The difference between example 2 and example 1 is that: driving the chip three-terminal capacitive filter 10 to a second test area of the test pad 20; the first test probe and the third test probe are externally connected with a withstand voltage tester; then, applying a direct current voltage flowing along a first direction through a withstand voltage tester, namely applying a withstand voltage value passing through the chip three-terminal capacitive filter 10, reading corresponding leakage current data, and storing the leakage current data into a control system; then, the withstand voltage leakage current value is compared with a first leakage current threshold set on the control system, whether the withstand voltage leakage current value of the chip three-terminal capacitive filter 10 is within the set first leakage current threshold is obtained through analysis, if so, the withstand voltage leakage current value of the chip three-terminal capacitive filter 10 is qualified, and if not, the withstand voltage leakage current value of the chip three-terminal capacitive filter 10 is unqualified. Other steps are the same as those of embodiment 1, and will not be described here again.
In this application, by setting the chip three-terminal capacitive filter 10 such that the width W direction of the chip three-terminal capacitive filter 10 is perpendicular to the surface of the test disc 20, the chip three-terminal capacitive filter 10 can detect the leakage current value of the withstand voltage through the thickness surface of the chip three-terminal capacitive filter 10 when measuring the leakage current value of the withstand voltage thereof, i.e., when conducting between the chip three-terminal capacitive filter 10 and the first test probe and the third test probe or between the chip three-terminal capacitive filter 10 and the first test probe and the second test probe, the leakage current value of the withstand voltage of the chip three-terminal capacitive filter 10 can be measured, thereby completing the detection of the leakage current value of the withstand voltage of the chip three-terminal capacitive filter 10.
Example 3
The difference between example 3 and example 1 is that: driving the chip three-terminal capacitive filter 10 to a third test area of the test pad 20; the first test probe and the third test probe are externally connected with a TV/IR tester and apply direct current voltage flowing along a first direction; then, the leakage current value of the insulation resistance passing through the sheet three-terminal capacitive filter 10 is obtained by a TV/IR tester and stored in a control system; then, comparing the leakage current value of the insulation resistor with a second leakage current threshold set on the control system, analyzing to obtain whether the leakage current value of the insulation resistor of the three-terminal capacitive filter 10 is within the set second leakage current threshold, if so, the leakage current value of the insulation resistor of the three-terminal capacitive filter 10 is qualified, and if not, the leakage current value of the insulation resistor of the three-terminal capacitive filter 10 is unqualified. Other steps are the same as those of embodiment 1, and will not be described here again.
In this application, by setting the chip three-terminal capacitive filter 10 such that the width W direction of the chip three-terminal capacitive filter 10 is perpendicular to the surface of the test disc 20, the chip three-terminal capacitive filter 10 can detect the leakage current value of the insulation resistance thereof through the thickness surface of the chip three-terminal capacitive filter 10 when measuring the leakage current value of the insulation resistance thereof, i.e., when conducting between the chip three-terminal capacitive filter 10 and the first test probe and the third test probe or between the chip three-terminal capacitive filter 10 and the first test probe and the second test probe, the leakage current value of the insulation resistance of the chip three-terminal capacitive filter 10 can be measured, thereby completing the detection of the insulation resistance value of the chip three-terminal capacitive filter 10.
Example 4
The difference between example 4 and example 3 is that: driving the chip three-terminal capacitive filter 10 to a fourth test area of the test pad 20; the first test probe and the third test probe are externally connected with a TV/IR tester; applying a direct current voltage flowing along a second direction, and then acquiring a leakage current value of an insulation resistor passing through the sheet three-terminal capacitive filter 10 by a TV/IR tester and storing the leakage current value in a control system; then, comparing the leakage current value of the insulation resistor with a third leakage current threshold set on the control system, analyzing to obtain whether the leakage current value of the insulation resistor of the three-terminal capacitive filter 10 is within the set second leakage current threshold, if so, the leakage current value of the insulation resistor of the three-terminal capacitive filter 10 is qualified, and if not, the leakage current value of the insulation resistor of the three-terminal capacitive filter 10 is unqualified. Other steps are the same as those of embodiment 3, and will not be described here again.
In this application, by setting the chip three-terminal capacitive filter 10 such that the width W direction of the chip three-terminal capacitive filter 10 is perpendicular to the surface of the test disc 20, the chip three-terminal capacitive filter 10 can detect the leakage current value of the insulation resistance thereof through the thickness surface of the chip three-terminal capacitive filter 10 when measuring the leakage current value of the insulation resistance thereof, i.e., when conducting between the chip three-terminal capacitive filter 10 and the first test probe and the third test probe or between the chip three-terminal capacitive filter 10 and the first test probe and the second test probe, the leakage current value of the insulation resistance of the chip three-terminal capacitive filter 10 can be measured, thereby completing the detection of the insulation resistance value of the chip three-terminal capacitive filter 10.
Example 5
The difference between example 5 and example 1 is that: the test probes further comprise a fourth test probe, the fourth test probe and the third test probe are connected with the first grounding electrode 400, and the first test probe and the second test probe are not conducted with the chip three-terminal capacitive filter 10;
driving the chip three-terminal capacitive filter 10 to a fifth test area of the test pad 20; the fourth test probe and the third test probe are externally connected with a direct current resistance tester; then, applying direct current to the third test probe and the fourth test probe to form a loop; then, the direct current resistance value passing through the sheet three-terminal capacitive filter 10 is obtained through a direct current resistance tester and is stored in a control system; then, the dc resistance value is compared with a first dc resistance threshold set on the control system, and whether the dc resistance value of the three-terminal capacitive filter 10 is within the set first dc resistance threshold is obtained by analysis, if so, the dc resistance value of the three-terminal capacitive filter 10 is qualified, and if not, the dc resistance value of the three-terminal capacitive filter 10 is not qualified. Other steps are the same as those of embodiment 1, and will not be described here again.
In this application, the chip three-terminal capacitive filter 10 is set to be perpendicular to the surface of the test disc 20 in the width W direction of the chip three-terminal capacitive filter 10, so that the chip three-terminal capacitive filter 10 can detect through the thickness surface of the chip three-terminal capacitive filter 10 when measuring the dc resistance thereof, that is, the dc resistance value of the chip three-terminal capacitive filter 10 can be measured when conducting between the chip three-terminal capacitive filter 10 and the fourth test probe and the third test probe, thereby completing the detection of the dc resistance value of the chip three-terminal capacitive filter 10.
Example 6
The difference between example 6 and example 5 is that: the test probes further comprise a fourth test probe, the first test probe is connected with the first external electrode 200, the second test probe is connected with the second external electrode 300, and the third test probe and the fourth test probe are not conducted with the chip three-terminal capacitive filter 10;
the first test probe and the second test probe are externally connected with a direct current resistance tester; then, a direct current is applied to the first test probe and the second test probe to form a loop. Other steps are the same as those of embodiment 5, and will not be described here again.
In this application, through setting up the three terminal capacitive filter 10 of piece formula as the width W direction of three terminal capacitive filter 10 of piece formula and the surface of test dish 20 perpendicularly to make three terminal capacitive filter 10 of piece formula detect through the thickness face of three terminal capacitive filter 10 of piece when measuring its direct current resistance, even make three terminal capacitive filter 10 of piece and first test survey and when second test probe switch on, can measure the direct current resistance value that obtains three terminal capacitive filter 10 of piece formula, thereby accomplish the detection of three terminal capacitive filter 10 of piece formula direct current resistance value.
Example 7
The difference between example 7 and example 1 is that:
after step B15, further comprising:
(1) Driving the chip three-terminal capacitive filter 10 to a first test area of the test pad 20; the first test probe and the third test probe are externally connected with a capacitance tester; then, the loss value passing through the sheet three-terminal capacitive filter 10 is obtained through a capacitance tester and is stored in a control system; then, the loss value is compared with a loss threshold set on the control system, whether the loss value of the three-terminal capacitive filter 10 is within the set loss threshold is obtained through analysis, if so, the loss value of the three-terminal capacitive filter 10 is qualified, and if not, the loss value of the three-terminal capacitive filter 10 is unqualified.
(2) Driving the chip three-terminal capacitive filter 10 to a second test area of the test pad 20; the first test probe and the third test probe are externally connected with a withstand voltage tester; then, the leakage current value of the withstand voltage passing through the chip three-terminal capacitive filter 10 is obtained by a withstand voltage tester and is stored in a control system; then, the leakage current value of the withstand voltage is compared with a first leakage current threshold set on the control system, whether the withstand voltage value of the chip three-terminal capacitive filter 10 is within the set first leakage current threshold is obtained through analysis, if so, the withstand voltage value of the chip three-terminal capacitive filter 10 is qualified, and if not, the withstand voltage value of the chip three-terminal capacitive filter 10 is unqualified.
(3) Driving the chip three-terminal capacitive filter 10 to a third test area of the test pad 20; the first test probe and the third test probe are externally connected with an impedance analyzer; then, the leakage current value of the insulation resistance passing through the sheet three-terminal capacitive filter 10 is obtained by an impedance analyzer and stored in a control system; then, comparing the insulation resistance value with a second leakage current threshold value set on the control system, analyzing to obtain whether the leakage current value of the insulation resistance of the three-terminal capacitive filter 10 is within the set second leakage current threshold value, if so, the insulation resistance value of the three-terminal capacitive filter 10 is qualified, and if not, the insulation resistance value of the three-terminal capacitive filter 10 is unqualified.
(4) The test probes further comprise a fourth test probe, the fourth test probe and the third test probe are connected with the first grounding electrode 400, and the first test probe and the second test probe are not conducted with the chip three-terminal capacitive filter 10;
(5) Driving the chip three-terminal capacitive filter 10 to a fifth test area of the test pad 20; the fourth test probe and the third test probe are externally connected with a direct current resistance tester; then, applying direct current to the third test probe and the fourth test probe to form a loop; then, the direct current resistance value passing through the sheet three-terminal capacitive filter 10 is obtained through a direct current resistance tester and is stored in a control system; then, the dc resistance value is compared with a first dc resistance value set on the control system, and whether the dc resistance value of the three-terminal capacitive filter 10 is within the set first dc resistance threshold value is obtained by analysis, if so, the dc resistance value of the three-terminal capacitive filter 10 is qualified, and if not, the dc resistance value of the three-terminal capacitive filter 10 is not qualified.
Alternatively, the order of detection of the capacity, loss, withstand voltage, insulation resistance value, and direct current resistance is not limited.
The foregoing embodiments are merely examples of the present application, and are not intended to limit the scope of the patent application, so that all equivalent structures or equivalent processes using the descriptions and the contents of the present application, such as the combination of technical features between the embodiments, or direct or indirect application to other related technical fields, are included in the scope of the patent protection of the present application.
Claims (13)
1. The utility model provides a sheet type three-terminal capacitive filter's testing arrangement, its characterized in that, includes conveying structure, test structure and vacuum assembly, conveying structure includes hopper, conveying structure and cavity, conveying structure respectively with the hopper with the cavity is connected, test structure includes test base, test probe and test dish, the test dish set up in on the test base, the test dish respectively with the cavity and vacuum assembly connects, the test dish is used for setting up sheet type three-terminal capacitive filter, the test probe sets up on the test base, and exposes the test probe.
2. The device for testing a chip three-terminal capacitive filter according to claim 1, wherein the test base has a first test area, a second test area, a third test area, a fourth test area, and a fifth test area disposed clockwise on a surface thereof, the test probes for connection with the chip three-terminal capacitive filter, the test probes including a first test probe, a second test probe, and a third test probe.
3. The device for testing a chip three-terminal capacitive filter according to claim 2, wherein the test probe further comprises a fourth test probe.
4. The device for testing a chip three-terminal capacitive filter according to claim 1, further comprising a blowing component, a magazine and a discard box, wherein the blowing component is configured to blow the qualified chip three-terminal capacitive filter into the magazine and to blow the unqualified chip three-terminal capacitive filter into the corresponding discard box.
5. A method for testing a chip three-terminal capacitive filter, characterized in that the test is performed using the test apparatus for a chip three-terminal capacitive filter according to any one of claims 1 to 4, the test method comprising:
the method comprises the steps of providing a chip three-terminal capacitive filter, wherein the chip three-terminal capacitive filter comprises a ceramic body, a first external electrode, a second external electrode, a first grounding electrode and a second grounding electrode, the first external electrode and the second external electrode are arranged at two opposite ends of the ceramic body at intervals, and the first grounding electrode and the second grounding electrode are arranged at the waist of the ceramic body at intervals;
The chip three-terminal capacitive filter is sucked into the test disc through vacuum, and the width direction of the chip three-terminal capacitive filter is perpendicular to the surface of the test disc;
electrically connecting a test probe with the first external electrode, the second external electrode and the first grounding electrode to form a loop;
obtaining a test value passing through the chip three-terminal capacitive filter;
and comparing the test value with a set threshold value, and analyzing whether each chip three-terminal capacitive filter is qualified or not.
6. The method of testing a chip three terminal capacitive filter according to claim 5, wherein the first external electrode is connected to a first test probe, the second external electrode is connected to a second test probe, and the first ground electrode is connected to a third test probe.
7. The method of testing a chip three terminal capacitive filter according to claim 6, wherein the electrically connecting the test probe with the first external electrode, the second external electrode, and the first ground electrode to form a loop comprises:
driving the test disc to drive the chip three-terminal capacitive filter to the first test area;
Applying an alternating signal to one of the first and second test probes and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a capacity value and a loss value passing through the chip three-terminal capacitive filter;
comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
and comparing the capacity value and the loss value with a capacity threshold value and a loss threshold value respectively, and analyzing whether the capacity value and the loss value of each chip three-terminal capacitive filter are qualified or not.
8. The method of testing a chip three terminal capacitive filter according to claim 6, wherein the electrically connecting the test probe with the first external electrode, the second external electrode, and the first ground electrode to form a loop comprises:
driving the test disc to drive the chip three-terminal capacitive filter to the second test area;
applying a direct current voltage flowing in a first direction to one of the first test probe and the second test probe and the third test probe to form a loop;
The obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a leakage current value of withstand voltage passing through the chip three-terminal capacitive filter;
comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
and comparing the leakage current value of the withstand voltage with a first leakage current threshold value, and analyzing whether the withstand voltage value of each chip three-terminal capacitive filter is qualified.
9. The method of testing a chip three terminal capacitive filter according to claim 6, wherein the electrically connecting the test probe with the first external electrode, the second external electrode, and the first ground electrode to form a loop comprises:
driving the test pad to drive the chip three-terminal capacitive filter to the third test area;
applying a direct current voltage flowing in a first direction to one of the first test probe and the second test probe and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
Acquiring a leakage current value passing through an insulation resistor of the chip three-terminal capacitive filter;
comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
comparing the leakage current value of the insulation resistor with a second leakage current threshold value, and analyzing whether the leakage current of the insulation resistance value of each sheet type three-terminal capacitive filter is qualified or not.
10. The method of testing a chip three terminal capacitive filter according to claim 6, wherein the electrically connecting the test probe with the first external electrode, the second external electrode, and the first ground electrode to form a loop comprises:
driving the test pad to drive the chip three-terminal capacitive filter to the fourth test area;
applying a direct current voltage flowing in a second direction to one of the first test probe and the second test probe and the third test probe to form a loop;
the obtaining a test value passing through the chip three-terminal capacitive filter includes:
acquiring a leakage current value passing through an insulation resistor of the chip three-terminal capacitive filter;
Comparing the test value with a set threshold value, analyzing whether each chip three-terminal capacitive filter is qualified or not, including:
comparing the leakage current value of the insulation resistor with a third leakage current threshold value, and analyzing whether the leakage current value of the insulation resistance value of each sheet type three-terminal capacitive filter is qualified or not.
11. The method of testing a chip three-terminal capacitive filter according to claim 7, wherein a fourth test probe and the third test probe are connected to the first ground electrode;
after comparing the capacity value and the loss value with a capacity threshold value and a loss threshold value respectively and analyzing whether the capacity value and the loss value of each chip three-terminal capacitive filter are qualified, the method comprises the following steps:
driving the test pad to drive the chip three-terminal capacitive filter to the fifth test area;
applying a direct current to the fourth test probe and the third test probe to form a loop;
acquiring a first direct current resistance value passing through the chip three-terminal capacitive filter;
comparing the first direct current resistance value with a first direct current resistance threshold value, and analyzing whether the direct current resistance value of each chip three-terminal capacitive filter is qualified or not.
12. The method for testing a chip three-terminal capacitive filter according to claim 7, wherein,
after comparing the capacity value and the loss value with a capacity threshold value and a loss threshold value respectively and analyzing whether the capacity value and the loss value of each chip three-terminal capacitive filter are qualified, the method comprises the following steps:
driving the test pad to drive the chip three-terminal capacitive filter to the fifth test area;
applying a direct current to the first test probe and the second test probe to form a loop;
acquiring a second direct current resistance value passing through the chip three-terminal capacitive filter;
and comparing the second direct current resistance value with a second direct current resistance threshold value, and analyzing whether the direct current resistance value of each chip three-terminal capacitive filter is qualified.
13. The method of claim 5, wherein comparing the test value with a set threshold value, and analyzing whether each of the three-terminal capacitive filters is acceptable, further comprises:
and blowing the qualified sheet type three-terminal capacitive filter into a material box by adopting a blowing component and blowing the unqualified sheet type three-terminal capacitive filter into a corresponding waste box.
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| CN202311542703.2A CN117572039A (en) | 2023-11-17 | 2023-11-17 | Test device and test method for chip three-terminal capacitive filter |
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| CN202311542703.2A CN117572039A (en) | 2023-11-17 | 2023-11-17 | Test device and test method for chip three-terminal capacitive filter |
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