CN117499183A - Signal processing method, system and circuit - Google Patents
Signal processing method, system and circuit Download PDFInfo
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Abstract
The invention provides a signal processing method, a system and a circuit, which are used for receiving a feedback signal at the last moment and a signal to be processed at the current moment; according to the feedback signal at the previous moment, noise suppression and preliminary differential processing are carried out on the signal to be processed, and a first processing signal at the current moment is obtained; and carrying out differential correction processing on the first processing signal at the current moment, and outputting an output signal at the current moment. The invention solves the problem that the prior art can not realize unstable circuit operation due to good broadband input matching, good noise coefficient and good broadband differential balance, and can increase the stability of circuit operation on the premise of ensuring that both input signals and output signals have good differential performance, broadband matching performance and noise performance.
Description
Technical Field
The present invention relates to the field of signal processing, and in particular, to a signal processing method, system, and circuit.
Background
With the continuous development of wireless communication technology to high speed and large bandwidth, broadband multimode multi-frequency receiving systems and Software Defined Radios (SDRs) require the development of communication devices to high-speed broadband reception. Meanwhile, integrated circuits are being developed towards highly integrated systems on chip, so that implementing a broadband high-frequency radio frequency single-ended-to-differential circuit as a signal processing method has become a necessary requirement for wireless integrated circuit design.
For a front-end circuit of a receiver, the existing signal processing technology adopts an off-chip passive single-slip circuit, so that the cost is high, and the signal gain loss is large; the single slip circuit on the chip is adopted, although extra components are saved, the occupied area of the on-chip inductor is huge and is easily influenced by parasitic capacitance effect, and when the single slip circuit works in a high-frequency band, the time-division signal is difficult to realize smaller amplitude offset and phase offset in a wider frequency band range, so that a signal processing method of the single slip circuit capable of realizing high-frequency, broadband, low-phase offset and amplitude offset becomes a great challenge in the current signal processing field.
In addition, in the front-end circuit of the receiver, the function of a low-noise amplifier is also very critical, and the low-noise amplifier is used for amplifying weak signals received by an antenna and suppressing circuit noise; because the bandwidth of the LNA covering the broadband, which needs to simultaneously meet a plurality of communication modes, is as high as tens of GHz, the existing low-noise amplifier signal processing technology adopted maintains good input matching, gain flatness and performance requirements which are difficult to achieve with low noise in the whole working frequency band.
Disclosure of Invention
Based on the problems, the invention provides a signal processing method, a system and a circuit, which solve the problem that the circuit is unstable in operation due to the fact that the prior art cannot realize good broadband input matching, good noise coefficient and good broadband differential balance.
To achieve the above object, an embodiment of the present invention provides a signal processing method, including:
receiving a feedback signal at the previous moment and a signal to be processed at the current moment; the feedback signal at the previous moment is obtained by performing broadband matching feedback processing on the output signal at the previous moment;
according to the feedback signal at the previous moment, noise suppression and preliminary differential processing are carried out on the signal to be processed, and a first processing signal at the current moment is obtained;
and carrying out differential correction processing on the first processing signal at the current moment, and outputting an output signal at the current moment.
The invention carries out negative feedback on the positive end and the negative end of the input end through the feedback signal at the last moment, ensures that the input signal has a better broadband matching characteristic and a good broadband input matching environment, simultaneously carries out noise suppression and preliminary differential processing on the input signal, ensures that the input signal has better noise performance, and also ensures that the input signal keeps phase balance and gain balance in a broadband range through differential correction processing, and prepares the broadband matching characteristic of the input signal at the next moment, thus ensuring that the signal always keeps in a better broadband input matching environment in the input and processing processes.
Further, the feedback signal at the previous time is obtained by performing wideband matching feedback processing on the output signal at the previous time, specifically:
outputting a negative end feedback signal through an output negative end by using the phase in-phase signal of the output signal at the previous moment;
outputting a positive feedback signal through an output positive end by using the phase inversion signal of the output signal at the previous moment;
the negative side feedback signal and the positive side feedback signal form a feedback signal at the previous moment.
Further, according to the feedback signal at the previous time, performing noise suppression and preliminary differential processing on the signal to be processed to obtain a first processing signal at the current time, which specifically includes:
performing broadband negative feedback matching on the feedback signal at the previous moment to obtain feedback impedance;
according to the feedback impedance, combining the signal to be processed at the current moment, and performing noise suppression processing;
after the noise suppression processing is finished, performing preliminary differential processing from single-ended input to differential output according to a preset value of the matched differential input pair tube structure, and obtaining the first processing signal at the current moment.
Further, according to the first processing signal at the current time, differential correction processing is performed to output an output signal at the current time, specifically:
and carrying out differential correction processing of signal differential gain balance and differential phase balance on the first processing signal at the current moment according to a preset value of the cross coupling pair tube structure, and outputting the output signal at the current moment.
The embodiment of the invention also provides a signal processing system, which comprises: the system comprises a signal input module, a noise suppression module, a differential correction module, a load module and a broadband matching module;
the signal input module is used for receiving a feedback signal at the previous moment and a signal to be processed at the current moment;
the noise suppression module is used for performing noise suppression and preliminary differential processing on the signal to be processed according to the feedback signal at the previous moment to obtain a first processing signal at the current moment;
the differential correction module is used for carrying out differential correction processing on the first processing signal at the current moment and outputting an output signal at the current moment;
the broadband matching module is used for carrying out broadband matching feedback processing on the output signal at the previous moment.
The invention can realize noise suppression and preliminary difference by transmitting the signals to the noise suppression module and then transmitting the signals to the differential correction module so that the signals can obtain better differential gain balance and differential phase balance, meanwhile, because the existence of the inductance-free load module is different from the traditional means, no extra off-chip components are required, the occupied area of a chip is reduced, and finally, the output signals can be ensured to be input into a matching environment in a good broadband through the feedback signals of the broadband matching module.
Further, the noise suppression module further includes:
the device comprises a feedback impedance processing module, a noise suppression processing module and a differential processing module;
the feedback impedance processing module is used for performing broadband negative feedback matching on the feedback signal at the previous moment to obtain feedback impedance;
the noise suppression processing module is used for carrying out noise suppression processing according to the feedback impedance combined with the signal to be processed at the current moment;
and the differential processing module is used for carrying out preliminary differential processing from single-ended input to differential output on signals according to the preset value of the matched differential input pair tube structure after the noise suppression processing is finished, so as to obtain the first processing signal at the current moment.
Further, the differential rectification module further includes:
a differential correction unit and a signal output unit;
the differential correction unit is used for carrying out differential correction processing of signal differential gain balance and differential phase balance on the first processing signal at the current moment according to a preset value of the cross coupling pair tube structure;
the signal output unit is used for outputting the current moment output signal.
Further, the broadband matching module further includes:
a negative end feedback unit and a positive end feedback unit;
the negative end feedback unit is used for outputting a negative end feedback signal through an output negative end by using the phase in-phase signal of the output signal at the previous moment;
the positive feedback unit is used for outputting a positive feedback signal through outputting a positive phase inversion signal of the output signal at the previous moment;
wherein the negative side feedback signal and the positive side feedback signal constitute a feedback signal at a previous time.
The embodiment of the invention also provides a signal processing circuit, which comprises: the device comprises a signal receiver, a noise suppression stage circuit, a differential rectification stage circuit, a broadband matching stage circuit, a load stage circuit, a first signal output port and a second signal output port; the output port of the noise suppression stage circuit is connected with the input port of the differential correction stage circuit; a first output port of the differential correcting stage circuit is connected with the load stage circuit; the second output port of the differential correcting stage circuit is connected with the first input port of the broadband matching stage circuit; the first output port of the load stage circuit is connected with the second input port of the broadband matching stage circuit; the output port of the broadband matching stage circuit is connected with the input port of the noise suppression stage circuit; the signal receiver is connected with an input port of the noise suppression stage circuit; the first signal output port is connected with the first output port of the differential correcting stage circuit; the second signal output port is connected with a second output port of the load stage circuit.
According to the invention, the noise suppression and preliminary difference are carried out on the input signal through the noise suppression stage circuit, so that the signal has a better noise characteristic, the differential balance is carried out on the signal through the differential correction stage circuit, so that the signal has a good differential characteristic, and then the negative feedback broadband matching is carried out on the signal through the broadband matching stage circuit, so that the signal has a good broadband matching characteristic, the signal through the circuit has a better signal characteristic after being processed, and the circuit can work in a more stable state.
Further, the noise suppression stage circuit includes:
a common-source input pair of tubes and a first blocking capacitor, wherein the common-source input pair of tubes comprises: a first common source input pipe and a second common source input pipe;
the drain electrode of the first common source input tube is connected with the anode of the first blocking capacitor; the grid electrode of the first common source input tube is connected with the input port of the noise suppression stage circuit; the grid electrode of the second common source input tube is connected with the cathode of the first blocking capacitor; the drain electrode of the first common-source input tube and the drain electrode of the second common-source input tube are respectively connected with the output port of the noise suppression stage circuit; the source of the first common-source input tube and the source of the second common-source input tube are grounded.
Further, the differential rectification stage circuit includes:
a cross-coupling device and a second blocking capacitance, wherein the cross-coupling device comprises: a first coupling device and a second coupling device, the second blocking capacitor comprising: a first capacitor and a second capacitor;
the grid electrode of the first coupling device is connected with the cathode of the second capacitor; the source electrode of the first coupling device and the anode of the first capacitor are respectively connected with the input port of the differential rectifying stage circuit; the grid electrode of the second coupling device is connected with the cathode of the first capacitor; the source electrode of the second coupling device and the anode of the second capacitor are respectively connected with the input port of the differential rectifying stage circuit; the drain electrode of the first coupling device is connected with the first output port of the differential rectification stage circuit; and the drain electrode of the second coupling device is connected with the second output port of the differential rectification stage circuit.
Further, the broadband matching stage circuit includes: the source follower, the common source amplifier, the feedback resistor and the third blocking capacitor;
the grid electrode of the source electrode follower is connected with the second input port of the broadband matching stage circuit; the source electrode of the source electrode follower is connected with the feedback resistor; the drain electrode of the source electrode follower is connected with a built-in power supply; the grid electrode of the common source amplifier is connected with the first input port of the broadband matching stage circuit; the drain electrode of the common source amplifier is connected with the feedback resistor; the source electrode of the common source amplifier is grounded; the source electrode of the source electrode follower is connected with the drain electrode of the common source amplifier; the feedback resistor is connected with the anode of the third blocking capacitor; and the cathode of the third blocking capacitor is connected with the output port of the broadband matching stage circuit.
Further, the load stage circuit includes: the operational amplifier, load resistance and MOS pipe, wherein, operational amplifier includes: a first operational amplifier and a second operational amplifier; the load resistor includes: a first load resistor and a second load resistor; the MOS tube comprises: the first MOS tube and the second MOS tube;
the output end of the first operational amplifier is connected with the grid electrode of the first MOS tube; the output end of the second operational amplifier is connected with the grid electrode of the second MOS tube; the negative input terminal of the first operational amplifier and the negative input terminal of the second operational amplifier operate at V CM Lower part; the input positive end of the first operational amplifier and the input positive end of the second operational amplifier are connected with a first load resistor and a second load resistor; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are respectively connected with a built-in power supply; the source electrode of the first MOS tube is connected with the first output port of the load stage circuit; the source electrode of the second MOS tube is connected with the second output port of the load stage circuit; the first load resistor is connected with the source electrode of the first MOS tube; the second load resistor is connected with the source electrode of the second MOS tube.
Drawings
Fig. 1 is a flowchart illustrating a signal processing method according to an embodiment of the present invention;
FIG. 2 is a block diagram of a signal processing system according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a signal processing circuit according to an embodiment of the present invention;
fig. 4 is a block diagram of a noise suppression module of a signal processing system according to an embodiment of the present invention;
FIG. 5 is a block diagram illustrating a differential correction module of a signal processing system according to an embodiment of the present invention;
fig. 6 is a block diagram of a wideband matching module of a signal processing system according to an embodiment of the present invention;
fig. 7 is a schematic diagram illustrating a differential cross-coupled small signal simulation of a signal processing circuit according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a negative feedback network gain transmission of a signal processing circuit according to an embodiment of the present invention;
fig. 9 is a schematic diagram of forming negative feedback at the same time on the input end of a signal processing circuit according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1, fig. 1 is a signal processing method according to an embodiment of the present invention. As shown in fig. 1, the present invention proposes a signal processing method, which includes steps 101 to 103, and the steps are as follows:
step 101, receiving a feedback signal at the previous moment and a signal to be processed at the current moment; the feedback signal at the previous moment is obtained by performing broadband matching feedback processing on the output signal at the previous moment.
As an example of this embodiment, the phase in-phase signal of the output signal at the previous time is outputted as the negative side feedback signal through the output negative side; outputting a positive feedback signal through an output positive end by using the phase inversion signal of the output signal at the previous moment; the negative end feedback signal and the positive end feedback signal form a feedback signal at the last moment, the feedback signal at the last moment is received by the input port, and the signal to be processed at the current moment is received by the input port.
Step 102, performing noise suppression and preliminary differential processing on the signal to be processed according to the feedback signal at the previous moment to obtain a first processing signal at the current moment.
As an example of this embodiment, wideband negative feedback matching is performed on the feedback signal at the previous time, so as to obtain feedback impedance:
when the parameter setting is proper, the matching can meet the broadband matching condition and lead Z in =rs; according to the feedback impedance and the signal to be processed at the current moment, noise suppression processing is carried out, and the LNA noise factor relational expression is expressed as follows:
F total ＝1+F R41 +F NM11
wherein F is R41 For feeding back noise factors of resistive band-in of the network, F NM11 The noise factor obtained for the input port in combination with the feedback impedance. It can be seen that the noise factor of the feedback network and the input is similar to the noise factor of the LNA, so that the overall noise is suppressed, and the noise characteristics are better.
After the signal is subjected to input end noise suppression processing, the preset value of the matched differential input pair tube structure promotes the signal to be changed from a single-ended signal to a differential signal, but the differential signal at the moment has poor differential balance.
Noise suppression and preliminary differencing primarily function to provide a large gm for suppressing the noise of the overall circuit and to achieve preliminary differencing from two matched input-to-tube structures. In the conventional single slip structure, the two matched input pair tube structures are required to have higher cut-off frequencies for achieving the two purposesAnd the differential matching performance is ensured to meet the requirement. However, the conventional structure generally cannot ensure perfect differential balance due to severe deterioration of matching property in a high-frequency operation state.
And 103, performing differential correction processing on the first processing signal at the current moment, and outputting an output signal at the current moment.
As an example of this embodiment, the differential correction processing of the signal differential gain balance and the differential phase balance is performed on the first processing signal at the current time according to a preset value of the cross-coupling pair tube structure, where the preset value of the cross-coupling pair tube structure is:
wherein V is AB ＝-V BA From the results, it can be known that the differential balance between vout+ and Vout-is only related to the matching of the cross-coupled pair transistor structure, and is irrelevant to the absolute voltage mismatch at A, B points, the cross-coupled pair transistor structure can better reduce the mismatch error, and the differential output gain is:
wherein, so that the post-take calculation is availableIt follows that when the input signal satisfies ω<<ω T21 For the output signal to have good differential matching, the LNA open loop gain is approximately:
A＝-2R L g m11
the invention carries out negative feedback on the positive end and the negative end of the input end through the feedback signal at the previous moment, ensures that the input signal has a better broadband matching characteristic and a good broadband input matching environment, simultaneously carries out noise suppression and preliminary differential processing on the input signal, so that the input signal has better noise performance, and also keeps phase balance and gain balance in a broadband range through differential correction processing, and the broadband matching processing prepares for the broadband matching characteristic of the input signal at the next moment, so that the signal always keeps a better broadband input matching environment in the input and processing processes.
Example 2
Referring to fig. 2, fig. 2 is a signal processing system provided in an embodiment of the present invention, and as shown in fig. 2, an embodiment of the present invention provides a signal processing system, including: a signal input module 201, a noise suppression module 202, a differential rectification module 203, a broadband matching module 204 and a load module 205; the signal input module 201 is configured to receive a feedback signal at a previous time and a signal to be processed at a current time; the noise suppression module 202 is configured to perform noise suppression and preliminary differential processing on the signal to be processed according to the feedback signal at the previous time, so as to obtain a first processing signal at the current time; the differential correction module 203 is configured to perform differential correction processing on the first processing signal at the current time, and output an output signal at the current time; the wideband matching module 204 is configured to perform wideband matching feedback processing on the output signal at the previous time.
As another example of the present embodiment, referring to fig. 4, fig. 4 is a block diagram of a noise suppression module of a signal processing system according to an embodiment of the present invention, as shown in fig. 4, where the noise suppression module 202 further includes: the feedback impedance processing unit 401, the noise suppression processing unit 402 and the differential processing unit 403, where the feedback impedance processing unit 401 is configured to perform broadband negative feedback matching on the feedback signal at the previous time to obtain feedback impedance provided at the previous time;
wherein, when RL is pure resistive or RLC parallel resonance, the impedance is R, and when RL is mos transistor active load, RL=1/gm 31 . When the settings of NM11, RL, R41 are proper, the matching can satisfy the broadband matching condition and make Z in ＝Rs。
Referring to fig. 9, fig. 9 is a schematic diagram of a negative feedback network gain transmission of a signal processing circuit according to an embodiment of the present invention, as shown in fig. 9, according to a feedback system network, at this time, a closed loop transmission function of a feedback LNA is:
when the input tube gain is high enough, the system noise can be simplified to be mainly contributed by the input tube M11 and the feedback resistor R41, and the LNA noise relationship is obtained as follows:
F total ＝1+F R41 +F NM11
wherein F is NM11 For a noise factor of NM11 compared to Rs,
F R41 to feedback the noise factor that the network is resistant to,
where A is the LNA open loop gain.
The noise suppression processing unit 402 performs noise suppression processing according to the feedback impedance in combination with the signal to be processed at the current moment; after the difference processing unit 403 determines that the noise suppression processing is finished, according to the preset value of the matched differential input pair tube structure, performing preliminary differential processing from single-ended input to differential output on the signal, to obtain the first processing signal at the current moment.
Referring to fig. 5, fig. 5 is a block diagram of a differential correction module of a signal processing system according to an embodiment of the present invention, as shown in fig. 5, the differential correction module 203 further includes: the differential correction unit 501 is configured to perform differential correction processing of signal differential gain balance and differential phase balance on the first processing signal at the current time according to a preset value of the cross-coupling pair tube structure, and the signal output unit 502 is configured to output the output signal at the current time. Considering that the gate input of device NM12 is not truly signal input inverting, there is a large mismatch, i.e., g m11 ≠g m12 Leading to poor reversibility of the point A of the leak end of the NM11 pipe and the point B of the leak end of the NM12 pipe. The present architecture thus uses a cross-coupled pair architecture to improve output differential gain balance and phase balance over an extremely wide bandwidth range. Referring to fig. 7, fig. 7 is a schematic diagram of a differential cross-coupled transistor small signal simulation of a signal processing circuit according to an embodiment of the present invention, as shown in fig. 7, in normal operation, NMOS transistors NM11, NM12, NM21, NM22 in the circuit all operate in a saturation region, and their bias is not shown. C21, C22 and C11 are blocking capacitors and do not participate in small signal operation. By observing fig. 7 it is easy to see:
V out- ＝-R L ·g m21 ·V BA
V out+ ＝-R L ·g m22 ·V AB
wherein V is AB ＝-V BA Is the voltage difference between the point A and the point B. From the equation, it is known that the differential balance between vout+ and Vout-is related only to the matching of NM21 and NM22 tubes, and is not related to the absolute voltage mismatch at A, B. That is, the absolute mismatch error caused by the NM11 and NM12 connection can be reduced by the cross-coupling connection of NM21 and NM 22.
Cgs when NM21 and NM22 match 21 ＝Cgs 22 Can do i c22 ＝-i c21 . The differential output gain is:
calculating a point A current equation, which comprises the following steps:
will i c21 Carry-inThe method can obtain the following steps:
as can be seen from the above, when the input signal satisfies ω<<ω T21 The structure has good differential matching properties over the frequency range of (a). The LNA open loop gain at this time is approximately:
A＝-2R Lgm11
referring to fig. 6, fig. 6 is a block diagram of a wideband matching module of a signal processing system according to an embodiment of the present invention, as shown in fig. 6, the wideband matching module 204 further includes: the negative end feedback unit 601 and the positive end feedback unit 602, wherein the negative end feedback unit 601 is used for outputting a negative end feedback signal through an output negative end by using a phase in-phase signal of the output signal at the previous moment; the positive feedback unit 602 is configured to invert the phase of the output signal at the previous time, and output a positive feedback signal by outputting a positive feedback signal; the negative side feedback signal and the positive side feedback signal form a feedback signal at the previous time, see fig. 8, and fig. 8 is a schematic diagram of negative feedback formed at the same time on the input side of a signal processing circuit according to an embodiment of the present invention, as shown in fig. 8, in which the output phase of the NM41 tube source is in phase, so as to implement a negative feedback path of the output negative side to the NM11 gate, and the output phase of the NM42 tube drain is in opposite phase, so as to implement a negative feedback path of the output positive side to the NM11 gate.
The invention can realize noise suppression and preliminary difference by transmitting the signals to the noise suppression module and then transmitting the signals to the differential correction module so that the signals can obtain better differential gain balance and differential phase balance, meanwhile, because the existence of the inductance-free load module is different from the traditional means, no extra off-chip components are required, the occupied area of a chip is reduced, and finally, the output signals can be ensured to be input into a matching environment in a good broadband through the feedback signals of the broadband matching module.
Example 3
The embodiment of the invention also provides a signal processing circuit, referring to fig. 3, and fig. 3 is a structural diagram of the signal processing circuit provided by the embodiment of the invention. As shown in fig. 3, a signal processing circuit includes: a signal receiver Antenna, a noise suppression stage circuit 301, a differential rectification stage circuit 302, a broadband matching stage circuit 303, a load stage circuit 304, a first signal output port ON, and a second signal output port OP; an output port of the noise suppression stage circuit 301 is connected with an input port of the differential rectification stage circuit 302; a first output port of the differential rectification stage circuit 302 is connected with the load stage circuit 304; the second output port of the differential rectification stage circuit 302 is connected with the first input port of the broadband matching stage circuit 303; a first output port of the load stage circuit 304 is connected to a second input port of the broadband matching stage circuit 303; an output port of the broadband matching stage circuit 303 is connected with an input port of the noise suppression stage circuit 301; the signal receiver Antenna is connected with an input port of the noise suppression stage circuit 301; the first signal output port ON is connected to the first output port of the differential rectification stage circuit 302; the second signal output port OP is connected to a second output port of the load stage circuit 304.
Wherein the noise suppression stage 301 comprises: a common-source input pair of tubes and a first blocking capacitor C11, wherein the common-source input pair of tubes comprises: a first common-source input pipe NM11 and a second common-source input pipe NM12; the drain electrode of the first common source input tube NM11 is connected with the anode of the first blocking capacitor C11; the grid electrode of the first common source input tube NM11 is connected with the input port of the noise suppression stage circuit 301; the grid electrode of the second common source input tube NM12 is connected with the cathode of the first blocking capacitor C11; the drain electrode of the first common-source input tube NM11 and the drain electrode of the second common-source input tube NM12 are respectively connected with the output port of the noise suppression stage circuit 301; the source of the first common-source input pipe NM11 and the source of the second common-source input pipe NM12 are grounded.
The differential correction stage circuit 302 includes: a cross-coupling device and a second blocking capacitance, wherein the cross-coupling device comprises: a first coupling device NM21 and a second coupling device NM22, the second blocking capacitor including: a first capacitor C21 and a second capacitor C22; the grid electrode of the first coupling device NM21 is connected with the cathode of the second capacitor C22; the source electrode of the first coupling device NM21 and the anode electrode of the first capacitor C21 are respectively connected with the input port of the differential rectifying stage circuit 302; the grid electrode of the second coupling device NM22 is connected with the cathode of the first capacitor C21; the source electrode of the second coupling device NM22 and the anode electrode of the second capacitor C22 are respectively connected with the input port of the differential rectification stage circuit 302; the drain electrode of the first coupling device NM21 is connected to the first output port of the differential rectification stage circuit 302; the drain of the second coupling device NM22 is connected to the second output port of the differential rectification stage circuit 302.
The broadband matching stage circuit 303 includes: a source follower NM41, a common source amplifier NM42, a feedback resistor R41, and a third blocking capacitor C41; the grid electrode of the source follower NM41 is connected with the second input port of the broadband matching stage circuit 303; the source electrode of the source follower NM41 is connected with the feedback resistor; the drain electrode of the source follower NM41 is connected with a built-in power supply; the grid electrode of the common source amplifier NM42 is connected with the first input port of the broadband matching stage circuit 303; the drain electrode of the common source amplifier NM42 is connected with the feedback resistor R41; the source electrode of the common source amplifier NM42 is grounded; the source electrode of the source follower NM41 is connected with the drain electrode of the common source amplifier NM 42; the feedback resistor R41 is connected with the anode of the third blocking capacitor C41; the cathode of the third blocking capacitor C41 is connected to the output port of the broadband matching stage 303.
The load stage circuit 304 includes: the operational amplifier, load resistance and MOS pipe, wherein, operational amplifier includes: a first operational amplifier OP31 and a second operational amplifier OP32; the load resistor includes: a first load resistor R31 and a second load resistor R32; the MOS tube comprises: a first MOS tube PM31 and a second MOS tube PM32; the output end of the first operational amplifier OP31 is connected with the grid electrode of the first MOS tube PM 31; the output end of the second operational amplifier OP32 is connected with the grid electrode of the second MOS tube PM32; the negative input terminal of the first operational amplifier OP31 and the negative input terminal of the second operational amplifier OP32 operate at V CM Lower part; the input positive end of the first operational amplifier OP31 and the input positive end of the second operational amplifier OP32 are connected with a first load resistor R31 and a second load resistor R32; the drain electrode of the first MOS tube PM31 and the drain electrode of the second MOS tube PM32 are respectively connected with a built-in power supply; the source electrode of the first MOS tube PM31 is connected with the first output port of the load stage circuit 304; the source electrode of the second MOS tube is connected with the second output port of the load stage circuit 304; the first load resistor R31 is connected with the source electrode of the first MOS tube PM 31; the second load resistor R32 is connected to the source of the second MOS transistor PM 32.
The common-source input pair transistors in the noise suppression stage 301 are used to achieve phase reversal while providing a higher gm to achieve a low noise figure. The first blocking capacitor C11 can bias the first common-source input tube NM11 and the second common-source input tube NM12 under the same environment to improve the differential property
The differential correcting stage circuit 302 is a main structure for forming differential balance. The first capacitor C21 and the second capacitor C22 serve as the second blocking capacitor, and the first coupling device NM21 and the second coupling device NM22 can be biased in the same environment by blocking; second, the alternating currents IC21, IC22 flowing through the two capacitors form a differential rectification functional block with the first coupling device NM21 and the second coupling device NM 22.
The broadband matching stage circuit 303 is composed of an NMOS tube source follower NM41, a common source amplifier NM42, a passive device feedback resistor R41 and a third blocking capacitor C41. Wherein the source follower NM41 transmits the first signal output port ON in phase to the RFIN for negative feedback, and the common source amplifier NM42 transmits the second signal output port OP in reverse to the signal receiver Antenna for negative feedback. R41 is the feedback resistor for realizing wideband matching, and the third blocking capacitor C41 is to isolate the dc bias of the first common source input tube NM11 from the output dc of the wideband matching stage circuit 303.
The load stage circuit 304 is mainly composed of a PMOS pair and two common mode clamped first operational amplifiers OP31 and second operational amplifiers OP32, and a broadband non-inductive load design is realized. The non-inductive load can also be realized by a PMOS or a resistor in a diode mode. It should be noted that the circuit can also be realized by using CMOS, bi CMOS, BJT and other processes.
According to the invention, the noise suppression and preliminary difference are carried out on the input signal through the noise suppression stage circuit, so that the signal has a better noise characteristic, the differential balance is carried out on the signal through the differential correction stage circuit, so that the signal has a good differential characteristic, and then the negative feedback broadband matching is carried out on the signal through the broadband matching stage circuit, so that the signal has a good broadband matching characteristic, the signal through the circuit has a better signal characteristic after being processed, and the circuit can work in a more stable state.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Claims (13)
1. A signal processing method, comprising:
receiving a feedback signal at the previous moment and a signal to be processed at the current moment; the feedback signal at the previous moment is obtained by performing broadband matching feedback processing on the output signal at the previous moment;
according to the feedback signal at the previous moment, noise suppression and preliminary differential processing are carried out on the signal to be processed, and a first processing signal at the current moment is obtained;
and carrying out differential correction processing on the first processing signal at the current moment, and outputting an output signal at the current moment.
2. The signal processing method according to claim 1, wherein the feedback signal at the previous time is obtained by performing wideband matching feedback processing on the output signal at the previous time, specifically:
outputting a negative end feedback signal through an output negative end by using the phase in-phase signal of the output signal at the previous moment;
outputting a positive feedback signal through an output positive end by using the phase inversion signal of the output signal at the previous moment;
the negative side feedback signal and the positive side feedback signal form a feedback signal at the previous moment.
3. The signal processing method as claimed in claim 2, wherein the noise suppression and preliminary differential processing are performed on the signal to be processed according to the feedback signal at the previous time to obtain a first processed signal at the current time, specifically:
performing broadband negative feedback matching on the feedback signal at the previous moment to obtain feedback impedance;
according to the feedback impedance, combining the signal to be processed at the current moment, and performing noise suppression processing;
after the noise suppression processing is finished, performing preliminary differential processing from single-ended input to differential output according to a preset value of the matched differential input pair tube structure, and obtaining the first processing signal at the current moment.
4. A signal processing method according to claim 3, wherein the differential correction processing is performed according to the first processing signal at the current time, and the output signal at the current time is output, specifically:
and carrying out differential correction processing of signal differential gain balance and differential phase balance on the first processing signal at the current moment according to a preset value of the cross coupling pair tube structure, and outputting the output signal at the current moment.
5. A signal processing system, comprising:
the system comprises a signal input module, a noise suppression module, a differential correction module, a broadband matching module and a load module;
the signal input module is used for receiving a feedback signal at the previous moment and a signal to be processed at the current moment;
the noise suppression module is used for performing noise suppression and preliminary differential processing on the signal to be processed according to the feedback signal at the previous moment to obtain a first processing signal at the current moment;
the differential correction module is used for carrying out differential correction processing on the first processing signal at the current moment and outputting an output signal at the current moment;
the broadband matching module is used for carrying out broadband matching feedback processing on the output signal at the previous moment.
6. The signal processing system of claim 5, wherein the noise suppression module further comprises:
a feedback impedance processing unit, a noise suppression processing unit and a differential processing unit;
the feedback impedance processing unit is used for performing broadband negative feedback matching on the feedback signal at the previous moment to obtain feedback impedance;
the noise suppression processing unit is used for performing noise suppression processing according to the feedback impedance combined with the signal to be processed at the current moment;
and the differential processing unit is used for performing preliminary differential processing from single-ended input to differential output according to the preset value of the matched differential input pair tube structure after the noise suppression processing is finished, so as to obtain the first processing signal at the current moment.
7. The signal processing system of claim 5, wherein the differential correction module further comprises:
a differential correction unit and a signal output unit;
the differential correction unit is used for carrying out differential correction processing of signal differential gain balance and differential phase balance on the first processing signal at the current moment according to a preset value of the cross coupling pair tube structure;
the signal output unit is used for outputting the current moment output signal.
8. The signal processing system of claim 5, wherein the wideband matching module further comprises:
a negative end feedback unit and a positive end feedback unit;
the negative end feedback unit is used for outputting a negative end feedback signal through an output negative end by using the phase in-phase signal of the output signal at the previous moment;
the positive feedback unit is used for outputting a positive feedback signal through outputting a positive phase inversion signal of the output signal at the previous moment;
wherein the negative side feedback signal and the positive side feedback signal constitute a feedback signal at a previous time.
9. A signal processing circuit, characterized in that a signal processing method according to any one of claims 1 to 4 is performed, comprising:
the device comprises a signal receiver, a noise suppression stage circuit, a differential rectification stage circuit, a broadband matching stage circuit, a load stage circuit, a first signal output port and a second signal output port;
the output port of the noise suppression stage circuit is connected with the input port of the differential correction stage circuit;
a first output port of the differential correcting stage circuit is connected with the load stage circuit;
the second output port of the differential correcting stage circuit is connected with the first input port of the broadband matching stage circuit;
the first output port of the load stage circuit is connected with the second input port of the broadband matching stage circuit;
the output port of the broadband matching stage circuit is connected with the input port of the noise suppression stage circuit;
the signal receiver is connected with an input port of the noise suppression stage circuit;
the first signal output port is connected with the first output port of the differential correcting stage circuit;
the second signal output port is connected with a second output port of the load stage circuit.
10. The signal processing circuit of claim 9, wherein the noise suppression stage circuit comprises:
a common-source input pair of tubes and a first blocking capacitor, wherein the common-source input pair of tubes comprises: a first common source input pipe and a second common source input pipe;
the drain electrode of the first common source input tube is connected with the anode of the first blocking capacitor; the grid electrode of the first common source input tube is connected with the input port of the noise suppression stage circuit; the grid electrode of the second common source input tube is connected with the cathode of the first blocking capacitor; the drain electrode of the first common-source input tube and the drain electrode of the second common-source input tube are respectively connected with the output port of the noise suppression stage circuit; the source of the first common-source input tube and the source of the second common-source input tube are grounded.
11. The signal processing circuit of claim 9, wherein the differential rectification stage circuit comprises:
a cross-coupling device and a second blocking capacitance, wherein the cross-coupling device comprises: a first coupling device and a second coupling device, the second blocking capacitor comprising: a first capacitor and a second capacitor;
the grid electrode of the first coupling device is connected with the cathode of the second capacitor; the source electrode of the first coupling device and the anode of the first capacitor are respectively connected with the input port of the differential rectifying stage circuit; the grid electrode of the second coupling device is connected with the cathode of the first capacitor; the source electrode of the second coupling device and the anode of the second capacitor are respectively connected with the input port of the differential rectifying stage circuit; the drain electrode of the first coupling device is connected with the first output port of the differential rectification stage circuit; and the drain electrode of the second coupling device is connected with the second output port of the differential rectification stage circuit.
12. The signal processing circuit of claim 9, wherein the wideband matching stage circuit comprises:
the source follower, the common source amplifier, the feedback resistor and the third blocking capacitor;
the grid electrode of the source electrode follower is connected with the second input port of the broadband matching stage circuit; the source electrode of the source electrode follower is connected with the feedback resistor; the drain electrode of the source electrode follower is connected with a built-in power supply; the grid electrode of the common source amplifier is connected with the first input port of the broadband matching stage circuit; the drain electrode of the common source amplifier is connected with the feedback resistor; the source electrode of the common source amplifier is grounded; the source electrode of the source electrode follower is connected with the drain electrode of the common source amplifier; the feedback resistor is connected with the anode of the third blocking capacitor; and the cathode of the third blocking capacitor is connected with the output port of the broadband matching stage circuit.
13. The signal processing circuit of claim 9, wherein the load stage circuit comprises:
the operational amplifier, load resistance and MOS pipe, wherein, operational amplifier includes: a first operational amplifier and a second operational amplifier; the load resistor includes: a first load resistor and a second load resistor; the MOS tube comprises: the first MOS tube and the second MOS tube;
the output end of the first operational amplifier is connected with the grid electrode of the first MOS tube; the output end of the second operational amplifier is connected with the grid electrode of the second MOS tube; the negative input terminal of the first operational amplifier and the negative input terminal of the second operational amplifier operate at V CM Lower part; the input positive end of the first operational amplifier and the input positive end of the second operational amplifier are connected with a first load resistor and a second load resistor; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are respectively connected with a built-in power supply; the source electrode of the first MOS tube is connected with the first output port of the load stage circuit; the source electrode of the second MOS tube is connected with the second output port of the load stage circuit; the first load resistor is connected with the source electrode of the first MOS tube; the second load resistor is connected with the source electrode of the second MOS tube.
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