CN117451795A - Moisture detection circuit for port to ground and total power supply and detection method thereof - Google Patents

Moisture detection circuit for port to ground and total power supply and detection method thereof Download PDF

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Publication number
CN117451795A
CN117451795A CN202311802582.0A CN202311802582A CN117451795A CN 117451795 A CN117451795 A CN 117451795A CN 202311802582 A CN202311802582 A CN 202311802582A CN 117451795 A CN117451795 A CN 117451795A
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pmos tube
tube
port
nmos tube
electrode
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CN117451795B (en
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魏浩然
付美俊
管锐
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Jiangsu Dior Microelectronics Co ltd
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Jiangsu Dior Microelectronics Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/02Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
    • G01N27/04Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance
    • G01N27/12Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon absorption of a fluid; of a solid body in dependence upon reaction with a fluid, for detecting components in the fluid
    • G01N27/122Circuits particularly adapted therefor, e.g. linearising circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/02Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
    • G01N27/04Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance
    • G01N27/048Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance for determining moisture content of the material

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  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
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  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
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  • Pathology (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

The invention discloses a moisture detection circuit of a port to ground and to a total power supply and a detection method thereof. The invention has two port moisture detection modes of a resistance mode and a voltage mode, and realizes mode switching through a switch, wherein the resistance mode detects a moisture event of the port to the ground, and the voltage mode detects a moisture event of the port to the total power supply, thereby realizing comprehensive detection of the moisture event of the port to the ground and the total power supply.

Description

Moisture detection circuit for port to ground and total power supply and detection method thereof
Technical Field
The invention relates to a moisture detection circuit and a detection method thereof, in particular to a moisture detection circuit of a port to the ground and to a total power supply and a detection method thereof, belonging to the technical field of semiconductor integrated circuits.
Background
With advances in electronics and materials science, modern moisture detection devices typically use electronic sensors to measure humidity in the air. The principle of operation of these sensors is to measure humidity based on the characteristics of humidity-altering resistors or capacitors to trigger a moisture alarm. Among them, common moisture detection is achieved by a resistive humidity sensor and a capacitive humidity sensor. Resistive humidity sensors measure humidity using the property of certain materials (e.g., polymers, ceramics) that change resistance after moisture absorption. The capacitive humidity sensor measures humidity by using the capacitance value of the dielectric medium changed by the moisture in the air.
In contrast, chinese patent CN201880043879.4 discloses an electronic device, which determines whether moisture exists by determining whether the equivalent resistance of a pin to ground is equal to or less than a specified value (about 300 ohms) for the moisture detection technology of the port of the electronic device such as a mobile device. According to the technical scheme, whether the port has moisture to the ground or not can be detected, however, if the moisture exists between the port and the total power supply, the voltage of the total power supply can be conducted with the port and injected into a circuit in the port, and the serious short circuit result can be caused.
Disclosure of Invention
The invention aims to solve the technical problem of providing a moisture detection circuit and a moisture detection method for a port to ground and a total power supply, and the moisture detection circuit and the moisture detection method for the port to ground and the total power supply are realized.
In order to solve the technical problems, the invention adopts the following technical scheme:
a moisture detection circuit of a port to ground and a total power supply comprises a high-precision current generation module, a reference voltage generation module, a register unit, an ADC unit, a selector unit and a buffer unit, wherein the high-precision current generation module generates high-precision current, an output end of the high-precision current generation module is connected with one end of a switch S0, the other end of the switch S0 is connected with an input end of the selector unit and an input end of the buffer unit, a plurality of output ends of the selector unit are respectively connected with a plurality of ports for selecting a test port, an output end of the buffer unit is connected with an input end of the ADC unit for increasing driving force and separating the ADC unit from the ports, the ADC unit is used for quantizing input information, an output end of the ADC unit is connected with the register unit, the register unit is used for collecting, storing and judging data detected by the ADC unit, and the reference voltage generation module is connected with the ADC unit for generating an ADC unit reference voltage.
Further, the high-precision current generation module, the switch S0 and the selector are controlled by control signals.
Further, the high-precision current generation module comprises a PMOS tube Mp1, a PMOS tube Mp2, a PMOS tube Mp3, a PMOS tube Mp4, a differential operational amplifier A0, an NMOS tube M0, NMOS tubes M1-Mn, wherein the source of the PMOS tube Mp1 and the source of the PMOS tube Mp2 are connected with a power supply VCC, the grid electrode of the PMOS tube Mp1 is connected with the grid electrode of the PMOS tube Mp2, the drain electrode of the PMOS tube Mp1 is connected with the source of the PMOS tube Mp3 and the same-directional input end of the differential operational amplifier A0, the drain electrode of the PMOS tube Mp2 is connected with the source of the PMOS tube Mp4 and the reverse input end of the differential operational amplifier A0, the output end of the differential operational amplifier A0 is connected with the grid electrode of the PMOS tube Mp3 and the grid electrode of the PMOS tube Mp4, the drain electrode of the PMOS tube Mp4 is used as the output high-precision current of the high-precision current generation module, the drain electrode of the PMOS tube Mp3 is connected with one end of the NMOS tube M0 and one end of the switch S1-Sn, the other end of the switch S1-Sn is sequentially connected with the NMOS tube M1-Mn, the drain electrode of the NMOS tube M1-Mn is connected with the NMOS tube M0, the bias tube Mn 1-Mn is connected with the drain electrode of the NMOS tube M0, and the bias tube Mn is connected with the drain of the NMOS tube M1-Mn is connected with the drain tube M1.
Further, the differential operational amplifier A0 is a differential input differential output type full differential operational amplifier, a first differential output end of the differential operational amplifier A0 is connected with a gate of the PMOS tube Mp3, and a second differential output end of the differential operational amplifier A0 is connected with a gate of the PMOS tube Mp 4.
Further, the reference voltage generating module includes an operational amplifier A1, a PMOS transistor Mp5, a variable resistor R1, and a resistor R2, where an inverting input terminal of the operational amplifier A1 is connected to the bandgap reference voltage VBG, an output terminal of the operational amplifier A1 is connected to a gate of the PMOS transistor Mp5, a source of the PMOS transistor Mp5 is connected to the power VCC, a drain of the PMOS transistor Mp5 is connected to one end of the variable resistor R1 and an homodromous input terminal of the operational amplifier A1 to generate the feedback voltage VFB, another end of the variable resistor R1 is connected to one end of the resistor R2 to output the reference voltage VREF, and another end of the resistor R2 is grounded.
Further, the selector unit is constituted by a plurality of switches connected in parallel.
Further, the buffer unit comprises a PMOS tube Mp6, a PMOS tube Mp7, a PMOS tube Mp8, a PMOS tube Mp9, a PMOS tube Mp10, a PMOS tube Mp11, a PMOS tube Mp12, an NMOS tube Mn2, an NMOS tube Mn3, an NMOS tube Mn4, an NMOS tube Mn5, an NMOS tube Mn6, an NMOS tube Mn7 and an NMOS tube Mn8, wherein the source of the NMOS tube Mn2 is grounded, the grid electrode of the NMOS tube Mn2 is connected with a bias voltage Vb1, the drain electrode of the NMOS tube Mn2 is connected with the source of the NMOS tube Mn7 and the source of the NMOS tube Mn8, the drain electrode of the NMOS tube Mn7 is connected with the drain electrode of the PMOS tube Mp7 and the source of the PMOS tube Mp9, the drain electrode of the NMOS tube Mn8 is connected with the drain electrode of the PMOS tube Mp8 and the source of the PMOS tube Mp10, the source of the PMOS tube Mp7 and the source of the PMOS tube Mp8 are connected with a power supply VCC, the drain electrode of the PMOS tube Mp6 and the source of the PMOS tube Mp11 are connected with the source of the PMOS tube Mp12, the drain electrode of the PMOS tube Mp11 is connected with the source electrode of the NMOS tube Mn6 and the drain electrode of the NMOS tube Mn4, the drain electrode of the PMOS tube Mp12 is connected with the source electrode of the NMOS tube Mn5 and the drain electrode of the NMOS tube Mn3, the source electrode of the NMOS tube Mn3 and the source electrode of the NMOS tube Mn4 are grounded, the drain electrode of the PMOS tube Mp9 is connected with the drain electrode of the NMOS tube Mn5, the gate electrode of the NMOS tube Mn3 and the gate electrode of the NMOS tube Mn4, the drain electrode of the PMOS tube Mp10 is connected with the drain electrode of the NMOS tube Mn6, the gate electrode of the NMOS tube Mn8 and the gate electrode of the PMOS tube Mp11 and serves as the output end of the buffer unit, the gate electrode of the NMOS tube Mn7 and the gate electrode of the PMOS tube Mp12 serve as the input end of the buffer unit, the gate electrode of the PMOS tube Mp6, the gate electrode of the PMOS tube M7 and the gate electrode of the PMOS tube Mp8 are connected with the bias voltage Vb2, the gate electrode of the PMOS tube Mp9 and the gate electrode of the PMOS tube Mp10 are connected with the bias voltage Vb3, and the gate electrode of the NMOS tube Mn5 and the gate electrode of the bias voltage 4 are connected.
A moisture detection method of a moisture detection circuit of a port to ground and to a mains power supply, comprising the steps of:
the selector is controlled by the control signal to sequentially detect the moisture on the ports;
when a port is detected, a control signal controls a switch S0 to be closed, a resistance mode is entered, a high-precision current generation module generates a high-precision current I0, if moisture exists between a detected port and a GND port, an equivalent moisture resistor R0 is formed by short circuit between the detected port and the GND port, the current I0 flows through the equivalent moisture resistor so as to generate a voltage of I0 x R0 at the input end of a buffer, the voltage I0 x R0 is quantized by an ADC unit after passing through the buffer and is compared with a preset first threshold voltage, and if the value of the voltage I0 x R0 is lower than the preset first threshold voltage, the detected port is considered to have a moisture event on the GND port;
when a port is detected, the control signal controls the switch S0 to be disconnected and enter a voltage mode, if moisture exists between the detected port and the VCC port, an equivalent moisture resistor R0 is formed by short circuit between the detected port and the VCC port to conduct between the detected port and the VCC port, a voltage V0 is generated at the input end of the buffer after the voltage value of the VCC port passes through the equivalent moisture resistor R0, the voltage V0 is quantized by the ADC unit after passing through the buffer and then is compared with a preset second threshold voltage, and if the value of the voltage V0 is higher than the preset second threshold voltage, the detected port is considered to have a moisture event on the VCC port.
Compared with the prior art, the invention has the following advantages and effects: the invention provides a port-to-ground and total power supply moisture detection circuit and a detection method thereof, wherein the port-to-ground and total power supply moisture detection circuit is provided with a resistance mode and a voltage mode, and mode switching is realized through a switch, the resistance mode detects a port-to-ground moisture event, and the voltage mode detects a port-to-total power supply moisture event, so that the port-to-ground and total power supply moisture event is comprehensively detected; the high-precision current generation module can freely adjust the output current, so that the required proper high-precision current is obtained, and the moisture detection effect and precision are improved.
Drawings
Fig. 1 is a schematic diagram of a moisture detection circuit of the present invention with ports to ground and to the mains supply.
Fig. 2 is a circuit diagram of the high-precision current generation module of the present invention.
Fig. 3 is a circuit diagram of the reference voltage generation module of the present invention.
Fig. 4 is a circuit diagram of a buffer unit of the present invention.
Fig. 5 is a flow chart of the moisture detection method of the present invention.
Detailed Description
In order to explain in detail the technical solutions adopted by the present invention to achieve the predetermined technical purposes, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments, and that technical means or technical features in the embodiments of the present invention may be replaced without inventive effort, and the present invention will be described in detail below with reference to the accompanying drawings in combination with the embodiments.
As shown in fig. 1, a moisture detection circuit of a port to ground and to a total power supply of the present invention includes a high precision current generation module, a reference voltage generation module, a register unit, an ADC unit, a selector unit, and a buffer unit, the high precision current generation module generating a high precision current and an output terminal of the high precision current generation module being connected to one end of a switch S0, the switch S0 being for switching a resistance mode and a voltage mode and the other end of the switch S0 being connected to an input terminal of the selector unit and an input terminal of the buffer unit, a plurality of output terminals of the selector unit being respectively connected to a plurality of ports for selecting a test port, an output terminal of the buffer unit being connected to an input terminal of the ADC unit for increasing a driving force and isolating the ADC unit from the ports, the ADC unit being for quantizing input information and an output terminal of the ADC unit being connected to the register unit, the register unit being for collecting, storing and judging data detected by the ADC unit, the reference voltage generation module being connected to the ADC unit for generating an ADC unit reference voltage.
The high precision current generating module, the switch S0 and the selector are controlled by control signals.
As shown in fig. 2, the high precision current generating module includes a PMOS transistor Mp1, a PMOS transistor Mp2, a PMOS transistor Mp3, a PMOS transistor Mp4, a differential operational amplifier A0, an NMOS transistor M0, and NMOS transistors M1 to Mn, the source of the PMOS transistor Mp1 and the source of the PMOS transistor Mp2 are connected to a power supply VCC, the gate of the PMOS transistor Mp1 is connected to the gate of the PMOS transistor Mp2, the drain of the PMOS transistor Mp1 is connected to the source of the PMOS transistor Mp3 and the same direction input terminal of the differential operational amplifier A0, the drain of the PMOS transistor Mp2 is connected to the source of the PMOS transistor Mp4 and the reverse input terminal of the differential operational amplifier A0, the output terminal of the differential operational amplifier A0 is connected to the gate of the PMOS transistor Mp3 and the gate of the PMOS transistor Mp4, the drain of the PMOS transistor Mp4 is used as the output terminal of the high precision current generating module, the drain of the PMOS transistor Mp3 is connected to the drain of the NMOS transistor M0 and one end of the switch S1 to Sn, the other end of the switch S1 to Sn is connected to the NMOS transistor Mn 1 to Mn, the drain of the NMOS transistor Mn 1 to Mn 0, and the drain of the NMOS transistor Mn 1 to Mn is connected to the drain of the NMOS transistor Mn 0.
The differential operational amplifier A0 adopts a differential input differential output type full differential operational amplifier, a first differential output end of the differential operational amplifier A0 is connected with a grid electrode of the PMOS tube Mp3, and a second differential output end of the differential operational amplifier A0 is connected with a grid electrode of the PMOS tube Mp 4. The differential operational amplifier A0 clamps the drain terminals of the PMOS transistor MP1 and the PMOS transistor MP2 to be approximately equal, so as to eliminate the influence of the channel length modulation effect.
The PMOS tube Mp1 and the PMOS tube Mp2 form a current mirror, and the PMOS tube Mp3 and the PMOS tube Mp4 are matched with the differential operational amplifier A0 to clamp the drain voltages of the PMOS tube Mp1 and the PMOS tube Mp2 to be equal. In the circuit of the high-precision current generation module shown in fig. 2, a desired current level can be obtained by selecting a suitable number of switches S1 to Sn to be closed. When the number of switches S1 to Sn is increased, the total current increases, and when the number of switches S1 to Sn is decreased, the total current decreases. The total current flowing through all the switches S1 to Sn and the NMOS tube M0 is the current flowing through the PMOS tube MP1, and the current is mirrored to the PMOS tube MP2 through the current mirror and flows through the PMOS tube MP3, and then the high-precision current is output by the drain electrode of the PMOS tube MP 3.
As shown in fig. 3, the reference voltage generating module includes an operational amplifier A1, a PMOS transistor Mp5, a variable resistor R1, and a resistor R2, wherein an inverting input terminal of the operational amplifier A1 is connected to a bandgap reference voltage VBG, an output terminal of the operational amplifier A1 is connected to a gate of the PMOS transistor Mp5, a source of the PMOS transistor Mp5 is connected to a power supply VCC, a drain of the PMOS transistor Mp5 is connected to one end of the variable resistor R1 and an homodromous input terminal of the operational amplifier A1 to generate a feedback voltage VFB, another end of the variable resistor R1 is connected to one end of the resistor R2 to output a reference voltage VREF, and another end of the resistor R2 is grounded. The negative feedback circuit formed by the operational amplifier A1, the PMOS tube MP5, the variable resistor R1 and the resistor R2 can generate stable feedback voltage VFB at the drain electrode of the PMOS tube MP5, and then the voltage is divided by adjusting the resistance value of the variable resistor R1, so that the reference voltage VREF needed by people is obtained.
The selector unit is composed of a plurality of parallel switches, and the on-off of the parallel switches is controlled by a control signal, so that the corresponding ports are selected for testing.
As shown in FIG. 4, the buffer unit comprises a PMOS tube Mp6, a PMOS tube Mp7, a PMOS tube Mp8, a PMOS tube Mp9, a PMOS tube Mp10, a PMOS tube Mp11, a PMOS tube Mp12, an NMOS tube Mn2, an NMOS tube Mn3, an NMOS tube Mn4, an NMOS tube Mn5, an NMOS tube Mn6, an NMOS tube Mn7 and an NMOS tube Mn8, wherein the source of the NMOS tube Mn2 is grounded, the gate of the NMOS tube Mn2 is connected with a bias voltage Vb1, the drain of the NMOS tube Mn2 is connected with the source of the NMOS tube Mn7 and the source of the NMOS tube Mn8, the drain of the NMOS tube Mn7 is connected with the drain of the PMOS tube Mp7 and the source of the PMOS tube Mp9, the drain of the NMOS tube Mn8 is connected with the drain of the PMOS tube Mp8 and the source of the PMOS tube Mp10, the source of the PMOS tube Mp6, the source of the PMOS tube Mp7 and the source of the PMOS tube Mp8 are connected with the source of the PMOS tube Mp11 and the source of the PMOS tube Mp12, the drain electrode of the PMOS tube Mp11 is connected with the source electrode of the NMOS tube Mn6 and the drain electrode of the NMOS tube Mn4, the drain electrode of the PMOS tube Mp12 is connected with the source electrode of the NMOS tube Mn5 and the drain electrode of the NMOS tube Mn3, the source electrode of the NMOS tube Mn3 and the source electrode of the NMOS tube Mn4 are grounded, the drain electrode of the PMOS tube Mp9 is connected with the drain electrode of the NMOS tube Mn5, the gate electrode of the NMOS tube Mn3 and the gate electrode of the NMOS tube Mn4, the drain electrode of the PMOS tube Mp10 is connected with the drain electrode of the NMOS tube Mn6, the gate electrode of the NMOS tube Mn8 and the gate electrode of the PMOS tube Mp11 and serves as the output end of the buffer unit, the gate electrode of the NMOS tube Mn7 and the gate electrode of the PMOS tube Mp12 serve as the input end of the buffer unit, the gate electrode of the PMOS tube Mp6, the gate electrode of the PMOS tube M7 and the gate electrode of the PMOS tube Mp8 are connected with the bias voltage Vb2, the gate electrode of the PMOS tube Mp9 and the gate electrode of the PMOS tube Mp10 are connected with the bias voltage Vb3, and the gate electrode of the NMOS tube Mn5 and the gate electrode of the bias voltage 4 are connected. The NMOS transistor Mn7, the NMOS transistor Mn8, the PMOS transistor Mp11 and the PMOS transistor Mp12 form a differential input pair, wherein the N-type transistor input pair and the P-type transistor input pair share Vinn and Vinp ends so as to increase the voltage swing of the input end. The output stage is composed of a PMOS tube Mp8, a PMOS tube Mp10, an NMOS tube Mn4 and an NMOS tube Mn6 which are in a common-source common-gate structure so as to increase the voltage swing of the output end. The bias voltages Vb1, vb2, vb3, and Vb4 are controlled by the bias circuit. Specifically, in the circuit, the drain electrode of the PMOS transistor Mp10 is connected to the drain electrode of the NMOS transistor Mn6, the gate electrode of the NMOS transistor Mn8, and the gate electrode of the PMOS transistor Mp11, and is used as the output end of the buffer unit, that is, the Vout end and Vinn end, to form a unity gain negative feedback.
As shown in fig. 5, a moisture detection method of a moisture detection circuit of a port to ground and to a total power supply includes the steps of:
the selector is controlled by the control signal to sequentially detect the moisture on the ports;
when a port is detected, a control signal controls a switch S0 to be closed, a resistance mode is entered, a high-precision current generation module generates a high-precision current I0, if moisture exists between a detected port and a GND port, an equivalent moisture resistor R0 is formed by short circuit between the detected port and the GND port, the current I0 flows through the equivalent moisture resistor so as to generate a voltage of I0 x R0 at the input end of a buffer, the voltage I0 x R0 is quantized by an ADC unit after passing through the buffer and is compared with a preset first threshold voltage, and if the value of the voltage I0 x R0 is lower than the preset first threshold voltage, the detected port is considered to have a moisture event on the GND port;
when a port is detected, the control signal controls the switch S0 to be disconnected and enter a voltage mode, if moisture exists between the detected port and the VCC port, an equivalent moisture resistor R0 is formed by short circuit between the detected port and the VCC port to conduct between the detected port and the VCC port, a voltage V0 is generated at the input end of the buffer after the voltage value of the VCC port passes through the equivalent moisture resistor R0, the voltage V0 is quantized by the ADC unit after passing through the buffer and then is compared with a preset second threshold voltage, and if the value of the voltage V0 is higher than the preset second threshold voltage, the detected port is considered to have a moisture event on the VCC port.
The invention provides a port-to-ground and total power supply moisture detection circuit and a detection method thereof, wherein the port-to-ground and total power supply moisture detection circuit is provided with a resistance mode and a voltage mode, and mode switching is realized through a switch, the resistance mode detects a port-to-ground moisture event, and the voltage mode detects a port-to-total power supply moisture event, so that the port-to-ground and total power supply moisture event is comprehensively detected; the high-precision current generation module can freely adjust the output current, so that the required proper high-precision current is obtained, and the moisture detection effect and precision are improved.
The present invention is not limited to the preferred embodiments, but is capable of modification and variation in detail, and other embodiments, such as those described above, of making various modifications and equivalents will fall within the spirit and scope of the present invention.

Claims (8)

1. A moisture detection circuit for a port to ground and to a mains supply, characterized by: the high-precision current generation module generates high-precision current, the output end of the high-precision current generation module is connected with one end of a switch S0, the other end of the switch S0 is connected with the input end of the selector unit and the input end of the buffer unit, a plurality of output ends of the selector unit are respectively connected with a plurality of ports for selecting test ports, the output end of the buffer unit is connected with the input end of the ADC unit for increasing driving force and separating the ADC unit from the ports, the ADC unit is used for quantizing input information, the output end of the ADC unit is connected with the register unit, the register unit is used for collecting, storing and judging data detected by the ADC unit, and the reference voltage generation module is connected with the ADC unit for generating ADC unit reference voltage.
2. A port-to-ground and total power moisture detection circuit as in claim 1, wherein: the high-precision current generation module, the switch S0 and the selector are all controlled by control signals.
3. A port-to-ground and total power moisture detection circuit as in claim 1, wherein: the high-precision current generation module comprises a PMOS tube MP1, a PMOS tube MP2, a PMOS tube MP3, a PMOS tube MP4, a differential operational amplifier A0, an NMOS tube M1-NMOS tube Mn, wherein the source electrode of the PMOS tube MP1 and the source electrode of the PMOS tube MP2 are connected with a power supply VCC, the grid electrode of the PMOS tube MP1 is connected with the grid electrode of the PMOS tube MP2, the drain electrode of the PMOS tube MP1 is connected with the source electrode of the PMOS tube MP3 and the same-directional input end of the differential operational amplifier A0, the drain electrode of the PMOS tube MP2 is connected with the source electrode of the PMOS tube MP4 and the reverse input end of the differential operational amplifier A0, the output end of the differential operational amplifier A0 is connected with the grid electrode of the PMOS tube MP3 and the grid electrode of the PMOS tube MP4, the drain electrode of the PMOS tube MP4 is used as the output end of the high-precision current generation module, the drain electrode of the PMOS tube MP3 is connected with the drain electrode of the NMOS tube M0 and one end of the switch S1-switch Sn, the other end of the switch S1-switch Sn is sequentially connected with the NMOS tube M1-Mn, the drain electrode of the NMOS tube Mn 1-Mn is connected with the NMOS tube Mn 0, and the bias tube Mn 1-Mn is connected with the drain electrode of the NMOS tube Mn 0 is connected with the bias tube M0.
4. A port-to-ground and total power moisture detection circuit as in claim 3, wherein: the differential operational amplifier A0 adopts a differential input differential output type full differential operational amplifier, a first differential output end of the differential operational amplifier A0 is connected with a grid electrode of the PMOS tube MP3, and a second differential output end of the differential operational amplifier A0 is connected with a grid electrode of the PMOS tube MP 4.
5. A port-to-ground and total power moisture detection circuit as in claim 1, wherein: the reference voltage generation module comprises an operational amplifier A1, a PMOS tube MP5, a variable resistor R1 and a resistor R2, wherein the reverse input end of the operational amplifier A1 is connected with a band gap reference voltage VBG, the output end of the operational amplifier A1 is connected with the grid electrode of the PMOS tube MP5, the source electrode of the PMOS tube MP5 is connected with a power supply VCC, the drain electrode of the PMOS tube MP5 is connected with one end of the variable resistor R1 and the same-direction input end of the operational amplifier A1 to generate a feedback voltage VFB, the other end of the variable resistor R1 is connected with one end of the resistor R2 to output a reference voltage VREF, and the other end of the resistor R2 is grounded.
6. A port-to-ground and total power moisture detection circuit as in claim 1, wherein: the selector unit is composed of a plurality of switches connected in parallel.
7. A port-to-ground and total power moisture detection circuit as in claim 1, wherein: the buffer unit comprises a PMOS tube Mp6, a PMOS tube Mp7, a PMOS tube Mp8, a PMOS tube Mp9, a PMOS tube Mp10, a PMOS tube Mp11, a PMOS tube Mp12, an NMOS tube Mn2, an NMOS tube Mn3, an NMOS tube Mn4, an NMOS tube Mn5, an NMOS tube Mn6, an NMOS tube Mn7 and an NMOS tube Mn8, wherein the source of the NMOS tube Mn2 is grounded, the grid electrode of the NMOS tube Mn2 is connected with a bias voltage Vb1, the drain electrode of the NMOS tube Mn2 is connected with the source of the NMOS tube Mn7 and the source of the NMOS tube Mn8, the drain electrode of the NMOS tube Mn7 is connected with the drain electrode of the PMOS tube Mp7 and the source of the PMOS tube Mp9, the drain electrode of the NMOS tube Mn8 is connected with the drain electrode of the PMOS tube Mp8 and the source of the PMOS tube Mp10, the source of the PMOS tube Mp7 and the source of the PMOS tube Mp8 are connected with a power supply, the drain electrode of the PMOS tube Mp6 is connected with the source of the PMOS tube Mp11 and the source of the PMOS tube Mp12, the drain electrode of the PMOS tube Mp11 is connected with the source electrode of the NMOS tube Mn6 and the drain electrode of the NMOS tube Mn4, the drain electrode of the PMOS tube Mp12 is connected with the source electrode of the NMOS tube Mn5 and the drain electrode of the NMOS tube Mn3, the source electrode of the NMOS tube Mn3 and the source electrode of the NMOS tube Mn4 are grounded, the drain electrode of the PMOS tube Mp9 is connected with the drain electrode of the NMOS tube Mn5, the gate electrode of the NMOS tube Mn3 and the gate electrode of the NMOS tube Mn4, the drain electrode of the PMOS tube Mp10 is connected with the drain electrode of the NMOS tube Mn6, the gate electrode of the NMOS tube Mn8 and the gate electrode of the PMOS tube Mp11 and serves as the output end of the buffer unit, the gate electrode of the NMOS tube Mn7 and the gate electrode of the PMOS tube Mp12 serve as the input end of the buffer unit, the gate electrode of the PMOS tube Mp6, the gate electrode of the PMOS tube M7 and the gate electrode of the PMOS tube Mp8 are connected with the bias voltage Vb2, the gate electrode of the PMOS tube Mp9 and the gate electrode of the PMOS tube Mp10 are connected with the bias voltage Vb3, and the gate electrode of the NMOS tube Mn5 and the gate electrode of the bias voltage 4 are connected.
8. A method of moisture detection of a port to ground and to the moisture detection circuit of a mains power supply as claimed in any one of claims 1 to 7, comprising the steps of:
the selector is controlled by the control signal to sequentially detect the moisture on the ports;
when a port is detected, a control signal controls a switch S0 to be closed, a resistance mode is entered, a high-precision current generation module generates a high-precision current I0, if moisture exists between a detected port and a GND port, an equivalent moisture resistor R0 is formed by short circuit between the detected port and the GND port, the current I0 flows through the equivalent moisture resistor so as to generate a voltage of I0 x R0 at the input end of a buffer, the voltage I0 x R0 is quantized by an ADC unit after passing through the buffer and is compared with a preset first threshold voltage, and if the value of the voltage I0 x R0 is lower than the preset first threshold voltage, the detected port is considered to have a moisture event on the GND port;
when a port is detected, the control signal controls the switch S0 to be disconnected and enter a voltage mode, if moisture exists between the detected port and the VCC port, an equivalent moisture resistor R0 is formed by short circuit between the detected port and the VCC port to conduct between the detected port and the VCC port, a voltage V0 is generated at the input end of the buffer after the voltage value of the VCC port passes through the equivalent moisture resistor R0, the voltage V0 is quantized by the ADC unit after passing through the buffer and then is compared with a preset second threshold voltage, and if the value of the voltage V0 is higher than the preset second threshold voltage, the detected port is considered to have a moisture event on the VCC port.
CN202311802582.0A 2023-12-26 2023-12-26 Moisture detection circuit for port to ground and total power supply and detection method thereof Active CN117451795B (en)

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