CN117434436A - Electromagnetic relay testing device and testing method - Google Patents

Abstract

The invention relates to an electromagnetic relay testing device and a testing method, comprising the following steps: the electromagnetic relay testing device comprises a power supply module, an electromagnetic relay testing module of each channel and an FPGA main control module; the power supply module is electrically connected with the electromagnetic relay test modules of all channels and the FPGA main control module, and the electromagnetic relay test modules of all channels are electrically connected with the FPGA main control module; the power supply module is used for supplying power to the electromagnetic relay test module and the FPGA main control module of each channel; the FPGA main control module is used for determining an electromagnetic relay test result matched with each channel according to a target operation mode corresponding to the channel for the electromagnetic relay test module of each channel. The electromagnetic relay testing device is used for testing the electromagnetic relays of all channels, reliable testing results (electromagnetic relay parameter testing results, current testing results and rebound testing results) are obtained, and relay circuit components are selected and then developed and designed in an auxiliary mode based on the reliable relay testing results.

Description

Electromagnetic relay testing device and testing method

Technical Field

The invention relates to the technical field of electromagnetic relays, in particular to an electromagnetic relay testing device and an electromagnetic relay testing method.

Background

Currently, electromagnetic relays are electronic components that are widely used in life, and can be divided into a control terminal and an output terminal. And the inside mainly comprises a coil, an iron core, an armature and a contact reed. When rated voltage and current are input to the control end, an electromagnetic effect is generated when a coil in the relay flows through a certain current, the armature is pulled to the iron core under the action of the electromagnetic force and is contacted with the iron core, the output end of the relay forms a closed loop, when the current in the coil becomes smaller, the electromagnetic force is gradually reduced until the armature is separated from the iron core under the pulling of the contact spring, and the connection of the output end is disconnected.

Along with the rapid development and wide application of electromagnetic relays in the electronic industry, the model specification parameters of electromagnetic relays are also more and more complete. In the working circuit of an electromagnetic relay, the working environment of the circuit, the design of the relay circuit, the service condition of a load, the use times, the use time and the like have certain influence on the parameters and the reliability of the relay, and the relay can also have the problems of contact faults, coil faults, magnetic circuit faults and the like in the use process. If the relay fails during use, a significant loss may result. For example, in the process of machining parts of a machine tool, part of alarm signals and power supplies of equipment are controlled by an electromagnetic relay, if the electromagnetic relay fails, damage to the parts of the machine tool can be caused, economic loss is caused, and personal safety is further compromised when serious, so that the type selection and design of the electromagnetic relay are very important, and even various condition factors of the use environment of the electromagnetic relay are considered. In this regard, it is desirable to perform reliable testing on the electromagnetic relay in the early stage, and assist in the type selection and subsequent development design of the relay circuit components based on the reliable relay test results.

Disclosure of Invention

Therefore, the invention aims to provide an electromagnetic relay testing device and a testing method, so as to realize reliable testing of an electromagnetic relay and obtain a reliable testing result, thereby assisting in selection and subsequent research and development design of relay circuit components based on the reliable relay testing result.

According to a first aspect of an embodiment of the present invention, there is provided an air-conditioning electromagnetic relay testing apparatus, including: the electromagnetic relay testing device comprises a power supply module, an electromagnetic relay testing module of each channel and an FPGA main control module; the power supply module is respectively and electrically connected with the electromagnetic relay test modules of all channels and the FPGA main control module, and the electromagnetic relay test modules of all channels are electrically connected with the FPGA main control module; and

the power supply module is used for supplying power to the electromagnetic relay test module of each channel and the FPGA main control module;

the FPGA main control module is used for determining an electromagnetic relay test result matched with each channel according to a target operation mode corresponding to the channel for the electromagnetic relay test module of each channel; wherein the target operating mode includes at least one of: a first operation mode, a second operation mode, a third operation mode; wherein, the electromagnetic relay test result comprises at least one of the following: an electromagnetic relay parameter test result corresponding to the first operation mode, a current test result corresponding to the second operation mode, and a rebound test result corresponding to the third operation mode.

According to a second aspect of an embodiment of the present invention, there is provided a testing method, which is characterized in that it is applied to the electromagnetic relay testing apparatus described in the first aspect, including:

for an electromagnetic relay test module of each channel, determining a target operation mode corresponding to the channel; wherein the target operating mode includes at least one of: a first operation mode, a second operation mode, a third operation mode;

determining an electromagnetic relay test result matched with the channel according to the target operation mode corresponding to the channel; wherein, the electromagnetic relay test result comprises at least one of the following: an electromagnetic relay parameter test result corresponding to the first operation mode, a current test result corresponding to the second operation mode, and a rebound test result corresponding to the third operation mode.

The technical scheme provided by the embodiment of the invention can comprise the following beneficial effects:

the electromagnetic relay testing device is used for testing the electromagnetic relays of all channels, reliable testing results (electromagnetic relay parameter testing results, current testing results and rebound testing results) are obtained, and relay circuit components are selected and then developed and designed in an auxiliary mode based on the reliable relay testing results.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic block diagram of an electromagnetic relay testing apparatus shown in accordance with an exemplary embodiment;

FIG. 2 is a schematic block diagram of an electromagnetic relay test apparatus (single pass) shown in accordance with an exemplary embodiment;

FIG. 3 is a schematic block diagram of an electromagnetic relay test apparatus (overall multiplexing) shown according to an example embodiment;

FIG. 4 is a hardware block diagram of an FPGA host module shown according to an exemplary embodiment;

FIG. 5 is an operator panel interface diagram illustrating an example embodiment;

FIG. 6 is a hardware block diagram of an acquisition circuit shown according to an exemplary embodiment;

FIG. 7 is a flow chart of a test method according to an exemplary embodiment;

FIG. 8 is a flow chart illustrating another test method according to an exemplary embodiment.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the invention. Rather, they are merely examples of apparatus and methods consistent with aspects of the invention as detailed in the accompanying claims.

Fig. 1 is a schematic block diagram of an electromagnetic relay testing apparatus, as shown in fig. 1, according to an exemplary embodiment, including: the electromagnetic relay testing device comprises a power supply module, electromagnetic relay testing modules of all channels (in the case of a single channel, the simplest structure of the electromagnetic relay testing modules is a relay testing piece in fig. 1), and an FPGA main control module; the power supply module is respectively and electrically connected with the electromagnetic relay test modules of all channels and the FPGA main control module, and the electromagnetic relay test modules of all channels are electrically connected with the FPGA main control module; and

the power supply module is used for supplying power to the electromagnetic relay test module of each channel and the FPGA main control module;

The FPGA main control module is used for determining an electromagnetic relay test result matched with each channel according to a target operation mode corresponding to the channel for the electromagnetic relay test module of each channel; wherein the target operating mode includes at least one of: a first operation mode, a second operation mode, a third operation mode; wherein, the electromagnetic relay test result comprises at least one of the following: an electromagnetic relay parameter test result corresponding to the first operation mode, a current test result corresponding to the second operation mode, and a rebound test result corresponding to the third operation mode.

The relay parameter collection and reliability test method is based on relay type selection, design research and development and test stages, and can collect relay parameters and test reliability through accessing actual loads or electronic loads (arranged in an electromagnetic relay test module), so that more complete data are provided for a developer, and the developer is helped to conduct relay type selection, hardware development and risk prediction.

The electromagnetic relay testing device can provide electromagnetic relay testing modules of at least one channel, and the electromagnetic relay testing modules of each channel can test the electromagnetic relay in a corresponding operation mode to obtain corresponding electromagnetic relay testing results. Therefore, the testing of a plurality of relays with different types and circuits thereof can be simultaneously carried out, and the relay type selection or circuit design which is more suitable for circuit design is obtained by comparing the differences among the relays.

Moreover, for the single-channel electromagnetic relay test module, the simplest module structure is the relay test piece shown in fig. 1, namely, the electromagnetic relay to be tested. The power supply module can supply power to the relay test piece and the FPGA main control module. The FPGA main control module can send out control signals under corresponding operation modes to the relay test piece, so that the relay test piece returns corresponding parameters to the FPGA main control module in response to the control signals, and the main control module generates a final electromagnetic relay test result. The FPGA main control module can also send control signals under corresponding operation modes to the power supply module, so that the power supply module responds to the control signals and controls parameters such as power supply current of the relay test piece.

The method comprises the steps of providing three different operation modes for a user to select a test, wherein the first operation mode is mainly used for measuring parameters such as durability, action time and failure times of the electromagnetic relay. The second operation mode is mainly used for testing the minimum action current and the minimum release current of the electromagnetic relay, and the third operation mode is mainly used for measuring the rebound time and the rebound times of the action and the release of the electromagnetic relay.

And the relay test flows under different operation modes can be executed simultaneously by different channels, so that corresponding electromagnetic relay test results are obtained.

The test channel support of the relay test piece is further expanded, and the upper limit of the expansion depends on available resources and data processing capacity of an FPGA chip (an FPGA main control module comprises the FPGA chip). The number of the programmable input/output units and the number of the logic units can be different according to different models. The number of programmable input-output cells and logic cells directly affects the number of scalable channels. For the programmable input-output unit of the FPGA, if the programmable input-output unit is completely used up, the expansion cannot be continued. The data processing capability is mainly represented by the number of logic units, the number of used logic units is determined after the program is written, and the number of channels to be expanded is adjusted according to the used logic units.

Wherein the number of expansion ports depends on the number of programmable input-output units and the number of logic units. For example, in FPGAs and their application circuits, fewer programmable input/output units are used, except for their own power supply, ground and specific functions, but many and complex operations are performed in FPGAs, which results in program failure to complete compiling and running due to insufficient logic units. In the case that the FPGA logic unit satisfies the program operation, the number of channels that it expands depends on the number of remaining programmable input-output units.

As an alternative embodiment, the electromagnetic relay test module of each channel includes: the device comprises a current acquisition circuit, a relay test piece, a magnetic field acquisition circuit, a resistance-capacitance module and a load; and the current acquisition circuit is respectively and electrically connected with the power supply module, the relay test piece and the FPGA main control module, the relay test piece is respectively and electrically connected with the magnetic field acquisition circuit, the resistance-capacitance module and the FPGA main control module, the resistance-capacitance module is respectively and electrically connected with the FPGA main control module and the load, and the magnetic field acquisition circuit is electrically connected with the FPGA main control module. The load may include a load in actual use or an electronic load, which is not limited in this embodiment.

Referring to fig. 2, fig. 2 is a schematic block diagram of an electromagnetic relay testing apparatus (single-channel) according to an exemplary embodiment, and as shown in fig. 2, in the case of single-channel, the electromagnetic relay testing apparatus mainly includes 9 parts including an FPGA main control module, a display module, an operation panel, a power module, a current acquisition circuit, a magnetic field acquisition circuit, a relay test piece, a resistance-capacitance module, and a load. The modules can be disconnected if not used, such as a current acquisition circuit, a magnetic field acquisition circuit and a resistance-capacitance module. The power supply module can supply power to the current acquisition circuit, the magnetic field acquisition circuit and the FPGA main control module. The current acquisition circuit can be connected with the relay test piece to acquire current data of the relay test piece. The magnetic field acquisition circuit can also be connected with the relay test piece to acquire magnetic field data of the relay test piece. The magnetic field sensor can sense the magnetic field change from space on the Hall element in a space conduction mode, and the magnetic field is acquired when the relay is opened and closed. And the current acquisition circuit and the magnetic field acquisition circuit can be connected with the FPGA main control module to output the current data and the magnetic field data. And the relay test piece can receive a relay control end signal sent by the FPGA main control module, respond to the relay control end signal and output a relay output end signal to the FPGA main control module. And the relay test piece can be connected with the load and the resistance capacitance module respectively. And, the resistive-capacitive module may be connected to a load. And the FPGA main control module can be connected with an operation panel and a display module.

Referring to fig. 3, fig. 3 is a schematic block diagram of an electromagnetic relay testing apparatus (overall multiplexing) according to an exemplary embodiment, and as shown in fig. 3, fig. 3 includes electromagnetic relay testing modules corresponding to a plurality of channels. Please refer to fig. 2 together for the electromagnetic relay test module corresponding to each electromagnetic channel. The load in the present application may include an actually used load and an electronic load. In fig. 3, the relay test piece is connected to the FPGA main control module through the resistor-capacitor module, and the resistor-capacitor module can be connected to a load. In fig. 2, the relay test piece may be connected with a load, a resistance-capacitance module, which is in actual use, and the resistance-capacitance module can be connected with the load. It will be appreciated that the electromagnetic relay test modules of different channels may be different based on different test requirements.

As an alternative embodiment, the current acquisition circuit includes: the device comprises an acquisition circuit, a first operational amplifier circuit, a first digital-to-analog conversion chip and a first interface circuit; and

the acquisition circuit is used for acquiring the initial voltage of the sampling resistor and transmitting the initial voltage to the first operational amplification circuit;

The first operational amplification circuit is used for amplifying the initial voltage to obtain a target voltage and transmitting the target voltage to the first digital-to-analog conversion chip; wherein the target voltage is an analog signal;

the first digital-to-analog conversion chip is used for converting the target voltage into a target digital signal and transmitting the target digital signal to the first interface circuit.

As an alternative embodiment, the magnetic field acquisition circuit comprises: the Hall element, the second operational amplifier circuit, the second digital-to-analog conversion chip and the second interface circuit; and

the Hall element is used for collecting the initial magnetic field intensity and transmitting the initial magnetic field intensity to the second operational amplifier circuit;

the second operational amplification circuit is used for amplifying the initial magnetic field strength to obtain a target magnetic field strength and transmitting the target magnetic field strength to the second digital-to-analog conversion chip; wherein the target magnetic field strength is an analog signal;

the second digital-to-analog conversion chip is used for converting the target magnetic field intensity into a target digital signal and transmitting the target digital signal to the second interface circuit.

Referring to fig. 6, fig. 6 is a hardware block diagram of an acquisition circuit according to an exemplary embodiment, as shown in fig. 6, a current acquisition circuit may use a high-end sampling mode to acquire voltages at two ends of a sampling resistor for amplification, convert an analog signal into a digital signal through a digital-to-analog conversion chip, and finally transmit the digital signal to an acquisition circuit interface of an FPGA main control module through an interface circuit. The block diagram of the magnetic field acquisition circuit is similar to current acquisition, mainly uses Hall components to acquire the surrounding magnetic field, and transmits data to the FPGA main control module in the same way.

The first interface circuit and the second interface circuit are used for being connected to the FPGA main control module.

As an optional implementation manner, the FPGA master control module includes: the device comprises an FPGA chip, a peripheral circuit of the FPGA chip, a storage medium and various interfaces; the FPGA chip is connected with the storage medium and each interface through the peripheral circuit; wherein each interface comprises at least one of the following: the device comprises a relay output end interface, a relay control end interface, an acquisition circuit interface, a display screen interface, an operation panel interface, a USB interface and an SD card interface.

Referring to fig. 4, fig. 4 is a hardware block diagram of an FPGA master control module according to an exemplary embodiment, and as shown in fig. 4, the FPGA master control module mainly includes an FPGA chip and its peripheral circuits, a storage medium, a relay output port interface, a relay control port interface, an acquisition circuit interface, a display screen interface, an operation panel interface, a USB interface, and an SD card interface. The FPGA chip is responsible for processing and transmitting data of all interfaces of the main control module, and reading and storing data with the storage medium. The display screen interface is used for driving the display screen and transmitting display. The operation panel interface circuit is used for connecting the operation panel, and respectively controls the key input and the LED indicator light output of the operation panel by using the methods of key scanning and the shift register. The relay control terminal interface is connected to the control terminal of the relay and used for sending out a relay control signal. The relay output terminal interface is connected to the relay output terminal and used for monitoring the state change of the action and release. The acquisition circuit interface is used for accessing digital signals of the current acquisition circuit and the magnetic field acquisition circuit.

As an alternative embodiment, further comprising: an operation panel and a display module; the FPGA main control module is electrically connected with the operation panel and the display module respectively; wherein, the operation panel at least comprises one of the following: each function key, an indicator light and each interface; wherein each function key at least comprises one of the following: a mode setting key, a unit setting key, a channel setting key, a power supply starting key, a power supply closing key, a starting operation key, a stopping operation key and an emergency stop key; wherein each interface comprises at least one of the following: a USB interface, an SD card interface; and

The indicator lamp is used for indicating a power supply state, a channel running mode and a channel running state;

each interface is used for connecting with external equipment; wherein the external device comprises at least one of: keyboard, mouse, memory card;

and the display module is used for displaying the electromagnetic relay test result.

Referring to fig. 5, fig. 5 is an interface diagram of an operation panel according to an exemplary embodiment, where, as shown in fig. 5, the left side of the panel is a key of an operation device, which includes a number keyboard, and some function keys related to mode setting, unit setting, channel setting, etc., and the upper right corner is an indicator light of the device, for indicating a power source, a channel operation mode, an operation state, etc., and the panel further includes some keys for starting the power source, turning off the power source, starting operation, stopping emergency, etc., and a USB interface and an SD card interface, which may be connected to peripherals similar to a keyboard, a mouse, a memory card, etc. The display module is mainly used for displaying some parameters of the relay in operation test, including channel selection, signal frequency and duty ratio of a relay control signal, current value and magnetic field size of data acquisition, operation time, residual time, signal sending times, signal receiving times, failure times, action time, release time, rebound times and the like of test operation, and a file information display interface for data review and storage. The stopping operation is to stop the program, and the test can be continued by starting operation, and the scram is to stop the operation of the device and restore the initial state, similar to the reset.

As an optional implementation manner, the FPGA master control module is specifically configured to:

for the electromagnetic relay test module of each channel, if the target operation mode corresponding to the channel is the first operation mode, acquiring relay control signal parameters set by a user; wherein the relay control signal parameters include at least one of: signal waveform frequency, duty cycle, number of runs, run time;

based on the relay control signal parameters, sending a control signal to an electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting signals of the output end of the electromagnetic relay to be tested;

determining the electromagnetic relay parameter test result corresponding to the first operation mode based on the output end signal and the control signal; the electromagnetic relay parameter test result is at least used for resistor-capacitor module selection, relay selection and relay circuit design.

In this embodiment, the user connects the required hardware circuits, selects the required current acquisition circuit, load, resistor Rong Mokuai, and the like, and can also access the actually used load to perform the actual test with the resistor-capacitor module, after the hardware connection is completed, the running channel and the running mode are set, different programs can be executed between the channels at the same time, and the upper limit of the channel depends on the available resources and the data processing capability of the FPGA. The relay test piece is required to be connected to the corresponding channel position, then the function of the channel is opened through operation, for example, the relay test piece is placed at the position of the channel 1, the set channel is the channel 1, and the set running mode is the running mode corresponding to the channel 1 and can be manually selected by a user.

In the first mode of operation, the user can control the relay by setting the waveform of the relay control signal, including the frequency, duty cycle, number of runs, and run time of the signal waveform. After the setting is finished, a user can press a program starting button of the operation panel, the FPGA main control module sends out control signals, the electromagnetic relay to be tested acts and releases according to waveforms after receiving the signals, the FPGA main control module collects signals of the output end of the relay to be tested and compares the signals with the sent control signals to obtain response times, failure times, action time and release time of the relay.

And the digital signals processed by the current acquisition module and the magnetic field acquisition module can be received through the port of the acquisition circuit, the current and the magnetic field of the relay control end are obtained through processing, and the change of the resistance value of the relay coil can be calculated through the current of the relay control end. The information collected by the current collection module is the current of the control end, and the information collected by the magnetic field collection module is the change of the magnetic field when the relay acts or releases. When the failure times of the relay to be tested are obviously increased in a period of time or the relay is no longer responsive to the control signal, the relay is considered to be faulty or damaged, wherein the electrical durability is the response times acquired in the test, and the electrical durability is taken as a reference. The acquired data can be displayed in the display screen interface in real time, and can be stored in a storage medium, so that a user can copy and read the data conveniently.

In addition, the user can also use the first operation mode to conduct the test and model selection of the resistance capacitance module. The resistance-capacitance module is widely applied to the output end, has the functions of protecting contacts, absorbing interference and the like, and can be used for selecting or comparing the resistance-capacitance circuit through the test of the first operation mode to obtain the resistance-capacitance circuit which is more suitable for actual load. The relay output can be connected with the resistor-capacitor module and the load by means of connecting wires, and if a hardware circuit board is already provided, lead wires can also be led out to be connected to the device.

The resistance-capacitance module plays roles of arc extinction and interference absorption, a user can select various resistance-capacitance modules to test, and the arc extinction effect, output wave row or electric durability of the relay are observed to achieve more proper shape selection effect.

According to the embodiment, based on the test under the first operation mode, the types of loads are different, different transient responses exist at the output end of the relay, the actual loads and the resistor-capacitor module can be connected to test the relay, the arc extinguishing effect of the relay and the rationality of the type selection of the relay, the resistor Rong Mokuai and the like are researched, and the parameters such as the electrical durability, the action time, the release time, the driving current and the magnetic field size are tested, so that test results are provided for the type selection and research and development design of the relay circuit components.

As an optional implementation manner, the FPGA master control module is specifically configured to:

for the electromagnetic relay test module of each channel, if the target operation mode corresponding to the channel is the second operation mode, controlling the power supply module to gradually increase the driving current until reaching the rated current, and obtaining the minimum action current of the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

controlling the power supply module to gradually reduce the driving current until the electromagnetic relay to be tested is released, so as to obtain the minimum release current of the electromagnetic relay to be tested;

and determining the minimum action current and the minimum release current as the current test result corresponding to the second operation mode.

In this embodiment, in the second operation mode, the user can select the second operation mode and the controlled channel, and the current value of the relay will be automatically measured after the program is started. The FPGA can control the power supply module to slowly and gradually increase the driving current, when a certain critical value is reached, the relay is attracted, and the current value at the moment is transmitted to the FPGA through the current acquisition module, so that the minimum action current of the relay is obtained. At this time, the current rises to the rated current of the relay, then the current is gradually reduced slowly, when the relay is released, the current acquisition module transmits data to the FPGA to obtain the minimum release current of the relay, and the data are displayed on an interface and stored in a storage medium.

With this embodiment, based on the test in the second operation mode, the minimum operation current and the release current of the relay are automatically measured, and the user can design and adjust the circuit based on this data.

As an optional implementation manner, the FPGA master control module is specifically configured to:

for the electromagnetic relay test module of each channel, if the target operation mode corresponding to the channel is the third operation mode, sending an action control signal to the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting level change data of the electromagnetic relay to be tested;

calculating the waveform rebound times and waveform rebound time based on the level change data;

and determining the waveform rebound times and the waveform rebound time as the rebound test result corresponding to the third operation mode.

In this embodiment, the user may select the third mode of operation and the channel to control, and the device will automatically measure the waveform of the relay after the program is initiated. The FPGA sends out action control signals, meanwhile, the waveforms of the actions of the relay are collected, the rebound times and the rebound time of the waveforms are calculated through the collected high-low level changes, then a release control signal is sent, the release waveforms of the relay are collected, the rebound times and the rebound time of the waveforms are calculated, and the data are displayed on an interface and stored in a storage medium.

The relay adopts elastic mechanical contacts to complete the connection and disconnection of the circuit, and when the contacts of the relay are connected or disconnected, an unstable contact period exists, the unstable contact period can cause the change of high and low level, and then a level signal is maintained after the stable contact period is stabilized. The FPGA can sample the level change, the times of sampling the level change and the time of signals, namely the rebound times of waveforms, and then the time from the relay to the time of waveform stabilization, namely the rebound time.

According to the embodiment, based on the test in the third operation mode, the actual load can be accessed, the rebound time and rebound time of the action and release of the relay can be automatically measured, the rebound time and rebound time of the actual load can be obtained by a user, the selection of components and the design of a circuit are adjusted, and the influence caused by rebound is evaluated.

The electromagnetic relay testing device is used for testing the electromagnetic relays of all channels, reliable testing results (electromagnetic relay parameter testing results, current testing results and rebound testing results) are obtained, and relay circuit components are selected and then developed and designed in an auxiliary mode based on the reliable relay testing results. The switch of the device can be controlled through the FPGA by accessing an actual load and a resistance-capacitance module, and the output signal of the device is detected at the output end, so that the problems of component selection, circuit design and component service life of the relay, the resistance-capacitance module and the like are studied. The relay can automatically detect the action current and the release current, the action time, the release time, the electrical durability, the driving current, the magnetic field, the rebound time, the rebound times and the like required by the relay, display data in real time through a display screen, manage data parameters and store and read the data. The relay type measuring device can measure a plurality of relays with different types and circuits thereof, compares differences among the relays, and then obtains relay type selection or circuit design which is more suitable for circuit design.

Based on the same inventive concept, fig. 7 is a schematic flow chart of a testing method according to an exemplary embodiment, and as shown in fig. 7, the method is applicable to the electromagnetic relay testing device, and includes:

step S71, determining a target operation mode corresponding to each channel for the electromagnetic relay test module of the channel; wherein the target operating mode includes at least one of: a first operation mode, a second operation mode, a third operation mode;

step S72, determining an electromagnetic relay test result matched with the channel according to the target operation mode corresponding to the channel; wherein, the electromagnetic relay test result comprises at least one of the following: an electromagnetic relay parameter test result corresponding to the first operation mode, a current test result corresponding to the second operation mode, and a rebound test result corresponding to the third operation mode.

As an optional implementation manner, determining the electromagnetic relay test result matched with the channel according to the target operation mode corresponding to the channel includes:

if the target operation mode corresponding to the channel is the first operation mode, acquiring relay control signal parameters set by a user; wherein the relay control signal parameters include at least one of: signal waveform frequency, duty cycle, number of runs, run time;

Based on the relay control signal parameters, sending a control signal to an electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting signals of the output end of the electromagnetic relay to be tested;

determining the electromagnetic relay parameter test result corresponding to the first operation mode based on the output end signal and the control signal; the electromagnetic relay parameter test result is at least used for resistor-capacitor module selection, relay selection and relay circuit design.

As an optional implementation manner, determining the electromagnetic relay test result matched with the channel according to the target operation mode corresponding to the channel includes:

if the target operation mode corresponding to the channel is the second operation mode, controlling the power supply module to gradually rise the driving current until reaching the rated current, and obtaining the minimum action current of the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

controlling the power supply module to gradually reduce the driving current until the electromagnetic relay to be tested is released, so as to obtain the minimum release current of the electromagnetic relay to be tested;

And determining the minimum action current and the minimum release current as the current test result corresponding to the second operation mode.

As an optional implementation manner, determining the electromagnetic relay test result matched with the channel according to the target operation mode corresponding to the channel includes:

if the target operation mode corresponding to the channel is the third operation mode, sending an action control signal to the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting level change data of the electromagnetic relay to be tested;

calculating the waveform rebound times and waveform rebound time based on the level change data;

and determining the waveform rebound times and the waveform rebound time as the rebound test result corresponding to the third operation mode.

Referring to fig. 8 together, fig. 8 is a flow chart illustrating another test method according to an exemplary embodiment, and as shown in fig. 8, the test in the first operation mode, the test in the second operation mode and the test in the third operation mode correspond to each other from left to right. In the first operation mode, a user connects required hardware circuits well, selects required current acquisition circuits, loads, resistors Rong Mokuai and the like, can be connected to an actually used load collocation resistor-capacitor module to carry out actual test, and after the hardware connection is completed, sets an operation channel and an operation mode, can execute different programs simultaneously, and the upper limit of the channel depends on available resources and data processing capacity of the FPGA. In a first operation mode, a user controls the relay by setting waveforms of control signals of the relay, wherein the waveforms comprise frequency, duty ratio, operation times and operation time of the waveforms of the signals, after the setting is finished, a program start button of an operation panel is pressed, the FPGA main control module sends out the control signals, the electromagnetic relay to be tested acts and releases according to the waveforms after receiving the signals, the FPGA main control module collects signals of the output end of the relay to be tested, and the signals are compared with the sent control signals, so that response times, failure times, action time and release time of the relay are obtained. And the digital signals processed by the current acquisition module and the magnetic field acquisition module can be received through the port of the acquisition circuit, the current and the magnetic field of the relay control end are obtained through processing, and the change of the resistance value of the relay coil can be calculated through the current of the relay control end. When the failure times of the relay to be tested are obviously increased in a period of time or the relay is no longer in response to the control signal, the relay can be considered to be faulty or damaged, and the electrical durability is the response times acquired in the test, so that the relay is taken as a reference. The acquired data can be displayed in the display screen interface in real time, and can be stored in a storage medium, so that a user can copy and read the data conveniently. In addition, the user can also use the first operation mode to perform the test and the model selection of the resistance-capacitance module, the application of the resistance-capacitance module at the output end is very wide, the resistance-capacitance module has the functions of protecting contacts, absorbing interference and the like, and the type selection or comparison of the resistance-capacitance circuit can be performed through the test of the first operation mode to obtain the resistance-capacitance circuit which is more suitable for actual load.

In the second operation mode, a user selects a second operation mode and a controlled channel, after a program is started, the device automatically measures the relay, the FPGA controls the power module to slowly and gradually increase the driving current, when a certain critical value is reached, the relay is attracted, the current value at the moment is transmitted to the FPGA through the current acquisition module to obtain the minimum action current of the relay, the current is increased to the rated current of the relay, the current is slowly and gradually reduced, and when the relay is released, the current acquisition module transmits data to the FPGA to obtain the minimum release current of the relay, and the data are displayed on an interface and stored in a storage medium.

In the third operation mode, the user selects to operate the third operation mode and the controlled channel, after the program is started, the device automatically measures the relay, the FPGA sends out an action control signal, meanwhile, the waveform of the action of the relay is collected, the rebound times and the rebound time of the waveform are calculated through the collected high-low level change, then, a release control signal is sent, the release waveform of the relay is collected, the rebound times and the rebound time of the waveform are calculated, and the data are displayed on an interface and stored in a storage medium.

The electromagnetic relay testing device is used for testing the electromagnetic relays of all channels, reliable testing results (electromagnetic relay parameter testing results, current testing results and rebound testing results) are obtained, and relay circuit components are selected and then developed and designed in an auxiliary mode based on the reliable relay testing results.

The computer-readable storage medium disclosed in the present embodiment includes, but is not limited to: an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

It is to be understood that the same or similar parts in the above embodiments may be referred to each other, and that in some embodiments, the same or similar parts in other embodiments may be referred to.

It should be noted that in the description of the present invention, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Furthermore, in the description of the present invention, unless otherwise indicated, the meaning of "plurality" means at least two.

Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and further implementations are included within the scope of the preferred embodiment of the present invention in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present invention.

It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic cells for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic cells, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.

Those of ordinary skill in the art will appreciate that all or a portion of the steps carried out in the method of the above-described embodiments may be implemented by a program to instruct related hardware, where the program may be stored in a computer readable storage medium, and where the program, when executed, includes one or a combination of the steps of the method embodiments.

In addition, each functional unit in the embodiments of the present invention may be integrated in one processing module, or each unit may exist alone physically, or two or more units may be integrated in one module. The integrated modules may be implemented in hardware or in software functional modules. The integrated modules may also be stored in a computer readable storage medium if implemented in the form of software functional modules and sold or used as a stand-alone product.

The above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, or the like.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.

Claims (13)

1. An electromagnetic relay testing apparatus, comprising: the electromagnetic relay testing device comprises a power supply module, an electromagnetic relay testing module of each channel and an FPGA main control module; the power supply module is respectively and electrically connected with the electromagnetic relay test modules of all channels and the FPGA main control module, and the electromagnetic relay test modules of all channels are electrically connected with the FPGA main control module; and

the power supply module is used for supplying power to the electromagnetic relay test module of each channel and the FPGA main control module;

the FPGA main control module is used for determining an electromagnetic relay test result matched with each channel according to a target operation mode corresponding to the channel for the electromagnetic relay test module of each channel; wherein the target operating mode includes at least one of: a first operation mode, a second operation mode, a third operation mode; wherein, the electromagnetic relay test result comprises at least one of the following: an electromagnetic relay parameter test result corresponding to the first operation mode, a current test result corresponding to the second operation mode, and a rebound test result corresponding to the third operation mode.

2. The apparatus of claim 1, wherein the electromagnetic relay test module of each channel comprises: the device comprises a current acquisition circuit, a relay test piece, a magnetic field acquisition circuit, a resistance-capacitance module and a load; and the current acquisition circuit is respectively and electrically connected with the power supply module, the relay test piece and the FPGA main control module, the relay test piece is respectively and electrically connected with the magnetic field acquisition circuit, the resistance-capacitance module and the FPGA main control module, the resistance-capacitance module is respectively and electrically connected with the FPGA main control module and the load, and the magnetic field acquisition circuit is electrically connected with the FPGA main control module.

3. The apparatus of claim 2, wherein the current acquisition circuit comprises: the device comprises an acquisition circuit, a first operational amplifier circuit, a first digital-to-analog conversion chip and a first interface circuit; and

the acquisition circuit is used for acquiring the initial voltage of the sampling resistor and transmitting the initial voltage to the first operational amplification circuit;

the first operational amplification circuit is used for amplifying the initial voltage to obtain a target voltage and transmitting the target voltage to the first digital-to-analog conversion chip; wherein the target voltage is an analog signal;

The first digital-to-analog conversion chip is used for converting the target voltage into a target digital signal and transmitting the target digital signal to the first interface circuit.

4. The apparatus of claim 2, wherein the magnetic field acquisition circuit comprises: the Hall element, the second operational amplifier circuit, the second digital-to-analog conversion chip and the second interface circuit; and

the Hall element is used for collecting the initial magnetic field intensity and transmitting the initial magnetic field intensity to the second operational amplifier circuit;

the second operational amplification circuit is used for amplifying the initial magnetic field strength to obtain a target magnetic field strength and transmitting the target magnetic field strength to the second digital-to-analog conversion chip; wherein the target magnetic field strength is an analog signal;

the second digital-to-analog conversion chip is used for converting the target magnetic field intensity into a target digital signal and transmitting the target digital signal to the second interface circuit.

5. The apparatus of claim 1, wherein the FPGA master control module comprises: the device comprises an FPGA chip, a peripheral circuit of the FPGA chip, a storage medium and various interfaces; the FPGA chip is connected with the storage medium and each interface through the peripheral circuit; wherein each interface comprises at least one of the following: the device comprises a relay output end interface, an acquisition circuit interface, a display screen interface, an operation panel interface, a USB interface and an SD card interface.

6. The apparatus as recited in claim 1, further comprising: an operation panel and a display module; the FPGA main control module is electrically connected with the operation panel and the display module respectively; wherein, the operation panel at least comprises one of the following: each function key, an indicator light and each interface; wherein each function key at least comprises one of the following: a mode setting key, a unit setting key, a channel setting key, a power supply starting key, a power supply closing key, a starting operation key, a stopping operation key and an emergency stop key; wherein each interface comprises at least one of the following: a USB interface, an SD card interface; and

the indicator lamp is used for indicating a power supply state, a channel running mode and a channel running state;

each interface is used for connecting with external equipment; wherein the external device comprises at least one of: keyboard, mouse, memory card;

and the display module is used for displaying the electromagnetic relay test result.

7. The apparatus of claim 1, wherein the FPGA master control module is specifically configured to:

for the electromagnetic relay test module of each channel, if the target operation mode corresponding to the channel is the first operation mode, acquiring relay control signal parameters set by a user; wherein the relay control signal parameters include at least one of: signal waveform frequency, duty cycle, number of runs, run time;

Based on the relay control signal parameters, sending a control signal to an electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting signals of the output end of the electromagnetic relay to be tested;

determining the electromagnetic relay parameter test result corresponding to the first operation mode based on the output end signal and the control signal; the electromagnetic relay parameter test result is at least used for resistor-capacitor module selection, relay selection and relay circuit design.

8. The apparatus of claim 1, wherein the FPGA master control module is specifically configured to:

for the electromagnetic relay test module of each channel, if the target operation mode corresponding to the channel is the second operation mode, controlling the power supply module to gradually increase the driving current until reaching the rated current, and obtaining the minimum action current of the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

controlling the power supply module to gradually reduce the driving current until the electromagnetic relay to be tested is released, so as to obtain the minimum release current of the electromagnetic relay to be tested;

And determining the minimum action current and the minimum release current as the current test result corresponding to the second operation mode.

9. The apparatus of claim 1, wherein the FPGA master control module is specifically configured to:

for the electromagnetic relay test module of each channel, if the target operation mode corresponding to the channel is the third operation mode, sending an action control signal to the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting level change data of the electromagnetic relay to be tested;

calculating the waveform rebound times and waveform rebound time based on the level change data;

and determining the waveform rebound times and the waveform rebound time as the rebound test result corresponding to the third operation mode.

10. A test method, characterized by being applied to the electromagnetic relay test apparatus as claimed in any one of claims 1 to 9, comprising:

for an electromagnetic relay test module of each channel, determining a target operation mode corresponding to the channel; wherein the target operating mode includes at least one of: a first operation mode, a second operation mode, a third operation mode;

Determining an electromagnetic relay test result matched with the channel according to the target operation mode corresponding to the channel; wherein, the electromagnetic relay test result comprises at least one of the following: an electromagnetic relay parameter test result corresponding to the first operation mode, a current test result corresponding to the second operation mode, and a rebound test result corresponding to the third operation mode.

11. The method of claim 10, wherein determining electromagnetic relay test results that match the channel according to the target operating mode corresponding to the channel comprises:

if the target operation mode corresponding to the channel is the first operation mode, acquiring relay control signal parameters set by a user; wherein the relay control signal parameters include at least one of: signal waveform frequency, duty cycle, number of runs, run time;

based on the relay control signal parameters, sending a control signal to an electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting signals of the output end of the electromagnetic relay to be tested;

Determining the electromagnetic relay parameter test result corresponding to the first operation mode based on the output end signal and the control signal; the electromagnetic relay parameter test result is at least used for resistor-capacitor module selection, relay selection and relay circuit design.

12. The method of claim 10, wherein determining electromagnetic relay test results that match the channel according to the target operating mode corresponding to the channel comprises:

if the target operation mode corresponding to the channel is the second operation mode, controlling the power supply module to gradually rise the driving current until reaching the rated current, and obtaining the minimum action current of the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

controlling the power supply module to gradually reduce the driving current until the electromagnetic relay to be tested is released, so as to obtain the minimum release current of the electromagnetic relay to be tested;

and determining the minimum action current and the minimum release current as the current test result corresponding to the second operation mode.

13. The method of claim 10, wherein determining electromagnetic relay test results that match the channel according to the target operating mode corresponding to the channel comprises:

If the target operation mode corresponding to the channel is the third operation mode, sending an action control signal to the electromagnetic relay to be tested; wherein the electromagnetic relay testing module of the channel comprises the electromagnetic relay to be tested;

collecting level change data of the electromagnetic relay to be tested;

calculating the waveform rebound times and waveform rebound time based on the level change data;

and determining the waveform rebound times and the waveform rebound time as the rebound test result corresponding to the third operation mode.